mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device/cmsis_nvic.c@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
149:156823d33999 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /* mbed Microcontroller Library
<> 144:ef7eb2e8f9f7 2 * CMSIS-style functionality to support dynamic vectors
<> 144:ef7eb2e8f9f7 3 *******************************************************************************
<> 144:ef7eb2e8f9f7 4 * Copyright (c) 2015, STMicroelectronics
<> 144:ef7eb2e8f9f7 5 * All rights reserved.
<> 144:ef7eb2e8f9f7 6 *
<> 144:ef7eb2e8f9f7 7 * Redistribution and use in source and binary forms, with or without
<> 144:ef7eb2e8f9f7 8 * modification, are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 9 *
<> 144:ef7eb2e8f9f7 10 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 11 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 12 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 13 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 14 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 15 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 16 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 17 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 18 *
<> 144:ef7eb2e8f9f7 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 25 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 26 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 27 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 28 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 29 *******************************************************************************
<> 144:ef7eb2e8f9f7 30 */
<> 144:ef7eb2e8f9f7 31 #include "cmsis_nvic.h"
<> 144:ef7eb2e8f9f7 32
<> 144:ef7eb2e8f9f7 33 #define NVIC_RAM_VECTOR_ADDRESS (0x20000000) // Vectors positioned at start of RAM
<> 144:ef7eb2e8f9f7 34 #define NVIC_FLASH_VECTOR_ADDRESS (0x08000000) // Initial vector position in flash
<> 144:ef7eb2e8f9f7 35
<> 144:ef7eb2e8f9f7 36
<> 144:ef7eb2e8f9f7 37 void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
<> 144:ef7eb2e8f9f7 38 int i;
<> 144:ef7eb2e8f9f7 39
<> 144:ef7eb2e8f9f7 40 // Copy and switch to dynamic vectors if first time called
<> 144:ef7eb2e8f9f7 41 if ((SYSCFG->CFGR1 & SYSCFG_CFGR1_MEM_MODE) != SYSCFG_CFGR1_MEM_MODE) {
<> 144:ef7eb2e8f9f7 42 uint32_t *old_vectors = (uint32_t *)NVIC_FLASH_VECTOR_ADDRESS;
<> 144:ef7eb2e8f9f7 43 for (i = 0; i < NVIC_NUM_VECTORS; i++) {
<> 144:ef7eb2e8f9f7 44 *((uint32_t *)(NVIC_RAM_VECTOR_ADDRESS + (i*4))) = old_vectors[i];
<> 144:ef7eb2e8f9f7 45 }
<> 144:ef7eb2e8f9f7 46 SYSCFG->CFGR1 |= SYSCFG_CFGR1_MEM_MODE; // Embedded SRAM mapped at 0x00000000
<> 144:ef7eb2e8f9f7 47 }
<> 144:ef7eb2e8f9f7 48
<> 144:ef7eb2e8f9f7 49 // Set the vector
<> 144:ef7eb2e8f9f7 50 *((uint32_t *)(NVIC_RAM_VECTOR_ADDRESS + (IRQn*4) + (NVIC_USER_IRQ_OFFSET*4))) = vector;
<> 144:ef7eb2e8f9f7 51 }
<> 144:ef7eb2e8f9f7 52
<> 144:ef7eb2e8f9f7 53 uint32_t NVIC_GetVector(IRQn_Type IRQn) {
<> 144:ef7eb2e8f9f7 54 uint32_t *vectors = (uint32_t*)NVIC_RAM_VECTOR_ADDRESS;
<> 144:ef7eb2e8f9f7 55 // Return the vector
<> 144:ef7eb2e8f9f7 56 return vectors[IRQn + 16];
<> 144:ef7eb2e8f9f7 57 }