mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/rtl8195a_timer.h@173:e131a1973e81, 2017-09-15 (annotated)

Committer:
AnnaBridge
Date:
Fri Sep 15 14:59:18 2017 +0100
Revision:
173:e131a1973e81
Parent:
167:e84263d55307
Child:
178:79309dc6340a
This updates the lib to the mbed lib v 151

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 167:e84263d55307 1 /*******************************************************************************
AnnaBridge 167:e84263d55307 2 *Copyright (c) 2013-2016 Realtek Semiconductor Corp, All Rights Reserved
AnnaBridge 167:e84263d55307 3 * SPDX-License-Identifier: LicenseRef-PBL
AnnaBridge 167:e84263d55307 4 *
AnnaBridge 167:e84263d55307 5 * Licensed under the Permissive Binary License, Version 1.0 (the "License");
AnnaBridge 167:e84263d55307 6 * you may not use this file except in compliance with the License.
AnnaBridge 167:e84263d55307 7 *
AnnaBridge 167:e84263d55307 8 * You may obtain a copy of the License at https://www.mbed.com/licenses/PBL-1.0
AnnaBridge 167:e84263d55307 9 *
AnnaBridge 167:e84263d55307 10 * See the License for the specific language governing permissions and limitations under the License.
AnnaBridge 167:e84263d55307 11 *******************************************************************************
AnnaBridge 167:e84263d55307 12 */
AnnaBridge 167:e84263d55307 13
AnnaBridge 167:e84263d55307 14 #ifndef _RTL8195A_TIMER_H_
AnnaBridge 167:e84263d55307 15 #define _RTL8195A_TIMER_H_
AnnaBridge 167:e84263d55307 16
AnnaBridge 167:e84263d55307 17
AnnaBridge 173:e131a1973e81 18 #define TIMER_TICK_US 32
AnnaBridge 167:e84263d55307 19
AnnaBridge 167:e84263d55307 20 #define TIMER_LOAD_COUNT_OFF 0x00
AnnaBridge 167:e84263d55307 21 #define TIMER_CURRENT_VAL_OFF 0x04
AnnaBridge 167:e84263d55307 22 #define TIMER_CTL_REG_OFF 0x08
AnnaBridge 167:e84263d55307 23 #define TIMER_EOI_OFF 0x0c
AnnaBridge 167:e84263d55307 24 #define TIMER_INT_STATUS_OFF 0x10
AnnaBridge 167:e84263d55307 25 #define TIMER_INTERVAL 0x14
AnnaBridge 167:e84263d55307 26 #define TIMERS_INT_STATUS_OFF 0xa0
AnnaBridge 167:e84263d55307 27 #define TIMERS_EOI_OFF 0xa4
AnnaBridge 167:e84263d55307 28 #define TIMERS_RAW_INT_STATUS_OFF 0xa8
AnnaBridge 167:e84263d55307 29 #define TIMERS_COMP_VER_OFF 0xac
AnnaBridge 167:e84263d55307 30
AnnaBridge 167:e84263d55307 31 #define MAX_TIMER_VECTOR_TABLE_NUM 6
AnnaBridge 167:e84263d55307 32
AnnaBridge 167:e84263d55307 33 #define HAL_TIMER_READ32(addr) (*((volatile u32*)(TIMER_REG_BASE + addr)))//HAL_READ32(TIMER_REG_BASE, addr)
AnnaBridge 167:e84263d55307 34 #define HAL_TIMER_WRITE32(addr, value) ((*((volatile u32*)(TIMER_REG_BASE + addr))) = value)//HAL_WRITE32(TIMER_REG_BASE, addr, value)
AnnaBridge 167:e84263d55307 35 #define HAL_TIMER_READ16(addr) (*((volatile u16*)(TIMER_REG_BASE + addr)))//HAL_READ16(TIMER_REG_BASE, addr)
AnnaBridge 167:e84263d55307 36 #define HAL_TIMER_WRITE16(addr, value) ((*((volatile u16*)(TIMER_REG_BASE + addr))) = value)//HAL_WRITE16(TIMER_REG_BASE, addr, value)
AnnaBridge 167:e84263d55307 37 #define HAL_TIMER_READ8(addr) (*((volatile u8*)(TIMER_REG_BASE + addr)))//HAL_READ8(TIMER_REG_BASE, addr)
AnnaBridge 167:e84263d55307 38 #define HAL_TIMER_WRITE8(addr, value) ((*((volatile u8*)(TIMER_REG_BASE + addr))) = value)//HAL_WRITE8(TIMER_REG_BASE, addr, value)
AnnaBridge 167:e84263d55307 39
AnnaBridge 167:e84263d55307 40 _LONG_CALL_ u32
AnnaBridge 167:e84263d55307 41 HalGetTimerIdRtl8195a(
AnnaBridge 167:e84263d55307 42 IN u32 *TimerID
AnnaBridge 167:e84263d55307 43 );
AnnaBridge 167:e84263d55307 44
AnnaBridge 167:e84263d55307 45 _LONG_CALL_ BOOL
AnnaBridge 167:e84263d55307 46 HalTimerInitRtl8195a(
AnnaBridge 167:e84263d55307 47 IN VOID *Data
AnnaBridge 167:e84263d55307 48 );
AnnaBridge 167:e84263d55307 49
AnnaBridge 167:e84263d55307 50 _LONG_CALL_ u32
AnnaBridge 167:e84263d55307 51 HalTimerReadCountRtl8195a(
AnnaBridge 167:e84263d55307 52 IN u32 TimerId
AnnaBridge 167:e84263d55307 53 );
AnnaBridge 167:e84263d55307 54
AnnaBridge 167:e84263d55307 55 _LONG_CALL_ VOID
AnnaBridge 167:e84263d55307 56 HalTimerIrqClearRtl8195a(
AnnaBridge 167:e84263d55307 57 IN u32 TimerId
AnnaBridge 167:e84263d55307 58 );
AnnaBridge 167:e84263d55307 59
AnnaBridge 167:e84263d55307 60 _LONG_CALL_ VOID
AnnaBridge 167:e84263d55307 61 HalTimerDisRtl8195a(
AnnaBridge 167:e84263d55307 62 IN u32 TimerId
AnnaBridge 167:e84263d55307 63 );
AnnaBridge 167:e84263d55307 64
AnnaBridge 167:e84263d55307 65 _LONG_CALL_ VOID
AnnaBridge 167:e84263d55307 66 HalTimerEnRtl8195a(
AnnaBridge 167:e84263d55307 67 IN u32 TimerId
AnnaBridge 167:e84263d55307 68 );
AnnaBridge 167:e84263d55307 69
AnnaBridge 167:e84263d55307 70 _LONG_CALL_ VOID
AnnaBridge 167:e84263d55307 71 HalTimerDumpRegRtl8195a(
AnnaBridge 167:e84263d55307 72 IN u32 TimerId
AnnaBridge 167:e84263d55307 73 );
AnnaBridge 167:e84263d55307 74
AnnaBridge 167:e84263d55307 75 // ROM Code patch
AnnaBridge 167:e84263d55307 76 HAL_Status
AnnaBridge 167:e84263d55307 77 HalTimerInitRtl8195a_Patch(
AnnaBridge 167:e84263d55307 78 IN VOID *Data
AnnaBridge 167:e84263d55307 79 );
AnnaBridge 167:e84263d55307 80
AnnaBridge 167:e84263d55307 81 u32
AnnaBridge 167:e84263d55307 82 HalTimerReadCountRtl8195a_Patch(
AnnaBridge 167:e84263d55307 83 IN u32 TimerId
AnnaBridge 167:e84263d55307 84 );
AnnaBridge 167:e84263d55307 85
AnnaBridge 167:e84263d55307 86 VOID
AnnaBridge 167:e84263d55307 87 HalTimerReLoadRtl8195a_Patch(
AnnaBridge 167:e84263d55307 88 IN u32 TimerId,
AnnaBridge 167:e84263d55307 89 IN u32 LoadUs
AnnaBridge 167:e84263d55307 90 );
AnnaBridge 167:e84263d55307 91
AnnaBridge 167:e84263d55307 92 u32
AnnaBridge 167:e84263d55307 93 HalTimerReadCountRtl8195a_Patch(
AnnaBridge 167:e84263d55307 94 IN u32 TimerId
AnnaBridge 167:e84263d55307 95 );
AnnaBridge 167:e84263d55307 96
AnnaBridge 167:e84263d55307 97 VOID
AnnaBridge 167:e84263d55307 98 HalTimerIrqEnRtl8195a(
AnnaBridge 167:e84263d55307 99 IN u32 TimerId
AnnaBridge 167:e84263d55307 100 );
AnnaBridge 167:e84263d55307 101
AnnaBridge 167:e84263d55307 102 VOID
AnnaBridge 167:e84263d55307 103 HalTimerIrqDisRtl8195a(
AnnaBridge 167:e84263d55307 104 IN u32 TimerId
AnnaBridge 167:e84263d55307 105 );
AnnaBridge 167:e84263d55307 106
AnnaBridge 167:e84263d55307 107 VOID
AnnaBridge 167:e84263d55307 108 HalTimerClearIsrRtl8195a(
AnnaBridge 167:e84263d55307 109 IN u32 TimerId
AnnaBridge 167:e84263d55307 110 );
AnnaBridge 167:e84263d55307 111
AnnaBridge 167:e84263d55307 112 VOID
AnnaBridge 167:e84263d55307 113 HalTimerEnRtl8195a_Patch(
AnnaBridge 167:e84263d55307 114 IN u32 TimerId
AnnaBridge 167:e84263d55307 115 );
AnnaBridge 167:e84263d55307 116
AnnaBridge 167:e84263d55307 117 VOID
AnnaBridge 167:e84263d55307 118 HalTimerDisRtl8195a_Patch(
AnnaBridge 167:e84263d55307 119 IN u32 TimerId
AnnaBridge 167:e84263d55307 120 );
AnnaBridge 167:e84263d55307 121
AnnaBridge 167:e84263d55307 122 VOID
AnnaBridge 167:e84263d55307 123 HalTimerDeInitRtl8195a_Patch(
AnnaBridge 167:e84263d55307 124 IN VOID *Data
AnnaBridge 167:e84263d55307 125 );
AnnaBridge 167:e84263d55307 126
AnnaBridge 167:e84263d55307 127 #if defined(CONFIG_CHIP_C_CUT) || defined(CONFIG_CHIP_E_CUT)
AnnaBridge 167:e84263d55307 128
AnnaBridge 167:e84263d55307 129 __weak _LONG_CALL_
AnnaBridge 167:e84263d55307 130 VOID
AnnaBridge 167:e84263d55307 131 HalTimerIrq2To7HandleV02(
AnnaBridge 167:e84263d55307 132 IN VOID *Data
AnnaBridge 167:e84263d55307 133 );
AnnaBridge 167:e84263d55307 134
AnnaBridge 167:e84263d55307 135 __weak _LONG_CALL_ROM_
AnnaBridge 167:e84263d55307 136 HAL_Status
AnnaBridge 167:e84263d55307 137 HalTimerIrqRegisterRtl8195aV02(
AnnaBridge 167:e84263d55307 138 IN VOID *Data
AnnaBridge 167:e84263d55307 139 );
AnnaBridge 167:e84263d55307 140
AnnaBridge 167:e84263d55307 141 __weak _LONG_CALL_
AnnaBridge 167:e84263d55307 142 HAL_Status
AnnaBridge 167:e84263d55307 143 HalTimerInitRtl8195aV02(
AnnaBridge 167:e84263d55307 144 IN VOID *Data
AnnaBridge 167:e84263d55307 145 );
AnnaBridge 167:e84263d55307 146
AnnaBridge 167:e84263d55307 147 __weak _LONG_CALL_
AnnaBridge 167:e84263d55307 148 u32
AnnaBridge 167:e84263d55307 149 HalTimerReadCountRtl8195aV02(
AnnaBridge 167:e84263d55307 150 IN u32 TimerId
AnnaBridge 167:e84263d55307 151 );
AnnaBridge 167:e84263d55307 152
AnnaBridge 167:e84263d55307 153 __weak _LONG_CALL_
AnnaBridge 167:e84263d55307 154 VOID
AnnaBridge 167:e84263d55307 155 HalTimerReLoadRtl8195aV02(
AnnaBridge 167:e84263d55307 156 IN u32 TimerId,
AnnaBridge 167:e84263d55307 157 IN u32 LoadUs
AnnaBridge 167:e84263d55307 158 );
AnnaBridge 167:e84263d55307 159
AnnaBridge 167:e84263d55307 160 __weak _LONG_CALL_ROM_
AnnaBridge 167:e84263d55307 161 HAL_Status
AnnaBridge 167:e84263d55307 162 HalTimerIrqUnRegisterRtl8195aV02(
AnnaBridge 167:e84263d55307 163 IN VOID *Data
AnnaBridge 167:e84263d55307 164 );
AnnaBridge 167:e84263d55307 165
AnnaBridge 167:e84263d55307 166 __weak _LONG_CALL_
AnnaBridge 167:e84263d55307 167 VOID
AnnaBridge 167:e84263d55307 168 HalTimerDeInitRtl8195aV02(
AnnaBridge 167:e84263d55307 169 IN VOID *Data
AnnaBridge 167:e84263d55307 170 );
AnnaBridge 167:e84263d55307 171
AnnaBridge 167:e84263d55307 172 #endif // end of "#ifdef CONFIG_CHIP_C_CUT"
AnnaBridge 167:e84263d55307 173
AnnaBridge 167:e84263d55307 174 #ifdef CONFIG_CHIP_E_CUT
AnnaBridge 167:e84263d55307 175 _LONG_CALL_ VOID
AnnaBridge 167:e84263d55307 176 HalTimerReLoadRtl8195a_V04(
AnnaBridge 167:e84263d55307 177 IN u32 TimerId,
AnnaBridge 167:e84263d55307 178 IN u32 LoadUs
AnnaBridge 167:e84263d55307 179 );
AnnaBridge 167:e84263d55307 180
AnnaBridge 167:e84263d55307 181 _LONG_CALL_ HAL_Status
AnnaBridge 167:e84263d55307 182 HalTimerInitRtl8195a_V04(
AnnaBridge 167:e84263d55307 183 IN VOID *Data
AnnaBridge 167:e84263d55307 184 );
AnnaBridge 167:e84263d55307 185 #endif // #ifdef CONFIG_CHIP_E_CUT
AnnaBridge 167:e84263d55307 186
AnnaBridge 167:e84263d55307 187 // HAL functions wrapper
AnnaBridge 167:e84263d55307 188 #ifndef CONFIG_RELEASE_BUILD_LIBRARIES
AnnaBridge 167:e84263d55307 189 static __inline HAL_Status
AnnaBridge 167:e84263d55307 190 HalTimerInit(
AnnaBridge 167:e84263d55307 191 IN VOID *Data
AnnaBridge 167:e84263d55307 192 )
AnnaBridge 167:e84263d55307 193 {
AnnaBridge 167:e84263d55307 194 #ifdef CONFIG_CHIP_E_CUT
AnnaBridge 167:e84263d55307 195 return (HalTimerInitRtl8195a_V04(Data));
AnnaBridge 167:e84263d55307 196 #else
AnnaBridge 167:e84263d55307 197 return (HalTimerInitRtl8195a_Patch(Data));
AnnaBridge 167:e84263d55307 198 #endif
AnnaBridge 167:e84263d55307 199 }
AnnaBridge 167:e84263d55307 200
AnnaBridge 167:e84263d55307 201 static __inline VOID
AnnaBridge 167:e84263d55307 202 HalTimerEnable(
AnnaBridge 167:e84263d55307 203 IN u32 TimerId
AnnaBridge 167:e84263d55307 204 )
AnnaBridge 167:e84263d55307 205 {
AnnaBridge 167:e84263d55307 206 HalTimerIrqEnRtl8195a(TimerId);
AnnaBridge 167:e84263d55307 207 HalTimerEnRtl8195a_Patch(TimerId);
AnnaBridge 167:e84263d55307 208 }
AnnaBridge 167:e84263d55307 209
AnnaBridge 167:e84263d55307 210 static __inline VOID
AnnaBridge 167:e84263d55307 211 HalTimerDisable(
AnnaBridge 167:e84263d55307 212 IN u32 TimerId
AnnaBridge 167:e84263d55307 213 )
AnnaBridge 167:e84263d55307 214 {
AnnaBridge 167:e84263d55307 215 HalTimerDisRtl8195a_Patch(TimerId);
AnnaBridge 167:e84263d55307 216 }
AnnaBridge 167:e84263d55307 217
AnnaBridge 167:e84263d55307 218 static __inline VOID
AnnaBridge 167:e84263d55307 219 HalTimerClearIsr(
AnnaBridge 167:e84263d55307 220 IN u32 TimerId
AnnaBridge 167:e84263d55307 221 )
AnnaBridge 167:e84263d55307 222 {
AnnaBridge 167:e84263d55307 223 HalTimerClearIsrRtl8195a(TimerId);
AnnaBridge 167:e84263d55307 224 }
AnnaBridge 167:e84263d55307 225
AnnaBridge 167:e84263d55307 226 static __inline VOID
AnnaBridge 167:e84263d55307 227 HalTimerReLoad(
AnnaBridge 167:e84263d55307 228 IN u32 TimerId,
AnnaBridge 167:e84263d55307 229 IN u32 LoadUs
AnnaBridge 167:e84263d55307 230 )
AnnaBridge 167:e84263d55307 231 {
AnnaBridge 167:e84263d55307 232 #ifdef CONFIG_CHIP_E_CUT
AnnaBridge 167:e84263d55307 233 HalTimerReLoadRtl8195a_V04(TimerId, LoadUs);
AnnaBridge 167:e84263d55307 234 #else
AnnaBridge 167:e84263d55307 235 HalTimerReLoadRtl8195a_Patch(TimerId, LoadUs);
AnnaBridge 167:e84263d55307 236 #endif
AnnaBridge 167:e84263d55307 237 }
AnnaBridge 167:e84263d55307 238
AnnaBridge 167:e84263d55307 239 #if defined(CONFIG_CHIP_A_CUT) || defined(CONFIG_CHIP_B_CUT)
AnnaBridge 167:e84263d55307 240
AnnaBridge 167:e84263d55307 241 static __inline VOID
AnnaBridge 167:e84263d55307 242 HalTimerDeInit(
AnnaBridge 167:e84263d55307 243 IN VOID *Data
AnnaBridge 167:e84263d55307 244 )
AnnaBridge 167:e84263d55307 245 {
AnnaBridge 167:e84263d55307 246 HalTimerDeInitRtl8195a_Patch(Data);
AnnaBridge 167:e84263d55307 247 }
AnnaBridge 167:e84263d55307 248
AnnaBridge 167:e84263d55307 249 #else
AnnaBridge 167:e84263d55307 250
AnnaBridge 167:e84263d55307 251 static __inline VOID
AnnaBridge 167:e84263d55307 252 HalTimerDeInit(
AnnaBridge 167:e84263d55307 253 IN VOID *Data
AnnaBridge 167:e84263d55307 254 )
AnnaBridge 167:e84263d55307 255 {
AnnaBridge 167:e84263d55307 256 HalTimerDeInitRtl8195aV02(Data);
AnnaBridge 167:e84263d55307 257 }
AnnaBridge 167:e84263d55307 258
AnnaBridge 167:e84263d55307 259 #endif // end of "#ifndef CONFIG_CHIP_C_CUT"
AnnaBridge 167:e84263d55307 260 #endif // #ifndef CONFIG_RELEASE_BUILD_LIBRARIES
AnnaBridge 167:e84263d55307 261 #endif //_RTL8195A_TIMER_H_