mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
187:0387e8f68319
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 160:d5399cc887bb 1 /* mbed Microcontroller Library
<> 160:d5399cc887bb 2 * Copyright (c) 2017-2017 ARM Limited
AnnaBridge 189:f392fc9709a3 3 * SPDX-License-Identifier: Apache-2.0
<> 160:d5399cc887bb 4 *
<> 160:d5399cc887bb 5 * Licensed under the Apache License, Version 2.0 (the "License");
<> 160:d5399cc887bb 6 * you may not use this file except in compliance with the License.
<> 160:d5399cc887bb 7 * You may obtain a copy of the License at
<> 160:d5399cc887bb 8 *
<> 160:d5399cc887bb 9 * http://www.apache.org/licenses/LICENSE-2.0
<> 160:d5399cc887bb 10 *
<> 160:d5399cc887bb 11 * Unless required by applicable law or agreed to in writing, software
<> 160:d5399cc887bb 12 * distributed under the License is distributed on an "AS IS" BASIS,
<> 160:d5399cc887bb 13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
<> 160:d5399cc887bb 14 * See the License for the specific language governing permissions and
<> 160:d5399cc887bb 15 * limitations under the License.
<> 160:d5399cc887bb 16 */
<> 160:d5399cc887bb 17
<> 160:d5399cc887bb 18 #include <stdlib.h>
<> 160:d5399cc887bb 19 #include <stdarg.h>
<> 160:d5399cc887bb 20 #include "device.h"
<> 160:d5399cc887bb 21 #include "platform/mbed_application.h"
AnnaBridge 189:f392fc9709a3 22 #include "platform/mbed_mpu_mgmt.h"
<> 160:d5399cc887bb 23
<> 160:d5399cc887bb 24 #if MBED_APPLICATION_SUPPORT
<> 160:d5399cc887bb 25
AnnaBridge 187:0387e8f68319 26 #if defined(__CORTEX_A9)
AnnaBridge 187:0387e8f68319 27
AnnaBridge 187:0387e8f68319 28 static void powerdown_gic(void);
AnnaBridge 187:0387e8f68319 29
AnnaBridge 187:0387e8f68319 30 void mbed_start_application(uintptr_t address)
AnnaBridge 187:0387e8f68319 31 {
AnnaBridge 187:0387e8f68319 32 __disable_irq();
AnnaBridge 187:0387e8f68319 33 powerdown_gic();
AnnaBridge 187:0387e8f68319 34 __enable_irq();
AnnaBridge 187:0387e8f68319 35 ((void(*)())address)();
AnnaBridge 187:0387e8f68319 36 }
AnnaBridge 187:0387e8f68319 37
AnnaBridge 187:0387e8f68319 38 static void powerdown_gic()
AnnaBridge 187:0387e8f68319 39 {
AnnaBridge 187:0387e8f68319 40 int i;
AnnaBridge 187:0387e8f68319 41 int j;
AnnaBridge 187:0387e8f68319 42
AnnaBridge 187:0387e8f68319 43 for (i = 0; i < 32; i++) {
AnnaBridge 187:0387e8f68319 44 GICDistributor->ICENABLER[i] = 0xFFFFFFFF;
AnnaBridge 187:0387e8f68319 45 GICDistributor->ICPENDR[i] = 0xFFFFFFFF;
AnnaBridge 187:0387e8f68319 46 if (i < 4) {
AnnaBridge 187:0387e8f68319 47 GICDistributor->CPENDSGIR[i] = 0xFFFFFFFF;
AnnaBridge 187:0387e8f68319 48 }
AnnaBridge 187:0387e8f68319 49 for (j = 0; j < 8; j++) {
AnnaBridge 189:f392fc9709a3 50 GICDistributor->IPRIORITYR[i * 8 + j] = 0x00000000;
AnnaBridge 187:0387e8f68319 51 }
AnnaBridge 187:0387e8f68319 52 }
AnnaBridge 187:0387e8f68319 53 }
AnnaBridge 187:0387e8f68319 54
AnnaBridge 187:0387e8f68319 55 #else
AnnaBridge 187:0387e8f68319 56
<> 160:d5399cc887bb 57 static void powerdown_nvic(void);
<> 160:d5399cc887bb 58 static void powerdown_scb(uint32_t vtor);
<> 160:d5399cc887bb 59 static void start_new_application(void *sp, void *pc);
<> 160:d5399cc887bb 60
<> 160:d5399cc887bb 61 void mbed_start_application(uintptr_t address)
<> 160:d5399cc887bb 62 {
<> 160:d5399cc887bb 63 void *sp;
<> 160:d5399cc887bb 64 void *pc;
<> 160:d5399cc887bb 65
<> 160:d5399cc887bb 66 // Interrupts are re-enabled in start_new_application
<> 160:d5399cc887bb 67 __disable_irq();
<> 160:d5399cc887bb 68
<> 160:d5399cc887bb 69 SysTick->CTRL = 0x00000000;
<> 160:d5399cc887bb 70 powerdown_nvic();
<> 160:d5399cc887bb 71 powerdown_scb(address);
AnnaBridge 189:f392fc9709a3 72 mbed_mpu_manager_deinit();
AnnaBridge 189:f392fc9709a3 73
AnnaBridge 189:f392fc9709a3 74 #ifdef MBED_DEBUG
AnnaBridge 189:f392fc9709a3 75 // Configs to make debugging easier
AnnaBridge 189:f392fc9709a3 76 #ifdef SCnSCB_ACTLR_DISDEFWBUF_Msk
AnnaBridge 189:f392fc9709a3 77 // Disable write buffer to make BusFaults (eg write to ROM via NULL pointer) precise.
AnnaBridge 189:f392fc9709a3 78 // Possible on Cortex-M3 and M4, not on M0, M7 or M33.
AnnaBridge 189:f392fc9709a3 79 // Would be less necessary if ROM was write-protected in MPU to give a
AnnaBridge 189:f392fc9709a3 80 // precise MemManage exception.
AnnaBridge 189:f392fc9709a3 81 SCnSCB->ACTLR |= SCnSCB_ACTLR_DISDEFWBUF_Msk;
AnnaBridge 189:f392fc9709a3 82 #endif
AnnaBridge 189:f392fc9709a3 83 #endif
<> 160:d5399cc887bb 84
AnnaBridge 187:0387e8f68319 85 sp = *((void **)address + 0);
AnnaBridge 187:0387e8f68319 86 pc = *((void **)address + 1);
<> 160:d5399cc887bb 87 start_new_application(sp, pc);
<> 160:d5399cc887bb 88 }
<> 160:d5399cc887bb 89
<> 160:d5399cc887bb 90 static void powerdown_nvic()
<> 160:d5399cc887bb 91 {
AnnaBridge 173:e131a1973e81 92 int isr_groups_32;
<> 160:d5399cc887bb 93 int i;
<> 160:d5399cc887bb 94 int j;
<> 160:d5399cc887bb 95
Anna Bridge 186:707f6e361f3e 96 #if defined(__CORTEX_M23)
Anna Bridge 186:707f6e361f3e 97 // M23 doesn't support ICTR and supports up to 240 external interrupts.
Anna Bridge 186:707f6e361f3e 98 isr_groups_32 = 8;
Anna Bridge 186:707f6e361f3e 99 #else
AnnaBridge 173:e131a1973e81 100 isr_groups_32 = ((SCnSCB->ICTR & SCnSCB_ICTR_INTLINESNUM_Msk) >> SCnSCB_ICTR_INTLINESNUM_Pos) + 1;
Anna Bridge 186:707f6e361f3e 101 #endif
AnnaBridge 173:e131a1973e81 102 for (i = 0; i < isr_groups_32; i++) {
<> 160:d5399cc887bb 103 NVIC->ICER[i] = 0xFFFFFFFF;
<> 160:d5399cc887bb 104 NVIC->ICPR[i] = 0xFFFFFFFF;
<> 160:d5399cc887bb 105 for (j = 0; j < 8; j++) {
Anna Bridge 186:707f6e361f3e 106 #if defined(__CORTEX_M23)
Anna Bridge 186:707f6e361f3e 107 NVIC->IPR[i * 8 + j] = 0x00000000;
Anna Bridge 186:707f6e361f3e 108 #else
<> 160:d5399cc887bb 109 NVIC->IP[i * 8 + j] = 0x00000000;
Anna Bridge 186:707f6e361f3e 110 #endif
<> 160:d5399cc887bb 111 }
<> 160:d5399cc887bb 112 }
<> 160:d5399cc887bb 113 }
<> 160:d5399cc887bb 114
<> 160:d5399cc887bb 115 static void powerdown_scb(uint32_t vtor)
<> 160:d5399cc887bb 116 {
<> 160:d5399cc887bb 117 int i;
<> 160:d5399cc887bb 118
<> 160:d5399cc887bb 119 // SCB->CPUID - Read only CPU ID register
<> 160:d5399cc887bb 120 SCB->ICSR = SCB_ICSR_PENDSVCLR_Msk | SCB_ICSR_PENDSTCLR_Msk;
<> 160:d5399cc887bb 121 SCB->VTOR = vtor;
<> 160:d5399cc887bb 122 SCB->AIRCR = 0x05FA | 0x0000;
<> 160:d5399cc887bb 123 SCB->SCR = 0x00000000;
<> 160:d5399cc887bb 124 // SCB->CCR - Implementation defined value
Anna Bridge 186:707f6e361f3e 125 #if defined(__CORTEX_M23)
Anna Bridge 186:707f6e361f3e 126 for (i = 0; i < 2; i++) {
Anna Bridge 186:707f6e361f3e 127 SCB->SHPR[i] = 0x00;
Anna Bridge 186:707f6e361f3e 128 }
Anna Bridge 186:707f6e361f3e 129 #else
<> 160:d5399cc887bb 130 for (i = 0; i < 12; i++) {
<> 160:d5399cc887bb 131 #if defined(__CORTEX_M7)
<> 160:d5399cc887bb 132 SCB->SHPR[i] = 0x00;
<> 160:d5399cc887bb 133 #else
<> 160:d5399cc887bb 134 SCB->SHP[i] = 0x00;
<> 160:d5399cc887bb 135 #endif
<> 160:d5399cc887bb 136 }
Anna Bridge 186:707f6e361f3e 137 #endif
<> 160:d5399cc887bb 138 SCB->SHCSR = 0x00000000;
Anna Bridge 186:707f6e361f3e 139 #if defined(__CORTEX_M23)
Anna Bridge 186:707f6e361f3e 140 #else
<> 160:d5399cc887bb 141 SCB->CFSR = 0xFFFFFFFF;
<> 160:d5399cc887bb 142 SCB->HFSR = SCB_HFSR_DEBUGEVT_Msk | SCB_HFSR_FORCED_Msk | SCB_HFSR_VECTTBL_Msk;
<> 160:d5399cc887bb 143 SCB->DFSR = SCB_DFSR_EXTERNAL_Msk | SCB_DFSR_VCATCH_Msk |
<> 160:d5399cc887bb 144 SCB_DFSR_DWTTRAP_Msk | SCB_DFSR_BKPT_Msk | SCB_DFSR_HALTED_Msk;
Anna Bridge 186:707f6e361f3e 145 #endif
<> 160:d5399cc887bb 146 // SCB->MMFAR - Implementation defined value
<> 160:d5399cc887bb 147 // SCB->BFAR - Implementation defined value
<> 160:d5399cc887bb 148 // SCB->AFSR - Implementation defined value
<> 160:d5399cc887bb 149 // SCB->PFR - Read only processor feature register
<> 160:d5399cc887bb 150 // SCB->DFR - Read only debug feature registers
<> 160:d5399cc887bb 151 // SCB->ADR - Read only auxiliary feature registers
<> 160:d5399cc887bb 152 // SCB->MMFR - Read only memory model feature registers
<> 160:d5399cc887bb 153 // SCB->ISAR - Read only instruction set attribute registers
<> 160:d5399cc887bb 154 // SCB->CPACR - Implementation defined value
<> 160:d5399cc887bb 155 }
<> 160:d5399cc887bb 156
<> 160:d5399cc887bb 157 #if defined (__CC_ARM)
<> 160:d5399cc887bb 158
<> 160:d5399cc887bb 159 __asm static void start_new_application(void *sp, void *pc)
<> 160:d5399cc887bb 160 {
<> 160:d5399cc887bb 161 MOV R2, #0
<> 160:d5399cc887bb 162 MSR CONTROL, R2 // Switch to main stack
<> 160:d5399cc887bb 163 MOV SP, R0
<> 160:d5399cc887bb 164 MSR PRIMASK, R2 // Enable interrupts
<> 160:d5399cc887bb 165 BX R1
<> 160:d5399cc887bb 166 }
<> 160:d5399cc887bb 167
<> 160:d5399cc887bb 168 #elif defined (__GNUC__) || defined (__ICCARM__)
<> 160:d5399cc887bb 169
<> 160:d5399cc887bb 170 void start_new_application(void *sp, void *pc)
<> 160:d5399cc887bb 171 {
AnnaBridge 187:0387e8f68319 172 __asm volatile(
Anna Bridge 186:707f6e361f3e 173 "movw r2, #0 \n" // Fail to compile "mov r2, #0" with ARMC6. Replace with MOVW.
AnnaBridge 187:0387e8f68319 174 // We needn't "movt r2, #0" immediately following because MOVW
AnnaBridge 187:0387e8f68319 175 // will zero-extend the 16-bit immediate.
<> 160:d5399cc887bb 176 "msr control, r2 \n" // Switch to main stack
<> 160:d5399cc887bb 177 "mov sp, %0 \n"
<> 160:d5399cc887bb 178 "msr primask, r2 \n" // Enable interrupts
<> 160:d5399cc887bb 179 "bx %1 \n"
<> 160:d5399cc887bb 180 :
AnnaBridge 187:0387e8f68319 181 : "l"(sp), "l"(pc)
<> 160:d5399cc887bb 182 : "r2", "cc", "memory"
<> 160:d5399cc887bb 183 );
<> 160:d5399cc887bb 184 }
<> 160:d5399cc887bb 185
<> 160:d5399cc887bb 186 #else
<> 160:d5399cc887bb 187
<> 160:d5399cc887bb 188 #error "Unsupported toolchain"
<> 160:d5399cc887bb 189
<> 160:d5399cc887bb 190 #endif
<> 160:d5399cc887bb 191
AnnaBridge 187:0387e8f68319 192 #endif
AnnaBridge 187:0387e8f68319 193
<> 160:d5399cc887bb 194 #endif /* MBED_APPLICATION_SUPPORT */