mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_STM/qspi_api.c@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
188:bcfe06ba3d64 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 188:bcfe06ba3d64 1 /* mbed Microcontroller Library
AnnaBridge 188:bcfe06ba3d64 2 * Copyright (c) 2017, ARM Limited
AnnaBridge 188:bcfe06ba3d64 3 * All rights reserved.
AnnaBridge 188:bcfe06ba3d64 4 *
AnnaBridge 188:bcfe06ba3d64 5 * Redistribution and use in source and binary forms, with or without
AnnaBridge 188:bcfe06ba3d64 6 * modification, are permitted provided that the following conditions are met:
AnnaBridge 188:bcfe06ba3d64 7 *
AnnaBridge 188:bcfe06ba3d64 8 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 188:bcfe06ba3d64 9 * this list of conditions and the following disclaimer.
AnnaBridge 188:bcfe06ba3d64 10 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 188:bcfe06ba3d64 11 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 188:bcfe06ba3d64 12 * and/or other materials provided with the distribution.
AnnaBridge 188:bcfe06ba3d64 13 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 188:bcfe06ba3d64 14 * may be used to endorse or promote products derived from this software
AnnaBridge 188:bcfe06ba3d64 15 * without specific prior written permission.
AnnaBridge 188:bcfe06ba3d64 16 *
AnnaBridge 188:bcfe06ba3d64 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 188:bcfe06ba3d64 18 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 188:bcfe06ba3d64 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 188:bcfe06ba3d64 20 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 188:bcfe06ba3d64 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 188:bcfe06ba3d64 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 188:bcfe06ba3d64 23 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 188:bcfe06ba3d64 24 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 188:bcfe06ba3d64 25 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 188:bcfe06ba3d64 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 188:bcfe06ba3d64 27 */
AnnaBridge 188:bcfe06ba3d64 28
AnnaBridge 188:bcfe06ba3d64 29 #if DEVICE_QSPI
AnnaBridge 188:bcfe06ba3d64 30
AnnaBridge 188:bcfe06ba3d64 31 #include "qspi_api.h"
AnnaBridge 188:bcfe06ba3d64 32 #include "mbed_error.h"
AnnaBridge 188:bcfe06ba3d64 33 #include "cmsis.h"
AnnaBridge 188:bcfe06ba3d64 34 #include "pinmap.h"
AnnaBridge 188:bcfe06ba3d64 35 #include "PeripheralPins.h"
AnnaBridge 188:bcfe06ba3d64 36
AnnaBridge 188:bcfe06ba3d64 37 /* Max amount of flash size is 4Gbytes */
AnnaBridge 188:bcfe06ba3d64 38 /* hence 2^(31+1), then FLASH_SIZE_DEFAULT = 1<<31 */
AnnaBridge 188:bcfe06ba3d64 39 #define QSPI_FLASH_SIZE_DEFAULT 0x80000000
AnnaBridge 188:bcfe06ba3d64 40
AnnaBridge 189:f392fc9709a3 41 void qspi_prepare_command(const qspi_command_t *command, QSPI_CommandTypeDef *st_command)
AnnaBridge 188:bcfe06ba3d64 42 {
AnnaBridge 188:bcfe06ba3d64 43 // TODO: shift these around to get more dynamic mapping
AnnaBridge 188:bcfe06ba3d64 44 switch (command->instruction.bus_width) {
AnnaBridge 188:bcfe06ba3d64 45 case QSPI_CFG_BUS_SINGLE:
AnnaBridge 188:bcfe06ba3d64 46 st_command->InstructionMode = QSPI_INSTRUCTION_1_LINE;
AnnaBridge 188:bcfe06ba3d64 47 break;
AnnaBridge 188:bcfe06ba3d64 48 case QSPI_CFG_BUS_DUAL:
AnnaBridge 188:bcfe06ba3d64 49 st_command->InstructionMode = QSPI_INSTRUCTION_2_LINES;
AnnaBridge 188:bcfe06ba3d64 50 break;
AnnaBridge 188:bcfe06ba3d64 51 case QSPI_CFG_BUS_QUAD:
AnnaBridge 188:bcfe06ba3d64 52 st_command->InstructionMode = QSPI_INSTRUCTION_4_LINES;
AnnaBridge 188:bcfe06ba3d64 53 break;
AnnaBridge 188:bcfe06ba3d64 54 default:
AnnaBridge 188:bcfe06ba3d64 55 st_command->InstructionMode = QSPI_INSTRUCTION_NONE;
AnnaBridge 188:bcfe06ba3d64 56 break;
AnnaBridge 188:bcfe06ba3d64 57 }
AnnaBridge 188:bcfe06ba3d64 58
AnnaBridge 188:bcfe06ba3d64 59 st_command->Instruction = command->instruction.value;
AnnaBridge 189:f392fc9709a3 60 st_command->DummyCycles = command->dummy_count;
AnnaBridge 188:bcfe06ba3d64 61 // these are target specific settings, use default values
AnnaBridge 188:bcfe06ba3d64 62 st_command->SIOOMode = QSPI_SIOO_INST_EVERY_CMD;
AnnaBridge 188:bcfe06ba3d64 63 st_command->DdrMode = QSPI_DDR_MODE_DISABLE;
AnnaBridge 188:bcfe06ba3d64 64 st_command->DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY;
AnnaBridge 188:bcfe06ba3d64 65
AnnaBridge 188:bcfe06ba3d64 66 switch (command->address.bus_width) {
AnnaBridge 188:bcfe06ba3d64 67 case QSPI_CFG_BUS_SINGLE:
AnnaBridge 188:bcfe06ba3d64 68 st_command->AddressMode = QSPI_ADDRESS_1_LINE;
AnnaBridge 188:bcfe06ba3d64 69 break;
AnnaBridge 188:bcfe06ba3d64 70 case QSPI_CFG_BUS_DUAL:
AnnaBridge 188:bcfe06ba3d64 71 st_command->AddressMode = QSPI_ADDRESS_2_LINES;
AnnaBridge 188:bcfe06ba3d64 72 break;
AnnaBridge 188:bcfe06ba3d64 73 case QSPI_CFG_BUS_QUAD:
AnnaBridge 188:bcfe06ba3d64 74 st_command->AddressMode = QSPI_ADDRESS_4_LINES;
AnnaBridge 188:bcfe06ba3d64 75 break;
AnnaBridge 188:bcfe06ba3d64 76 default:
AnnaBridge 188:bcfe06ba3d64 77 st_command->AddressMode = QSPI_ADDRESS_NONE;
AnnaBridge 188:bcfe06ba3d64 78 break;
AnnaBridge 188:bcfe06ba3d64 79 }
AnnaBridge 188:bcfe06ba3d64 80
AnnaBridge 188:bcfe06ba3d64 81 if (command->address.disabled == true) {
AnnaBridge 188:bcfe06ba3d64 82 st_command->AddressMode = QSPI_ADDRESS_NONE;
AnnaBridge 188:bcfe06ba3d64 83 st_command->AddressSize = 0;
AnnaBridge 188:bcfe06ba3d64 84 } else {
AnnaBridge 188:bcfe06ba3d64 85 st_command->Address = command->address.value;
AnnaBridge 188:bcfe06ba3d64 86 /* command->address.size needs to be shifted by QUADSPI_CCR_ADSIZE_Pos */
AnnaBridge 188:bcfe06ba3d64 87 st_command->AddressSize = (command->address.size << QUADSPI_CCR_ADSIZE_Pos) & QUADSPI_CCR_ADSIZE_Msk;
AnnaBridge 188:bcfe06ba3d64 88 }
AnnaBridge 188:bcfe06ba3d64 89
AnnaBridge 188:bcfe06ba3d64 90 switch (command->alt.bus_width) {
AnnaBridge 188:bcfe06ba3d64 91 case QSPI_CFG_BUS_SINGLE:
AnnaBridge 188:bcfe06ba3d64 92 st_command->AlternateByteMode = QSPI_ALTERNATE_BYTES_1_LINE;
AnnaBridge 188:bcfe06ba3d64 93 break;
AnnaBridge 188:bcfe06ba3d64 94 case QSPI_CFG_BUS_DUAL:
AnnaBridge 188:bcfe06ba3d64 95 st_command->AlternateByteMode = QSPI_ALTERNATE_BYTES_2_LINES;
AnnaBridge 188:bcfe06ba3d64 96 break;
AnnaBridge 188:bcfe06ba3d64 97 case QSPI_CFG_BUS_QUAD:
AnnaBridge 188:bcfe06ba3d64 98 st_command->AlternateByteMode = QSPI_ALTERNATE_BYTES_4_LINES;
AnnaBridge 188:bcfe06ba3d64 99 break;
AnnaBridge 188:bcfe06ba3d64 100 default:
AnnaBridge 188:bcfe06ba3d64 101 st_command->AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
AnnaBridge 188:bcfe06ba3d64 102 break;
AnnaBridge 188:bcfe06ba3d64 103 }
AnnaBridge 188:bcfe06ba3d64 104
AnnaBridge 188:bcfe06ba3d64 105 if (command->alt.disabled == true) {
AnnaBridge 188:bcfe06ba3d64 106 st_command->AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
AnnaBridge 188:bcfe06ba3d64 107 st_command->AlternateBytesSize = 0;
AnnaBridge 188:bcfe06ba3d64 108 } else {
AnnaBridge 188:bcfe06ba3d64 109 st_command->AlternateBytes = command->alt.value;
AnnaBridge 188:bcfe06ba3d64 110 /* command->AlternateBytesSize needs to be shifted by QUADSPI_CCR_ABSIZE_Pos */
AnnaBridge 188:bcfe06ba3d64 111 st_command->AlternateBytesSize = (command->alt.size << QUADSPI_CCR_ABSIZE_Pos) & QUADSPI_CCR_ABSIZE_Msk;
AnnaBridge 188:bcfe06ba3d64 112 st_command->AlternateBytesSize = command->alt.size;
AnnaBridge 188:bcfe06ba3d64 113 }
AnnaBridge 188:bcfe06ba3d64 114
AnnaBridge 188:bcfe06ba3d64 115 switch (command->data.bus_width) {
AnnaBridge 188:bcfe06ba3d64 116 case QSPI_CFG_BUS_SINGLE:
AnnaBridge 188:bcfe06ba3d64 117 st_command->DataMode = QSPI_DATA_1_LINE;
AnnaBridge 188:bcfe06ba3d64 118 break;
AnnaBridge 188:bcfe06ba3d64 119 case QSPI_CFG_BUS_DUAL:
AnnaBridge 188:bcfe06ba3d64 120 st_command->DataMode = QSPI_DATA_2_LINES;
AnnaBridge 188:bcfe06ba3d64 121 break;
AnnaBridge 188:bcfe06ba3d64 122 case QSPI_CFG_BUS_QUAD:
AnnaBridge 188:bcfe06ba3d64 123 st_command->DataMode = QSPI_DATA_4_LINES;
AnnaBridge 188:bcfe06ba3d64 124 break;
AnnaBridge 188:bcfe06ba3d64 125 default:
AnnaBridge 188:bcfe06ba3d64 126 st_command->DataMode = QSPI_DATA_NONE;
AnnaBridge 188:bcfe06ba3d64 127 break;
AnnaBridge 188:bcfe06ba3d64 128 }
AnnaBridge 188:bcfe06ba3d64 129
AnnaBridge 188:bcfe06ba3d64 130 st_command->NbData = 0;
AnnaBridge 188:bcfe06ba3d64 131 }
AnnaBridge 188:bcfe06ba3d64 132
AnnaBridge 188:bcfe06ba3d64 133
AnnaBridge 188:bcfe06ba3d64 134 qspi_status_t qspi_init(qspi_t *obj, PinName io0, PinName io1, PinName io2, PinName io3, PinName sclk, PinName ssel, uint32_t hz, uint8_t mode)
AnnaBridge 188:bcfe06ba3d64 135 {
AnnaBridge 188:bcfe06ba3d64 136 // Enable interface clock for QSPI
AnnaBridge 189:f392fc9709a3 137 __HAL_RCC_QSPI_CLK_ENABLE();
AnnaBridge 188:bcfe06ba3d64 138
AnnaBridge 188:bcfe06ba3d64 139 // Reset QSPI
AnnaBridge 188:bcfe06ba3d64 140 __HAL_RCC_QSPI_FORCE_RESET();
AnnaBridge 188:bcfe06ba3d64 141 __HAL_RCC_QSPI_RELEASE_RESET();
AnnaBridge 188:bcfe06ba3d64 142
AnnaBridge 188:bcfe06ba3d64 143 // Reset handle internal state
AnnaBridge 188:bcfe06ba3d64 144 obj->handle.State = HAL_QSPI_STATE_RESET;
AnnaBridge 188:bcfe06ba3d64 145 obj->handle.Lock = HAL_UNLOCKED;
AnnaBridge 188:bcfe06ba3d64 146
AnnaBridge 188:bcfe06ba3d64 147 // Set default QSPI handle values
AnnaBridge 188:bcfe06ba3d64 148 obj->handle.Init.ClockPrescaler = 1;
AnnaBridge 188:bcfe06ba3d64 149 obj->handle.Init.FifoThreshold = 1;
AnnaBridge 188:bcfe06ba3d64 150 obj->handle.Init.SampleShifting = QSPI_SAMPLE_SHIFTING_HALFCYCLE;
AnnaBridge 188:bcfe06ba3d64 151 obj->handle.Init.FlashSize = POSITION_VAL(QSPI_FLASH_SIZE_DEFAULT) - 1;
AnnaBridge 188:bcfe06ba3d64 152 obj->handle.Init.ChipSelectHighTime = QSPI_CS_HIGH_TIME_5_CYCLE;
AnnaBridge 188:bcfe06ba3d64 153 obj->handle.Init.ClockMode = QSPI_CLOCK_MODE_0;
AnnaBridge 188:bcfe06ba3d64 154 #ifdef QSPI_DUALFLASH_ENABLE
AnnaBridge 188:bcfe06ba3d64 155 obj->handle.Init.FlashID = QSPI_FLASH_ID_1;
AnnaBridge 188:bcfe06ba3d64 156 obj->handle.Init.DualFlash = QSPI_DUALFLASH_DISABLE;
AnnaBridge 188:bcfe06ba3d64 157 #endif
AnnaBridge 188:bcfe06ba3d64 158
AnnaBridge 188:bcfe06ba3d64 159 obj->handle.Init.ClockMode = mode == 0 ? QSPI_CLOCK_MODE_0 : QSPI_CLOCK_MODE_3;
AnnaBridge 188:bcfe06ba3d64 160
AnnaBridge 188:bcfe06ba3d64 161 QSPIName qspiio0name = (QSPIName)pinmap_peripheral(io0, PinMap_QSPI_DATA);
AnnaBridge 188:bcfe06ba3d64 162 QSPIName qspiio1name = (QSPIName)pinmap_peripheral(io1, PinMap_QSPI_DATA);
AnnaBridge 188:bcfe06ba3d64 163 QSPIName qspiio2name = (QSPIName)pinmap_peripheral(io2, PinMap_QSPI_DATA);
AnnaBridge 188:bcfe06ba3d64 164 QSPIName qspiio3name = (QSPIName)pinmap_peripheral(io3, PinMap_QSPI_DATA);
AnnaBridge 188:bcfe06ba3d64 165 QSPIName qspiclkname = (QSPIName)pinmap_peripheral(sclk, PinMap_QSPI_SCLK);
AnnaBridge 188:bcfe06ba3d64 166 QSPIName qspisselname = (QSPIName)pinmap_peripheral(ssel, PinMap_QSPI_SSEL);
AnnaBridge 188:bcfe06ba3d64 167
AnnaBridge 188:bcfe06ba3d64 168 QSPIName qspi_data_first = (QSPIName)pinmap_merge(qspiio0name, qspiio1name);
AnnaBridge 188:bcfe06ba3d64 169 QSPIName qspi_data_second = (QSPIName)pinmap_merge(qspiio2name, qspiio3name);
AnnaBridge 188:bcfe06ba3d64 170 QSPIName qspi_data_third = (QSPIName)pinmap_merge(qspiclkname, qspisselname);
AnnaBridge 188:bcfe06ba3d64 171
AnnaBridge 188:bcfe06ba3d64 172 if (qspi_data_first != qspi_data_second || qspi_data_second != qspi_data_third ||
AnnaBridge 189:f392fc9709a3 173 qspi_data_first != qspi_data_third) {
AnnaBridge 188:bcfe06ba3d64 174 return QSPI_STATUS_INVALID_PARAMETER;
AnnaBridge 188:bcfe06ba3d64 175 }
AnnaBridge 188:bcfe06ba3d64 176
AnnaBridge 188:bcfe06ba3d64 177 // tested all combinations, take first
AnnaBridge 188:bcfe06ba3d64 178 obj->handle.Instance = (QUADSPI_TypeDef *)qspi_data_first;
AnnaBridge 188:bcfe06ba3d64 179
AnnaBridge 188:bcfe06ba3d64 180 // pinmap for pins (enable clock)
AnnaBridge 188:bcfe06ba3d64 181 obj->io0 = io0;
AnnaBridge 188:bcfe06ba3d64 182 pinmap_pinout(io0, PinMap_QSPI_DATA);
AnnaBridge 188:bcfe06ba3d64 183 obj->io1 = io1;
AnnaBridge 188:bcfe06ba3d64 184 pinmap_pinout(io1, PinMap_QSPI_DATA);
AnnaBridge 188:bcfe06ba3d64 185 obj->io2 = io2;
AnnaBridge 188:bcfe06ba3d64 186 pinmap_pinout(io2, PinMap_QSPI_DATA);
AnnaBridge 188:bcfe06ba3d64 187 obj->io3 = io3;
AnnaBridge 188:bcfe06ba3d64 188 pinmap_pinout(io3, PinMap_QSPI_DATA);
AnnaBridge 188:bcfe06ba3d64 189
AnnaBridge 188:bcfe06ba3d64 190 obj->sclk = sclk;
AnnaBridge 188:bcfe06ba3d64 191 pinmap_pinout(sclk, PinMap_QSPI_SCLK);
AnnaBridge 188:bcfe06ba3d64 192 obj->ssel = ssel;
AnnaBridge 188:bcfe06ba3d64 193 pinmap_pinout(ssel, PinMap_QSPI_SSEL);
AnnaBridge 188:bcfe06ba3d64 194
AnnaBridge 189:f392fc9709a3 195 return qspi_frequency(obj, hz);
AnnaBridge 188:bcfe06ba3d64 196 }
AnnaBridge 188:bcfe06ba3d64 197
AnnaBridge 188:bcfe06ba3d64 198 qspi_status_t qspi_free(qspi_t *obj)
AnnaBridge 188:bcfe06ba3d64 199 {
AnnaBridge 189:f392fc9709a3 200 if (HAL_QSPI_DeInit(&obj->handle) != HAL_OK) {
AnnaBridge 188:bcfe06ba3d64 201 return QSPI_STATUS_ERROR;
AnnaBridge 188:bcfe06ba3d64 202 }
AnnaBridge 188:bcfe06ba3d64 203
AnnaBridge 188:bcfe06ba3d64 204 // Reset QSPI
AnnaBridge 188:bcfe06ba3d64 205 __HAL_RCC_QSPI_FORCE_RESET();
AnnaBridge 188:bcfe06ba3d64 206 __HAL_RCC_QSPI_RELEASE_RESET();
AnnaBridge 188:bcfe06ba3d64 207
AnnaBridge 188:bcfe06ba3d64 208 // Disable interface clock for QSPI
AnnaBridge 188:bcfe06ba3d64 209 __HAL_RCC_QSPI_CLK_DISABLE();
AnnaBridge 188:bcfe06ba3d64 210
AnnaBridge 188:bcfe06ba3d64 211 // Configure GPIOs
AnnaBridge 188:bcfe06ba3d64 212 pin_function(obj->io0, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
AnnaBridge 188:bcfe06ba3d64 213 pin_function(obj->io1, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
AnnaBridge 188:bcfe06ba3d64 214 pin_function(obj->io2, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
AnnaBridge 188:bcfe06ba3d64 215 pin_function(obj->io3, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
AnnaBridge 188:bcfe06ba3d64 216 pin_function(obj->sclk, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
AnnaBridge 188:bcfe06ba3d64 217 pin_function(obj->ssel, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
AnnaBridge 188:bcfe06ba3d64 218
AnnaBridge 188:bcfe06ba3d64 219 (void)(obj);
AnnaBridge 188:bcfe06ba3d64 220 return QSPI_STATUS_OK;
AnnaBridge 188:bcfe06ba3d64 221 }
AnnaBridge 188:bcfe06ba3d64 222
AnnaBridge 188:bcfe06ba3d64 223 qspi_status_t qspi_frequency(qspi_t *obj, int hz)
AnnaBridge 188:bcfe06ba3d64 224 {
AnnaBridge 188:bcfe06ba3d64 225 qspi_status_t status = QSPI_STATUS_OK;
AnnaBridge 188:bcfe06ba3d64 226
AnnaBridge 189:f392fc9709a3 227 /* HCLK drives QSPI. QSPI clock depends on prescaler value:
AnnaBridge 189:f392fc9709a3 228 * 0: Freq = HCLK
AnnaBridge 189:f392fc9709a3 229 * 1: Freq = HCLK/2
AnnaBridge 189:f392fc9709a3 230 * ...
AnnaBridge 189:f392fc9709a3 231 * 255: Freq = HCLK/256 (minimum value)
AnnaBridge 189:f392fc9709a3 232 */
AnnaBridge 189:f392fc9709a3 233
AnnaBridge 188:bcfe06ba3d64 234 int div = HAL_RCC_GetHCLKFreq() / hz;
AnnaBridge 189:f392fc9709a3 235 if (div > 255) {
AnnaBridge 189:f392fc9709a3 236 div = 255;
AnnaBridge 189:f392fc9709a3 237 } else {
AnnaBridge 189:f392fc9709a3 238 if ((HAL_RCC_GetHCLKFreq() % hz) == 0) {
AnnaBridge 189:f392fc9709a3 239 div = div - 1;
AnnaBridge 189:f392fc9709a3 240 }
AnnaBridge 188:bcfe06ba3d64 241 }
AnnaBridge 188:bcfe06ba3d64 242
AnnaBridge 189:f392fc9709a3 243 obj->handle.Init.ClockPrescaler = div;
AnnaBridge 188:bcfe06ba3d64 244
AnnaBridge 188:bcfe06ba3d64 245 if (HAL_QSPI_Init(&obj->handle) != HAL_OK) {
AnnaBridge 188:bcfe06ba3d64 246 status = QSPI_STATUS_ERROR;
AnnaBridge 188:bcfe06ba3d64 247 }
AnnaBridge 189:f392fc9709a3 248
AnnaBridge 188:bcfe06ba3d64 249 return status;
AnnaBridge 188:bcfe06ba3d64 250 }
AnnaBridge 188:bcfe06ba3d64 251
AnnaBridge 188:bcfe06ba3d64 252 qspi_status_t qspi_write(qspi_t *obj, const qspi_command_t *command, const void *data, size_t *length)
AnnaBridge 188:bcfe06ba3d64 253 {
AnnaBridge 188:bcfe06ba3d64 254 QSPI_CommandTypeDef st_command;
AnnaBridge 188:bcfe06ba3d64 255 qspi_prepare_command(command, &st_command);
AnnaBridge 188:bcfe06ba3d64 256
AnnaBridge 188:bcfe06ba3d64 257 st_command.NbData = *length;
AnnaBridge 188:bcfe06ba3d64 258 qspi_status_t status = QSPI_STATUS_OK;
AnnaBridge 188:bcfe06ba3d64 259
AnnaBridge 188:bcfe06ba3d64 260 if (HAL_QSPI_Command(&obj->handle, &st_command, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) {
AnnaBridge 188:bcfe06ba3d64 261 status = QSPI_STATUS_ERROR;
AnnaBridge 189:f392fc9709a3 262 } else {
AnnaBridge 189:f392fc9709a3 263 if (HAL_QSPI_Transmit(&obj->handle, (uint8_t *)data, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) {
AnnaBridge 189:f392fc9709a3 264 status = QSPI_STATUS_ERROR;
AnnaBridge 189:f392fc9709a3 265 }
AnnaBridge 188:bcfe06ba3d64 266 }
AnnaBridge 188:bcfe06ba3d64 267
AnnaBridge 188:bcfe06ba3d64 268 return status;
AnnaBridge 188:bcfe06ba3d64 269 }
AnnaBridge 188:bcfe06ba3d64 270
AnnaBridge 188:bcfe06ba3d64 271 qspi_status_t qspi_read(qspi_t *obj, const qspi_command_t *command, void *data, size_t *length)
AnnaBridge 188:bcfe06ba3d64 272 {
AnnaBridge 188:bcfe06ba3d64 273 QSPI_CommandTypeDef st_command;
AnnaBridge 188:bcfe06ba3d64 274 qspi_prepare_command(command, &st_command);
AnnaBridge 188:bcfe06ba3d64 275
AnnaBridge 188:bcfe06ba3d64 276 st_command.NbData = *length;
AnnaBridge 188:bcfe06ba3d64 277 qspi_status_t status = QSPI_STATUS_OK;
AnnaBridge 188:bcfe06ba3d64 278
AnnaBridge 188:bcfe06ba3d64 279 if (HAL_QSPI_Command(&obj->handle, &st_command, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) {
AnnaBridge 188:bcfe06ba3d64 280 status = QSPI_STATUS_ERROR;
AnnaBridge 189:f392fc9709a3 281 } else {
AnnaBridge 189:f392fc9709a3 282 if (HAL_QSPI_Receive(&obj->handle, data, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) {
AnnaBridge 189:f392fc9709a3 283 status = QSPI_STATUS_ERROR;
AnnaBridge 189:f392fc9709a3 284 }
AnnaBridge 188:bcfe06ba3d64 285 }
AnnaBridge 188:bcfe06ba3d64 286
AnnaBridge 188:bcfe06ba3d64 287 return status;
AnnaBridge 188:bcfe06ba3d64 288 }
AnnaBridge 188:bcfe06ba3d64 289
AnnaBridge 188:bcfe06ba3d64 290 qspi_status_t qspi_command_transfer(qspi_t *obj, const qspi_command_t *command, const void *tx_data, size_t tx_size, void *rx_data, size_t rx_size)
AnnaBridge 188:bcfe06ba3d64 291 {
AnnaBridge 188:bcfe06ba3d64 292 qspi_status_t status = QSPI_STATUS_OK;
AnnaBridge 188:bcfe06ba3d64 293
AnnaBridge 188:bcfe06ba3d64 294 if ((tx_data == NULL || tx_size == 0) && (rx_data == NULL || rx_size == 0)) {
AnnaBridge 188:bcfe06ba3d64 295 // only command, no rx or tx
AnnaBridge 188:bcfe06ba3d64 296 QSPI_CommandTypeDef st_command;
AnnaBridge 188:bcfe06ba3d64 297 qspi_prepare_command(command, &st_command);
AnnaBridge 188:bcfe06ba3d64 298
AnnaBridge 188:bcfe06ba3d64 299 st_command.NbData = 1;
AnnaBridge 189:f392fc9709a3 300 st_command.DataMode = QSPI_DATA_NONE; /* Instruction only */
AnnaBridge 188:bcfe06ba3d64 301 if (HAL_QSPI_Command(&obj->handle, &st_command, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) {
AnnaBridge 188:bcfe06ba3d64 302 status = QSPI_STATUS_ERROR;
AnnaBridge 188:bcfe06ba3d64 303 return status;
AnnaBridge 188:bcfe06ba3d64 304 }
AnnaBridge 188:bcfe06ba3d64 305 } else {
AnnaBridge 188:bcfe06ba3d64 306 // often just read a register, check if we need to transmit anything prior reading
AnnaBridge 188:bcfe06ba3d64 307 if (tx_data != NULL && tx_size) {
AnnaBridge 188:bcfe06ba3d64 308 size_t tx_length = tx_size;
AnnaBridge 188:bcfe06ba3d64 309 status = qspi_write(obj, command, tx_data, &tx_length);
AnnaBridge 188:bcfe06ba3d64 310 if (status != QSPI_STATUS_OK) {
AnnaBridge 188:bcfe06ba3d64 311 return status;
AnnaBridge 188:bcfe06ba3d64 312 }
AnnaBridge 188:bcfe06ba3d64 313 }
AnnaBridge 188:bcfe06ba3d64 314
AnnaBridge 188:bcfe06ba3d64 315 if (rx_data != NULL && rx_size) {
AnnaBridge 188:bcfe06ba3d64 316 size_t rx_length = rx_size;
AnnaBridge 188:bcfe06ba3d64 317 status = qspi_read(obj, command, rx_data, &rx_length);
AnnaBridge 188:bcfe06ba3d64 318 }
AnnaBridge 188:bcfe06ba3d64 319 }
AnnaBridge 188:bcfe06ba3d64 320 return status;
AnnaBridge 188:bcfe06ba3d64 321 }
AnnaBridge 188:bcfe06ba3d64 322
AnnaBridge 188:bcfe06ba3d64 323 #endif
AnnaBridge 188:bcfe06ba3d64 324
AnnaBridge 188:bcfe06ba3d64 325 /** @}*/