mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_flash_ex.c@189:f392fc9709a3, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 22:31:08 2019 +0000
- Revision:
- 189:f392fc9709a3
- Parent:
- 167:e84263d55307
mbed library release version 165
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 144:ef7eb2e8f9f7 | 1 | /** |
<> | 144:ef7eb2e8f9f7 | 2 | ****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 3 | * @file stm32f2xx_hal_flash_ex.c |
<> | 144:ef7eb2e8f9f7 | 4 | * @author MCD Application Team |
AnnaBridge | 167:e84263d55307 | 5 | * @version V1.2.1 |
AnnaBridge | 167:e84263d55307 | 6 | * @date 14-April-2017 |
<> | 144:ef7eb2e8f9f7 | 7 | * @brief Extended FLASH HAL module driver. |
<> | 144:ef7eb2e8f9f7 | 8 | * This file provides firmware functions to manage the following |
<> | 144:ef7eb2e8f9f7 | 9 | * functionalities of the FLASH extension peripheral: |
<> | 144:ef7eb2e8f9f7 | 10 | * + Extended programming operations functions |
<> | 144:ef7eb2e8f9f7 | 11 | * |
<> | 144:ef7eb2e8f9f7 | 12 | @verbatim |
<> | 144:ef7eb2e8f9f7 | 13 | ============================================================================== |
<> | 144:ef7eb2e8f9f7 | 14 | ##### Flash Extension features ##### |
<> | 144:ef7eb2e8f9f7 | 15 | ============================================================================== |
<> | 144:ef7eb2e8f9f7 | 16 | |
<> | 144:ef7eb2e8f9f7 | 17 | ##### How to use this driver ##### |
<> | 144:ef7eb2e8f9f7 | 18 | ============================================================================== |
<> | 144:ef7eb2e8f9f7 | 19 | [..] This driver provides functions to configure and program the FLASH memory |
<> | 144:ef7eb2e8f9f7 | 20 | of all STM32F2xx devices. It includes |
<> | 144:ef7eb2e8f9f7 | 21 | (#) FLASH Memory Erase functions: |
<> | 144:ef7eb2e8f9f7 | 22 | (++) Lock and Unlock the FLASH interface using HAL_FLASH_Unlock() and |
<> | 144:ef7eb2e8f9f7 | 23 | HAL_FLASH_Lock() functions |
<> | 144:ef7eb2e8f9f7 | 24 | (++) Erase function: Erase sector, erase all sectors |
<> | 144:ef7eb2e8f9f7 | 25 | (++) There are two modes of erase : |
<> | 144:ef7eb2e8f9f7 | 26 | (+++) Polling Mode using HAL_FLASHEx_Erase() |
<> | 144:ef7eb2e8f9f7 | 27 | (+++) Interrupt Mode using HAL_FLASHEx_Erase_IT() |
<> | 144:ef7eb2e8f9f7 | 28 | |
<> | 144:ef7eb2e8f9f7 | 29 | (#) Option Bytes Programming functions: Use HAL_FLASHEx_OBProgram() to : |
<> | 144:ef7eb2e8f9f7 | 30 | (++) Set/Reset the write protection |
<> | 144:ef7eb2e8f9f7 | 31 | (++) Set the Read protection Level |
<> | 144:ef7eb2e8f9f7 | 32 | (++) Set the BOR level |
<> | 144:ef7eb2e8f9f7 | 33 | (++) Program the user Option Bytes |
<> | 144:ef7eb2e8f9f7 | 34 | |
<> | 144:ef7eb2e8f9f7 | 35 | @endverbatim |
<> | 144:ef7eb2e8f9f7 | 36 | ****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 37 | * @attention |
<> | 144:ef7eb2e8f9f7 | 38 | * |
AnnaBridge | 167:e84263d55307 | 39 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
<> | 144:ef7eb2e8f9f7 | 40 | * |
<> | 144:ef7eb2e8f9f7 | 41 | * Redistribution and use in source and binary forms, with or without modification, |
<> | 144:ef7eb2e8f9f7 | 42 | * are permitted provided that the following conditions are met: |
<> | 144:ef7eb2e8f9f7 | 43 | * 1. Redistributions of source code must retain the above copyright notice, |
<> | 144:ef7eb2e8f9f7 | 44 | * this list of conditions and the following disclaimer. |
<> | 144:ef7eb2e8f9f7 | 45 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
<> | 144:ef7eb2e8f9f7 | 46 | * this list of conditions and the following disclaimer in the documentation |
<> | 144:ef7eb2e8f9f7 | 47 | * and/or other materials provided with the distribution. |
<> | 144:ef7eb2e8f9f7 | 48 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
<> | 144:ef7eb2e8f9f7 | 49 | * may be used to endorse or promote products derived from this software |
<> | 144:ef7eb2e8f9f7 | 50 | * without specific prior written permission. |
<> | 144:ef7eb2e8f9f7 | 51 | * |
<> | 144:ef7eb2e8f9f7 | 52 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
<> | 144:ef7eb2e8f9f7 | 53 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
<> | 144:ef7eb2e8f9f7 | 54 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
<> | 144:ef7eb2e8f9f7 | 55 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
<> | 144:ef7eb2e8f9f7 | 56 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
<> | 144:ef7eb2e8f9f7 | 57 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
<> | 144:ef7eb2e8f9f7 | 58 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
<> | 144:ef7eb2e8f9f7 | 59 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
<> | 144:ef7eb2e8f9f7 | 60 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
<> | 144:ef7eb2e8f9f7 | 61 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
<> | 144:ef7eb2e8f9f7 | 62 | * |
<> | 144:ef7eb2e8f9f7 | 63 | ****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 64 | */ |
<> | 144:ef7eb2e8f9f7 | 65 | |
<> | 144:ef7eb2e8f9f7 | 66 | /* Includes ------------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 67 | #include "stm32f2xx_hal.h" |
<> | 144:ef7eb2e8f9f7 | 68 | |
<> | 144:ef7eb2e8f9f7 | 69 | /** @addtogroup STM32F2xx_HAL_Driver |
<> | 144:ef7eb2e8f9f7 | 70 | * @{ |
<> | 144:ef7eb2e8f9f7 | 71 | */ |
<> | 144:ef7eb2e8f9f7 | 72 | |
<> | 144:ef7eb2e8f9f7 | 73 | /** @defgroup FLASHEx FLASHEx |
<> | 144:ef7eb2e8f9f7 | 74 | * @brief FLASH HAL Extension module driver |
<> | 144:ef7eb2e8f9f7 | 75 | * @{ |
<> | 144:ef7eb2e8f9f7 | 76 | */ |
<> | 144:ef7eb2e8f9f7 | 77 | |
<> | 144:ef7eb2e8f9f7 | 78 | #ifdef HAL_FLASH_MODULE_ENABLED |
<> | 144:ef7eb2e8f9f7 | 79 | |
<> | 144:ef7eb2e8f9f7 | 80 | /* Private typedef -----------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 81 | /* Private define ------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 82 | /** @addtogroup FLASHEx_Private_Constants |
<> | 144:ef7eb2e8f9f7 | 83 | * @{ |
<> | 144:ef7eb2e8f9f7 | 84 | */ |
AnnaBridge | 167:e84263d55307 | 85 | #define FLASH_TIMEOUT_VALUE 50000U /* 50 s */ |
<> | 144:ef7eb2e8f9f7 | 86 | /** |
<> | 144:ef7eb2e8f9f7 | 87 | * @} |
<> | 144:ef7eb2e8f9f7 | 88 | */ |
<> | 144:ef7eb2e8f9f7 | 89 | |
<> | 144:ef7eb2e8f9f7 | 90 | /* Private macro -------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 91 | /* Private variables ---------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 92 | /** @addtogroup FLASHEx_Private_Variables |
<> | 144:ef7eb2e8f9f7 | 93 | * @{ |
<> | 144:ef7eb2e8f9f7 | 94 | */ |
<> | 144:ef7eb2e8f9f7 | 95 | extern FLASH_ProcessTypeDef pFlash; |
<> | 144:ef7eb2e8f9f7 | 96 | /** |
<> | 144:ef7eb2e8f9f7 | 97 | * @} |
<> | 144:ef7eb2e8f9f7 | 98 | */ |
<> | 144:ef7eb2e8f9f7 | 99 | |
<> | 144:ef7eb2e8f9f7 | 100 | /* Private function prototypes -----------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 101 | /** @addtogroup FLASHEx_Private_Functions |
<> | 144:ef7eb2e8f9f7 | 102 | * @{ |
<> | 144:ef7eb2e8f9f7 | 103 | */ |
<> | 144:ef7eb2e8f9f7 | 104 | /* Option bytes control */ |
<> | 144:ef7eb2e8f9f7 | 105 | static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks); |
<> | 144:ef7eb2e8f9f7 | 106 | static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks); |
<> | 144:ef7eb2e8f9f7 | 107 | static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks); |
<> | 144:ef7eb2e8f9f7 | 108 | static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t Level); |
<> | 144:ef7eb2e8f9f7 | 109 | static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t Iwdg, uint8_t Stop, uint8_t Stdby); |
<> | 144:ef7eb2e8f9f7 | 110 | static HAL_StatusTypeDef FLASH_OB_BOR_LevelConfig(uint8_t Level); |
<> | 144:ef7eb2e8f9f7 | 111 | static uint8_t FLASH_OB_GetUser(void); |
<> | 144:ef7eb2e8f9f7 | 112 | static uint16_t FLASH_OB_GetWRP(void); |
<> | 144:ef7eb2e8f9f7 | 113 | static uint8_t FLASH_OB_GetRDP(void); |
<> | 144:ef7eb2e8f9f7 | 114 | static uint8_t FLASH_OB_GetBOR(void); |
<> | 144:ef7eb2e8f9f7 | 115 | |
<> | 144:ef7eb2e8f9f7 | 116 | extern HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout); |
<> | 144:ef7eb2e8f9f7 | 117 | /** |
<> | 144:ef7eb2e8f9f7 | 118 | * @} |
<> | 144:ef7eb2e8f9f7 | 119 | */ |
<> | 144:ef7eb2e8f9f7 | 120 | |
<> | 144:ef7eb2e8f9f7 | 121 | /* Exported functions --------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 122 | /** @defgroup FLASHEx_Exported_Functions FLASH Exported Functions |
<> | 144:ef7eb2e8f9f7 | 123 | * @{ |
<> | 144:ef7eb2e8f9f7 | 124 | */ |
<> | 144:ef7eb2e8f9f7 | 125 | |
<> | 144:ef7eb2e8f9f7 | 126 | /** @defgroup FLASHEx_Exported_Functions_Group1 Extended IO operation functions |
<> | 144:ef7eb2e8f9f7 | 127 | * @brief Extended IO operation functions |
<> | 144:ef7eb2e8f9f7 | 128 | * |
<> | 144:ef7eb2e8f9f7 | 129 | @verbatim |
<> | 144:ef7eb2e8f9f7 | 130 | =============================================================================== |
<> | 144:ef7eb2e8f9f7 | 131 | ##### Extended programming operation functions ##### |
<> | 144:ef7eb2e8f9f7 | 132 | =============================================================================== |
<> | 144:ef7eb2e8f9f7 | 133 | [..] |
<> | 144:ef7eb2e8f9f7 | 134 | This subsection provides a set of functions allowing to manage the Extension FLASH |
<> | 144:ef7eb2e8f9f7 | 135 | programming operations. |
<> | 144:ef7eb2e8f9f7 | 136 | |
<> | 144:ef7eb2e8f9f7 | 137 | @endverbatim |
<> | 144:ef7eb2e8f9f7 | 138 | * @{ |
<> | 144:ef7eb2e8f9f7 | 139 | */ |
<> | 144:ef7eb2e8f9f7 | 140 | /** |
<> | 144:ef7eb2e8f9f7 | 141 | * @brief Perform a mass erase or erase the specified FLASH memory sectors |
<> | 144:ef7eb2e8f9f7 | 142 | * @param[in] pEraseInit: pointer to an FLASH_EraseInitTypeDef structure that |
<> | 144:ef7eb2e8f9f7 | 143 | * contains the configuration information for the erasing. |
<> | 144:ef7eb2e8f9f7 | 144 | * |
<> | 144:ef7eb2e8f9f7 | 145 | * @param[out] SectorError: pointer to variable that |
<> | 144:ef7eb2e8f9f7 | 146 | * contains the configuration information on faulty sector in case of error |
<> | 144:ef7eb2e8f9f7 | 147 | * (0xFFFFFFFF means that all the sectors have been correctly erased) |
<> | 144:ef7eb2e8f9f7 | 148 | * |
<> | 144:ef7eb2e8f9f7 | 149 | * @retval HAL Status |
<> | 144:ef7eb2e8f9f7 | 150 | */ |
<> | 144:ef7eb2e8f9f7 | 151 | HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *SectorError) |
<> | 144:ef7eb2e8f9f7 | 152 | { |
<> | 144:ef7eb2e8f9f7 | 153 | HAL_StatusTypeDef status = HAL_ERROR; |
<> | 144:ef7eb2e8f9f7 | 154 | uint32_t index = 0U; |
<> | 144:ef7eb2e8f9f7 | 155 | |
<> | 144:ef7eb2e8f9f7 | 156 | /* Process Locked */ |
<> | 144:ef7eb2e8f9f7 | 157 | __HAL_LOCK(&pFlash); |
<> | 144:ef7eb2e8f9f7 | 158 | |
<> | 144:ef7eb2e8f9f7 | 159 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 160 | assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase)); |
<> | 144:ef7eb2e8f9f7 | 161 | |
<> | 144:ef7eb2e8f9f7 | 162 | /* Wait for last operation to be completed */ |
<> | 144:ef7eb2e8f9f7 | 163 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
<> | 144:ef7eb2e8f9f7 | 164 | |
<> | 144:ef7eb2e8f9f7 | 165 | if(status == HAL_OK) |
<> | 144:ef7eb2e8f9f7 | 166 | { |
<> | 144:ef7eb2e8f9f7 | 167 | /*Initialization of SectorError variable*/ |
<> | 144:ef7eb2e8f9f7 | 168 | *SectorError = 0xFFFFFFFFU; |
<> | 144:ef7eb2e8f9f7 | 169 | |
<> | 144:ef7eb2e8f9f7 | 170 | if(pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) |
<> | 144:ef7eb2e8f9f7 | 171 | { |
<> | 144:ef7eb2e8f9f7 | 172 | /*Mass erase to be done*/ |
<> | 144:ef7eb2e8f9f7 | 173 | FLASH_MassErase((uint8_t) pEraseInit->VoltageRange, pEraseInit->Banks); |
<> | 144:ef7eb2e8f9f7 | 174 | |
<> | 144:ef7eb2e8f9f7 | 175 | /* Wait for last operation to be completed */ |
<> | 144:ef7eb2e8f9f7 | 176 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
<> | 144:ef7eb2e8f9f7 | 177 | |
<> | 144:ef7eb2e8f9f7 | 178 | /* if the erase operation is completed, disable the MER Bit */ |
<> | 144:ef7eb2e8f9f7 | 179 | FLASH->CR &= (~FLASH_MER_BIT); |
<> | 144:ef7eb2e8f9f7 | 180 | } |
<> | 144:ef7eb2e8f9f7 | 181 | else |
<> | 144:ef7eb2e8f9f7 | 182 | { |
<> | 144:ef7eb2e8f9f7 | 183 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 184 | assert_param(IS_FLASH_NBSECTORS(pEraseInit->NbSectors + pEraseInit->Sector)); |
<> | 144:ef7eb2e8f9f7 | 185 | |
<> | 144:ef7eb2e8f9f7 | 186 | /* Erase by sector by sector to be done*/ |
<> | 144:ef7eb2e8f9f7 | 187 | for(index = pEraseInit->Sector; index < (pEraseInit->NbSectors + pEraseInit->Sector); index++) |
<> | 144:ef7eb2e8f9f7 | 188 | { |
<> | 144:ef7eb2e8f9f7 | 189 | FLASH_Erase_Sector(index, (uint8_t) pEraseInit->VoltageRange); |
<> | 144:ef7eb2e8f9f7 | 190 | |
<> | 144:ef7eb2e8f9f7 | 191 | /* Wait for last operation to be completed */ |
<> | 144:ef7eb2e8f9f7 | 192 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
<> | 144:ef7eb2e8f9f7 | 193 | |
<> | 144:ef7eb2e8f9f7 | 194 | /* If the erase operation is completed, disable the SER and SNB Bits */ |
<> | 144:ef7eb2e8f9f7 | 195 | CLEAR_BIT(FLASH->CR, (FLASH_CR_SER | FLASH_CR_SNB)); |
<> | 144:ef7eb2e8f9f7 | 196 | |
<> | 144:ef7eb2e8f9f7 | 197 | if(status != HAL_OK) |
<> | 144:ef7eb2e8f9f7 | 198 | { |
<> | 144:ef7eb2e8f9f7 | 199 | /* In case of error, stop erase procedure and return the faulty sector*/ |
<> | 144:ef7eb2e8f9f7 | 200 | *SectorError = index; |
<> | 144:ef7eb2e8f9f7 | 201 | break; |
<> | 144:ef7eb2e8f9f7 | 202 | } |
<> | 144:ef7eb2e8f9f7 | 203 | } |
<> | 144:ef7eb2e8f9f7 | 204 | } |
<> | 144:ef7eb2e8f9f7 | 205 | /* Flush the caches to be sure of the data consistency */ |
<> | 144:ef7eb2e8f9f7 | 206 | FLASH_FlushCaches(); |
<> | 144:ef7eb2e8f9f7 | 207 | } |
<> | 144:ef7eb2e8f9f7 | 208 | |
<> | 144:ef7eb2e8f9f7 | 209 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 210 | __HAL_UNLOCK(&pFlash); |
<> | 144:ef7eb2e8f9f7 | 211 | |
<> | 144:ef7eb2e8f9f7 | 212 | return status; |
<> | 144:ef7eb2e8f9f7 | 213 | } |
<> | 144:ef7eb2e8f9f7 | 214 | |
<> | 144:ef7eb2e8f9f7 | 215 | /** |
<> | 144:ef7eb2e8f9f7 | 216 | * @brief Perform a mass erase or erase the specified FLASH memory sectors with interrupt enabled |
<> | 144:ef7eb2e8f9f7 | 217 | * @param pEraseInit: pointer to an FLASH_EraseInitTypeDef structure that |
<> | 144:ef7eb2e8f9f7 | 218 | * contains the configuration information for the erasing. |
<> | 144:ef7eb2e8f9f7 | 219 | * |
<> | 144:ef7eb2e8f9f7 | 220 | * @retval HAL Status |
<> | 144:ef7eb2e8f9f7 | 221 | */ |
<> | 144:ef7eb2e8f9f7 | 222 | HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit) |
<> | 144:ef7eb2e8f9f7 | 223 | { |
<> | 144:ef7eb2e8f9f7 | 224 | HAL_StatusTypeDef status = HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 225 | |
<> | 144:ef7eb2e8f9f7 | 226 | /* Process Locked */ |
<> | 144:ef7eb2e8f9f7 | 227 | __HAL_LOCK(&pFlash); |
<> | 144:ef7eb2e8f9f7 | 228 | |
<> | 144:ef7eb2e8f9f7 | 229 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 230 | assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase)); |
<> | 144:ef7eb2e8f9f7 | 231 | |
<> | 144:ef7eb2e8f9f7 | 232 | /* Enable End of FLASH Operation interrupt */ |
<> | 144:ef7eb2e8f9f7 | 233 | __HAL_FLASH_ENABLE_IT(FLASH_IT_EOP); |
<> | 144:ef7eb2e8f9f7 | 234 | |
<> | 144:ef7eb2e8f9f7 | 235 | /* Enable Error source interrupt */ |
<> | 144:ef7eb2e8f9f7 | 236 | __HAL_FLASH_ENABLE_IT(FLASH_IT_ERR); |
<> | 144:ef7eb2e8f9f7 | 237 | |
<> | 144:ef7eb2e8f9f7 | 238 | /* Clear pending flags (if any) */ |
<> | 144:ef7eb2e8f9f7 | 239 | __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR |\ |
<> | 144:ef7eb2e8f9f7 | 240 | FLASH_FLAG_PGAERR | FLASH_FLAG_PGPERR| FLASH_FLAG_PGSERR); |
<> | 144:ef7eb2e8f9f7 | 241 | |
<> | 144:ef7eb2e8f9f7 | 242 | if(pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) |
<> | 144:ef7eb2e8f9f7 | 243 | { |
<> | 144:ef7eb2e8f9f7 | 244 | /*Mass erase to be done*/ |
<> | 144:ef7eb2e8f9f7 | 245 | pFlash.ProcedureOnGoing = FLASH_PROC_MASSERASE; |
<> | 144:ef7eb2e8f9f7 | 246 | pFlash.Bank = pEraseInit->Banks; |
<> | 144:ef7eb2e8f9f7 | 247 | FLASH_MassErase((uint8_t) pEraseInit->VoltageRange, pEraseInit->Banks); |
<> | 144:ef7eb2e8f9f7 | 248 | } |
<> | 144:ef7eb2e8f9f7 | 249 | else |
<> | 144:ef7eb2e8f9f7 | 250 | { |
<> | 144:ef7eb2e8f9f7 | 251 | /* Erase by sector to be done*/ |
<> | 144:ef7eb2e8f9f7 | 252 | |
<> | 144:ef7eb2e8f9f7 | 253 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 254 | assert_param(IS_FLASH_NBSECTORS(pEraseInit->NbSectors + pEraseInit->Sector)); |
<> | 144:ef7eb2e8f9f7 | 255 | |
<> | 144:ef7eb2e8f9f7 | 256 | pFlash.ProcedureOnGoing = FLASH_PROC_SECTERASE; |
<> | 144:ef7eb2e8f9f7 | 257 | pFlash.NbSectorsToErase = pEraseInit->NbSectors; |
<> | 144:ef7eb2e8f9f7 | 258 | pFlash.Sector = pEraseInit->Sector; |
<> | 144:ef7eb2e8f9f7 | 259 | pFlash.VoltageForErase = (uint8_t)pEraseInit->VoltageRange; |
<> | 144:ef7eb2e8f9f7 | 260 | |
<> | 144:ef7eb2e8f9f7 | 261 | /*Erase 1st sector and wait for IT*/ |
<> | 144:ef7eb2e8f9f7 | 262 | FLASH_Erase_Sector(pEraseInit->Sector, pEraseInit->VoltageRange); |
<> | 144:ef7eb2e8f9f7 | 263 | } |
<> | 144:ef7eb2e8f9f7 | 264 | |
<> | 144:ef7eb2e8f9f7 | 265 | return status; |
<> | 144:ef7eb2e8f9f7 | 266 | } |
<> | 144:ef7eb2e8f9f7 | 267 | |
<> | 144:ef7eb2e8f9f7 | 268 | /** |
<> | 144:ef7eb2e8f9f7 | 269 | * @brief Program option bytes |
<> | 144:ef7eb2e8f9f7 | 270 | * @param pOBInit: pointer to an FLASH_OBInitStruct structure that |
<> | 144:ef7eb2e8f9f7 | 271 | * contains the configuration information for the programming. |
<> | 144:ef7eb2e8f9f7 | 272 | * |
<> | 144:ef7eb2e8f9f7 | 273 | * @retval HAL Status |
<> | 144:ef7eb2e8f9f7 | 274 | */ |
<> | 144:ef7eb2e8f9f7 | 275 | HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit) |
<> | 144:ef7eb2e8f9f7 | 276 | { |
<> | 144:ef7eb2e8f9f7 | 277 | HAL_StatusTypeDef status = HAL_ERROR; |
<> | 144:ef7eb2e8f9f7 | 278 | |
<> | 144:ef7eb2e8f9f7 | 279 | /* Process Locked */ |
<> | 144:ef7eb2e8f9f7 | 280 | __HAL_LOCK(&pFlash); |
<> | 144:ef7eb2e8f9f7 | 281 | |
<> | 144:ef7eb2e8f9f7 | 282 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 283 | assert_param(IS_OPTIONBYTE(pOBInit->OptionType)); |
<> | 144:ef7eb2e8f9f7 | 284 | |
<> | 144:ef7eb2e8f9f7 | 285 | /*Write protection configuration*/ |
<> | 144:ef7eb2e8f9f7 | 286 | if((pOBInit->OptionType & OPTIONBYTE_WRP) == OPTIONBYTE_WRP) |
<> | 144:ef7eb2e8f9f7 | 287 | { |
<> | 144:ef7eb2e8f9f7 | 288 | assert_param(IS_WRPSTATE(pOBInit->WRPState)); |
<> | 144:ef7eb2e8f9f7 | 289 | if(pOBInit->WRPState == OB_WRPSTATE_ENABLE) |
<> | 144:ef7eb2e8f9f7 | 290 | { |
<> | 144:ef7eb2e8f9f7 | 291 | /*Enable of Write protection on the selected Sector*/ |
<> | 144:ef7eb2e8f9f7 | 292 | status = FLASH_OB_EnableWRP(pOBInit->WRPSector, pOBInit->Banks); |
<> | 144:ef7eb2e8f9f7 | 293 | } |
<> | 144:ef7eb2e8f9f7 | 294 | else |
<> | 144:ef7eb2e8f9f7 | 295 | { |
<> | 144:ef7eb2e8f9f7 | 296 | /*Disable of Write protection on the selected Sector*/ |
<> | 144:ef7eb2e8f9f7 | 297 | status = FLASH_OB_DisableWRP(pOBInit->WRPSector, pOBInit->Banks); |
<> | 144:ef7eb2e8f9f7 | 298 | } |
<> | 144:ef7eb2e8f9f7 | 299 | } |
<> | 144:ef7eb2e8f9f7 | 300 | |
<> | 144:ef7eb2e8f9f7 | 301 | /*Read protection configuration*/ |
<> | 144:ef7eb2e8f9f7 | 302 | if((pOBInit->OptionType & OPTIONBYTE_RDP) == OPTIONBYTE_RDP) |
<> | 144:ef7eb2e8f9f7 | 303 | { |
<> | 144:ef7eb2e8f9f7 | 304 | status = FLASH_OB_RDP_LevelConfig(pOBInit->RDPLevel); |
<> | 144:ef7eb2e8f9f7 | 305 | } |
<> | 144:ef7eb2e8f9f7 | 306 | |
<> | 144:ef7eb2e8f9f7 | 307 | /*USER configuration*/ |
<> | 144:ef7eb2e8f9f7 | 308 | if((pOBInit->OptionType & OPTIONBYTE_USER) == OPTIONBYTE_USER) |
<> | 144:ef7eb2e8f9f7 | 309 | { |
<> | 144:ef7eb2e8f9f7 | 310 | status = FLASH_OB_UserConfig(pOBInit->USERConfig&OB_IWDG_SW, |
<> | 144:ef7eb2e8f9f7 | 311 | pOBInit->USERConfig&OB_STOP_NO_RST, |
<> | 144:ef7eb2e8f9f7 | 312 | pOBInit->USERConfig&OB_STDBY_NO_RST); |
<> | 144:ef7eb2e8f9f7 | 313 | } |
<> | 144:ef7eb2e8f9f7 | 314 | |
<> | 144:ef7eb2e8f9f7 | 315 | /*BOR Level configuration*/ |
<> | 144:ef7eb2e8f9f7 | 316 | if((pOBInit->OptionType & OPTIONBYTE_BOR) == OPTIONBYTE_BOR) |
<> | 144:ef7eb2e8f9f7 | 317 | { |
<> | 144:ef7eb2e8f9f7 | 318 | status = FLASH_OB_BOR_LevelConfig(pOBInit->BORLevel); |
<> | 144:ef7eb2e8f9f7 | 319 | } |
<> | 144:ef7eb2e8f9f7 | 320 | |
<> | 144:ef7eb2e8f9f7 | 321 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 322 | __HAL_UNLOCK(&pFlash); |
<> | 144:ef7eb2e8f9f7 | 323 | |
<> | 144:ef7eb2e8f9f7 | 324 | return status; |
<> | 144:ef7eb2e8f9f7 | 325 | } |
<> | 144:ef7eb2e8f9f7 | 326 | |
<> | 144:ef7eb2e8f9f7 | 327 | /** |
<> | 144:ef7eb2e8f9f7 | 328 | * @brief Get the Option byte configuration |
<> | 144:ef7eb2e8f9f7 | 329 | * @param pOBInit: pointer to an FLASH_OBInitStruct structure that |
<> | 144:ef7eb2e8f9f7 | 330 | * contains the configuration information for the programming. |
<> | 144:ef7eb2e8f9f7 | 331 | * |
<> | 144:ef7eb2e8f9f7 | 332 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 333 | */ |
<> | 144:ef7eb2e8f9f7 | 334 | void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit) |
<> | 144:ef7eb2e8f9f7 | 335 | { |
<> | 144:ef7eb2e8f9f7 | 336 | pOBInit->OptionType = OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER | OPTIONBYTE_BOR; |
<> | 144:ef7eb2e8f9f7 | 337 | |
<> | 144:ef7eb2e8f9f7 | 338 | /*Get WRP*/ |
<> | 144:ef7eb2e8f9f7 | 339 | pOBInit->WRPSector = (uint32_t)FLASH_OB_GetWRP(); |
<> | 144:ef7eb2e8f9f7 | 340 | |
<> | 144:ef7eb2e8f9f7 | 341 | /*Get RDP Level*/ |
<> | 144:ef7eb2e8f9f7 | 342 | pOBInit->RDPLevel = (uint32_t)FLASH_OB_GetRDP(); |
<> | 144:ef7eb2e8f9f7 | 343 | |
<> | 144:ef7eb2e8f9f7 | 344 | /*Get USER*/ |
<> | 144:ef7eb2e8f9f7 | 345 | pOBInit->USERConfig = (uint8_t)FLASH_OB_GetUser(); |
<> | 144:ef7eb2e8f9f7 | 346 | |
<> | 144:ef7eb2e8f9f7 | 347 | /*Get BOR Level*/ |
<> | 144:ef7eb2e8f9f7 | 348 | pOBInit->BORLevel = (uint32_t)FLASH_OB_GetBOR(); |
<> | 144:ef7eb2e8f9f7 | 349 | } |
<> | 144:ef7eb2e8f9f7 | 350 | |
<> | 144:ef7eb2e8f9f7 | 351 | /** |
<> | 144:ef7eb2e8f9f7 | 352 | * @} |
<> | 144:ef7eb2e8f9f7 | 353 | */ |
<> | 144:ef7eb2e8f9f7 | 354 | |
<> | 144:ef7eb2e8f9f7 | 355 | /** |
<> | 144:ef7eb2e8f9f7 | 356 | * @brief Erase the specified FLASH memory sector |
<> | 144:ef7eb2e8f9f7 | 357 | * @param Sector: FLASH sector to erase |
<> | 144:ef7eb2e8f9f7 | 358 | * The value of this parameter depend on device used within the same series |
<> | 144:ef7eb2e8f9f7 | 359 | * @param VoltageRange: The device voltage range which defines the erase parallelism. |
<> | 144:ef7eb2e8f9f7 | 360 | * This parameter can be one of the following values: |
<> | 144:ef7eb2e8f9f7 | 361 | * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V, |
<> | 144:ef7eb2e8f9f7 | 362 | * the operation will be done by byte (8-bit) |
<> | 144:ef7eb2e8f9f7 | 363 | * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V, |
<> | 144:ef7eb2e8f9f7 | 364 | * the operation will be done by half word (16-bit) |
<> | 144:ef7eb2e8f9f7 | 365 | * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V, |
<> | 144:ef7eb2e8f9f7 | 366 | * the operation will be done by word (32-bit) |
<> | 144:ef7eb2e8f9f7 | 367 | * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp, |
<> | 144:ef7eb2e8f9f7 | 368 | * the operation will be done by double word (64-bit) |
<> | 144:ef7eb2e8f9f7 | 369 | * |
<> | 144:ef7eb2e8f9f7 | 370 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 371 | */ |
<> | 144:ef7eb2e8f9f7 | 372 | void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange) |
<> | 144:ef7eb2e8f9f7 | 373 | { |
<> | 144:ef7eb2e8f9f7 | 374 | uint32_t tmp_psize = 0U; |
<> | 144:ef7eb2e8f9f7 | 375 | |
<> | 144:ef7eb2e8f9f7 | 376 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 377 | assert_param(IS_FLASH_SECTOR(Sector)); |
<> | 144:ef7eb2e8f9f7 | 378 | assert_param(IS_VOLTAGERANGE(VoltageRange)); |
<> | 144:ef7eb2e8f9f7 | 379 | |
<> | 144:ef7eb2e8f9f7 | 380 | if(VoltageRange == FLASH_VOLTAGE_RANGE_1) |
<> | 144:ef7eb2e8f9f7 | 381 | { |
<> | 144:ef7eb2e8f9f7 | 382 | tmp_psize = FLASH_PSIZE_BYTE; |
<> | 144:ef7eb2e8f9f7 | 383 | } |
<> | 144:ef7eb2e8f9f7 | 384 | else if(VoltageRange == FLASH_VOLTAGE_RANGE_2) |
<> | 144:ef7eb2e8f9f7 | 385 | { |
<> | 144:ef7eb2e8f9f7 | 386 | tmp_psize = FLASH_PSIZE_HALF_WORD; |
<> | 144:ef7eb2e8f9f7 | 387 | } |
<> | 144:ef7eb2e8f9f7 | 388 | else if(VoltageRange == FLASH_VOLTAGE_RANGE_3) |
<> | 144:ef7eb2e8f9f7 | 389 | { |
<> | 144:ef7eb2e8f9f7 | 390 | tmp_psize = FLASH_PSIZE_WORD; |
<> | 144:ef7eb2e8f9f7 | 391 | } |
<> | 144:ef7eb2e8f9f7 | 392 | else |
<> | 144:ef7eb2e8f9f7 | 393 | { |
<> | 144:ef7eb2e8f9f7 | 394 | tmp_psize = FLASH_PSIZE_DOUBLE_WORD; |
<> | 144:ef7eb2e8f9f7 | 395 | } |
<> | 144:ef7eb2e8f9f7 | 396 | |
<> | 144:ef7eb2e8f9f7 | 397 | /* If the previous operation is completed, proceed to erase the sector */ |
<> | 144:ef7eb2e8f9f7 | 398 | CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE); |
<> | 144:ef7eb2e8f9f7 | 399 | FLASH->CR |= tmp_psize; |
<> | 144:ef7eb2e8f9f7 | 400 | CLEAR_BIT(FLASH->CR, FLASH_CR_SNB); |
<> | 144:ef7eb2e8f9f7 | 401 | FLASH->CR |= FLASH_CR_SER | (Sector << POSITION_VAL(FLASH_CR_SNB)); |
<> | 144:ef7eb2e8f9f7 | 402 | FLASH->CR |= FLASH_CR_STRT; |
<> | 144:ef7eb2e8f9f7 | 403 | } |
<> | 144:ef7eb2e8f9f7 | 404 | |
<> | 144:ef7eb2e8f9f7 | 405 | /** |
<> | 144:ef7eb2e8f9f7 | 406 | * @brief Flush the instruction and data caches |
<> | 144:ef7eb2e8f9f7 | 407 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 408 | */ |
<> | 144:ef7eb2e8f9f7 | 409 | void FLASH_FlushCaches(void) |
<> | 144:ef7eb2e8f9f7 | 410 | { |
<> | 144:ef7eb2e8f9f7 | 411 | /* Flush instruction cache */ |
<> | 144:ef7eb2e8f9f7 | 412 | if(READ_BIT(FLASH->ACR, FLASH_ACR_ICEN) != RESET) |
<> | 144:ef7eb2e8f9f7 | 413 | { |
<> | 144:ef7eb2e8f9f7 | 414 | /* Disable instruction cache */ |
<> | 144:ef7eb2e8f9f7 | 415 | __HAL_FLASH_INSTRUCTION_CACHE_DISABLE(); |
<> | 144:ef7eb2e8f9f7 | 416 | /* Reset instruction cache */ |
<> | 144:ef7eb2e8f9f7 | 417 | __HAL_FLASH_INSTRUCTION_CACHE_RESET(); |
<> | 144:ef7eb2e8f9f7 | 418 | /* Enable instruction cache */ |
<> | 144:ef7eb2e8f9f7 | 419 | __HAL_FLASH_INSTRUCTION_CACHE_ENABLE(); |
<> | 144:ef7eb2e8f9f7 | 420 | } |
<> | 144:ef7eb2e8f9f7 | 421 | |
<> | 144:ef7eb2e8f9f7 | 422 | /* Flush data cache */ |
<> | 144:ef7eb2e8f9f7 | 423 | if(READ_BIT(FLASH->ACR, FLASH_ACR_DCEN) != RESET) |
<> | 144:ef7eb2e8f9f7 | 424 | { |
<> | 144:ef7eb2e8f9f7 | 425 | /* Disable data cache */ |
<> | 144:ef7eb2e8f9f7 | 426 | __HAL_FLASH_DATA_CACHE_DISABLE(); |
<> | 144:ef7eb2e8f9f7 | 427 | /* Reset data cache */ |
<> | 144:ef7eb2e8f9f7 | 428 | __HAL_FLASH_DATA_CACHE_RESET(); |
<> | 144:ef7eb2e8f9f7 | 429 | /* Enable data cache */ |
<> | 144:ef7eb2e8f9f7 | 430 | __HAL_FLASH_DATA_CACHE_ENABLE(); |
<> | 144:ef7eb2e8f9f7 | 431 | } |
<> | 144:ef7eb2e8f9f7 | 432 | } |
<> | 144:ef7eb2e8f9f7 | 433 | |
<> | 144:ef7eb2e8f9f7 | 434 | /** |
<> | 144:ef7eb2e8f9f7 | 435 | * @brief Mass erase of FLASH memory |
<> | 144:ef7eb2e8f9f7 | 436 | * @param VoltageRange: The device voltage range which defines the erase parallelism. |
<> | 144:ef7eb2e8f9f7 | 437 | * This parameter can be one of the following values: |
<> | 144:ef7eb2e8f9f7 | 438 | * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V, |
<> | 144:ef7eb2e8f9f7 | 439 | * the operation will be done by byte (8-bit) |
<> | 144:ef7eb2e8f9f7 | 440 | * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V, |
<> | 144:ef7eb2e8f9f7 | 441 | * the operation will be done by half word (16-bit) |
<> | 144:ef7eb2e8f9f7 | 442 | * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V, |
<> | 144:ef7eb2e8f9f7 | 443 | * the operation will be done by word (32-bit) |
<> | 144:ef7eb2e8f9f7 | 444 | * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp, |
<> | 144:ef7eb2e8f9f7 | 445 | * the operation will be done by double word (64-bit) |
<> | 144:ef7eb2e8f9f7 | 446 | * |
<> | 144:ef7eb2e8f9f7 | 447 | * @param Banks: Banks to be erased |
<> | 144:ef7eb2e8f9f7 | 448 | * This parameter can be one of the following values: |
<> | 144:ef7eb2e8f9f7 | 449 | * @arg FLASH_BANK_1: Bank1 to be erased |
<> | 144:ef7eb2e8f9f7 | 450 | * |
<> | 144:ef7eb2e8f9f7 | 451 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 452 | */ |
<> | 144:ef7eb2e8f9f7 | 453 | static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks) |
<> | 144:ef7eb2e8f9f7 | 454 | { |
AnnaBridge | 167:e84263d55307 | 455 | /* Prevent unused argument(s) compilation warning */ |
AnnaBridge | 167:e84263d55307 | 456 | UNUSED(Banks); |
AnnaBridge | 167:e84263d55307 | 457 | |
<> | 144:ef7eb2e8f9f7 | 458 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 459 | assert_param(IS_VOLTAGERANGE(VoltageRange)); |
<> | 144:ef7eb2e8f9f7 | 460 | assert_param(IS_FLASH_BANK(Banks)); |
<> | 144:ef7eb2e8f9f7 | 461 | |
<> | 144:ef7eb2e8f9f7 | 462 | /* If the previous operation is completed, proceed to erase all sectors */ |
<> | 144:ef7eb2e8f9f7 | 463 | CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE); |
<> | 144:ef7eb2e8f9f7 | 464 | FLASH->CR |= FLASH_CR_MER; |
<> | 144:ef7eb2e8f9f7 | 465 | FLASH->CR |= FLASH_CR_STRT | ((uint32_t)VoltageRange <<8U); |
<> | 144:ef7eb2e8f9f7 | 466 | } |
<> | 144:ef7eb2e8f9f7 | 467 | |
<> | 144:ef7eb2e8f9f7 | 468 | /** |
<> | 144:ef7eb2e8f9f7 | 469 | * @brief Enable the write protection of the desired bank 1 sectors |
<> | 144:ef7eb2e8f9f7 | 470 | * |
<> | 144:ef7eb2e8f9f7 | 471 | * @note When the memory read protection level is selected (RDP level = 1), |
<> | 144:ef7eb2e8f9f7 | 472 | * it is not possible to program or erase the flash sector i if CortexM3 |
<> | 144:ef7eb2e8f9f7 | 473 | * debug features are connected or boot code is executed in RAM, even if nWRPi = 1 |
<> | 144:ef7eb2e8f9f7 | 474 | * |
<> | 144:ef7eb2e8f9f7 | 475 | * @param WRPSector: specifies the sector(s) to be write protected. |
<> | 144:ef7eb2e8f9f7 | 476 | * The value of this parameter depend on device used within the same series |
<> | 144:ef7eb2e8f9f7 | 477 | * |
<> | 144:ef7eb2e8f9f7 | 478 | * @param Banks: Enable write protection on all the sectors for the specific bank |
<> | 144:ef7eb2e8f9f7 | 479 | * This parameter can be one of the following values: |
<> | 144:ef7eb2e8f9f7 | 480 | * @arg FLASH_BANK_1: WRP on all sectors of bank1 |
<> | 144:ef7eb2e8f9f7 | 481 | * |
<> | 144:ef7eb2e8f9f7 | 482 | * @retval HAL Status |
<> | 144:ef7eb2e8f9f7 | 483 | */ |
<> | 144:ef7eb2e8f9f7 | 484 | static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks) |
<> | 144:ef7eb2e8f9f7 | 485 | { |
<> | 144:ef7eb2e8f9f7 | 486 | HAL_StatusTypeDef status = HAL_OK; |
AnnaBridge | 167:e84263d55307 | 487 | |
AnnaBridge | 167:e84263d55307 | 488 | /* Prevent unused argument(s) compilation warning */ |
AnnaBridge | 167:e84263d55307 | 489 | UNUSED(Banks); |
AnnaBridge | 167:e84263d55307 | 490 | |
<> | 144:ef7eb2e8f9f7 | 491 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 492 | assert_param(IS_OB_WRP_SECTOR(WRPSector)); |
<> | 144:ef7eb2e8f9f7 | 493 | assert_param(IS_FLASH_BANK(Banks)); |
<> | 144:ef7eb2e8f9f7 | 494 | |
<> | 144:ef7eb2e8f9f7 | 495 | /* Wait for last operation to be completed */ |
<> | 144:ef7eb2e8f9f7 | 496 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
<> | 144:ef7eb2e8f9f7 | 497 | |
<> | 144:ef7eb2e8f9f7 | 498 | if(status == HAL_OK) |
<> | 144:ef7eb2e8f9f7 | 499 | { |
<> | 144:ef7eb2e8f9f7 | 500 | *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~WRPSector); |
<> | 144:ef7eb2e8f9f7 | 501 | } |
<> | 144:ef7eb2e8f9f7 | 502 | |
<> | 144:ef7eb2e8f9f7 | 503 | return status; |
<> | 144:ef7eb2e8f9f7 | 504 | } |
<> | 144:ef7eb2e8f9f7 | 505 | |
<> | 144:ef7eb2e8f9f7 | 506 | /** |
<> | 144:ef7eb2e8f9f7 | 507 | * @brief Disable the write protection of the desired bank 1 sectors |
<> | 144:ef7eb2e8f9f7 | 508 | * |
<> | 144:ef7eb2e8f9f7 | 509 | * @note When the memory read protection level is selected (RDP level = 1), |
<> | 144:ef7eb2e8f9f7 | 510 | * it is not possible to program or erase the flash sector if CortexM3 |
<> | 144:ef7eb2e8f9f7 | 511 | * debug features are connected or boot code is executed in RAM, even if nWRPi = 1 |
<> | 144:ef7eb2e8f9f7 | 512 | * |
<> | 144:ef7eb2e8f9f7 | 513 | * @param WRPSector: specifies the sector(s) to be write protected. |
<> | 144:ef7eb2e8f9f7 | 514 | * The value of this parameter depend on device used within the same series |
<> | 144:ef7eb2e8f9f7 | 515 | * |
<> | 144:ef7eb2e8f9f7 | 516 | * @param Banks: Enable write protection on all the sectors for the specific bank |
<> | 144:ef7eb2e8f9f7 | 517 | * This parameter can be one of the following values: |
<> | 144:ef7eb2e8f9f7 | 518 | * @arg FLASH_BANK_1: WRP on all sectors of bank1 |
<> | 144:ef7eb2e8f9f7 | 519 | * |
<> | 144:ef7eb2e8f9f7 | 520 | * @retval HAL Status |
<> | 144:ef7eb2e8f9f7 | 521 | */ |
<> | 144:ef7eb2e8f9f7 | 522 | static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks) |
<> | 144:ef7eb2e8f9f7 | 523 | { |
<> | 144:ef7eb2e8f9f7 | 524 | HAL_StatusTypeDef status = HAL_OK; |
AnnaBridge | 167:e84263d55307 | 525 | |
AnnaBridge | 167:e84263d55307 | 526 | /* Prevent unused argument(s) compilation warning */ |
AnnaBridge | 167:e84263d55307 | 527 | UNUSED(Banks); |
AnnaBridge | 167:e84263d55307 | 528 | |
<> | 144:ef7eb2e8f9f7 | 529 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 530 | assert_param(IS_OB_WRP_SECTOR(WRPSector)); |
<> | 144:ef7eb2e8f9f7 | 531 | assert_param(IS_FLASH_BANK(Banks)); |
<> | 144:ef7eb2e8f9f7 | 532 | |
<> | 144:ef7eb2e8f9f7 | 533 | /* Wait for last operation to be completed */ |
<> | 144:ef7eb2e8f9f7 | 534 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
<> | 144:ef7eb2e8f9f7 | 535 | |
<> | 144:ef7eb2e8f9f7 | 536 | if(status == HAL_OK) |
<> | 144:ef7eb2e8f9f7 | 537 | { |
<> | 144:ef7eb2e8f9f7 | 538 | *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)WRPSector; |
<> | 144:ef7eb2e8f9f7 | 539 | } |
<> | 144:ef7eb2e8f9f7 | 540 | |
<> | 144:ef7eb2e8f9f7 | 541 | return status; |
<> | 144:ef7eb2e8f9f7 | 542 | } |
<> | 144:ef7eb2e8f9f7 | 543 | |
<> | 144:ef7eb2e8f9f7 | 544 | /** |
<> | 144:ef7eb2e8f9f7 | 545 | * @brief Set the read protection level. |
<> | 144:ef7eb2e8f9f7 | 546 | * @param Level: specifies the read protection level. |
<> | 144:ef7eb2e8f9f7 | 547 | * This parameter can be one of the following values: |
<> | 144:ef7eb2e8f9f7 | 548 | * @arg OB_RDP_LEVEL_0: No protection |
<> | 144:ef7eb2e8f9f7 | 549 | * @arg OB_RDP_LEVEL_1: Read protection of the memory |
<> | 144:ef7eb2e8f9f7 | 550 | * @arg OB_RDP_LEVEL_2: Full chip protection |
<> | 144:ef7eb2e8f9f7 | 551 | * |
<> | 144:ef7eb2e8f9f7 | 552 | * @note WARNING: When enabling OB_RDP level 2 it's no more possible to go back to level 1 or 0 |
<> | 144:ef7eb2e8f9f7 | 553 | * |
<> | 144:ef7eb2e8f9f7 | 554 | * @retval HAL Status |
<> | 144:ef7eb2e8f9f7 | 555 | */ |
<> | 144:ef7eb2e8f9f7 | 556 | static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t Level) |
<> | 144:ef7eb2e8f9f7 | 557 | { |
<> | 144:ef7eb2e8f9f7 | 558 | HAL_StatusTypeDef status = HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 559 | |
<> | 144:ef7eb2e8f9f7 | 560 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 561 | assert_param(IS_OB_RDP_LEVEL(Level)); |
<> | 144:ef7eb2e8f9f7 | 562 | |
<> | 144:ef7eb2e8f9f7 | 563 | /* Wait for last operation to be completed */ |
<> | 144:ef7eb2e8f9f7 | 564 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
<> | 144:ef7eb2e8f9f7 | 565 | |
<> | 144:ef7eb2e8f9f7 | 566 | if(status == HAL_OK) |
<> | 144:ef7eb2e8f9f7 | 567 | { |
<> | 144:ef7eb2e8f9f7 | 568 | *(__IO uint8_t*)OPTCR_BYTE1_ADDRESS = Level; |
<> | 144:ef7eb2e8f9f7 | 569 | } |
<> | 144:ef7eb2e8f9f7 | 570 | |
<> | 144:ef7eb2e8f9f7 | 571 | return status; |
<> | 144:ef7eb2e8f9f7 | 572 | } |
<> | 144:ef7eb2e8f9f7 | 573 | |
<> | 144:ef7eb2e8f9f7 | 574 | /** |
<> | 144:ef7eb2e8f9f7 | 575 | * @brief Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY. |
<> | 144:ef7eb2e8f9f7 | 576 | * @param Iwdg: Selects the IWDG mode |
<> | 144:ef7eb2e8f9f7 | 577 | * This parameter can be one of the following values: |
<> | 144:ef7eb2e8f9f7 | 578 | * @arg OB_IWDG_SW: Software IWDG selected |
<> | 144:ef7eb2e8f9f7 | 579 | * @arg OB_IWDG_HW: Hardware IWDG selected |
<> | 144:ef7eb2e8f9f7 | 580 | * @param Stop: Reset event when entering STOP mode. |
<> | 144:ef7eb2e8f9f7 | 581 | * This parameter can be one of the following values: |
<> | 144:ef7eb2e8f9f7 | 582 | * @arg OB_STOP_NO_RST: No reset generated when entering in STOP |
<> | 144:ef7eb2e8f9f7 | 583 | * @arg OB_STOP_RST: Reset generated when entering in STOP |
<> | 144:ef7eb2e8f9f7 | 584 | * @param Stdby: Reset event when entering Standby mode. |
<> | 144:ef7eb2e8f9f7 | 585 | * This parameter can be one of the following values: |
<> | 144:ef7eb2e8f9f7 | 586 | * @arg OB_STDBY_NO_RST: No reset generated when entering in STANDBY |
<> | 144:ef7eb2e8f9f7 | 587 | * @arg OB_STDBY_RST: Reset generated when entering in STANDBY |
<> | 144:ef7eb2e8f9f7 | 588 | * @retval HAL Status |
<> | 144:ef7eb2e8f9f7 | 589 | */ |
<> | 144:ef7eb2e8f9f7 | 590 | static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t Iwdg, uint8_t Stop, uint8_t Stdby) |
<> | 144:ef7eb2e8f9f7 | 591 | { |
AnnaBridge | 167:e84263d55307 | 592 | uint8_t optiontmp = 0xFF; |
<> | 144:ef7eb2e8f9f7 | 593 | HAL_StatusTypeDef status = HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 594 | |
<> | 144:ef7eb2e8f9f7 | 595 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 596 | assert_param(IS_OB_IWDG_SOURCE(Iwdg)); |
<> | 144:ef7eb2e8f9f7 | 597 | assert_param(IS_OB_STOP_SOURCE(Stop)); |
<> | 144:ef7eb2e8f9f7 | 598 | assert_param(IS_OB_STDBY_SOURCE(Stdby)); |
<> | 144:ef7eb2e8f9f7 | 599 | |
<> | 144:ef7eb2e8f9f7 | 600 | /* Wait for last operation to be completed */ |
<> | 144:ef7eb2e8f9f7 | 601 | status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
<> | 144:ef7eb2e8f9f7 | 602 | |
<> | 144:ef7eb2e8f9f7 | 603 | if(status == HAL_OK) |
<> | 144:ef7eb2e8f9f7 | 604 | { |
<> | 144:ef7eb2e8f9f7 | 605 | /* Mask OPTLOCK, OPTSTRT, BOR_LEV and BFB2 bits */ |
AnnaBridge | 167:e84263d55307 | 606 | optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE0_ADDRESS) & (uint8_t)0x1F); |
<> | 144:ef7eb2e8f9f7 | 607 | |
<> | 144:ef7eb2e8f9f7 | 608 | /* Update User Option Byte */ |
<> | 144:ef7eb2e8f9f7 | 609 | *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS = Iwdg | (uint8_t)(Stdby | (uint8_t)(Stop | ((uint8_t)optiontmp))); |
<> | 144:ef7eb2e8f9f7 | 610 | } |
<> | 144:ef7eb2e8f9f7 | 611 | |
<> | 144:ef7eb2e8f9f7 | 612 | return status; |
<> | 144:ef7eb2e8f9f7 | 613 | } |
<> | 144:ef7eb2e8f9f7 | 614 | |
<> | 144:ef7eb2e8f9f7 | 615 | /** |
<> | 144:ef7eb2e8f9f7 | 616 | * @brief Set the BOR Level. |
<> | 144:ef7eb2e8f9f7 | 617 | * @param Level: specifies the Option Bytes BOR Reset Level. |
<> | 144:ef7eb2e8f9f7 | 618 | * This parameter can be one of the following values: |
<> | 144:ef7eb2e8f9f7 | 619 | * @arg OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V |
<> | 144:ef7eb2e8f9f7 | 620 | * @arg OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V |
<> | 144:ef7eb2e8f9f7 | 621 | * @arg OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V |
<> | 144:ef7eb2e8f9f7 | 622 | * @arg OB_BOR_OFF: Supply voltage ranges from 1.62 to 2.1 V |
<> | 144:ef7eb2e8f9f7 | 623 | * @retval HAL Status |
<> | 144:ef7eb2e8f9f7 | 624 | */ |
<> | 144:ef7eb2e8f9f7 | 625 | static HAL_StatusTypeDef FLASH_OB_BOR_LevelConfig(uint8_t Level) |
<> | 144:ef7eb2e8f9f7 | 626 | { |
<> | 144:ef7eb2e8f9f7 | 627 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 628 | assert_param(IS_OB_BOR_LEVEL(Level)); |
<> | 144:ef7eb2e8f9f7 | 629 | |
<> | 144:ef7eb2e8f9f7 | 630 | /* Set the BOR Level */ |
<> | 144:ef7eb2e8f9f7 | 631 | *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS &= (~FLASH_OPTCR_BOR_LEV); |
<> | 144:ef7eb2e8f9f7 | 632 | *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS |= Level; |
<> | 144:ef7eb2e8f9f7 | 633 | |
<> | 144:ef7eb2e8f9f7 | 634 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 635 | |
<> | 144:ef7eb2e8f9f7 | 636 | } |
<> | 144:ef7eb2e8f9f7 | 637 | |
<> | 144:ef7eb2e8f9f7 | 638 | /** |
<> | 144:ef7eb2e8f9f7 | 639 | * @brief Return the FLASH User Option Byte value. |
<> | 144:ef7eb2e8f9f7 | 640 | * @retval uint8_t FLASH User Option Bytes values: IWDG_SW(Bit0), RST_STOP(Bit1) |
<> | 144:ef7eb2e8f9f7 | 641 | * and RST_STDBY(Bit2). |
<> | 144:ef7eb2e8f9f7 | 642 | */ |
<> | 144:ef7eb2e8f9f7 | 643 | static uint8_t FLASH_OB_GetUser(void) |
<> | 144:ef7eb2e8f9f7 | 644 | { |
<> | 144:ef7eb2e8f9f7 | 645 | /* Return the User Option Byte */ |
AnnaBridge | 167:e84263d55307 | 646 | return ((uint8_t)(FLASH->OPTCR & 0xE0)); |
<> | 144:ef7eb2e8f9f7 | 647 | } |
<> | 144:ef7eb2e8f9f7 | 648 | |
<> | 144:ef7eb2e8f9f7 | 649 | /** |
<> | 144:ef7eb2e8f9f7 | 650 | * @brief Return the FLASH Write Protection Option Bytes value. |
<> | 144:ef7eb2e8f9f7 | 651 | * @retval uint16_t FLASH Write Protection Option Bytes value |
<> | 144:ef7eb2e8f9f7 | 652 | */ |
<> | 144:ef7eb2e8f9f7 | 653 | static uint16_t FLASH_OB_GetWRP(void) |
<> | 144:ef7eb2e8f9f7 | 654 | { |
<> | 144:ef7eb2e8f9f7 | 655 | /* Return the FLASH write protection Register value */ |
<> | 144:ef7eb2e8f9f7 | 656 | return (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS)); |
<> | 144:ef7eb2e8f9f7 | 657 | } |
<> | 144:ef7eb2e8f9f7 | 658 | |
<> | 144:ef7eb2e8f9f7 | 659 | /** |
<> | 144:ef7eb2e8f9f7 | 660 | * @brief Returns the FLASH Read Protection level. |
<> | 144:ef7eb2e8f9f7 | 661 | * @retval FLASH ReadOut Protection Status: |
<> | 144:ef7eb2e8f9f7 | 662 | * This parameter can be one of the following values: |
<> | 144:ef7eb2e8f9f7 | 663 | * @arg OB_RDP_LEVEL_0: No protection |
<> | 144:ef7eb2e8f9f7 | 664 | * @arg OB_RDP_LEVEL_1: Read protection of the memory |
<> | 144:ef7eb2e8f9f7 | 665 | * @arg OB_RDP_LEVEL_2: Full chip protection |
<> | 144:ef7eb2e8f9f7 | 666 | */ |
<> | 144:ef7eb2e8f9f7 | 667 | static uint8_t FLASH_OB_GetRDP(void) |
<> | 144:ef7eb2e8f9f7 | 668 | { |
<> | 144:ef7eb2e8f9f7 | 669 | uint8_t readstatus = OB_RDP_LEVEL_0; |
<> | 144:ef7eb2e8f9f7 | 670 | |
<> | 144:ef7eb2e8f9f7 | 671 | if((*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_2)) |
<> | 144:ef7eb2e8f9f7 | 672 | { |
<> | 144:ef7eb2e8f9f7 | 673 | readstatus = OB_RDP_LEVEL_2; |
<> | 144:ef7eb2e8f9f7 | 674 | } |
<> | 144:ef7eb2e8f9f7 | 675 | else if((*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_1)) |
<> | 144:ef7eb2e8f9f7 | 676 | { |
<> | 144:ef7eb2e8f9f7 | 677 | readstatus = OB_RDP_LEVEL_1; |
<> | 144:ef7eb2e8f9f7 | 678 | } |
<> | 144:ef7eb2e8f9f7 | 679 | else |
<> | 144:ef7eb2e8f9f7 | 680 | { |
<> | 144:ef7eb2e8f9f7 | 681 | readstatus = OB_RDP_LEVEL_0; |
<> | 144:ef7eb2e8f9f7 | 682 | } |
<> | 144:ef7eb2e8f9f7 | 683 | |
<> | 144:ef7eb2e8f9f7 | 684 | return readstatus; |
<> | 144:ef7eb2e8f9f7 | 685 | } |
<> | 144:ef7eb2e8f9f7 | 686 | |
<> | 144:ef7eb2e8f9f7 | 687 | /** |
<> | 144:ef7eb2e8f9f7 | 688 | * @brief Returns the FLASH BOR level. |
<> | 144:ef7eb2e8f9f7 | 689 | * @retval uint8_t The FLASH BOR level: |
<> | 144:ef7eb2e8f9f7 | 690 | * - OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V |
<> | 144:ef7eb2e8f9f7 | 691 | * - OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V |
<> | 144:ef7eb2e8f9f7 | 692 | * - OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V |
<> | 144:ef7eb2e8f9f7 | 693 | * - OB_BOR_OFF : Supply voltage ranges from 1.62 to 2.1 V |
<> | 144:ef7eb2e8f9f7 | 694 | */ |
<> | 144:ef7eb2e8f9f7 | 695 | static uint8_t FLASH_OB_GetBOR(void) |
<> | 144:ef7eb2e8f9f7 | 696 | { |
<> | 144:ef7eb2e8f9f7 | 697 | /* Return the FLASH BOR level */ |
AnnaBridge | 167:e84263d55307 | 698 | return (uint8_t)(*(__IO uint8_t *)(OPTCR_BYTE0_ADDRESS) & (uint8_t)0x0C); |
<> | 144:ef7eb2e8f9f7 | 699 | } |
<> | 144:ef7eb2e8f9f7 | 700 | |
<> | 144:ef7eb2e8f9f7 | 701 | /** |
<> | 144:ef7eb2e8f9f7 | 702 | * @} |
<> | 144:ef7eb2e8f9f7 | 703 | */ |
<> | 144:ef7eb2e8f9f7 | 704 | |
<> | 144:ef7eb2e8f9f7 | 705 | #endif /* HAL_FLASH_MODULE_ENABLED */ |
<> | 144:ef7eb2e8f9f7 | 706 | |
<> | 144:ef7eb2e8f9f7 | 707 | /** |
<> | 144:ef7eb2e8f9f7 | 708 | * @} |
<> | 144:ef7eb2e8f9f7 | 709 | */ |
<> | 144:ef7eb2e8f9f7 | 710 | |
<> | 144:ef7eb2e8f9f7 | 711 | /** |
<> | 144:ef7eb2e8f9f7 | 712 | * @} |
<> | 144:ef7eb2e8f9f7 | 713 | */ |
<> | 144:ef7eb2e8f9f7 | 714 | |
<> | 144:ef7eb2e8f9f7 | 715 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |