mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
188:bcfe06ba3d64
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /* mbed Microcontroller Library
<> 144:ef7eb2e8f9f7 2 * Copyright (c) 2006-2013 ARM Limited
<> 144:ef7eb2e8f9f7 3 *
<> 144:ef7eb2e8f9f7 4 * Licensed under the Apache License, Version 2.0 (the "License");
<> 144:ef7eb2e8f9f7 5 * you may not use this file except in compliance with the License.
<> 144:ef7eb2e8f9f7 6 * You may obtain a copy of the License at
<> 144:ef7eb2e8f9f7 7 *
<> 144:ef7eb2e8f9f7 8 * http://www.apache.org/licenses/LICENSE-2.0
<> 144:ef7eb2e8f9f7 9 *
<> 144:ef7eb2e8f9f7 10 * Unless required by applicable law or agreed to in writing, software
<> 144:ef7eb2e8f9f7 11 * distributed under the License is distributed on an "AS IS" BASIS,
<> 144:ef7eb2e8f9f7 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
<> 144:ef7eb2e8f9f7 13 * See the License for the specific language governing permissions and
<> 144:ef7eb2e8f9f7 14 * limitations under the License.
<> 144:ef7eb2e8f9f7 15 *
<> 144:ef7eb2e8f9f7 16 * Ported to NXP LPC43XX by Micromint USA <support@micromint.com>
<> 144:ef7eb2e8f9f7 17 */
<> 144:ef7eb2e8f9f7 18 // math.h required for floating point operations for baud rate calculation
<> 144:ef7eb2e8f9f7 19 #include <math.h>
<> 144:ef7eb2e8f9f7 20 #include <string.h>
<> 144:ef7eb2e8f9f7 21 #include <stdlib.h>
<> 144:ef7eb2e8f9f7 22
<> 144:ef7eb2e8f9f7 23 #include "serial_api.h"
<> 144:ef7eb2e8f9f7 24 #include "cmsis.h"
<> 144:ef7eb2e8f9f7 25 #include "pinmap.h"
<> 144:ef7eb2e8f9f7 26 #include "mbed_error.h"
<> 144:ef7eb2e8f9f7 27 #include "gpio_api.h"
<> 144:ef7eb2e8f9f7 28
<> 144:ef7eb2e8f9f7 29 /******************************************************************************
<> 144:ef7eb2e8f9f7 30 * INITIALIZATION
<> 144:ef7eb2e8f9f7 31 ******************************************************************************/
<> 144:ef7eb2e8f9f7 32 #define UART_NUM 4
<> 144:ef7eb2e8f9f7 33
<> 144:ef7eb2e8f9f7 34 // SCU mode for UART pins
<> 144:ef7eb2e8f9f7 35 #define SCU_PINIO_UART_TX SCU_MODE_PULLDOWN
<> 144:ef7eb2e8f9f7 36 #define SCU_PINIO_UART_RX SCU_PINIO_PULLNONE
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38 static const PinMap PinMap_UART_TX[] = {
<> 144:ef7eb2e8f9f7 39 {P1_13, UART_1, (SCU_PINIO_UART_TX | 1)},
<> 144:ef7eb2e8f9f7 40 {P1_15, UART_2, (SCU_PINIO_UART_TX | 1)},
<> 144:ef7eb2e8f9f7 41 {P2_0, UART_0, (SCU_PINIO_UART_TX | 1)},
<> 144:ef7eb2e8f9f7 42 {P2_3, UART_3, (SCU_PINIO_UART_TX | 2)},
<> 144:ef7eb2e8f9f7 43 {P2_10, UART_2, (SCU_PINIO_UART_TX | 2)},
<> 144:ef7eb2e8f9f7 44 {P3_4, UART_1, (SCU_PINIO_UART_TX | 4)},
<> 144:ef7eb2e8f9f7 45 {P4_1, UART_3, (SCU_PINIO_UART_TX | 6)},
<> 144:ef7eb2e8f9f7 46 {P5_6, UART_1, (SCU_PINIO_UART_TX | 4)},
<> 144:ef7eb2e8f9f7 47 {P6_4, UART_0, (SCU_PINIO_UART_TX | 2)},
<> 144:ef7eb2e8f9f7 48 {P7_1, UART_2, (SCU_PINIO_UART_TX | 6)},
<> 144:ef7eb2e8f9f7 49 {P9_3, UART_3, (SCU_PINIO_UART_TX | 7)},
<> 144:ef7eb2e8f9f7 50 {P9_5, UART_0, (SCU_PINIO_UART_TX | 7)},
<> 144:ef7eb2e8f9f7 51 {PA_1, UART_2, (SCU_PINIO_UART_TX | 3)},
<> 144:ef7eb2e8f9f7 52 {PC_13, UART_1, (SCU_PINIO_UART_TX | 2)},
<> 144:ef7eb2e8f9f7 53 {PE_11, UART_1, (SCU_PINIO_UART_TX | 2)},
<> 144:ef7eb2e8f9f7 54 {PF_2, UART_3, (SCU_PINIO_UART_TX | 1)},
<> 144:ef7eb2e8f9f7 55 {PF_10, UART_0, (SCU_PINIO_UART_TX | 1)},
<> 144:ef7eb2e8f9f7 56 {NC, NC, 0}
<> 144:ef7eb2e8f9f7 57 };
<> 144:ef7eb2e8f9f7 58
<> 144:ef7eb2e8f9f7 59 static const PinMap PinMap_UART_RX[] = {
<> 144:ef7eb2e8f9f7 60 {P1_14, UART_1, (SCU_PINIO_UART_RX | 1)},
<> 144:ef7eb2e8f9f7 61 {P1_16, UART_2, (SCU_PINIO_UART_RX | 1)},
<> 144:ef7eb2e8f9f7 62 {P2_1, UART_0, (SCU_PINIO_UART_RX | 1)},
<> 144:ef7eb2e8f9f7 63 {P2_4, UART_3, (SCU_PINIO_UART_RX | 2)},
<> 144:ef7eb2e8f9f7 64 {P2_11, UART_2, (SCU_PINIO_UART_RX | 2)},
<> 144:ef7eb2e8f9f7 65 {P3_5, UART_1, (SCU_PINIO_UART_RX | 4)},
<> 144:ef7eb2e8f9f7 66 {P4_2, UART_3, (SCU_PINIO_UART_RX | 6)},
<> 144:ef7eb2e8f9f7 67 {P5_7, UART_1, (SCU_PINIO_UART_RX | 4)},
<> 144:ef7eb2e8f9f7 68 {P6_5, UART_0, (SCU_PINIO_UART_RX | 2)},
<> 144:ef7eb2e8f9f7 69 {P7_2, UART_2, (SCU_PINIO_UART_RX | 6)},
<> 144:ef7eb2e8f9f7 70 {P9_4, UART_3, (SCU_PINIO_UART_RX | 7)},
<> 144:ef7eb2e8f9f7 71 {P9_6, UART_0, (SCU_PINIO_UART_RX | 7)},
<> 144:ef7eb2e8f9f7 72 {PA_2, UART_2, (SCU_PINIO_UART_RX | 3)},
<> 144:ef7eb2e8f9f7 73 {PC_14, UART_1, (SCU_PINIO_UART_RX | 2)},
<> 144:ef7eb2e8f9f7 74 {PE_12, UART_1, (SCU_PINIO_UART_RX | 2)},
<> 144:ef7eb2e8f9f7 75 {PF_3, UART_3, (SCU_PINIO_UART_RX | 1)},
<> 144:ef7eb2e8f9f7 76 {PF_11, UART_0, (SCU_PINIO_UART_RX | 1)},
<> 144:ef7eb2e8f9f7 77 {NC, NC, 0}
<> 144:ef7eb2e8f9f7 78 };
<> 144:ef7eb2e8f9f7 79
<> 144:ef7eb2e8f9f7 80 #if (DEVICE_SERIAL_FC)
<> 144:ef7eb2e8f9f7 81 // RTS/CTS PinMap for flow control
<> 144:ef7eb2e8f9f7 82 static const PinMap PinMap_UART_RTS[] = {
<> 144:ef7eb2e8f9f7 83 {P1_9, UART_1, (SCU_PINIO_FAST | 1)},
<> 144:ef7eb2e8f9f7 84 {P5_2, UART_1, (SCU_PINIO_FAST | 4)},
<> 144:ef7eb2e8f9f7 85 {PC_3, UART_1, (SCU_PINIO_FAST | 2)},
<> 144:ef7eb2e8f9f7 86 {PE_5, UART_1, (SCU_PINIO_FAST | 2)},
<> 144:ef7eb2e8f9f7 87 {NC, NC, 0}
<> 144:ef7eb2e8f9f7 88 };
<> 144:ef7eb2e8f9f7 89
<> 144:ef7eb2e8f9f7 90 static const PinMap PinMap_UART_CTS[] = {
<> 144:ef7eb2e8f9f7 91 {P1_11, UART_1, (SCU_PINIO_FAST | 1)},
AnnaBridge 188:bcfe06ba3d64 92 {P5_4, UART_1, (SCU_PINIO_FAST | 4)},
<> 144:ef7eb2e8f9f7 93 {PC_2, UART_1, (SCU_PINIO_FAST | 2)},
<> 144:ef7eb2e8f9f7 94 {PE_7, UART_1, (SCU_PINIO_FAST | 2)},
<> 144:ef7eb2e8f9f7 95 {NC, NC, 0}
<> 144:ef7eb2e8f9f7 96 };
<> 144:ef7eb2e8f9f7 97 #endif
<> 144:ef7eb2e8f9f7 98
<> 144:ef7eb2e8f9f7 99 static uart_irq_handler irq_handler;
<> 144:ef7eb2e8f9f7 100
<> 144:ef7eb2e8f9f7 101 int stdio_uart_inited = 0;
<> 144:ef7eb2e8f9f7 102 serial_t stdio_uart;
<> 144:ef7eb2e8f9f7 103
<> 144:ef7eb2e8f9f7 104 struct serial_global_data_s {
<> 144:ef7eb2e8f9f7 105 uint32_t serial_irq_id;
<> 144:ef7eb2e8f9f7 106 gpio_t sw_rts, sw_cts;
<> 144:ef7eb2e8f9f7 107 uint8_t count, rx_irq_set_flow, rx_irq_set_api;
<> 144:ef7eb2e8f9f7 108 };
<> 144:ef7eb2e8f9f7 109
<> 144:ef7eb2e8f9f7 110 static struct serial_global_data_s uart_data[UART_NUM];
<> 144:ef7eb2e8f9f7 111
<> 144:ef7eb2e8f9f7 112 void serial_init(serial_t *obj, PinName tx, PinName rx) {
<> 144:ef7eb2e8f9f7 113 int is_stdio_uart = 0;
<> 144:ef7eb2e8f9f7 114
<> 144:ef7eb2e8f9f7 115 // determine the UART to use
<> 144:ef7eb2e8f9f7 116 UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
<> 144:ef7eb2e8f9f7 117 UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
<> 144:ef7eb2e8f9f7 118 UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
<> 144:ef7eb2e8f9f7 119 if ((int)uart == NC) {
<> 144:ef7eb2e8f9f7 120 error("Serial pinout mapping failed");
<> 144:ef7eb2e8f9f7 121 }
<> 144:ef7eb2e8f9f7 122
<> 144:ef7eb2e8f9f7 123 obj->uart = (LPC_USART_T *)uart;
<> 144:ef7eb2e8f9f7 124
<> 144:ef7eb2e8f9f7 125 // enable fifos and default rx trigger level
<> 144:ef7eb2e8f9f7 126 obj->uart->FCR = 1 << 0 // FIFO Enable - 0 = Disables, 1 = Enabled
<> 144:ef7eb2e8f9f7 127 | 0 << 1 // Rx Fifo Reset
<> 144:ef7eb2e8f9f7 128 | 0 << 2 // Tx Fifo Reset
<> 144:ef7eb2e8f9f7 129 | 0 << 6; // Rx irq trigger level - 0 = 1 char, 1 = 4 chars, 2 = 8 chars, 3 = 14 chars
<> 144:ef7eb2e8f9f7 130
<> 144:ef7eb2e8f9f7 131 // disable irqs
<> 144:ef7eb2e8f9f7 132 obj->uart->IER = 0 << 0 // Rx Data available irq enable
<> 144:ef7eb2e8f9f7 133 | 0 << 1 // Tx Fifo empty irq enable
<> 144:ef7eb2e8f9f7 134 | 0 << 2; // Rx Line Status irq enable
<> 144:ef7eb2e8f9f7 135
<> 144:ef7eb2e8f9f7 136 // set default baud rate and format
<> 144:ef7eb2e8f9f7 137 serial_baud (obj, 9600);
<> 144:ef7eb2e8f9f7 138 serial_format(obj, 8, ParityNone, 1);
<> 144:ef7eb2e8f9f7 139
<> 144:ef7eb2e8f9f7 140 // pinout the chosen uart
<> 144:ef7eb2e8f9f7 141 pinmap_pinout(tx, PinMap_UART_TX);
<> 144:ef7eb2e8f9f7 142 pinmap_pinout(rx, PinMap_UART_RX);
<> 144:ef7eb2e8f9f7 143
<> 144:ef7eb2e8f9f7 144 // set rx/tx pins in PullUp mode
<> 144:ef7eb2e8f9f7 145 if (tx != NC) {
<> 144:ef7eb2e8f9f7 146 pin_mode(tx, PullUp);
<> 144:ef7eb2e8f9f7 147 }
<> 144:ef7eb2e8f9f7 148 if (rx != NC) {
<> 144:ef7eb2e8f9f7 149 pin_mode(rx, PullUp);
<> 144:ef7eb2e8f9f7 150 }
<> 144:ef7eb2e8f9f7 151
<> 144:ef7eb2e8f9f7 152 switch (uart) {
<> 144:ef7eb2e8f9f7 153 case UART_0: obj->index = 0; break;
<> 144:ef7eb2e8f9f7 154 case UART_1: obj->index = 1; break;
<> 144:ef7eb2e8f9f7 155 case UART_2: obj->index = 2; break;
<> 144:ef7eb2e8f9f7 156 case UART_3: obj->index = 3; break;
<> 144:ef7eb2e8f9f7 157 }
<> 144:ef7eb2e8f9f7 158 uart_data[obj->index].sw_rts.pin = NC;
<> 144:ef7eb2e8f9f7 159 uart_data[obj->index].sw_cts.pin = NC;
<> 144:ef7eb2e8f9f7 160 serial_set_flow_control(obj, FlowControlNone, NC, NC);
<> 144:ef7eb2e8f9f7 161
<> 144:ef7eb2e8f9f7 162 is_stdio_uart = (uart == STDIO_UART) ? (1) : (0);
<> 144:ef7eb2e8f9f7 163
<> 144:ef7eb2e8f9f7 164 if (is_stdio_uart) {
<> 144:ef7eb2e8f9f7 165 stdio_uart_inited = 1;
<> 144:ef7eb2e8f9f7 166 serial_baud (obj, STDIO_BAUD);
<> 144:ef7eb2e8f9f7 167 memcpy(&stdio_uart, obj, sizeof(serial_t));
<> 144:ef7eb2e8f9f7 168 }
<> 144:ef7eb2e8f9f7 169 }
<> 144:ef7eb2e8f9f7 170
<> 144:ef7eb2e8f9f7 171 void serial_free(serial_t *obj) {
<> 144:ef7eb2e8f9f7 172 uart_data[obj->index].serial_irq_id = 0;
<> 144:ef7eb2e8f9f7 173 }
<> 144:ef7eb2e8f9f7 174
<> 144:ef7eb2e8f9f7 175 // serial_baud
<> 144:ef7eb2e8f9f7 176 // set the baud rate, taking in to account the current SystemFrequency
<> 144:ef7eb2e8f9f7 177 void serial_baud(serial_t *obj, int baudrate) {
<> 144:ef7eb2e8f9f7 178 uint32_t PCLK = SystemCoreClock;
<> 144:ef7eb2e8f9f7 179
<> 144:ef7eb2e8f9f7 180 // First we check to see if the basic divide with no DivAddVal/MulVal
<> 144:ef7eb2e8f9f7 181 // ratio gives us an integer result. If it does, we set DivAddVal = 0,
<> 144:ef7eb2e8f9f7 182 // MulVal = 1. Otherwise, we search the valid ratio value range to find
<> 144:ef7eb2e8f9f7 183 // the closest match. This could be more elegant, using search methods
<> 144:ef7eb2e8f9f7 184 // and/or lookup tables, but the brute force method is not that much
<> 144:ef7eb2e8f9f7 185 // slower, and is more maintainable.
<> 144:ef7eb2e8f9f7 186 uint16_t DL = PCLK / (16 * baudrate);
<> 144:ef7eb2e8f9f7 187
<> 144:ef7eb2e8f9f7 188 uint8_t DivAddVal = 0;
<> 144:ef7eb2e8f9f7 189 uint8_t MulVal = 1;
<> 144:ef7eb2e8f9f7 190 int hit = 0;
<> 144:ef7eb2e8f9f7 191 uint16_t dlv;
<> 144:ef7eb2e8f9f7 192 uint8_t mv, dav;
<> 144:ef7eb2e8f9f7 193 if ((PCLK % (16 * baudrate)) != 0) { // Checking for zero remainder
<> 144:ef7eb2e8f9f7 194 int err_best = baudrate, b;
<> 144:ef7eb2e8f9f7 195 for (mv = 1; mv < 16 && !hit; mv++)
<> 144:ef7eb2e8f9f7 196 {
<> 144:ef7eb2e8f9f7 197 for (dav = 0; dav < mv; dav++)
<> 144:ef7eb2e8f9f7 198 {
<> 144:ef7eb2e8f9f7 199 // baudrate = PCLK / (16 * dlv * (1 + (DivAdd / Mul))
<> 144:ef7eb2e8f9f7 200 // solving for dlv, we get dlv = mul * PCLK / (16 * baudrate * (divadd + mul))
<> 144:ef7eb2e8f9f7 201 // mul has 4 bits, PCLK has 27 so we have 1 bit headroom which can be used for rounding
<> 144:ef7eb2e8f9f7 202 // for many values of mul and PCLK we have 2 or more bits of headroom which can be used to improve precision
<> 144:ef7eb2e8f9f7 203 // note: X / 32 doesn't round correctly. Instead, we use ((X / 16) + 1) / 2 for correct rounding
<> 144:ef7eb2e8f9f7 204
<> 144:ef7eb2e8f9f7 205 if ((mv * PCLK * 2) & 0x80000000) // 1 bit headroom
<> 144:ef7eb2e8f9f7 206 dlv = ((((2 * mv * PCLK) / (baudrate * (dav + mv))) / 16) + 1) / 2;
<> 144:ef7eb2e8f9f7 207 else // 2 bits headroom, use more precision
<> 144:ef7eb2e8f9f7 208 dlv = ((((4 * mv * PCLK) / (baudrate * (dav + mv))) / 32) + 1) / 2;
<> 144:ef7eb2e8f9f7 209
<> 144:ef7eb2e8f9f7 210 // datasheet says if DLL==DLM==0, then 1 is used instead since divide by zero is ungood
<> 144:ef7eb2e8f9f7 211 if (dlv == 0)
<> 144:ef7eb2e8f9f7 212 dlv = 1;
<> 144:ef7eb2e8f9f7 213
<> 144:ef7eb2e8f9f7 214 // datasheet says if dav > 0 then DL must be >= 2
<> 144:ef7eb2e8f9f7 215 if ((dav > 0) && (dlv < 2))
<> 144:ef7eb2e8f9f7 216 dlv = 2;
<> 144:ef7eb2e8f9f7 217
<> 144:ef7eb2e8f9f7 218 // integer rearrangement of the baudrate equation (with rounding)
<> 144:ef7eb2e8f9f7 219 b = ((PCLK * mv / (dlv * (dav + mv) * 8)) + 1) / 2;
<> 144:ef7eb2e8f9f7 220
<> 144:ef7eb2e8f9f7 221 // check to see how we went
<> 144:ef7eb2e8f9f7 222 b = abs(b - baudrate);
<> 144:ef7eb2e8f9f7 223 if (b < err_best)
<> 144:ef7eb2e8f9f7 224 {
<> 144:ef7eb2e8f9f7 225 err_best = b;
<> 144:ef7eb2e8f9f7 226
<> 144:ef7eb2e8f9f7 227 DL = dlv;
<> 144:ef7eb2e8f9f7 228 MulVal = mv;
<> 144:ef7eb2e8f9f7 229 DivAddVal = dav;
<> 144:ef7eb2e8f9f7 230
<> 144:ef7eb2e8f9f7 231 if (b == baudrate)
<> 144:ef7eb2e8f9f7 232 {
<> 144:ef7eb2e8f9f7 233 hit = 1;
<> 144:ef7eb2e8f9f7 234 break;
<> 144:ef7eb2e8f9f7 235 }
<> 144:ef7eb2e8f9f7 236 }
<> 144:ef7eb2e8f9f7 237 }
<> 144:ef7eb2e8f9f7 238 }
<> 144:ef7eb2e8f9f7 239 }
<> 144:ef7eb2e8f9f7 240
<> 144:ef7eb2e8f9f7 241 // set LCR[DLAB] to enable writing to divider registers
<> 144:ef7eb2e8f9f7 242 obj->uart->LCR |= (1 << 7);
<> 144:ef7eb2e8f9f7 243
<> 144:ef7eb2e8f9f7 244 // set divider values
<> 144:ef7eb2e8f9f7 245 obj->uart->DLM = (DL >> 8) & 0xFF;
<> 144:ef7eb2e8f9f7 246 obj->uart->DLL = (DL >> 0) & 0xFF;
<> 144:ef7eb2e8f9f7 247 obj->uart->FDR = (uint32_t) DivAddVal << 0
<> 144:ef7eb2e8f9f7 248 | (uint32_t) MulVal << 4;
<> 144:ef7eb2e8f9f7 249
<> 144:ef7eb2e8f9f7 250 // clear LCR[DLAB]
<> 144:ef7eb2e8f9f7 251 obj->uart->LCR &= ~(1 << 7);
<> 144:ef7eb2e8f9f7 252 }
<> 144:ef7eb2e8f9f7 253
<> 144:ef7eb2e8f9f7 254 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
<> 144:ef7eb2e8f9f7 255 // 0: 1 stop bits, 1: 2 stop bits
<> 144:ef7eb2e8f9f7 256 if (stop_bits != 1 && stop_bits != 2) {
<> 144:ef7eb2e8f9f7 257 error("Invalid stop bits specified");
<> 144:ef7eb2e8f9f7 258 }
<> 144:ef7eb2e8f9f7 259 stop_bits -= 1;
<> 144:ef7eb2e8f9f7 260
<> 144:ef7eb2e8f9f7 261 // 0: 5 data bits ... 3: 8 data bits
<> 144:ef7eb2e8f9f7 262 if (data_bits < 5 || data_bits > 8) {
<> 144:ef7eb2e8f9f7 263 error("Invalid number of bits (%d) in serial format, should be 5..8", data_bits);
<> 144:ef7eb2e8f9f7 264 }
<> 144:ef7eb2e8f9f7 265 data_bits -= 5;
<> 144:ef7eb2e8f9f7 266
AnnaBridge 188:bcfe06ba3d64 267 int parity_enable = 0, parity_select = 0;
<> 144:ef7eb2e8f9f7 268 switch (parity) {
<> 144:ef7eb2e8f9f7 269 case ParityNone: parity_enable = 0; parity_select = 0; break;
<> 144:ef7eb2e8f9f7 270 case ParityOdd : parity_enable = 1; parity_select = 0; break;
<> 144:ef7eb2e8f9f7 271 case ParityEven: parity_enable = 1; parity_select = 1; break;
<> 144:ef7eb2e8f9f7 272 case ParityForced1: parity_enable = 1; parity_select = 2; break;
<> 144:ef7eb2e8f9f7 273 case ParityForced0: parity_enable = 1; parity_select = 3; break;
<> 144:ef7eb2e8f9f7 274 default:
AnnaBridge 188:bcfe06ba3d64 275 break;
<> 144:ef7eb2e8f9f7 276 }
<> 144:ef7eb2e8f9f7 277
<> 144:ef7eb2e8f9f7 278 obj->uart->LCR = data_bits << 0
<> 144:ef7eb2e8f9f7 279 | stop_bits << 2
<> 144:ef7eb2e8f9f7 280 | parity_enable << 3
<> 144:ef7eb2e8f9f7 281 | parity_select << 4;
<> 144:ef7eb2e8f9f7 282 }
<> 144:ef7eb2e8f9f7 283
<> 144:ef7eb2e8f9f7 284 /******************************************************************************
<> 144:ef7eb2e8f9f7 285 * INTERRUPTS HANDLING
<> 144:ef7eb2e8f9f7 286 ******************************************************************************/
<> 144:ef7eb2e8f9f7 287 static inline void uart_irq(uint32_t iir, uint32_t index, LPC_USART_T *puart) {
<> 144:ef7eb2e8f9f7 288 // [Chapter 14] LPC17xx UART0/2/3: UARTn Interrupt Handling
<> 144:ef7eb2e8f9f7 289 SerialIrq irq_type;
<> 144:ef7eb2e8f9f7 290 switch (iir) {
<> 144:ef7eb2e8f9f7 291 case 1: irq_type = TxIrq; break;
<> 144:ef7eb2e8f9f7 292 case 2: irq_type = RxIrq; break;
<> 144:ef7eb2e8f9f7 293 default: return;
<> 144:ef7eb2e8f9f7 294 }
<> 144:ef7eb2e8f9f7 295 if ((RxIrq == irq_type) && (NC != uart_data[index].sw_rts.pin)) {
<> 144:ef7eb2e8f9f7 296 gpio_write(&uart_data[index].sw_rts, 1);
<> 144:ef7eb2e8f9f7 297 // Disable interrupt if it wasn't enabled by other part of the application
<> 144:ef7eb2e8f9f7 298 if (!uart_data[index].rx_irq_set_api)
<> 144:ef7eb2e8f9f7 299 puart->IER &= ~(1 << RxIrq);
<> 144:ef7eb2e8f9f7 300 }
<> 144:ef7eb2e8f9f7 301 if (uart_data[index].serial_irq_id != 0)
<> 144:ef7eb2e8f9f7 302 if ((irq_type != RxIrq) || (uart_data[index].rx_irq_set_api))
<> 144:ef7eb2e8f9f7 303 irq_handler(uart_data[index].serial_irq_id, irq_type);
<> 144:ef7eb2e8f9f7 304 }
<> 144:ef7eb2e8f9f7 305
<> 144:ef7eb2e8f9f7 306 void uart0_irq() {uart_irq((LPC_USART0->IIR >> 1) & 0x7, 0, (LPC_USART_T*)LPC_USART0);}
<> 144:ef7eb2e8f9f7 307 void uart1_irq() {uart_irq((LPC_UART1->IIR >> 1) & 0x7, 1, (LPC_USART_T*)LPC_UART1);}
<> 144:ef7eb2e8f9f7 308 void uart2_irq() {uart_irq((LPC_USART2->IIR >> 1) & 0x7, 2, (LPC_USART_T*)LPC_USART2);}
<> 144:ef7eb2e8f9f7 309 void uart3_irq() {uart_irq((LPC_USART3->IIR >> 1) & 0x7, 3, (LPC_USART_T*)LPC_USART3);}
<> 144:ef7eb2e8f9f7 310
<> 144:ef7eb2e8f9f7 311 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
<> 144:ef7eb2e8f9f7 312 irq_handler = handler;
<> 144:ef7eb2e8f9f7 313 uart_data[obj->index].serial_irq_id = id;
<> 144:ef7eb2e8f9f7 314 }
<> 144:ef7eb2e8f9f7 315
<> 144:ef7eb2e8f9f7 316 static void serial_irq_set_internal(serial_t *obj, SerialIrq irq, uint32_t enable) {
<> 144:ef7eb2e8f9f7 317 IRQn_Type irq_n = (IRQn_Type)0;
<> 144:ef7eb2e8f9f7 318 uint32_t vector = 0;
<> 144:ef7eb2e8f9f7 319 switch ((int)obj->uart) {
<> 144:ef7eb2e8f9f7 320 case UART_0: irq_n=USART0_IRQn; vector = (uint32_t)&uart0_irq; break;
<> 144:ef7eb2e8f9f7 321 case UART_1: irq_n=UART1_IRQn; vector = (uint32_t)&uart1_irq; break;
<> 144:ef7eb2e8f9f7 322 case UART_2: irq_n=USART2_IRQn; vector = (uint32_t)&uart2_irq; break;
<> 144:ef7eb2e8f9f7 323 case UART_3: irq_n=USART3_IRQn; vector = (uint32_t)&uart3_irq; break;
<> 144:ef7eb2e8f9f7 324 }
<> 144:ef7eb2e8f9f7 325
<> 144:ef7eb2e8f9f7 326 if (enable) {
<> 144:ef7eb2e8f9f7 327 obj->uart->IER |= 1 << irq;
<> 144:ef7eb2e8f9f7 328 NVIC_SetVector(irq_n, vector);
<> 144:ef7eb2e8f9f7 329 NVIC_EnableIRQ(irq_n);
<> 144:ef7eb2e8f9f7 330 } else if ((TxIrq == irq) || (uart_data[obj->index].rx_irq_set_api + uart_data[obj->index].rx_irq_set_flow == 0)) { // disable
<> 144:ef7eb2e8f9f7 331 int all_disabled = 0;
<> 144:ef7eb2e8f9f7 332 SerialIrq other_irq = (irq == RxIrq) ? (TxIrq) : (RxIrq);
<> 144:ef7eb2e8f9f7 333 obj->uart->IER &= ~(1 << irq);
<> 144:ef7eb2e8f9f7 334 all_disabled = (obj->uart->IER & (1 << other_irq)) == 0;
<> 144:ef7eb2e8f9f7 335 if (all_disabled)
<> 144:ef7eb2e8f9f7 336 NVIC_DisableIRQ(irq_n);
<> 144:ef7eb2e8f9f7 337 }
<> 144:ef7eb2e8f9f7 338 }
<> 144:ef7eb2e8f9f7 339
<> 144:ef7eb2e8f9f7 340 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
<> 144:ef7eb2e8f9f7 341 if (RxIrq == irq)
<> 144:ef7eb2e8f9f7 342 uart_data[obj->index].rx_irq_set_api = enable;
<> 144:ef7eb2e8f9f7 343 serial_irq_set_internal(obj, irq, enable);
<> 144:ef7eb2e8f9f7 344 }
<> 144:ef7eb2e8f9f7 345
<> 144:ef7eb2e8f9f7 346 #if (DEVICE_SERIAL_FC)
<> 144:ef7eb2e8f9f7 347 static void serial_flow_irq_set(serial_t *obj, uint32_t enable) {
<> 144:ef7eb2e8f9f7 348 uart_data[obj->index].rx_irq_set_flow = enable;
<> 144:ef7eb2e8f9f7 349 serial_irq_set_internal(obj, RxIrq, enable);
<> 144:ef7eb2e8f9f7 350 }
<> 144:ef7eb2e8f9f7 351 #endif
<> 144:ef7eb2e8f9f7 352
<> 144:ef7eb2e8f9f7 353 /******************************************************************************
<> 144:ef7eb2e8f9f7 354 * READ/WRITE
<> 144:ef7eb2e8f9f7 355 ******************************************************************************/
<> 144:ef7eb2e8f9f7 356 int serial_getc(serial_t *obj) {
<> 144:ef7eb2e8f9f7 357 while (!serial_readable(obj));
<> 144:ef7eb2e8f9f7 358 int data = obj->uart->RBR;
<> 144:ef7eb2e8f9f7 359 if (NC != uart_data[obj->index].sw_rts.pin) {
<> 144:ef7eb2e8f9f7 360 gpio_write(&uart_data[obj->index].sw_rts, 0);
<> 144:ef7eb2e8f9f7 361 obj->uart->IER |= 1 << RxIrq;
<> 144:ef7eb2e8f9f7 362 }
<> 144:ef7eb2e8f9f7 363 return data;
<> 144:ef7eb2e8f9f7 364 }
<> 144:ef7eb2e8f9f7 365
<> 144:ef7eb2e8f9f7 366 void serial_putc(serial_t *obj, int c) {
<> 144:ef7eb2e8f9f7 367 while (!serial_writable(obj));
<> 144:ef7eb2e8f9f7 368 obj->uart->THR = c;
<> 144:ef7eb2e8f9f7 369 uart_data[obj->index].count++;
<> 144:ef7eb2e8f9f7 370 }
<> 144:ef7eb2e8f9f7 371
<> 144:ef7eb2e8f9f7 372 int serial_readable(serial_t *obj) {
<> 144:ef7eb2e8f9f7 373 return obj->uart->LSR & 0x01;
<> 144:ef7eb2e8f9f7 374 }
<> 144:ef7eb2e8f9f7 375
<> 144:ef7eb2e8f9f7 376 int serial_writable(serial_t *obj) {
<> 144:ef7eb2e8f9f7 377 int isWritable = 1;
<> 144:ef7eb2e8f9f7 378 if (NC != uart_data[obj->index].sw_cts.pin)
<> 144:ef7eb2e8f9f7 379 isWritable = (gpio_read(&uart_data[obj->index].sw_cts) == 0) && (obj->uart->LSR & 0x40); //If flow control: writable if CTS low + UART done
<> 144:ef7eb2e8f9f7 380 else {
<> 144:ef7eb2e8f9f7 381 if (obj->uart->LSR & 0x20)
<> 144:ef7eb2e8f9f7 382 uart_data[obj->index].count = 0;
<> 144:ef7eb2e8f9f7 383 else if (uart_data[obj->index].count >= 16)
<> 144:ef7eb2e8f9f7 384 isWritable = 0;
<> 144:ef7eb2e8f9f7 385 }
<> 144:ef7eb2e8f9f7 386 return isWritable;
<> 144:ef7eb2e8f9f7 387 }
<> 144:ef7eb2e8f9f7 388
<> 144:ef7eb2e8f9f7 389 void serial_clear(serial_t *obj) {
<> 144:ef7eb2e8f9f7 390 obj->uart->FCR = 1 << 0 // FIFO Enable - 0 = Disables, 1 = Enabled
<> 144:ef7eb2e8f9f7 391 | 1 << 1 // rx FIFO reset
<> 144:ef7eb2e8f9f7 392 | 1 << 2 // tx FIFO reset
<> 144:ef7eb2e8f9f7 393 | 0 << 6; // interrupt depth
<> 144:ef7eb2e8f9f7 394 }
<> 144:ef7eb2e8f9f7 395
<> 144:ef7eb2e8f9f7 396 void serial_pinout_tx(PinName tx) {
<> 144:ef7eb2e8f9f7 397 pinmap_pinout(tx, PinMap_UART_TX);
<> 144:ef7eb2e8f9f7 398 }
<> 144:ef7eb2e8f9f7 399
<> 144:ef7eb2e8f9f7 400 void serial_break_set(serial_t *obj) {
<> 144:ef7eb2e8f9f7 401 obj->uart->LCR |= (1 << 6);
<> 144:ef7eb2e8f9f7 402 }
<> 144:ef7eb2e8f9f7 403
<> 144:ef7eb2e8f9f7 404 void serial_break_clear(serial_t *obj) {
<> 144:ef7eb2e8f9f7 405 obj->uart->LCR &= ~(1 << 6);
<> 144:ef7eb2e8f9f7 406 }
<> 144:ef7eb2e8f9f7 407
<> 144:ef7eb2e8f9f7 408 void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow) {
<> 144:ef7eb2e8f9f7 409 #if (DEVICE_SERIAL_FC)
<> 144:ef7eb2e8f9f7 410 #endif
<> 144:ef7eb2e8f9f7 411 }