mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

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targets/TARGET_NUVOTON/TARGET_NUC472/lp_ticker.c@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
188:bcfe06ba3d64 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 149:156823d33999 1 /* mbed Microcontroller Library
<> 149:156823d33999 2 * Copyright (c) 2015-2016 Nuvoton
<> 149:156823d33999 3 *
<> 149:156823d33999 4 * Licensed under the Apache License, Version 2.0 (the "License");
<> 149:156823d33999 5 * you may not use this file except in compliance with the License.
<> 149:156823d33999 6 * You may obtain a copy of the License at
<> 149:156823d33999 7 *
<> 149:156823d33999 8 * http://www.apache.org/licenses/LICENSE-2.0
<> 149:156823d33999 9 *
<> 149:156823d33999 10 * Unless required by applicable law or agreed to in writing, software
<> 149:156823d33999 11 * distributed under the License is distributed on an "AS IS" BASIS,
<> 149:156823d33999 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
<> 149:156823d33999 13 * See the License for the specific language governing permissions and
<> 149:156823d33999 14 * limitations under the License.
<> 149:156823d33999 15 */
AnnaBridge 182:a56a73fd2a6f 16
<> 149:156823d33999 17 #include "lp_ticker_api.h"
<> 149:156823d33999 18
Anna Bridge 186:707f6e361f3e 19 #if DEVICE_LPTICKER
<> 149:156823d33999 20
<> 149:156823d33999 21 #include "sleep_api.h"
AnnaBridge 182:a56a73fd2a6f 22 #include "mbed_assert.h"
<> 149:156823d33999 23 #include "nu_modutil.h"
AnnaBridge 188:bcfe06ba3d64 24 #include "nu_timer.h"
<> 149:156823d33999 25 #include "nu_miscutil.h"
<> 149:156823d33999 26
AnnaBridge 182:a56a73fd2a6f 27 /* Micro seconds per second */
AnnaBridge 182:a56a73fd2a6f 28 #define NU_US_PER_SEC 1000000
AnnaBridge 182:a56a73fd2a6f 29 /* Timer clock per lp_ticker tick */
AnnaBridge 182:a56a73fd2a6f 30 #define NU_TMRCLK_PER_TICK 1
AnnaBridge 182:a56a73fd2a6f 31 /* Timer clock per second */
AnnaBridge 182:a56a73fd2a6f 32 #define NU_TMRCLK_PER_SEC (__LXT)
AnnaBridge 182:a56a73fd2a6f 33 /* Timer max counter bit size */
AnnaBridge 182:a56a73fd2a6f 34 #define NU_TMR_MAXCNT_BITSIZE 24
AnnaBridge 182:a56a73fd2a6f 35 /* Timer max counter */
AnnaBridge 182:a56a73fd2a6f 36 #define NU_TMR_MAXCNT ((1 << NU_TMR_MAXCNT_BITSIZE) - 1)
<> 149:156823d33999 37
AnnaBridge 182:a56a73fd2a6f 38 static void tmr1_vec(void);
<> 149:156823d33999 39
AnnaBridge 182:a56a73fd2a6f 40 /* NOTE: To wake the system from power down mode, timer clock source must be ether LXT or LIRC. */
AnnaBridge 182:a56a73fd2a6f 41 static const struct nu_modinit_s timer1_modinit = {TIMER_1, TMR1_MODULE, CLK_CLKSEL1_TMR1SEL_LXT, 0, TMR1_RST, TMR1_IRQn, (void *) tmr1_vec};
AnnaBridge 182:a56a73fd2a6f 42
AnnaBridge 182:a56a73fd2a6f 43 #define TIMER_MODINIT timer1_modinit
AnnaBridge 182:a56a73fd2a6f 44
AnnaBridge 187:0387e8f68319 45 /* Timer interrupt enable/disable
AnnaBridge 187:0387e8f68319 46 *
AnnaBridge 187:0387e8f68319 47 * Because Timer interrupt enable/disable (TIMER_EnableInt/TIMER_DisableInt) needs wait for lp_ticker,
AnnaBridge 187:0387e8f68319 48 * we call NVIC_DisableIRQ/NVIC_EnableIRQ instead.
AnnaBridge 187:0387e8f68319 49 */
AnnaBridge 187:0387e8f68319 50
AnnaBridge 187:0387e8f68319 51 /* Track ticker status */
AnnaBridge 187:0387e8f68319 52 static volatile uint16_t ticker_inited = 0;
<> 149:156823d33999 53
<> 149:156823d33999 54 #define TMR_CMP_MIN 2
<> 149:156823d33999 55 #define TMR_CMP_MAX 0xFFFFFFu
<> 149:156823d33999 56
AnnaBridge 187:0387e8f68319 57 /* Synchronization issue with LXT/LIRC-clocked Timer
AnnaBridge 187:0387e8f68319 58 *
AnnaBridge 187:0387e8f68319 59 * PCLK : typical HCLK/2
AnnaBridge 187:0387e8f68319 60 * ECLK (engine clock) : LXT/LIRC for Timer used to implement lp_ticker
AnnaBridge 187:0387e8f68319 61 *
AnnaBridge 187:0387e8f68319 62 * When system clock is higher than Timer clock (LXT/LIRC), we need to add delay for ECLK
AnnaBridge 187:0387e8f68319 63 * domain to take effect:
AnnaBridge 187:0387e8f68319 64 * 1. Write : typical 1PCLK + 2ECLK
AnnaBridge 187:0387e8f68319 65 * Read-check doesn't work because it just checks PCLK domain and doesn't check into
AnnaBridge 187:0387e8f68319 66 * ECLK domain.
AnnaBridge 187:0387e8f68319 67 * 2. Clear interrupt flag : typical 2PCLK
AnnaBridge 187:0387e8f68319 68 * It is very rare that we would meet dummy interrupt and get stuck in ISR until
AnnaBridge 187:0387e8f68319 69 * 'clear interrupt flag' takes effect. The issue is ignorable because the pending
AnnaBridge 187:0387e8f68319 70 * time is very short (at most 1 dummy interrupt). We won't take special handling for it.
AnnaBridge 187:0387e8f68319 71 */
AnnaBridge 184:08ed48f1de7f 72
<> 149:156823d33999 73 void lp_ticker_init(void)
<> 149:156823d33999 74 {
AnnaBridge 182:a56a73fd2a6f 75 if (ticker_inited) {
AnnaBridge 187:0387e8f68319 76 /* By HAL spec, ticker_init allows the ticker to keep counting and disables the
AnnaBridge 187:0387e8f68319 77 * ticker interrupt. */
AnnaBridge 187:0387e8f68319 78 lp_ticker_disable_interrupt();
<> 149:156823d33999 79 return;
<> 149:156823d33999 80 }
AnnaBridge 182:a56a73fd2a6f 81 ticker_inited = 1;
<> 149:156823d33999 82
<> 149:156823d33999 83 // Reset module
AnnaBridge 182:a56a73fd2a6f 84 SYS_ResetModule(TIMER_MODINIT.rsetidx);
AnnaBridge 182:a56a73fd2a6f 85
<> 149:156823d33999 86 // Select IP clock source
AnnaBridge 182:a56a73fd2a6f 87 CLK_SetModuleClock(TIMER_MODINIT.clkidx, TIMER_MODINIT.clksrc, TIMER_MODINIT.clkdiv);
AnnaBridge 182:a56a73fd2a6f 88
<> 149:156823d33999 89 // Enable IP clock
AnnaBridge 182:a56a73fd2a6f 90 CLK_EnableModuleClock(TIMER_MODINIT.clkidx);
<> 149:156823d33999 91
AnnaBridge 184:08ed48f1de7f 92 TIMER_T *timer_base = (TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname);
AnnaBridge 184:08ed48f1de7f 93
<> 149:156823d33999 94 // Configure clock
AnnaBridge 184:08ed48f1de7f 95 uint32_t clk_timer = TIMER_GetModuleClock(timer_base);
AnnaBridge 182:a56a73fd2a6f 96 uint32_t prescale_timer = clk_timer / NU_TMRCLK_PER_SEC - 1;
AnnaBridge 182:a56a73fd2a6f 97 MBED_ASSERT((prescale_timer != (uint32_t) -1) && prescale_timer <= 127);
AnnaBridge 182:a56a73fd2a6f 98 MBED_ASSERT((clk_timer % NU_TMRCLK_PER_SEC) == 0);
AnnaBridge 182:a56a73fd2a6f 99 uint32_t cmp_timer = TMR_CMP_MAX;
AnnaBridge 182:a56a73fd2a6f 100 MBED_ASSERT(cmp_timer >= TMR_CMP_MIN && cmp_timer <= TMR_CMP_MAX);
<> 149:156823d33999 101 // Continuous mode
AnnaBridge 184:08ed48f1de7f 102 timer_base->CTL = TIMER_CONTINUOUS_MODE | prescale_timer | TIMER_CTL_CNTDATEN_Msk;
AnnaBridge 188:bcfe06ba3d64 103 nu_busy_wait_us((NU_US_PER_SEC / NU_TMRCLK_PER_SEC) * 3);
AnnaBridge 184:08ed48f1de7f 104
AnnaBridge 184:08ed48f1de7f 105 timer_base->CMP = cmp_timer;
AnnaBridge 188:bcfe06ba3d64 106 nu_busy_wait_us((NU_US_PER_SEC / NU_TMRCLK_PER_SEC) * 3);
AnnaBridge 182:a56a73fd2a6f 107
<> 149:156823d33999 108 // Set vector
AnnaBridge 182:a56a73fd2a6f 109 NVIC_SetVector(TIMER_MODINIT.irq_n, (uint32_t) TIMER_MODINIT.var);
AnnaBridge 182:a56a73fd2a6f 110
AnnaBridge 187:0387e8f68319 111 NVIC_DisableIRQ(TIMER_MODINIT.irq_n);
AnnaBridge 182:a56a73fd2a6f 112
AnnaBridge 184:08ed48f1de7f 113 TIMER_EnableInt(timer_base);
AnnaBridge 188:bcfe06ba3d64 114 nu_busy_wait_us((NU_US_PER_SEC / NU_TMRCLK_PER_SEC) * 3);
AnnaBridge 184:08ed48f1de7f 115
AnnaBridge 184:08ed48f1de7f 116 TIMER_EnableWakeup(timer_base);
AnnaBridge 188:bcfe06ba3d64 117 nu_busy_wait_us((NU_US_PER_SEC / NU_TMRCLK_PER_SEC) * 3);
AnnaBridge 184:08ed48f1de7f 118
AnnaBridge 184:08ed48f1de7f 119 TIMER_Start(timer_base);
AnnaBridge 188:bcfe06ba3d64 120 nu_busy_wait_us((NU_US_PER_SEC / NU_TMRCLK_PER_SEC) * 3);
AnnaBridge 184:08ed48f1de7f 121
AnnaBridge 184:08ed48f1de7f 122 /* Wait for timer to start counting and raise active flag */
AnnaBridge 184:08ed48f1de7f 123 while(! (timer_base->CTL & TIMER_CTL_ACTSTS_Msk));
<> 149:156823d33999 124 }
<> 149:156823d33999 125
AnnaBridge 187:0387e8f68319 126 void lp_ticker_free(void)
AnnaBridge 187:0387e8f68319 127 {
AnnaBridge 187:0387e8f68319 128 /* Disable interrupt */
AnnaBridge 187:0387e8f68319 129 NVIC_DisableIRQ(TIMER_MODINIT.irq_n);
AnnaBridge 187:0387e8f68319 130
AnnaBridge 187:0387e8f68319 131 /* Disable IP clock */
AnnaBridge 187:0387e8f68319 132 CLK_DisableModuleClock(TIMER_MODINIT.clkidx);
AnnaBridge 187:0387e8f68319 133
AnnaBridge 187:0387e8f68319 134 ticker_inited = 0;
AnnaBridge 187:0387e8f68319 135 }
AnnaBridge 187:0387e8f68319 136
<> 149:156823d33999 137 timestamp_t lp_ticker_read()
AnnaBridge 182:a56a73fd2a6f 138 {
AnnaBridge 182:a56a73fd2a6f 139 if (! ticker_inited) {
<> 149:156823d33999 140 lp_ticker_init();
<> 149:156823d33999 141 }
<> 149:156823d33999 142
AnnaBridge 184:08ed48f1de7f 143 TIMER_T *timer_base = (TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname);
AnnaBridge 182:a56a73fd2a6f 144
AnnaBridge 182:a56a73fd2a6f 145 return (TIMER_GetCounter(timer_base) / NU_TMRCLK_PER_TICK);
<> 149:156823d33999 146 }
<> 149:156823d33999 147
<> 149:156823d33999 148 void lp_ticker_set_interrupt(timestamp_t timestamp)
<> 149:156823d33999 149 {
AnnaBridge 188:bcfe06ba3d64 150 /* Clear any previously pending interrupts */
AnnaBridge 188:bcfe06ba3d64 151 lp_ticker_clear_interrupt();
AnnaBridge 188:bcfe06ba3d64 152 NVIC_ClearPendingIRQ(TIMER_MODINIT.irq_n);
AnnaBridge 188:bcfe06ba3d64 153
AnnaBridge 182:a56a73fd2a6f 154 /* In continuous mode, counter will be reset to zero with the following sequence:
AnnaBridge 182:a56a73fd2a6f 155 * 1. Stop counting
AnnaBridge 182:a56a73fd2a6f 156 * 2. Configure new CMP value
AnnaBridge 182:a56a73fd2a6f 157 * 3. Restart counting
AnnaBridge 182:a56a73fd2a6f 158 *
AnnaBridge 182:a56a73fd2a6f 159 * This behavior is not what we want. To fix it, we could configure new CMP value
AnnaBridge 182:a56a73fd2a6f 160 * without stopping counting first.
AnnaBridge 182:a56a73fd2a6f 161 */
AnnaBridge 184:08ed48f1de7f 162 TIMER_T *timer_base = (TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname);
AnnaBridge 174:b96e65c34a4d 163
AnnaBridge 182:a56a73fd2a6f 164 /* NOTE: Because H/W timer requests min compare value, our implementation would have alarm delay of
AnnaBridge 182:a56a73fd2a6f 165 * (TMR_CMP_MIN - interval_clk) clocks when interval_clk is between [1, TMR_CMP_MIN). */
AnnaBridge 182:a56a73fd2a6f 166 uint32_t cmp_timer = timestamp * NU_TMRCLK_PER_TICK;
AnnaBridge 182:a56a73fd2a6f 167 cmp_timer = NU_CLAMP(cmp_timer, TMR_CMP_MIN, TMR_CMP_MAX);
AnnaBridge 184:08ed48f1de7f 168
AnnaBridge 187:0387e8f68319 169 /* NOTE: Rely on LPTICKER_DELAY_TICKS to be non-blocking. */
AnnaBridge 182:a56a73fd2a6f 170 timer_base->CMP = cmp_timer;
AnnaBridge 187:0387e8f68319 171
AnnaBridge 187:0387e8f68319 172 /* We can call ticker_irq_handler now. */
AnnaBridge 187:0387e8f68319 173 NVIC_EnableIRQ(TIMER_MODINIT.irq_n);
<> 149:156823d33999 174 }
<> 149:156823d33999 175
<> 149:156823d33999 176 void lp_ticker_disable_interrupt(void)
<> 149:156823d33999 177 {
AnnaBridge 187:0387e8f68319 178 /* We cannot call ticker_irq_handler now. */
AnnaBridge 187:0387e8f68319 179 NVIC_DisableIRQ(TIMER_MODINIT.irq_n);
<> 149:156823d33999 180 }
<> 149:156823d33999 181
<> 149:156823d33999 182 void lp_ticker_clear_interrupt(void)
<> 149:156823d33999 183 {
AnnaBridge 187:0387e8f68319 184 /* To avoid sync issue, we clear TIF/TWKF simultaneously rather than call separate
AnnaBridge 187:0387e8f68319 185 * driver API:
AnnaBridge 187:0387e8f68319 186 *
AnnaBridge 187:0387e8f68319 187 * TIMER_ClearIntFlag((TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname));
AnnaBridge 187:0387e8f68319 188 * TIMER_ClearWakeupFlag((TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname));
AnnaBridge 187:0387e8f68319 189 */
AnnaBridge 187:0387e8f68319 190 TIMER_T *timer_base = (TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname);
AnnaBridge 187:0387e8f68319 191 timer_base->INTSTS = TIMER_INTSTS_TIF_Msk | TIMER_INTSTS_TWKF_Msk;
<> 149:156823d33999 192 }
<> 149:156823d33999 193
AnnaBridge 182:a56a73fd2a6f 194 void lp_ticker_fire_interrupt(void)
<> 149:156823d33999 195 {
AnnaBridge 182:a56a73fd2a6f 196 // NOTE: This event was in the past. Set the interrupt as pending, but don't process it here.
AnnaBridge 182:a56a73fd2a6f 197 // This prevents a recursive loop under heavy load which can lead to a stack overflow.
AnnaBridge 182:a56a73fd2a6f 198 NVIC_SetPendingIRQ(TIMER_MODINIT.irq_n);
AnnaBridge 187:0387e8f68319 199
AnnaBridge 187:0387e8f68319 200 /* We can call ticker_irq_handler now. */
AnnaBridge 187:0387e8f68319 201 NVIC_EnableIRQ(TIMER_MODINIT.irq_n);
<> 149:156823d33999 202 }
<> 149:156823d33999 203
AnnaBridge 182:a56a73fd2a6f 204 const ticker_info_t* lp_ticker_get_info()
<> 149:156823d33999 205 {
AnnaBridge 182:a56a73fd2a6f 206 static const ticker_info_t info = {
AnnaBridge 182:a56a73fd2a6f 207 NU_TMRCLK_PER_SEC / NU_TMRCLK_PER_TICK,
AnnaBridge 182:a56a73fd2a6f 208 NU_TMR_MAXCNT_BITSIZE
AnnaBridge 182:a56a73fd2a6f 209 };
AnnaBridge 182:a56a73fd2a6f 210 return &info;
AnnaBridge 182:a56a73fd2a6f 211 }
AnnaBridge 182:a56a73fd2a6f 212
AnnaBridge 182:a56a73fd2a6f 213 static void tmr1_vec(void)
AnnaBridge 182:a56a73fd2a6f 214 {
AnnaBridge 187:0387e8f68319 215 lp_ticker_clear_interrupt();
AnnaBridge 184:08ed48f1de7f 216
AnnaBridge 182:a56a73fd2a6f 217 // NOTE: lp_ticker_set_interrupt() may get called in lp_ticker_irq_handler();
AnnaBridge 182:a56a73fd2a6f 218 lp_ticker_irq_handler();
<> 149:156823d33999 219 }
AnnaBridge 182:a56a73fd2a6f 220
<> 149:156823d33999 221 #endif