mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_NUVOTON/TARGET_NANO100/mbed_overrides.c@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
187:0387e8f68319 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 187:0387e8f68319 1 /* mbed Microcontroller Library
AnnaBridge 187:0387e8f68319 2 * Copyright (c) 2015-2017 Nuvoton
AnnaBridge 187:0387e8f68319 3 *
AnnaBridge 187:0387e8f68319 4 * Licensed under the Apache License, Version 2.0 (the "License");
AnnaBridge 187:0387e8f68319 5 * you may not use this file except in compliance with the License.
AnnaBridge 187:0387e8f68319 6 * You may obtain a copy of the License at
AnnaBridge 187:0387e8f68319 7 *
AnnaBridge 187:0387e8f68319 8 * http://www.apache.org/licenses/LICENSE-2.0
AnnaBridge 187:0387e8f68319 9 *
AnnaBridge 187:0387e8f68319 10 * Unless required by applicable law or agreed to in writing, software
AnnaBridge 187:0387e8f68319 11 * distributed under the License is distributed on an "AS IS" BASIS,
AnnaBridge 187:0387e8f68319 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge 187:0387e8f68319 13 * See the License for the specific language governing permissions and
AnnaBridge 187:0387e8f68319 14 * limitations under the License.
AnnaBridge 187:0387e8f68319 15 */
AnnaBridge 187:0387e8f68319 16
AnnaBridge 187:0387e8f68319 17 #include "cmsis.h"
AnnaBridge 187:0387e8f68319 18
AnnaBridge 187:0387e8f68319 19 void mbed_sdk_init(void)
AnnaBridge 187:0387e8f68319 20 {
AnnaBridge 187:0387e8f68319 21 // NOTE: Support singleton semantics to be called from other init functions
AnnaBridge 187:0387e8f68319 22 static int inited = 0;
AnnaBridge 187:0387e8f68319 23 if (inited) {
AnnaBridge 187:0387e8f68319 24 return;
AnnaBridge 187:0387e8f68319 25 }
AnnaBridge 187:0387e8f68319 26 inited = 1;
AnnaBridge 187:0387e8f68319 27
AnnaBridge 187:0387e8f68319 28 /*---------------------------------------------------------------------------------------------------------*/
AnnaBridge 187:0387e8f68319 29 /* Init System Clock */
AnnaBridge 187:0387e8f68319 30 /*---------------------------------------------------------------------------------------------------------*/
AnnaBridge 187:0387e8f68319 31 /* Unlock protected registers */
AnnaBridge 187:0387e8f68319 32 SYS_UnlockReg();
AnnaBridge 187:0387e8f68319 33
AnnaBridge 187:0387e8f68319 34 /* Enable HIRC clock (internal OSC 12MHz) */
AnnaBridge 187:0387e8f68319 35 CLK_EnableXtalRC(CLK_PWRCTL_HIRC_EN_Msk);
AnnaBridge 187:0387e8f68319 36 /* Enable HXT clock (external XTAL 12MHz) */
AnnaBridge 187:0387e8f68319 37 CLK_EnableXtalRC(CLK_PWRCTL_HXT_EN_Msk);
AnnaBridge 187:0387e8f68319 38 /* Enable LIRC clock (OSC 10KHz) for lp_ticker */
AnnaBridge 187:0387e8f68319 39 CLK_EnableXtalRC(CLK_PWRCTL_LIRC_EN_Msk);
AnnaBridge 187:0387e8f68319 40 /* Enable LXT clock (XTAL 32KHz) for RTC */
AnnaBridge 187:0387e8f68319 41 CLK_EnableXtalRC(CLK_PWRCTL_LXT_EN_Msk);
AnnaBridge 187:0387e8f68319 42
AnnaBridge 187:0387e8f68319 43 /* Wait for HIRC clock ready */
AnnaBridge 187:0387e8f68319 44 CLK_WaitClockReady(CLK_CLKSTATUS_HIRC_STB_Msk);
AnnaBridge 187:0387e8f68319 45 /* Wait for HXT clock ready */
AnnaBridge 187:0387e8f68319 46 CLK_WaitClockReady(CLK_CLKSTATUS_HXT_STB_Msk);
AnnaBridge 187:0387e8f68319 47 /* Wait for LIRC clock ready */
AnnaBridge 187:0387e8f68319 48 CLK_WaitClockReady(CLK_CLKSTATUS_LIRC_STB_Msk);
AnnaBridge 187:0387e8f68319 49 /* Wait for LXT clock ready */
AnnaBridge 187:0387e8f68319 50 CLK_WaitClockReady(CLK_CLKSTATUS_LXT_STB_Msk);
AnnaBridge 187:0387e8f68319 51
AnnaBridge 187:0387e8f68319 52 /* Set HCLK source form HXT and HCLK source divide 1 */
AnnaBridge 187:0387e8f68319 53 CLK_SetHCLK(CLK_CLKSEL0_HCLK_S_HXT, CLK_HCLK_CLK_DIVIDER(1));
AnnaBridge 187:0387e8f68319 54
AnnaBridge 187:0387e8f68319 55 /* Select HXT/HIRC to clock PLL
AnnaBridge 187:0387e8f68319 56 *
AnnaBridge 187:0387e8f68319 57 * Comparison between HXT/HIRC-clocked PLL:
AnnaBridge 187:0387e8f68319 58 * 1. Spare HXT on board if only HIRC is used.
AnnaBridge 187:0387e8f68319 59 * 2. HIRC has shorter stable time.
AnnaBridge 187:0387e8f68319 60 * 3. HXT has better accuracy. USBD requires HXT-clocked PLL.
AnnaBridge 187:0387e8f68319 61 * 4. HIRC has shorter wake-up time from power-down mode.
AnnaBridge 187:0387e8f68319 62 * Per test, wake-up time from power-down mode would take:
AnnaBridge 187:0387e8f68319 63 * T1. 1~13 ms (proportional to deep sleep time) with HXT-clocked PLL as HCLK clock source
AnnaBridge 187:0387e8f68319 64 * T2. <1 ms with HIRC-clocked PLL as HCLK clock source
AnnaBridge 187:0387e8f68319 65 * T1 will fail Greentea test which requires max 10 ms wake-up time.
AnnaBridge 187:0387e8f68319 66 *
AnnaBridge 187:0387e8f68319 67 * If we just call CLK_SetCoreClock(FREQ_42MHZ) to configure HCLK to 42 MHz,
AnnaBridge 187:0387e8f68319 68 * it will go T1 with HXT already enabled in front. So we manually configure
AnnaBridge 187:0387e8f68319 69 * it to choose HXT/HIRC-clocked PLL.
AnnaBridge 187:0387e8f68319 70 */
AnnaBridge 187:0387e8f68319 71 #define NU_HXT_PLL 1
AnnaBridge 187:0387e8f68319 72 #define NU_HIRC_PLL 2
AnnaBridge 187:0387e8f68319 73
AnnaBridge 187:0387e8f68319 74 #ifndef NU_CLOCK_PLL
AnnaBridge 187:0387e8f68319 75 #define NU_CLOCK_PLL NU_HIRC_PLL
AnnaBridge 187:0387e8f68319 76 #endif
AnnaBridge 187:0387e8f68319 77
AnnaBridge 187:0387e8f68319 78 #if (NU_CLOCK_PLL == NU_HXT_PLL)
AnnaBridge 187:0387e8f68319 79 CLK_EnablePLL(CLK_PLLCTL_PLL_SRC_HXT, FREQ_42MHZ*2);
AnnaBridge 187:0387e8f68319 80 CLK_SetHCLK(CLK_CLKSEL0_HCLK_S_PLL, CLK_HCLK_CLK_DIVIDER(2));
AnnaBridge 187:0387e8f68319 81 #elif (NU_CLOCK_PLL == NU_HIRC_PLL)
AnnaBridge 187:0387e8f68319 82 CLK_EnablePLL(CLK_PLLCTL_PLL_SRC_HIRC, FREQ_42MHZ*2);
AnnaBridge 187:0387e8f68319 83 CLK_SetHCLK(CLK_CLKSEL0_HCLK_S_PLL, CLK_HCLK_CLK_DIVIDER(2));
AnnaBridge 187:0387e8f68319 84 #endif
AnnaBridge 187:0387e8f68319 85
AnnaBridge 187:0387e8f68319 86 /* Update System Core Clock */
AnnaBridge 187:0387e8f68319 87 /* User can use SystemCoreClockUpdate() to calculate SystemCoreClock. */
AnnaBridge 187:0387e8f68319 88 SystemCoreClockUpdate();
AnnaBridge 187:0387e8f68319 89
AnnaBridge 187:0387e8f68319 90 /* Lock protected registers */
AnnaBridge 187:0387e8f68319 91 SYS_LockReg();
AnnaBridge 187:0387e8f68319 92 }