mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
targets/TARGET_NUVOTON/TARGET_M451/mbed_overrides.c@189:f392fc9709a3, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 22:31:08 2019 +0000
- Revision:
- 189:f392fc9709a3
- Parent:
- 187:0387e8f68319
mbed library release version 165
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 149:156823d33999 | 1 | /* mbed Microcontroller Library |
<> | 149:156823d33999 | 2 | * Copyright (c) 2015-2016 Nuvoton |
<> | 149:156823d33999 | 3 | * |
<> | 149:156823d33999 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
<> | 149:156823d33999 | 5 | * you may not use this file except in compliance with the License. |
<> | 149:156823d33999 | 6 | * You may obtain a copy of the License at |
<> | 149:156823d33999 | 7 | * |
<> | 149:156823d33999 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
<> | 149:156823d33999 | 9 | * |
<> | 149:156823d33999 | 10 | * Unless required by applicable law or agreed to in writing, software |
<> | 149:156823d33999 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
<> | 149:156823d33999 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
<> | 149:156823d33999 | 13 | * See the License for the specific language governing permissions and |
<> | 149:156823d33999 | 14 | * limitations under the License. |
<> | 149:156823d33999 | 15 | */ |
<> | 149:156823d33999 | 16 | |
<> | 149:156823d33999 | 17 | #include "analogin_api.h" |
<> | 149:156823d33999 | 18 | |
<> | 149:156823d33999 | 19 | void mbed_sdk_init(void) |
<> | 149:156823d33999 | 20 | { |
<> | 149:156823d33999 | 21 | // NOTE: Support singleton semantics to be called from other init functions |
<> | 149:156823d33999 | 22 | static int inited = 0; |
<> | 149:156823d33999 | 23 | if (inited) { |
<> | 149:156823d33999 | 24 | return; |
<> | 149:156823d33999 | 25 | } |
<> | 149:156823d33999 | 26 | inited = 1; |
<> | 149:156823d33999 | 27 | |
<> | 149:156823d33999 | 28 | /*---------------------------------------------------------------------------------------------------------*/ |
<> | 149:156823d33999 | 29 | /* Init System Clock */ |
<> | 149:156823d33999 | 30 | /*---------------------------------------------------------------------------------------------------------*/ |
<> | 149:156823d33999 | 31 | /* Unlock protected registers */ |
<> | 149:156823d33999 | 32 | SYS_UnlockReg(); |
<> | 149:156823d33999 | 33 | |
<> | 149:156823d33999 | 34 | /* Enable HIRC clock (Internal RC 22.1184MHz) */ |
<> | 149:156823d33999 | 35 | CLK_EnableXtalRC(CLK_PWRCTL_HIRCEN_Msk); |
<> | 149:156823d33999 | 36 | /* Enable HXT clock (external XTAL 12MHz) */ |
<> | 149:156823d33999 | 37 | CLK_EnableXtalRC(CLK_PWRCTL_HXTEN_Msk); |
<> | 149:156823d33999 | 38 | /* Enable LIRC for lp_ticker */ |
<> | 149:156823d33999 | 39 | CLK_EnableXtalRC(CLK_PWRCTL_LIRCEN_Msk); |
<> | 149:156823d33999 | 40 | /* Enable LXT for RTC */ |
<> | 149:156823d33999 | 41 | CLK_EnableXtalRC(CLK_PWRCTL_LXTEN_Msk); |
<> | 149:156823d33999 | 42 | |
<> | 149:156823d33999 | 43 | /* Wait for HIRC clock ready */ |
<> | 149:156823d33999 | 44 | CLK_WaitClockReady(CLK_STATUS_HIRCSTB_Msk); |
<> | 149:156823d33999 | 45 | /* Wait for HXT clock ready */ |
<> | 149:156823d33999 | 46 | CLK_WaitClockReady(CLK_STATUS_HXTSTB_Msk); |
<> | 149:156823d33999 | 47 | /* Wait for LIRC clock ready */ |
<> | 149:156823d33999 | 48 | CLK_WaitClockReady(CLK_STATUS_LIRCSTB_Msk); |
<> | 149:156823d33999 | 49 | /* Wait for LXT clock ready */ |
<> | 149:156823d33999 | 50 | CLK_WaitClockReady(CLK_STATUS_LXTSTB_Msk); |
<> | 149:156823d33999 | 51 | |
<> | 149:156823d33999 | 52 | /* Select HCLK clock source as HIRC and HCLK clock divider as 1 */ |
<> | 149:156823d33999 | 53 | CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_HIRC, CLK_CLKDIV0_HCLK(1)); |
<> | 149:156823d33999 | 54 | |
<> | 149:156823d33999 | 55 | /* Set core clock as 72000000 from PLL */ |
<> | 149:156823d33999 | 56 | CLK_SetCoreClock(72000000); |
<> | 149:156823d33999 | 57 | |
<> | 149:156823d33999 | 58 | #if DEVICE_ANALOGIN |
<> | 153:fa9ff456f731 | 59 | /* Vref connect to internal */ |
<> | 153:fa9ff456f731 | 60 | SYS->VREFCTL = (SYS->VREFCTL & ~SYS_VREFCTL_VREFCTL_Msk) | SYS_VREFCTL_VREF_3_072V; |
<> | 149:156823d33999 | 61 | #endif |
<> | 149:156823d33999 | 62 | |
<> | 149:156823d33999 | 63 | /* Update System Core Clock */ |
<> | 149:156823d33999 | 64 | /* User can use SystemCoreClockUpdate() to calculate SystemCoreClock. */ |
<> | 149:156823d33999 | 65 | SystemCoreClockUpdate(); |
<> | 149:156823d33999 | 66 | |
<> | 149:156823d33999 | 67 | /* Lock protected registers */ |
<> | 149:156823d33999 | 68 | SYS_LockReg(); |
<> | 149:156823d33999 | 69 | } |