mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

drivers/SPI.cpp@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
188:bcfe06ba3d64 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 149:156823d33999 1 /* mbed Microcontroller Library
<> 149:156823d33999 2 * Copyright (c) 2006-2013 ARM Limited
AnnaBridge 189:f392fc9709a3 3 * SPDX-License-Identifier: Apache-2.0
<> 149:156823d33999 4 *
<> 149:156823d33999 5 * Licensed under the Apache License, Version 2.0 (the "License");
<> 149:156823d33999 6 * you may not use this file except in compliance with the License.
<> 149:156823d33999 7 * You may obtain a copy of the License at
<> 149:156823d33999 8 *
<> 149:156823d33999 9 * http://www.apache.org/licenses/LICENSE-2.0
<> 149:156823d33999 10 *
<> 149:156823d33999 11 * Unless required by applicable law or agreed to in writing, software
<> 149:156823d33999 12 * distributed under the License is distributed on an "AS IS" BASIS,
<> 149:156823d33999 13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
<> 149:156823d33999 14 * See the License for the specific language governing permissions and
<> 149:156823d33999 15 * limitations under the License.
<> 149:156823d33999 16 */
<> 149:156823d33999 17 #include "drivers/SPI.h"
<> 160:d5399cc887bb 18 #include "platform/mbed_critical.h"
<> 149:156823d33999 19
AnnaBridge 174:b96e65c34a4d 20 #if DEVICE_SPI_ASYNCH
AnnaBridge 184:08ed48f1de7f 21 #include "platform/mbed_power_mgmt.h"
AnnaBridge 174:b96e65c34a4d 22 #endif
AnnaBridge 174:b96e65c34a4d 23
<> 149:156823d33999 24 #if DEVICE_SPI
<> 149:156823d33999 25
<> 149:156823d33999 26 namespace mbed {
<> 149:156823d33999 27
<> 149:156823d33999 28 #if DEVICE_SPI_ASYNCH && TRANSACTION_QUEUE_SIZE_SPI
<> 149:156823d33999 29 CircularBuffer<Transaction<SPI>, TRANSACTION_QUEUE_SIZE_SPI> SPI::_transaction_buffer;
<> 149:156823d33999 30 #endif
<> 149:156823d33999 31
<> 149:156823d33999 32 SPI::SPI(PinName mosi, PinName miso, PinName sclk, PinName ssel) :
AnnaBridge 187:0387e8f68319 33 _spi(),
<> 149:156823d33999 34 #if DEVICE_SPI_ASYNCH
AnnaBridge 187:0387e8f68319 35 _irq(this),
AnnaBridge 187:0387e8f68319 36 _usage(DMA_USAGE_NEVER),
AnnaBridge 187:0387e8f68319 37 _deep_sleep_locked(false),
<> 149:156823d33999 38 #endif
AnnaBridge 187:0387e8f68319 39 _bits(8),
AnnaBridge 187:0387e8f68319 40 _mode(0),
AnnaBridge 187:0387e8f68319 41 _hz(1000000),
AnnaBridge 187:0387e8f68319 42 _write_fill(SPI_FILL_CHAR)
AnnaBridge 187:0387e8f68319 43 {
<> 149:156823d33999 44 // No lock needed in the constructor
AnnaBridge 188:bcfe06ba3d64 45 spi_init(&_spi, mosi, miso, sclk, ssel);
AnnaBridge 188:bcfe06ba3d64 46 }
<> 149:156823d33999 47
AnnaBridge 188:bcfe06ba3d64 48 SPI::~SPI()
AnnaBridge 188:bcfe06ba3d64 49 {
AnnaBridge 188:bcfe06ba3d64 50 if (_owner == this) {
AnnaBridge 188:bcfe06ba3d64 51 _owner = NULL;
AnnaBridge 188:bcfe06ba3d64 52 }
<> 149:156823d33999 53 }
<> 149:156823d33999 54
AnnaBridge 187:0387e8f68319 55 void SPI::format(int bits, int mode)
AnnaBridge 187:0387e8f68319 56 {
<> 149:156823d33999 57 lock();
<> 149:156823d33999 58 _bits = bits;
<> 149:156823d33999 59 _mode = mode;
AnnaBridge 184:08ed48f1de7f 60 // If changing format while you are the owner then just
AnnaBridge 184:08ed48f1de7f 61 // update format, but if owner is changed then even frequency should be
Kojto 169:e3b6fe271b81 62 // updated which is done by acquire.
Kojto 169:e3b6fe271b81 63 if (_owner == this) {
Kojto 169:e3b6fe271b81 64 spi_format(&_spi, _bits, _mode, 0);
Kojto 169:e3b6fe271b81 65 } else {
Kojto 169:e3b6fe271b81 66 _acquire();
Kojto 169:e3b6fe271b81 67 }
<> 149:156823d33999 68 unlock();
<> 149:156823d33999 69 }
<> 149:156823d33999 70
AnnaBridge 187:0387e8f68319 71 void SPI::frequency(int hz)
AnnaBridge 187:0387e8f68319 72 {
<> 149:156823d33999 73 lock();
<> 149:156823d33999 74 _hz = hz;
AnnaBridge 184:08ed48f1de7f 75 // If changing format while you are the owner then just
AnnaBridge 184:08ed48f1de7f 76 // update frequency, but if owner is changed then even frequency should be
Kojto 169:e3b6fe271b81 77 // updated which is done by acquire.
Kojto 169:e3b6fe271b81 78 if (_owner == this) {
Kojto 169:e3b6fe271b81 79 spi_frequency(&_spi, _hz);
Kojto 169:e3b6fe271b81 80 } else {
Kojto 169:e3b6fe271b81 81 _acquire();
Kojto 169:e3b6fe271b81 82 }
<> 149:156823d33999 83 unlock();
<> 149:156823d33999 84 }
<> 149:156823d33999 85
AnnaBridge 187:0387e8f68319 86 SPI *SPI::_owner = NULL;
<> 149:156823d33999 87 SingletonPtr<PlatformMutex> SPI::_mutex;
<> 149:156823d33999 88
AnnaBridge 184:08ed48f1de7f 89 // ignore the fact there are multiple physical spis, and always update if it wasn't us last
AnnaBridge 187:0387e8f68319 90 void SPI::aquire()
AnnaBridge 187:0387e8f68319 91 {
<> 149:156823d33999 92 lock();
AnnaBridge 187:0387e8f68319 93 if (_owner != this) {
<> 149:156823d33999 94 spi_format(&_spi, _bits, _mode, 0);
<> 149:156823d33999 95 spi_frequency(&_spi, _hz);
<> 149:156823d33999 96 _owner = this;
<> 149:156823d33999 97 }
<> 149:156823d33999 98 unlock();
<> 149:156823d33999 99 }
<> 149:156823d33999 100
Kojto 169:e3b6fe271b81 101 // Note: Private function with no locking
AnnaBridge 187:0387e8f68319 102 void SPI::_acquire()
AnnaBridge 187:0387e8f68319 103 {
AnnaBridge 187:0387e8f68319 104 if (_owner != this) {
Kojto 169:e3b6fe271b81 105 spi_format(&_spi, _bits, _mode, 0);
Kojto 169:e3b6fe271b81 106 spi_frequency(&_spi, _hz);
Kojto 169:e3b6fe271b81 107 _owner = this;
Kojto 169:e3b6fe271b81 108 }
Kojto 169:e3b6fe271b81 109 }
Kojto 169:e3b6fe271b81 110
AnnaBridge 187:0387e8f68319 111 int SPI::write(int value)
AnnaBridge 187:0387e8f68319 112 {
<> 149:156823d33999 113 lock();
Kojto 169:e3b6fe271b81 114 _acquire();
<> 149:156823d33999 115 int ret = spi_master_write(&_spi, value);
<> 149:156823d33999 116 unlock();
<> 149:156823d33999 117 return ret;
<> 149:156823d33999 118 }
<> 149:156823d33999 119
AnnaBridge 187:0387e8f68319 120 int SPI::write(const char *tx_buffer, int tx_length, char *rx_buffer, int rx_length)
AnnaBridge 187:0387e8f68319 121 {
AnnaBridge 167:e84263d55307 122 lock();
Kojto 169:e3b6fe271b81 123 _acquire();
Kojto 170:19eb464bc2be 124 int ret = spi_master_block_write(&_spi, tx_buffer, tx_length, rx_buffer, rx_length, _write_fill);
AnnaBridge 167:e84263d55307 125 unlock();
AnnaBridge 167:e84263d55307 126 return ret;
AnnaBridge 167:e84263d55307 127 }
AnnaBridge 167:e84263d55307 128
AnnaBridge 187:0387e8f68319 129 void SPI::lock()
AnnaBridge 187:0387e8f68319 130 {
<> 149:156823d33999 131 _mutex->lock();
<> 149:156823d33999 132 }
<> 149:156823d33999 133
AnnaBridge 187:0387e8f68319 134 void SPI::unlock()
AnnaBridge 187:0387e8f68319 135 {
<> 149:156823d33999 136 _mutex->unlock();
<> 149:156823d33999 137 }
<> 149:156823d33999 138
AnnaBridge 187:0387e8f68319 139 void SPI::set_default_write_value(char data)
AnnaBridge 187:0387e8f68319 140 {
Kojto 170:19eb464bc2be 141 lock();
Kojto 170:19eb464bc2be 142 _write_fill = data;
Kojto 170:19eb464bc2be 143 unlock();
Kojto 170:19eb464bc2be 144 }
Kojto 170:19eb464bc2be 145
<> 149:156823d33999 146 #if DEVICE_SPI_ASYNCH
<> 149:156823d33999 147
AnnaBridge 187:0387e8f68319 148 int SPI::transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t &callback, int event)
<> 149:156823d33999 149 {
<> 149:156823d33999 150 if (spi_active(&_spi)) {
<> 149:156823d33999 151 return queue_transfer(tx_buffer, tx_length, rx_buffer, rx_length, bit_width, callback, event);
<> 149:156823d33999 152 }
<> 149:156823d33999 153 start_transfer(tx_buffer, tx_length, rx_buffer, rx_length, bit_width, callback, event);
<> 149:156823d33999 154 return 0;
<> 149:156823d33999 155 }
<> 149:156823d33999 156
<> 149:156823d33999 157 void SPI::abort_transfer()
<> 149:156823d33999 158 {
<> 149:156823d33999 159 spi_abort_asynch(&_spi);
Anna Bridge 180:96ed750bd169 160 unlock_deep_sleep();
<> 149:156823d33999 161 #if TRANSACTION_QUEUE_SIZE_SPI
<> 149:156823d33999 162 dequeue_transaction();
<> 149:156823d33999 163 #endif
<> 149:156823d33999 164 }
<> 149:156823d33999 165
<> 149:156823d33999 166
<> 149:156823d33999 167 void SPI::clear_transfer_buffer()
<> 149:156823d33999 168 {
<> 149:156823d33999 169 #if TRANSACTION_QUEUE_SIZE_SPI
<> 149:156823d33999 170 _transaction_buffer.reset();
<> 149:156823d33999 171 #endif
<> 149:156823d33999 172 }
<> 149:156823d33999 173
<> 149:156823d33999 174 void SPI::abort_all_transfers()
<> 149:156823d33999 175 {
<> 149:156823d33999 176 clear_transfer_buffer();
<> 149:156823d33999 177 abort_transfer();
<> 149:156823d33999 178 }
<> 149:156823d33999 179
<> 149:156823d33999 180 int SPI::set_dma_usage(DMAUsage usage)
<> 149:156823d33999 181 {
<> 149:156823d33999 182 if (spi_active(&_spi)) {
<> 149:156823d33999 183 return -1;
<> 149:156823d33999 184 }
<> 149:156823d33999 185 _usage = usage;
<> 149:156823d33999 186 return 0;
<> 149:156823d33999 187 }
<> 149:156823d33999 188
AnnaBridge 187:0387e8f68319 189 int SPI::queue_transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t &callback, int event)
<> 149:156823d33999 190 {
<> 149:156823d33999 191 #if TRANSACTION_QUEUE_SIZE_SPI
<> 149:156823d33999 192 transaction_t t;
<> 149:156823d33999 193
<> 149:156823d33999 194 t.tx_buffer = const_cast<void *>(tx_buffer);
<> 149:156823d33999 195 t.tx_length = tx_length;
<> 149:156823d33999 196 t.rx_buffer = rx_buffer;
<> 149:156823d33999 197 t.rx_length = rx_length;
<> 149:156823d33999 198 t.event = event;
<> 149:156823d33999 199 t.callback = callback;
<> 149:156823d33999 200 t.width = bit_width;
<> 149:156823d33999 201 Transaction<SPI> transaction(this, t);
<> 149:156823d33999 202 if (_transaction_buffer.full()) {
<> 149:156823d33999 203 return -1; // the buffer is full
<> 149:156823d33999 204 } else {
<> 149:156823d33999 205 core_util_critical_section_enter();
<> 149:156823d33999 206 _transaction_buffer.push(transaction);
<> 149:156823d33999 207 if (!spi_active(&_spi)) {
<> 149:156823d33999 208 dequeue_transaction();
<> 149:156823d33999 209 }
<> 149:156823d33999 210 core_util_critical_section_exit();
<> 149:156823d33999 211 return 0;
<> 149:156823d33999 212 }
<> 149:156823d33999 213 #else
<> 149:156823d33999 214 return -1;
<> 149:156823d33999 215 #endif
<> 149:156823d33999 216 }
<> 149:156823d33999 217
AnnaBridge 187:0387e8f68319 218 void SPI::start_transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t &callback, int event)
<> 149:156823d33999 219 {
Anna Bridge 180:96ed750bd169 220 lock_deep_sleep();
Kojto 169:e3b6fe271b81 221 _acquire();
<> 149:156823d33999 222 _callback = callback;
<> 149:156823d33999 223 _irq.callback(&SPI::irq_handler_asynch);
AnnaBridge 187:0387e8f68319 224 spi_master_transfer(&_spi, tx_buffer, tx_length, rx_buffer, rx_length, bit_width, _irq.entry(), event, _usage);
<> 149:156823d33999 225 }
<> 149:156823d33999 226
Anna Bridge 180:96ed750bd169 227 void SPI::lock_deep_sleep()
Anna Bridge 180:96ed750bd169 228 {
Anna Bridge 180:96ed750bd169 229 if (_deep_sleep_locked == false) {
Anna Bridge 180:96ed750bd169 230 sleep_manager_lock_deep_sleep();
Anna Bridge 180:96ed750bd169 231 _deep_sleep_locked = true;
Anna Bridge 180:96ed750bd169 232 }
Anna Bridge 180:96ed750bd169 233 }
Anna Bridge 180:96ed750bd169 234
Anna Bridge 180:96ed750bd169 235 void SPI::unlock_deep_sleep()
Anna Bridge 180:96ed750bd169 236 {
Anna Bridge 180:96ed750bd169 237 if (_deep_sleep_locked == true) {
Anna Bridge 180:96ed750bd169 238 sleep_manager_unlock_deep_sleep();
Anna Bridge 180:96ed750bd169 239 _deep_sleep_locked = false;
Anna Bridge 180:96ed750bd169 240 }
Anna Bridge 180:96ed750bd169 241 }
Anna Bridge 180:96ed750bd169 242
<> 149:156823d33999 243 #if TRANSACTION_QUEUE_SIZE_SPI
<> 149:156823d33999 244
<> 149:156823d33999 245 void SPI::start_transaction(transaction_t *data)
<> 149:156823d33999 246 {
<> 149:156823d33999 247 start_transfer(data->tx_buffer, data->tx_length, data->rx_buffer, data->rx_length, data->width, data->callback, data->event);
<> 149:156823d33999 248 }
<> 149:156823d33999 249
<> 149:156823d33999 250 void SPI::dequeue_transaction()
<> 149:156823d33999 251 {
<> 149:156823d33999 252 Transaction<SPI> t;
<> 149:156823d33999 253 if (_transaction_buffer.pop(t)) {
AnnaBridge 187:0387e8f68319 254 SPI *obj = t.get_object();
AnnaBridge 187:0387e8f68319 255 transaction_t *data = t.get_transaction();
<> 149:156823d33999 256 obj->start_transaction(data);
<> 149:156823d33999 257 }
<> 149:156823d33999 258 }
<> 149:156823d33999 259
<> 149:156823d33999 260 #endif
<> 149:156823d33999 261
<> 149:156823d33999 262 void SPI::irq_handler_asynch(void)
<> 149:156823d33999 263 {
<> 149:156823d33999 264 int event = spi_irq_handler_asynch(&_spi);
<> 149:156823d33999 265 if (_callback && (event & SPI_EVENT_ALL)) {
Anna Bridge 180:96ed750bd169 266 unlock_deep_sleep();
<> 149:156823d33999 267 _callback.call(event & SPI_EVENT_ALL);
<> 149:156823d33999 268 }
<> 149:156823d33999 269 #if TRANSACTION_QUEUE_SIZE_SPI
<> 149:156823d33999 270 if (event & (SPI_EVENT_ALL | SPI_EVENT_INTERNAL_TRANSFER_COMPLETE)) {
AnnaBridge 184:08ed48f1de7f 271 // SPI peripheral is free (event happened), dequeue transaction
<> 149:156823d33999 272 dequeue_transaction();
<> 149:156823d33999 273 }
<> 149:156823d33999 274 #endif
<> 149:156823d33999 275 }
<> 149:156823d33999 276
<> 149:156823d33999 277 #endif
<> 149:156823d33999 278
<> 149:156823d33999 279 } // namespace mbed
<> 149:156823d33999 280
<> 149:156823d33999 281 #endif