mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
targets/hal/TARGET_NXP/TARGET_LPC11UXX/TARGET_LPC11U24_301/PeripheralPins.c@0:9b334a45a8ff, 2015-10-01 (annotated)
- Committer:
- bogdanm
- Date:
- Thu Oct 01 15:25:22 2015 +0300
- Revision:
- 0:9b334a45a8ff
- Child:
- 144:ef7eb2e8f9f7
Initial commit on mbed-dev
Replaces mbed-src (now inactive)
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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bogdanm | 0:9b334a45a8ff | 1 | |
bogdanm | 0:9b334a45a8ff | 2 | /* mbed Microcontroller Library |
bogdanm | 0:9b334a45a8ff | 3 | * Copyright (c) 2006-2013 ARM Limited |
bogdanm | 0:9b334a45a8ff | 4 | * |
bogdanm | 0:9b334a45a8ff | 5 | * Licensed under the Apache License, Version 2.0 (the "License"); |
bogdanm | 0:9b334a45a8ff | 6 | * you may not use this file except in compliance with the License. |
bogdanm | 0:9b334a45a8ff | 7 | * You may obtain a copy of the License at |
bogdanm | 0:9b334a45a8ff | 8 | * |
bogdanm | 0:9b334a45a8ff | 9 | * http://www.apache.org/licenses/LICENSE-2.0 |
bogdanm | 0:9b334a45a8ff | 10 | * |
bogdanm | 0:9b334a45a8ff | 11 | * Unless required by applicable law or agreed to in writing, software |
bogdanm | 0:9b334a45a8ff | 12 | * distributed under the License is distributed on an "AS IS" BASIS, |
bogdanm | 0:9b334a45a8ff | 13 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
bogdanm | 0:9b334a45a8ff | 14 | * See the License for the specific language governing permissions and |
bogdanm | 0:9b334a45a8ff | 15 | * limitations under the License. |
bogdanm | 0:9b334a45a8ff | 16 | */ |
bogdanm | 0:9b334a45a8ff | 17 | |
bogdanm | 0:9b334a45a8ff | 18 | #include "PeripheralPins.h" |
bogdanm | 0:9b334a45a8ff | 19 | |
bogdanm | 0:9b334a45a8ff | 20 | /************ADC***************/ |
bogdanm | 0:9b334a45a8ff | 21 | const PinMap PinMap_ADC[] = { |
bogdanm | 0:9b334a45a8ff | 22 | {P0_11, ADC0_0, 0x02}, |
bogdanm | 0:9b334a45a8ff | 23 | {P0_12, ADC0_1, 0x02}, |
bogdanm | 0:9b334a45a8ff | 24 | {P0_13, ADC0_2, 0x02}, |
bogdanm | 0:9b334a45a8ff | 25 | {P0_14, ADC0_3, 0x02}, |
bogdanm | 0:9b334a45a8ff | 26 | {P0_15, ADC0_4, 0x02}, |
bogdanm | 0:9b334a45a8ff | 27 | {P0_16, ADC0_5, 0x01}, |
bogdanm | 0:9b334a45a8ff | 28 | {P0_22, ADC0_6, 0x01}, |
bogdanm | 0:9b334a45a8ff | 29 | {P0_23, ADC0_7, 0x01}, |
bogdanm | 0:9b334a45a8ff | 30 | {NC , NC , 0 } |
bogdanm | 0:9b334a45a8ff | 31 | }; |
bogdanm | 0:9b334a45a8ff | 32 | |
bogdanm | 0:9b334a45a8ff | 33 | /************I2C***************/ |
bogdanm | 0:9b334a45a8ff | 34 | const PinMap PinMap_I2C_SDA[] = { |
bogdanm | 0:9b334a45a8ff | 35 | {P0_5, I2C_0, 1}, |
bogdanm | 0:9b334a45a8ff | 36 | {NC , NC , 0} |
bogdanm | 0:9b334a45a8ff | 37 | }; |
bogdanm | 0:9b334a45a8ff | 38 | |
bogdanm | 0:9b334a45a8ff | 39 | const PinMap PinMap_I2C_SCL[] = { |
bogdanm | 0:9b334a45a8ff | 40 | {P0_4, I2C_0, 1}, |
bogdanm | 0:9b334a45a8ff | 41 | {NC , NC, 0} |
bogdanm | 0:9b334a45a8ff | 42 | }; |
bogdanm | 0:9b334a45a8ff | 43 | |
bogdanm | 0:9b334a45a8ff | 44 | /************UART***************/ |
bogdanm | 0:9b334a45a8ff | 45 | const PinMap PinMap_UART_TX[] = { |
bogdanm | 0:9b334a45a8ff | 46 | {P0_19, UART_0, 1}, |
bogdanm | 0:9b334a45a8ff | 47 | {P1_13, UART_0, 3}, |
bogdanm | 0:9b334a45a8ff | 48 | {P1_27, UART_0, 2}, |
bogdanm | 0:9b334a45a8ff | 49 | { NC , NC , 0} |
bogdanm | 0:9b334a45a8ff | 50 | }; |
bogdanm | 0:9b334a45a8ff | 51 | |
bogdanm | 0:9b334a45a8ff | 52 | const PinMap PinMap_UART_RX[] = { |
bogdanm | 0:9b334a45a8ff | 53 | {P0_18, UART_0, 1}, |
bogdanm | 0:9b334a45a8ff | 54 | {P1_14, UART_0, 3}, |
bogdanm | 0:9b334a45a8ff | 55 | {P1_26, UART_0, 2}, |
bogdanm | 0:9b334a45a8ff | 56 | {NC , NC , 0} |
bogdanm | 0:9b334a45a8ff | 57 | }; |
bogdanm | 0:9b334a45a8ff | 58 | |
bogdanm | 0:9b334a45a8ff | 59 | /************SPI***************/ |
bogdanm | 0:9b334a45a8ff | 60 | const PinMap PinMap_SPI_SCLK[] = { |
bogdanm | 0:9b334a45a8ff | 61 | {P0_6 , SPI_0, 0x02}, |
bogdanm | 0:9b334a45a8ff | 62 | {P0_10, SPI_0, 0x02}, |
bogdanm | 0:9b334a45a8ff | 63 | {P1_29, SPI_0, 0x01}, |
bogdanm | 0:9b334a45a8ff | 64 | {P1_15, SPI_1, 0x03}, |
bogdanm | 0:9b334a45a8ff | 65 | {P1_20, SPI_1, 0x02}, |
bogdanm | 0:9b334a45a8ff | 66 | {NC , NC , 0} |
bogdanm | 0:9b334a45a8ff | 67 | }; |
bogdanm | 0:9b334a45a8ff | 68 | |
bogdanm | 0:9b334a45a8ff | 69 | const PinMap PinMap_SPI_MOSI[] = { |
bogdanm | 0:9b334a45a8ff | 70 | {P0_9 , SPI_0, 0x01}, |
bogdanm | 0:9b334a45a8ff | 71 | {P0_21, SPI_1, 0x02}, |
bogdanm | 0:9b334a45a8ff | 72 | {P1_22, SPI_1, 0x02}, |
bogdanm | 0:9b334a45a8ff | 73 | {NC , NC , 0} |
bogdanm | 0:9b334a45a8ff | 74 | }; |
bogdanm | 0:9b334a45a8ff | 75 | |
bogdanm | 0:9b334a45a8ff | 76 | const PinMap PinMap_SPI_MISO[] = { |
bogdanm | 0:9b334a45a8ff | 77 | {P0_8 , SPI_0, 0x01}, |
bogdanm | 0:9b334a45a8ff | 78 | {P0_22, SPI_1, 0x03}, |
bogdanm | 0:9b334a45a8ff | 79 | {P1_21, SPI_1, 0x02}, |
bogdanm | 0:9b334a45a8ff | 80 | {NC , NC , 0} |
bogdanm | 0:9b334a45a8ff | 81 | }; |
bogdanm | 0:9b334a45a8ff | 82 | |
bogdanm | 0:9b334a45a8ff | 83 | const PinMap PinMap_SPI_SSEL[] = { |
bogdanm | 0:9b334a45a8ff | 84 | {P0_2 , SPI_0, 0x01}, |
bogdanm | 0:9b334a45a8ff | 85 | {P1_19, SPI_1, 0x02}, |
bogdanm | 0:9b334a45a8ff | 86 | {P1_23, SPI_1, 0x02}, |
bogdanm | 0:9b334a45a8ff | 87 | {NC , NC , 0} |
bogdanm | 0:9b334a45a8ff | 88 | }; |
bogdanm | 0:9b334a45a8ff | 89 | |
bogdanm | 0:9b334a45a8ff | 90 | /************PWM***************/ |
bogdanm | 0:9b334a45a8ff | 91 | /* To have a PWM where we can change both the period and the duty cycle, |
bogdanm | 0:9b334a45a8ff | 92 | * we need an entire timer. With the following conventions: |
bogdanm | 0:9b334a45a8ff | 93 | * * MR3 is used for the PWM period |
bogdanm | 0:9b334a45a8ff | 94 | * * MR0, MR1, MR2 are used for the duty cycle |
bogdanm | 0:9b334a45a8ff | 95 | */ |
bogdanm | 0:9b334a45a8ff | 96 | const PinMap PinMap_PWM[] = { |
bogdanm | 0:9b334a45a8ff | 97 | /* CT16B0 */ |
bogdanm | 0:9b334a45a8ff | 98 | {P0_8 , PWM_1, 2}, {P1_13, PWM_1, 2}, /* MR0 */ |
bogdanm | 0:9b334a45a8ff | 99 | {P0_9 , PWM_2, 2}, {P1_14, PWM_2, 2}, /* MR1 */ |
bogdanm | 0:9b334a45a8ff | 100 | {P0_10, PWM_3, 3}, {P1_15, PWM_3, 2}, /* MR2 */ |
bogdanm | 0:9b334a45a8ff | 101 | |
bogdanm | 0:9b334a45a8ff | 102 | /* CT16B1 */ |
bogdanm | 0:9b334a45a8ff | 103 | {P0_21, PWM_4, 1}, /* MR0 */ |
bogdanm | 0:9b334a45a8ff | 104 | {P0_22, PWM_5, 2}, {P1_23, PWM_5, 1}, /* MR1 */ |
bogdanm | 0:9b334a45a8ff | 105 | |
bogdanm | 0:9b334a45a8ff | 106 | /* CT32B0 */ |
bogdanm | 0:9b334a45a8ff | 107 | {P0_18, PWM_6, 2}, {P1_24, PWM_6, 1}, /* MR0 */ |
bogdanm | 0:9b334a45a8ff | 108 | {P0_19, PWM_7, 2}, {P1_25, PWM_7, 1}, /* MR1 */ |
bogdanm | 0:9b334a45a8ff | 109 | {P0_1 , PWM_8, 2}, {P1_26, PWM_8, 1}, /* MR2 */ |
bogdanm | 0:9b334a45a8ff | 110 | |
bogdanm | 0:9b334a45a8ff | 111 | /* CT32B1 */ |
bogdanm | 0:9b334a45a8ff | 112 | {P0_13, PWM_9 , 3}, {P1_0, PWM_9 , 1}, /* MR0 */ |
bogdanm | 0:9b334a45a8ff | 113 | {P0_14, PWM_10, 3}, {P1_1, PWM_10, 1}, /* MR1 */ |
bogdanm | 0:9b334a45a8ff | 114 | {P0_15, PWM_11, 3}, {P1_2, PWM_11, 1}, /* MR2 */ |
bogdanm | 0:9b334a45a8ff | 115 | |
bogdanm | 0:9b334a45a8ff | 116 | {NC, NC, 0} |
bogdanm | 0:9b334a45a8ff | 117 | }; |