mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

platform/mbed_application.c@186:707f6e361f3e, 2018-06-22 (annotated)

Committer:
Anna Bridge
Date:
Fri Jun 22 16:45:37 2018 +0100
Revision:
186:707f6e361f3e
Parent:
173:e131a1973e81
Child:
187:0387e8f68319
mbed-dev library. Release version 162

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 160:d5399cc887bb 1 /* mbed Microcontroller Library
<> 160:d5399cc887bb 2 * Copyright (c) 2017-2017 ARM Limited
<> 160:d5399cc887bb 3 *
<> 160:d5399cc887bb 4 * Licensed under the Apache License, Version 2.0 (the "License");
<> 160:d5399cc887bb 5 * you may not use this file except in compliance with the License.
<> 160:d5399cc887bb 6 * You may obtain a copy of the License at
<> 160:d5399cc887bb 7 *
<> 160:d5399cc887bb 8 * http://www.apache.org/licenses/LICENSE-2.0
<> 160:d5399cc887bb 9 *
<> 160:d5399cc887bb 10 * Unless required by applicable law or agreed to in writing, software
<> 160:d5399cc887bb 11 * distributed under the License is distributed on an "AS IS" BASIS,
<> 160:d5399cc887bb 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
<> 160:d5399cc887bb 13 * See the License for the specific language governing permissions and
<> 160:d5399cc887bb 14 * limitations under the License.
<> 160:d5399cc887bb 15 */
<> 160:d5399cc887bb 16
<> 160:d5399cc887bb 17 #include <stdlib.h>
<> 160:d5399cc887bb 18 #include <stdarg.h>
<> 160:d5399cc887bb 19 #include "device.h"
<> 160:d5399cc887bb 20 #include "platform/mbed_application.h"
<> 160:d5399cc887bb 21
<> 160:d5399cc887bb 22 #if MBED_APPLICATION_SUPPORT
<> 160:d5399cc887bb 23
<> 160:d5399cc887bb 24 static void powerdown_nvic(void);
<> 160:d5399cc887bb 25 static void powerdown_scb(uint32_t vtor);
<> 160:d5399cc887bb 26 static void start_new_application(void *sp, void *pc);
<> 160:d5399cc887bb 27
<> 160:d5399cc887bb 28 void mbed_start_application(uintptr_t address)
<> 160:d5399cc887bb 29 {
<> 160:d5399cc887bb 30 void *sp;
<> 160:d5399cc887bb 31 void *pc;
<> 160:d5399cc887bb 32
<> 160:d5399cc887bb 33 // Interrupts are re-enabled in start_new_application
<> 160:d5399cc887bb 34 __disable_irq();
<> 160:d5399cc887bb 35
<> 160:d5399cc887bb 36 SysTick->CTRL = 0x00000000;
<> 160:d5399cc887bb 37 powerdown_nvic();
<> 160:d5399cc887bb 38 powerdown_scb(address);
<> 160:d5399cc887bb 39
<> 160:d5399cc887bb 40 sp = *((void**)address + 0);
<> 160:d5399cc887bb 41 pc = *((void**)address + 1);
<> 160:d5399cc887bb 42 start_new_application(sp, pc);
<> 160:d5399cc887bb 43 }
<> 160:d5399cc887bb 44
<> 160:d5399cc887bb 45 static void powerdown_nvic()
<> 160:d5399cc887bb 46 {
AnnaBridge 173:e131a1973e81 47 int isr_groups_32;
<> 160:d5399cc887bb 48 int i;
<> 160:d5399cc887bb 49 int j;
<> 160:d5399cc887bb 50
Anna Bridge 186:707f6e361f3e 51 #if defined(__CORTEX_M23)
Anna Bridge 186:707f6e361f3e 52 // M23 doesn't support ICTR and supports up to 240 external interrupts.
Anna Bridge 186:707f6e361f3e 53 isr_groups_32 = 8;
Anna Bridge 186:707f6e361f3e 54 #else
AnnaBridge 173:e131a1973e81 55 isr_groups_32 = ((SCnSCB->ICTR & SCnSCB_ICTR_INTLINESNUM_Msk) >> SCnSCB_ICTR_INTLINESNUM_Pos) + 1;
Anna Bridge 186:707f6e361f3e 56 #endif
AnnaBridge 173:e131a1973e81 57 for (i = 0; i < isr_groups_32; i++) {
<> 160:d5399cc887bb 58 NVIC->ICER[i] = 0xFFFFFFFF;
<> 160:d5399cc887bb 59 NVIC->ICPR[i] = 0xFFFFFFFF;
<> 160:d5399cc887bb 60 for (j = 0; j < 8; j++) {
Anna Bridge 186:707f6e361f3e 61 #if defined(__CORTEX_M23)
Anna Bridge 186:707f6e361f3e 62 NVIC->IPR[i * 8 + j] = 0x00000000;
Anna Bridge 186:707f6e361f3e 63 #else
<> 160:d5399cc887bb 64 NVIC->IP[i * 8 + j] = 0x00000000;
Anna Bridge 186:707f6e361f3e 65 #endif
<> 160:d5399cc887bb 66 }
<> 160:d5399cc887bb 67 }
<> 160:d5399cc887bb 68 }
<> 160:d5399cc887bb 69
<> 160:d5399cc887bb 70 static void powerdown_scb(uint32_t vtor)
<> 160:d5399cc887bb 71 {
<> 160:d5399cc887bb 72 int i;
<> 160:d5399cc887bb 73
<> 160:d5399cc887bb 74 // SCB->CPUID - Read only CPU ID register
<> 160:d5399cc887bb 75 SCB->ICSR = SCB_ICSR_PENDSVCLR_Msk | SCB_ICSR_PENDSTCLR_Msk;
<> 160:d5399cc887bb 76 SCB->VTOR = vtor;
<> 160:d5399cc887bb 77 SCB->AIRCR = 0x05FA | 0x0000;
<> 160:d5399cc887bb 78 SCB->SCR = 0x00000000;
<> 160:d5399cc887bb 79 // SCB->CCR - Implementation defined value
Anna Bridge 186:707f6e361f3e 80 #if defined(__CORTEX_M23)
Anna Bridge 186:707f6e361f3e 81 for (i = 0; i < 2; i++) {
Anna Bridge 186:707f6e361f3e 82 SCB->SHPR[i] = 0x00;
Anna Bridge 186:707f6e361f3e 83 }
Anna Bridge 186:707f6e361f3e 84 #else
<> 160:d5399cc887bb 85 for (i = 0; i < 12; i++) {
<> 160:d5399cc887bb 86 #if defined(__CORTEX_M7)
<> 160:d5399cc887bb 87 SCB->SHPR[i] = 0x00;
<> 160:d5399cc887bb 88 #else
<> 160:d5399cc887bb 89 SCB->SHP[i] = 0x00;
<> 160:d5399cc887bb 90 #endif
<> 160:d5399cc887bb 91 }
Anna Bridge 186:707f6e361f3e 92 #endif
<> 160:d5399cc887bb 93 SCB->SHCSR = 0x00000000;
Anna Bridge 186:707f6e361f3e 94 #if defined(__CORTEX_M23)
Anna Bridge 186:707f6e361f3e 95 #else
<> 160:d5399cc887bb 96 SCB->CFSR = 0xFFFFFFFF;
<> 160:d5399cc887bb 97 SCB->HFSR = SCB_HFSR_DEBUGEVT_Msk | SCB_HFSR_FORCED_Msk | SCB_HFSR_VECTTBL_Msk;
<> 160:d5399cc887bb 98 SCB->DFSR = SCB_DFSR_EXTERNAL_Msk | SCB_DFSR_VCATCH_Msk |
<> 160:d5399cc887bb 99 SCB_DFSR_DWTTRAP_Msk | SCB_DFSR_BKPT_Msk | SCB_DFSR_HALTED_Msk;
Anna Bridge 186:707f6e361f3e 100 #endif
<> 160:d5399cc887bb 101 // SCB->MMFAR - Implementation defined value
<> 160:d5399cc887bb 102 // SCB->BFAR - Implementation defined value
<> 160:d5399cc887bb 103 // SCB->AFSR - Implementation defined value
<> 160:d5399cc887bb 104 // SCB->PFR - Read only processor feature register
<> 160:d5399cc887bb 105 // SCB->DFR - Read only debug feature registers
<> 160:d5399cc887bb 106 // SCB->ADR - Read only auxiliary feature registers
<> 160:d5399cc887bb 107 // SCB->MMFR - Read only memory model feature registers
<> 160:d5399cc887bb 108 // SCB->ISAR - Read only instruction set attribute registers
<> 160:d5399cc887bb 109 // SCB->CPACR - Implementation defined value
<> 160:d5399cc887bb 110 }
<> 160:d5399cc887bb 111
<> 160:d5399cc887bb 112 #if defined (__CC_ARM)
<> 160:d5399cc887bb 113
<> 160:d5399cc887bb 114 __asm static void start_new_application(void *sp, void *pc)
<> 160:d5399cc887bb 115 {
<> 160:d5399cc887bb 116 MOV R2, #0
<> 160:d5399cc887bb 117 MSR CONTROL, R2 // Switch to main stack
<> 160:d5399cc887bb 118 MOV SP, R0
<> 160:d5399cc887bb 119 MSR PRIMASK, R2 // Enable interrupts
<> 160:d5399cc887bb 120 BX R1
<> 160:d5399cc887bb 121 }
<> 160:d5399cc887bb 122
<> 160:d5399cc887bb 123 #elif defined (__GNUC__) || defined (__ICCARM__)
<> 160:d5399cc887bb 124
<> 160:d5399cc887bb 125 void start_new_application(void *sp, void *pc)
<> 160:d5399cc887bb 126 {
<> 160:d5399cc887bb 127 __asm volatile (
Anna Bridge 186:707f6e361f3e 128 "movw r2, #0 \n" // Fail to compile "mov r2, #0" with ARMC6. Replace with MOVW.
Anna Bridge 186:707f6e361f3e 129 // We needn't "movt r2, #0" immediately following because MOVW
Anna Bridge 186:707f6e361f3e 130 // will zero-extend the 16-bit immediate.
<> 160:d5399cc887bb 131 "msr control, r2 \n" // Switch to main stack
<> 160:d5399cc887bb 132 "mov sp, %0 \n"
<> 160:d5399cc887bb 133 "msr primask, r2 \n" // Enable interrupts
<> 160:d5399cc887bb 134 "bx %1 \n"
<> 160:d5399cc887bb 135 :
<> 160:d5399cc887bb 136 : "l" (sp), "l" (pc)
<> 160:d5399cc887bb 137 : "r2", "cc", "memory"
<> 160:d5399cc887bb 138 );
<> 160:d5399cc887bb 139 }
<> 160:d5399cc887bb 140
<> 160:d5399cc887bb 141 #else
<> 160:d5399cc887bb 142
<> 160:d5399cc887bb 143 #error "Unsupported toolchain"
<> 160:d5399cc887bb 144
<> 160:d5399cc887bb 145 #endif
<> 160:d5399cc887bb 146
<> 160:d5399cc887bb 147 #endif /* MBED_APPLICATION_SUPPORT */