USBHostTypes.h

00001 /* Copyright (c) 2010-2012 mbed.org, MIT License
00002 *
00003 * Permission is hereby granted, free of charge, to any person obtaining a copy of this software
00004 * and associated documentation files (the "Software"), to deal in the Software without
00005 * restriction, including without limitation the rights to use, copy, modify, merge, publish,
00006 * distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the
00007 * Software is furnished to do so, subject to the following conditions:
00008 *
00009 * The above copyright notice and this permission notice shall be included in all copies or
00010 * substantial portions of the Software.
00011 *
00012 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
00013 * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
00014 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
00015 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
00016 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
00017 */
00018 
00019 #ifndef USB_INC_H
00020 #define USB_INC_H
00021 
00022 #include "mbed.h"
00023 
00024 enum USB_TYPE {
00025     USB_TYPE_DISCONNECTED = -10,
00026     USB_TYPE_NOTFOUND = -9,
00027     USB_TYPE_BADCONFIG = -8,
00028     USB_TYPE_FREE = -7,
00029     USB_TYPE_IDLE = -6,
00030     USB_TYPE_PROCESSING = -5,
00031     USB_TYPE_HALTED = -4, //Transfer on an ep is stalled
00032     USB_TYPE_BUSY = -3,
00033     USB_TYPE_TDFAIL = -2,
00034     USB_TYPE_ERROR = -1,
00035     USB_TYPE_OK = 0
00036 };
00037 
00038 #define AUDIO_CLASS 0x01
00039 #define CDC_CLASS   0x02
00040 #define MSD_CLASS   0x08
00041 #define HID_CLASS   0x03
00042 
00043 
00044 // From NXP's USBHostLite stack's usbhost_lpc17xx.h 
00045 // Only the types names have been changed to avoid unecessary typedefs 
00046 
00047 
00048 /*
00049 **************************************************************************************************************
00050 *                                                 NXP USB Host Stack
00051 *
00052 *                                     (c) Copyright 2008, NXP SemiConductors
00053 *                                     (c) Copyright 2008, OnChip  Technologies LLC
00054 *                                                 All Rights Reserved
00055 *
00056 *                                                  www.nxp.com
00057 *                                               www.onchiptech.com
00058 *
00059 * File           : usbhost_lpc17xx.h
00060 * Programmer(s)  : Ravikanth.P
00061 * Version        :
00062 *
00063 **************************************************************************************************************
00064 */
00065 
00066 
00067 // ------------------ HcControl Register ---------------------  
00068 #define  OR_CONTROL_PLE                 0x00000004
00069 #define  OR_CONTROL_CLE                 0x00000010
00070 #define  OR_CONTROL_BLE                 0x00000020
00071 #define  OR_CONTROL_HCFS                0x000000C0
00072 #define  OR_CONTROL_HC_OPER             0x00000080
00073 // ----------------- HcCommandStatus Register ----------------- 
00074 #define  OR_CMD_STATUS_HCR              0x00000001
00075 #define  OR_CMD_STATUS_CLF              0x00000002
00076 #define  OR_CMD_STATUS_BLF              0x00000004
00077 // --------------- HcInterruptStatus Register ----------------- 
00078 #define  OR_INTR_STATUS_WDH             0x00000002
00079 #define  OR_INTR_STATUS_RHSC            0x00000040
00080 #define  OR_INTR_STATUS_UE              0x00000010
00081 // --------------- HcInterruptEnable Register ----------------- 
00082 #define  OR_INTR_ENABLE_WDH             0x00000002
00083 #define  OR_INTR_ENABLE_RHSC            0x00000040
00084 #define  OR_INTR_ENABLE_MIE             0x80000000
00085 // ---------------- HcRhDescriptorA Register ------------------ 
00086 #define  OR_RH_STATUS_LPSC              0x00010000
00087 #define  OR_RH_STATUS_DRWE              0x00008000
00088 // -------------- HcRhPortStatus[1:NDP] Register -------------- 
00089 #define  OR_RH_PORT_CCS                 0x00000001
00090 #define  OR_RH_PORT_PRS                 0x00000010
00091 #define  OR_RH_PORT_CSC                 0x00010000
00092 #define  OR_RH_PORT_PRSC                0x00100000
00093 #define  OR_RH_PORT_LSDA                0x00000200
00094 
00095 
00096 //
00097 //**************************************************************************************************************
00098 //*                                               FRAME INTERVAL
00099 //**************************************************************************************************************
00100 //
00101 
00102 #define  FI                     0x2EDF           // 12000 bits per frame (-1)
00103 #define  DEFAULT_FMINTERVAL     ((((6 * (FI - 210)) / 7) << 16) | FI)
00104 
00105 //
00106 //**************************************************************************************************************
00107 //*                                       ENDPOINT DESCRIPTOR CONTROL FIELDS
00108 //**************************************************************************************************************
00109 //
00110 
00111 #define  ED_SKIP            (uint32_t) (0x00001000)        // Skip this ep in queue
00112 
00113 //
00114 //**************************************************************************************************************
00115 //*                                       TRANSFER DESCRIPTOR CONTROL FIELDS
00116 //**************************************************************************************************************
00117 //
00118 
00119 #define  TD_ROUNDING        (uint32_t) (0x00040000)        // Buffer Rounding                             
00120 #define  TD_SETUP           (uint32_t)(0)                  // Direction of Setup Packet                   
00121 #define  TD_IN              (uint32_t)(0x00100000)         // Direction In                                
00122 #define  TD_OUT             (uint32_t)(0x00080000)         // Direction Out                               
00123 #define  TD_DELAY_INT(x)    (uint32_t)((x) << 21)          // Delay Interrupt                             
00124 #define  TD_TOGGLE_0        (uint32_t)(0x02000000)         // Toggle 0                                    
00125 #define  TD_TOGGLE_1        (uint32_t)(0x03000000)         // Toggle 1                                    
00126 #define  TD_CC              (uint32_t)(0xF0000000)         // Completion Code                             
00127 
00128 //
00129 //**************************************************************************************************************
00130 //*                                       USB STANDARD REQUEST DEFINITIONS
00131 //**************************************************************************************************************
00132 //
00133 
00134 #define  DEVICE_DESCRIPTOR                     (1)
00135 #define  CONFIGURATION_DESCRIPTOR              (2)
00136 #define  INTERFACE_DESCRIPTOR                  (4)
00137 #define  ENDPOINT_DESCRIPTOR                   (5)
00138 #define  HID_DESCRIPTOR                        (33)
00139 
00140 //  ----------- Control RequestType Fields  ----------- 
00141 #define  USB_DEVICE_TO_HOST         0x80
00142 #define  USB_HOST_TO_DEVICE         0x00
00143 #define  USB_REQUEST_TYPE_CLASS     0x20
00144 #define  USB_RECIPIENT_DEVICE       0x00
00145 #define  USB_RECIPIENT_INTERFACE    0x01
00146 
00147 // -------------- USB Standard Requests  -------------- 
00148 #define  SET_ADDRESS                 5
00149 #define  GET_DESCRIPTOR              6
00150 #define  SET_CONFIGURATION           9
00151 #define  SET_INTERFACE              11
00152 
00153 // -------------- USB Descriptor Length  -------------- 
00154 #define DEVICE_DESCRIPTOR_LENGTH            0x12
00155 #define CONFIGURATION_DESCRIPTOR_LENGTH     0x09
00156 
00157 
00158 //
00159 //**************************************************************************************************************
00160 //*                                       TYPE DEFINITIONS
00161 //**************************************************************************************************************
00162 //
00163 
00164 // ----------- HostController EndPoint Descriptor ------------- 
00165 typedef struct hcEd {               
00166     volatile  uint32_t  control;        // Endpoint descriptor control                              
00167     volatile  uint32_t  tailTD;         // Physical address of tail in Transfer descriptor list     
00168     volatile  uint32_t  headTD;         // Physcial address of head in Transfer descriptor list     
00169     volatile  uint32_t  nextED;         // Physical address of next Endpoint descriptor             
00170 } HCED;
00171 
00172 // ------------ HostController Transfer Descriptor ------------ 
00173 typedef struct hcTd {                       
00174     volatile  uint32_t  control;        // Transfer descriptor control                              
00175     volatile  uint32_t  currBufPtr;     // Physical address of current buffer pointer               
00176     volatile  uint32_t  nextTD;         // Physical pointer to next Transfer Descriptor             
00177     volatile  uint32_t  bufEnd;         // Physical address of end of buffer                        
00178 } HCTD;
00179 
00180 // ----------- Host Controller Communication Area ------------  
00181 typedef struct hcca {                   
00182     volatile  uint32_t  IntTable[32];   // Interrupt Table                                          
00183     volatile  uint32_t  FrameNumber;    // Frame Number                                             
00184     volatile  uint32_t  DoneHead;       // Done Head                                                
00185     volatile  uint8_t   Reserved[116];  // Reserved for future use                                  
00186     volatile  uint8_t   Unknown[4];     // Unused                                                   
00187 } HCCA;
00188 
00189 
00190 
00191 #endif