Maxim Ibragimov / mbed-dev

mbed library sources. Supersedes mbed-src. Fixed broken STM32F1xx RTC on rtc_api.c

Dependents:   Nucleo_F103RB_RTC_battery_bkup_pwr_off_okay

Fork of mbed-dev by mbed official

targets/hal/TARGET_NXP/TARGET_LPC81X/pinmap.c@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
144:ef7eb2e8f9f7
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /* mbed Microcontroller Library
bogdanm 0:9b334a45a8ff 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 0:9b334a45a8ff 3 *
bogdanm 0:9b334a45a8ff 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 0:9b334a45a8ff 5 * you may not use this file except in compliance with the License.
bogdanm 0:9b334a45a8ff 6 * You may obtain a copy of the License at
bogdanm 0:9b334a45a8ff 7 *
bogdanm 0:9b334a45a8ff 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 0:9b334a45a8ff 9 *
bogdanm 0:9b334a45a8ff 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 0:9b334a45a8ff 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 0:9b334a45a8ff 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 0:9b334a45a8ff 13 * See the License for the specific language governing permissions and
bogdanm 0:9b334a45a8ff 14 * limitations under the License.
bogdanm 0:9b334a45a8ff 15 */
bogdanm 0:9b334a45a8ff 16 #include "mbed_assert.h"
bogdanm 0:9b334a45a8ff 17 #include "pinmap.h"
bogdanm 0:9b334a45a8ff 18 #include "mbed_error.h"
bogdanm 0:9b334a45a8ff 19
bogdanm 0:9b334a45a8ff 20 __IO uint32_t* IOCON_REGISTERS[18] = {
bogdanm 0:9b334a45a8ff 21 &LPC_IOCON->PIO0_0 , &LPC_IOCON->PIO0_1 , &LPC_IOCON->PIO0_2 ,
bogdanm 0:9b334a45a8ff 22 &LPC_IOCON->PIO0_3 , &LPC_IOCON->PIO0_4 , &LPC_IOCON->PIO0_5 ,
bogdanm 0:9b334a45a8ff 23 &LPC_IOCON->PIO0_6 , &LPC_IOCON->PIO0_7 , &LPC_IOCON->PIO0_8 ,
bogdanm 0:9b334a45a8ff 24 &LPC_IOCON->PIO0_9 , &LPC_IOCON->PIO0_10, &LPC_IOCON->PIO0_11,
bogdanm 0:9b334a45a8ff 25 &LPC_IOCON->PIO0_12, &LPC_IOCON->PIO0_13, &LPC_IOCON->PIO0_14,
bogdanm 0:9b334a45a8ff 26 &LPC_IOCON->PIO0_15, &LPC_IOCON->PIO0_16, &LPC_IOCON->PIO0_17,
bogdanm 0:9b334a45a8ff 27 };
bogdanm 0:9b334a45a8ff 28
bogdanm 0:9b334a45a8ff 29 void pin_function(PinName pin, int function) {
bogdanm 0:9b334a45a8ff 30 if (function == 0) {
bogdanm 0:9b334a45a8ff 31 // Disable initial fixed function for P0_2, P0_3 and P0_5
bogdanm 0:9b334a45a8ff 32 uint32_t enable = 0;
bogdanm 0:9b334a45a8ff 33 if (pin == P0_2)
bogdanm 0:9b334a45a8ff 34 enable = 1 << 3;
bogdanm 0:9b334a45a8ff 35 else if (pin == P0_3)
bogdanm 0:9b334a45a8ff 36 enable = 1 << 2;
bogdanm 0:9b334a45a8ff 37 else if (pin == P0_5)
bogdanm 0:9b334a45a8ff 38 enable = 1 << 6;
bogdanm 0:9b334a45a8ff 39 LPC_SWM->PINENABLE0 |= enable;
bogdanm 0:9b334a45a8ff 40 }
bogdanm 0:9b334a45a8ff 41 }
bogdanm 0:9b334a45a8ff 42
bogdanm 0:9b334a45a8ff 43 void pin_mode(PinName pin, PinMode mode) {
bogdanm 0:9b334a45a8ff 44 MBED_ASSERT(pin != (PinName)NC);
bogdanm 0:9b334a45a8ff 45
bogdanm 0:9b334a45a8ff 46 if ((pin == 10) || (pin == 11)) {
bogdanm 0:9b334a45a8ff 47 // True open-drain pins can be configured for different I2C-bus speeds
bogdanm 0:9b334a45a8ff 48 return;
bogdanm 0:9b334a45a8ff 49 }
bogdanm 0:9b334a45a8ff 50
bogdanm 0:9b334a45a8ff 51 __IO uint32_t *reg = IOCON_REGISTERS[pin];
bogdanm 0:9b334a45a8ff 52
bogdanm 0:9b334a45a8ff 53 if (mode == OpenDrain) {
bogdanm 0:9b334a45a8ff 54 *reg |= (1 << 10);
bogdanm 0:9b334a45a8ff 55 } else {
bogdanm 0:9b334a45a8ff 56 uint32_t tmp = *reg;
bogdanm 0:9b334a45a8ff 57 tmp &= ~(0x3 << 3);
bogdanm 0:9b334a45a8ff 58 tmp |= (mode & 0x3) << 3;
bogdanm 0:9b334a45a8ff 59 *reg = tmp;
bogdanm 0:9b334a45a8ff 60 }
bogdanm 0:9b334a45a8ff 61 }