Maxim Ibragimov / mbed-dev

mbed library sources. Supersedes mbed-src. Fixed broken STM32F1xx RTC on rtc_api.c

Dependents:   Nucleo_F103RB_RTC_battery_bkup_pwr_off_okay

Fork of mbed-dev by mbed official

targets/hal/TARGET_NXP/TARGET_LPC11U6X/PeripheralNames.h@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
144:ef7eb2e8f9f7
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /* mbed Microcontroller Library
bogdanm 0:9b334a45a8ff 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 0:9b334a45a8ff 3 *
bogdanm 0:9b334a45a8ff 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 0:9b334a45a8ff 5 * you may not use this file except in compliance with the License.
bogdanm 0:9b334a45a8ff 6 * You may obtain a copy of the License at
bogdanm 0:9b334a45a8ff 7 *
bogdanm 0:9b334a45a8ff 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 0:9b334a45a8ff 9 *
bogdanm 0:9b334a45a8ff 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 0:9b334a45a8ff 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 0:9b334a45a8ff 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 0:9b334a45a8ff 13 * See the License for the specific language governing permissions and
bogdanm 0:9b334a45a8ff 14 * limitations under the License.
bogdanm 0:9b334a45a8ff 15 */
bogdanm 0:9b334a45a8ff 16 #ifndef MBED_PERIPHERALNAMES_H
bogdanm 0:9b334a45a8ff 17 #define MBED_PERIPHERALNAMES_H
bogdanm 0:9b334a45a8ff 18
bogdanm 0:9b334a45a8ff 19 #include "cmsis.h"
bogdanm 0:9b334a45a8ff 20
bogdanm 0:9b334a45a8ff 21 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 22 extern "C" {
bogdanm 0:9b334a45a8ff 23 #endif
bogdanm 0:9b334a45a8ff 24
bogdanm 0:9b334a45a8ff 25 typedef enum {
bogdanm 0:9b334a45a8ff 26 UART_0 = (int)LPC_USART0_BASE,
bogdanm 0:9b334a45a8ff 27 UART_1 = (int)LPC_USART1_BASE,
bogdanm 0:9b334a45a8ff 28 UART_2 = (int)LPC_USART2_BASE,
bogdanm 0:9b334a45a8ff 29 UART_3 = (int)LPC_USART3_BASE,
bogdanm 0:9b334a45a8ff 30 UART_4 = (int)LPC_USART4_BASE,
bogdanm 0:9b334a45a8ff 31 } UARTName;
bogdanm 0:9b334a45a8ff 32
bogdanm 0:9b334a45a8ff 33 typedef enum {
bogdanm 0:9b334a45a8ff 34 ADC_0 = 0,
bogdanm 0:9b334a45a8ff 35 ADC_1,
bogdanm 0:9b334a45a8ff 36 ADC_2,
bogdanm 0:9b334a45a8ff 37 ADC_3,
bogdanm 0:9b334a45a8ff 38 ADC_4,
bogdanm 0:9b334a45a8ff 39 ADC_5,
bogdanm 0:9b334a45a8ff 40 ADC_6,
bogdanm 0:9b334a45a8ff 41 ADC_7,
bogdanm 0:9b334a45a8ff 42 ADC_8,
bogdanm 0:9b334a45a8ff 43 ADC_9,
bogdanm 0:9b334a45a8ff 44 ADC_10,
bogdanm 0:9b334a45a8ff 45 ADC_11,
bogdanm 0:9b334a45a8ff 46 } ADCName;
bogdanm 0:9b334a45a8ff 47
bogdanm 0:9b334a45a8ff 48 typedef enum {
bogdanm 0:9b334a45a8ff 49 SPI_0 = (int)LPC_SSP0_BASE,
bogdanm 0:9b334a45a8ff 50 SPI_1 = (int)LPC_SSP1_BASE
bogdanm 0:9b334a45a8ff 51 } SPIName;
bogdanm 0:9b334a45a8ff 52
bogdanm 0:9b334a45a8ff 53 typedef enum {
bogdanm 0:9b334a45a8ff 54 I2C_0 = (int)LPC_I2C0_BASE,
bogdanm 0:9b334a45a8ff 55 I2C_1 = (int)LPC_I2C1_BASE
bogdanm 0:9b334a45a8ff 56 } I2CName;
bogdanm 0:9b334a45a8ff 57
bogdanm 0:9b334a45a8ff 58 typedef enum {
bogdanm 0:9b334a45a8ff 59 SCT0_0 = 0,
bogdanm 0:9b334a45a8ff 60 SCT0_1,
bogdanm 0:9b334a45a8ff 61 SCT0_2,
bogdanm 0:9b334a45a8ff 62 SCT0_3,
bogdanm 0:9b334a45a8ff 63 SCT1_0,
bogdanm 0:9b334a45a8ff 64 SCT1_1,
bogdanm 0:9b334a45a8ff 65 SCT1_2,
bogdanm 0:9b334a45a8ff 66 SCT1_3,
bogdanm 0:9b334a45a8ff 67 } PWMName;
bogdanm 0:9b334a45a8ff 68
bogdanm 0:9b334a45a8ff 69 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 70 }
bogdanm 0:9b334a45a8ff 71 #endif
bogdanm 0:9b334a45a8ff 72
bogdanm 0:9b334a45a8ff 73 #endif