Matthew Hall
/
lab5es305
non
mbedWSEsbc.h@0:2c721947a97e, 2017-11-05 (annotated)
- Committer:
- matthewhall115
- Date:
- Sun Nov 05 19:27:33 2017 +0000
- Revision:
- 0:2c721947a97e
none
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
matthewhall115 | 0:2c721947a97e | 1 | /* C Library for the WSE-PROJ-SBC |
matthewhall115 | 0:2c721947a97e | 2 | J Bradshaw |
matthewhall115 | 0:2c721947a97e | 3 | 20140912 |
matthewhall115 | 0:2c721947a97e | 4 | 20140918 J Bradshaw - Found CS mistake in Encoder routines |
matthewhall115 | 0:2c721947a97e | 5 | Added comments in Init function, encoder functions |
matthewhall115 | 0:2c721947a97e | 6 | 20150210 J Bradshaw - Initialized DigitalOuts with pre-defined logic |
matthewhall115 | 0:2c721947a97e | 7 | levels (CS's high, etc) |
matthewhall115 | 0:2c721947a97e | 8 | 20161011 J Bradshaw - Changed MAX1270 ADC SCLK to 5MHz and format(12, 0) |
matthewhall115 | 0:2c721947a97e | 9 | for conversion mode to match datasheet (200ns SCLK max PW high and low) |
matthewhall115 | 0:2c721947a97e | 10 | */ |
matthewhall115 | 0:2c721947a97e | 11 | |
matthewhall115 | 0:2c721947a97e | 12 | |
matthewhall115 | 0:2c721947a97e | 13 | // LS7366 ENCODER IC DEFINITIONS |
matthewhall115 | 0:2c721947a97e | 14 | //============================================================================= |
matthewhall115 | 0:2c721947a97e | 15 | // Four commands for the Instruction Register (B7,B6) - LS7366 |
matthewhall115 | 0:2c721947a97e | 16 | //============================================================================= |
matthewhall115 | 0:2c721947a97e | 17 | #define CLR 0x00 //Clear Instruction |
matthewhall115 | 0:2c721947a97e | 18 | #define RD 0x01 //Read Instruction |
matthewhall115 | 0:2c721947a97e | 19 | #define WR 0x02 //Write Instruction |
matthewhall115 | 0:2c721947a97e | 20 | #define LOAD 0x03 //Load Instruction |
matthewhall115 | 0:2c721947a97e | 21 | |
matthewhall115 | 0:2c721947a97e | 22 | //============================================================================= |
matthewhall115 | 0:2c721947a97e | 23 | // Register to Select from the Instruction Register (B5,B4,B3) - LS7366 |
matthewhall115 | 0:2c721947a97e | 24 | //============================================================================= |
matthewhall115 | 0:2c721947a97e | 25 | #define NONE 0x00 //No Register Selected |
matthewhall115 | 0:2c721947a97e | 26 | #define MDR0 0x01 //Mode Register 0 |
matthewhall115 | 0:2c721947a97e | 27 | #define MDR1 0x02 //Mode Register 1 |
matthewhall115 | 0:2c721947a97e | 28 | #define DTR 0x03 //Data Transfer Register |
matthewhall115 | 0:2c721947a97e | 29 | #define CNTR 0x04 //Software Configurable Counter Register |
matthewhall115 | 0:2c721947a97e | 30 | #define OTR 0x05 //Output Transfer Register |
matthewhall115 | 0:2c721947a97e | 31 | #define STR 0x06 //Status Register |
matthewhall115 | 0:2c721947a97e | 32 | #define NONE_REG 0x07 //No Register Selected |
matthewhall115 | 0:2c721947a97e | 33 | |
matthewhall115 | 0:2c721947a97e | 34 | // Set-up hardwired IO |
matthewhall115 | 0:2c721947a97e | 35 | SPI spi_max1270(p5, p6, p7); |
matthewhall115 | 0:2c721947a97e | 36 | SPI spi(p5, p6, p7); |
matthewhall115 | 0:2c721947a97e | 37 | DigitalOut max1270_cs(p8, 1); //CS for MAX1270 ADC (U3) |
matthewhall115 | 0:2c721947a97e | 38 | DigitalOut max522_cs(p11, 1); //CS for MAX522 DAC (U5) |
matthewhall115 | 0:2c721947a97e | 39 | |
matthewhall115 | 0:2c721947a97e | 40 | DigitalOut ls7166_cs1(p19, 1); //CS for LS7366-1 (U8) |
matthewhall115 | 0:2c721947a97e | 41 | DigitalOut ls7166_cs2(p20, 1); //CS for LS7366-2 (U9) |
matthewhall115 | 0:2c721947a97e | 42 | |
matthewhall115 | 0:2c721947a97e | 43 | DigitalOut mot1_ph1(p21, 0); |
matthewhall115 | 0:2c721947a97e | 44 | DigitalOut mot1_ph2(p22, 0); |
matthewhall115 | 0:2c721947a97e | 45 | PwmOut mot_en1(p23); |
matthewhall115 | 0:2c721947a97e | 46 | |
matthewhall115 | 0:2c721947a97e | 47 | DigitalOut mot2_ph1(p24, 0); |
matthewhall115 | 0:2c721947a97e | 48 | DigitalOut mot2_ph2(p25, 0); |
matthewhall115 | 0:2c721947a97e | 49 | PwmOut mot_en2(p26); |
matthewhall115 | 0:2c721947a97e | 50 | |
matthewhall115 | 0:2c721947a97e | 51 | DigitalOut led1(LED1, 0); |
matthewhall115 | 0:2c721947a97e | 52 | DigitalOut led2(LED2, 0); |
matthewhall115 | 0:2c721947a97e | 53 | DigitalOut led3(LED3, 0); |
matthewhall115 | 0:2c721947a97e | 54 | DigitalOut led4(LED4, 0); |
matthewhall115 | 0:2c721947a97e | 55 | |
matthewhall115 | 0:2c721947a97e | 56 | Serial pc(USBTX, USBRX); // tx, rx for serial USB interface to pc |
matthewhall115 | 0:2c721947a97e | 57 | Serial xbee(p13, p14); // tx, rx for Xbee |
matthewhall115 | 0:2c721947a97e | 58 | Timer t; // create timer instance |
matthewhall115 | 0:2c721947a97e | 59 | |
matthewhall115 | 0:2c721947a97e | 60 | // ------ Prototypes ----------- |
matthewhall115 | 0:2c721947a97e | 61 | int read_max1270(int chan, int range, int bipol); |
matthewhall115 | 0:2c721947a97e | 62 | float read_max1270_volts(int chan, int range, int bipol); |
matthewhall115 | 0:2c721947a97e | 63 | void mot_control(int drv_num, float dc); |
matthewhall115 | 0:2c721947a97e | 64 | void LS7366_cmd(int inst, int reg); |
matthewhall115 | 0:2c721947a97e | 65 | long LS7366_read_counter(int chan_num); |
matthewhall115 | 0:2c721947a97e | 66 | void LS7366_quad_mode_x4(int chan_num); |
matthewhall115 | 0:2c721947a97e | 67 | void LS7366_reset_counter(int chan_num); |
matthewhall115 | 0:2c721947a97e | 68 | void LS7366_write_DTR(int chan_num,long enc_value); |
matthewhall115 | 0:2c721947a97e | 69 | void write_max522(int chan, float volts); |
matthewhall115 | 0:2c721947a97e | 70 | |
matthewhall115 | 0:2c721947a97e | 71 | //---- Function Listing ------------------------------- |
matthewhall115 | 0:2c721947a97e | 72 | int read_max1270(int chan, int range, int bipol){ |
matthewhall115 | 0:2c721947a97e | 73 | int cword=0x80; //set the start bit |
matthewhall115 | 0:2c721947a97e | 74 | |
matthewhall115 | 0:2c721947a97e | 75 | spi_max1270.frequency(5000000); //5MHz Max |
matthewhall115 | 0:2c721947a97e | 76 | spi_max1270.format(8, 0); // 8 data bits, CPOL0, and CPHA0 (datasheet Digital Interface) |
matthewhall115 | 0:2c721947a97e | 77 | |
matthewhall115 | 0:2c721947a97e | 78 | cword |= (chan << 4); //shift channel |
matthewhall115 | 0:2c721947a97e | 79 | cword |= (range << 3); |
matthewhall115 | 0:2c721947a97e | 80 | cword |= (bipol << 2); |
matthewhall115 | 0:2c721947a97e | 81 | |
matthewhall115 | 0:2c721947a97e | 82 | max1270_cs = 0; |
matthewhall115 | 0:2c721947a97e | 83 | |
matthewhall115 | 0:2c721947a97e | 84 | spi_max1270.write(cword); |
matthewhall115 | 0:2c721947a97e | 85 | wait_us(15); //15us |
matthewhall115 | 0:2c721947a97e | 86 | spi_max1270.format(12, 0); |
matthewhall115 | 0:2c721947a97e | 87 | |
matthewhall115 | 0:2c721947a97e | 88 | int result = spi_max1270.write(0); |
matthewhall115 | 0:2c721947a97e | 89 | |
matthewhall115 | 0:2c721947a97e | 90 | max1270_cs = 1; |
matthewhall115 | 0:2c721947a97e | 91 | spi_max1270.format(8, 0); |
matthewhall115 | 0:2c721947a97e | 92 | return result; |
matthewhall115 | 0:2c721947a97e | 93 | } |
matthewhall115 | 0:2c721947a97e | 94 | |
matthewhall115 | 0:2c721947a97e | 95 | float read_max1270_volts(int chan, int range, int bipol){ |
matthewhall115 | 0:2c721947a97e | 96 | float rangevolts=0.0; |
matthewhall115 | 0:2c721947a97e | 97 | float volts=0.0; |
matthewhall115 | 0:2c721947a97e | 98 | int adc_res; |
matthewhall115 | 0:2c721947a97e | 99 | |
matthewhall115 | 0:2c721947a97e | 100 | //read the ADC converter |
matthewhall115 | 0:2c721947a97e | 101 | adc_res = read_max1270(chan, range, bipol) & 0xFFF; |
matthewhall115 | 0:2c721947a97e | 102 | |
matthewhall115 | 0:2c721947a97e | 103 | //Determine the voltage range |
matthewhall115 | 0:2c721947a97e | 104 | if(range) //RNG bit |
matthewhall115 | 0:2c721947a97e | 105 | rangevolts=10.0; |
matthewhall115 | 0:2c721947a97e | 106 | else |
matthewhall115 | 0:2c721947a97e | 107 | rangevolts=5.0; |
matthewhall115 | 0:2c721947a97e | 108 | |
matthewhall115 | 0:2c721947a97e | 109 | //bi-polar input range |
matthewhall115 | 0:2c721947a97e | 110 | if(bipol){ //BIP is set, input is +/- |
matthewhall115 | 0:2c721947a97e | 111 | if(adc_res < 0x800){ //if result was positive |
matthewhall115 | 0:2c721947a97e | 112 | volts = ((float)adc_res/0x7FF) * rangevolts; |
matthewhall115 | 0:2c721947a97e | 113 | } |
matthewhall115 | 0:2c721947a97e | 114 | else{ //result was negative |
matthewhall115 | 0:2c721947a97e | 115 | volts = -(-((float)adc_res/0x7FF) * rangevolts) - (rangevolts * 2.0); |
matthewhall115 | 0:2c721947a97e | 116 | } |
matthewhall115 | 0:2c721947a97e | 117 | } |
matthewhall115 | 0:2c721947a97e | 118 | else{ //input is positive polarity only |
matthewhall115 | 0:2c721947a97e | 119 | volts = ((float)adc_res/0xFFF) * rangevolts; |
matthewhall115 | 0:2c721947a97e | 120 | } |
matthewhall115 | 0:2c721947a97e | 121 | |
matthewhall115 | 0:2c721947a97e | 122 | return volts; |
matthewhall115 | 0:2c721947a97e | 123 | } |
matthewhall115 | 0:2c721947a97e | 124 | |
matthewhall115 | 0:2c721947a97e | 125 | //Motor control routine for PWM on 5 pin motor driver header |
matthewhall115 | 0:2c721947a97e | 126 | // drv_num is 1 or 2 (defaults to 1, anything but 2) |
matthewhall115 | 0:2c721947a97e | 127 | // dc is signed duty cycle (+/-1.0) |
matthewhall115 | 0:2c721947a97e | 128 | |
matthewhall115 | 0:2c721947a97e | 129 | void mot_control(int drv_num, float dc){ |
matthewhall115 | 0:2c721947a97e | 130 | if(dc>1.0) |
matthewhall115 | 0:2c721947a97e | 131 | dc=1.0; |
matthewhall115 | 0:2c721947a97e | 132 | if(dc<-1.0) |
matthewhall115 | 0:2c721947a97e | 133 | dc=-1.0; |
matthewhall115 | 0:2c721947a97e | 134 | |
matthewhall115 | 0:2c721947a97e | 135 | if(drv_num != 2){ |
matthewhall115 | 0:2c721947a97e | 136 | if(dc > 0.0){ |
matthewhall115 | 0:2c721947a97e | 137 | mot1_ph2 = 0; |
matthewhall115 | 0:2c721947a97e | 138 | mot1_ph1 = 1; |
matthewhall115 | 0:2c721947a97e | 139 | mot_en1 = dc; |
matthewhall115 | 0:2c721947a97e | 140 | } |
matthewhall115 | 0:2c721947a97e | 141 | else if(dc < -0.0){ |
matthewhall115 | 0:2c721947a97e | 142 | mot1_ph1 = 0; |
matthewhall115 | 0:2c721947a97e | 143 | mot1_ph2 = 1; |
matthewhall115 | 0:2c721947a97e | 144 | mot_en1 = abs(dc); |
matthewhall115 | 0:2c721947a97e | 145 | } |
matthewhall115 | 0:2c721947a97e | 146 | else{ |
matthewhall115 | 0:2c721947a97e | 147 | mot1_ph1 = 0; |
matthewhall115 | 0:2c721947a97e | 148 | mot1_ph2 = 0; |
matthewhall115 | 0:2c721947a97e | 149 | mot_en1 = 0.0; |
matthewhall115 | 0:2c721947a97e | 150 | } |
matthewhall115 | 0:2c721947a97e | 151 | } |
matthewhall115 | 0:2c721947a97e | 152 | else{ |
matthewhall115 | 0:2c721947a97e | 153 | if(dc > 0.0){ |
matthewhall115 | 0:2c721947a97e | 154 | mot2_ph2 = 0; |
matthewhall115 | 0:2c721947a97e | 155 | mot2_ph1 = 1; |
matthewhall115 | 0:2c721947a97e | 156 | mot_en2 = dc; |
matthewhall115 | 0:2c721947a97e | 157 | } |
matthewhall115 | 0:2c721947a97e | 158 | else if(dc < -0.0){ |
matthewhall115 | 0:2c721947a97e | 159 | mot2_ph1 = 0; |
matthewhall115 | 0:2c721947a97e | 160 | mot2_ph2 = 1; |
matthewhall115 | 0:2c721947a97e | 161 | mot_en2 = abs(dc); |
matthewhall115 | 0:2c721947a97e | 162 | } |
matthewhall115 | 0:2c721947a97e | 163 | else{ |
matthewhall115 | 0:2c721947a97e | 164 | mot2_ph1 = 0; |
matthewhall115 | 0:2c721947a97e | 165 | mot2_ph2 = 0; |
matthewhall115 | 0:2c721947a97e | 166 | mot_en2 = 0.0; |
matthewhall115 | 0:2c721947a97e | 167 | } |
matthewhall115 | 0:2c721947a97e | 168 | } |
matthewhall115 | 0:2c721947a97e | 169 | } |
matthewhall115 | 0:2c721947a97e | 170 | |
matthewhall115 | 0:2c721947a97e | 171 | //----- LS7366 Encoder/Counter Routines -------------------- |
matthewhall115 | 0:2c721947a97e | 172 | void LS7366_cmd(int inst, int reg){ |
matthewhall115 | 0:2c721947a97e | 173 | char cmd; |
matthewhall115 | 0:2c721947a97e | 174 | |
matthewhall115 | 0:2c721947a97e | 175 | spi.format(8, 0); |
matthewhall115 | 0:2c721947a97e | 176 | spi.frequency(2000000); |
matthewhall115 | 0:2c721947a97e | 177 | cmd = (inst << 6) | (reg << 3); |
matthewhall115 | 0:2c721947a97e | 178 | // printf("\r\ncmd=0X%2X", cmd); |
matthewhall115 | 0:2c721947a97e | 179 | spi.write(cmd); |
matthewhall115 | 0:2c721947a97e | 180 | } |
matthewhall115 | 0:2c721947a97e | 181 | |
matthewhall115 | 0:2c721947a97e | 182 | long LS7366_read_counter(int chan_num){ |
matthewhall115 | 0:2c721947a97e | 183 | union bytes{ |
matthewhall115 | 0:2c721947a97e | 184 | char byte_enc[4]; |
matthewhall115 | 0:2c721947a97e | 185 | long long_enc; |
matthewhall115 | 0:2c721947a97e | 186 | }counter; |
matthewhall115 | 0:2c721947a97e | 187 | |
matthewhall115 | 0:2c721947a97e | 188 | counter.long_enc = 0; |
matthewhall115 | 0:2c721947a97e | 189 | |
matthewhall115 | 0:2c721947a97e | 190 | spi.format(8, 0); |
matthewhall115 | 0:2c721947a97e | 191 | spi.frequency(2000000); |
matthewhall115 | 0:2c721947a97e | 192 | |
matthewhall115 | 0:2c721947a97e | 193 | if(chan_num!=2){ |
matthewhall115 | 0:2c721947a97e | 194 | ls7166_cs1 = 0; |
matthewhall115 | 0:2c721947a97e | 195 | wait_us(1); |
matthewhall115 | 0:2c721947a97e | 196 | LS7366_cmd(LOAD,OTR);//cmd = 0xe8, LOAD to OTR |
matthewhall115 | 0:2c721947a97e | 197 | ls7166_cs1 = 1; |
matthewhall115 | 0:2c721947a97e | 198 | wait_us(1); |
matthewhall115 | 0:2c721947a97e | 199 | ls7166_cs1 = 0; |
matthewhall115 | 0:2c721947a97e | 200 | } |
matthewhall115 | 0:2c721947a97e | 201 | else{ |
matthewhall115 | 0:2c721947a97e | 202 | ls7166_cs2 = 0; |
matthewhall115 | 0:2c721947a97e | 203 | wait_us(1); |
matthewhall115 | 0:2c721947a97e | 204 | LS7366_cmd(LOAD,OTR);//cmd = 0xe8, LOAD to OTR |
matthewhall115 | 0:2c721947a97e | 205 | ls7166_cs2 = 1; |
matthewhall115 | 0:2c721947a97e | 206 | wait_us(1); |
matthewhall115 | 0:2c721947a97e | 207 | |
matthewhall115 | 0:2c721947a97e | 208 | ls7166_cs2 = 0; |
matthewhall115 | 0:2c721947a97e | 209 | } |
matthewhall115 | 0:2c721947a97e | 210 | wait_us(1); |
matthewhall115 | 0:2c721947a97e | 211 | LS7366_cmd(RD,CNTR); //cmd = 0x60, READ from CNTR |
matthewhall115 | 0:2c721947a97e | 212 | counter.byte_enc[3] = spi.write(0x00); |
matthewhall115 | 0:2c721947a97e | 213 | counter.byte_enc[2] = spi.write(0x00); |
matthewhall115 | 0:2c721947a97e | 214 | counter.byte_enc[1] = spi.write(0x00); |
matthewhall115 | 0:2c721947a97e | 215 | counter.byte_enc[0] = spi.write(0x00); |
matthewhall115 | 0:2c721947a97e | 216 | |
matthewhall115 | 0:2c721947a97e | 217 | if(chan_num!=2){ |
matthewhall115 | 0:2c721947a97e | 218 | ls7166_cs1 = 1; |
matthewhall115 | 0:2c721947a97e | 219 | } |
matthewhall115 | 0:2c721947a97e | 220 | else{ |
matthewhall115 | 0:2c721947a97e | 221 | ls7166_cs2 = 1; |
matthewhall115 | 0:2c721947a97e | 222 | } |
matthewhall115 | 0:2c721947a97e | 223 | |
matthewhall115 | 0:2c721947a97e | 224 | return counter.long_enc; //return count |
matthewhall115 | 0:2c721947a97e | 225 | } |
matthewhall115 | 0:2c721947a97e | 226 | |
matthewhall115 | 0:2c721947a97e | 227 | void LS7366_quad_mode_x4(int chan_num){ |
matthewhall115 | 0:2c721947a97e | 228 | |
matthewhall115 | 0:2c721947a97e | 229 | spi.format(8, 0); |
matthewhall115 | 0:2c721947a97e | 230 | spi.frequency(2000000); |
matthewhall115 | 0:2c721947a97e | 231 | |
matthewhall115 | 0:2c721947a97e | 232 | if(chan_num!=2){ |
matthewhall115 | 0:2c721947a97e | 233 | ls7166_cs1 = 0; |
matthewhall115 | 0:2c721947a97e | 234 | } |
matthewhall115 | 0:2c721947a97e | 235 | else{ |
matthewhall115 | 0:2c721947a97e | 236 | ls7166_cs2 = 0; |
matthewhall115 | 0:2c721947a97e | 237 | } |
matthewhall115 | 0:2c721947a97e | 238 | wait_us(1); |
matthewhall115 | 0:2c721947a97e | 239 | LS7366_cmd(WR,MDR0);// Write to the MDR0 register |
matthewhall115 | 0:2c721947a97e | 240 | wait_us(1); |
matthewhall115 | 0:2c721947a97e | 241 | spi.write(0x03); // X4 quadrature count mode |
matthewhall115 | 0:2c721947a97e | 242 | if(chan_num!=2){ |
matthewhall115 | 0:2c721947a97e | 243 | ls7166_cs1 = 1; |
matthewhall115 | 0:2c721947a97e | 244 | } |
matthewhall115 | 0:2c721947a97e | 245 | else{ |
matthewhall115 | 0:2c721947a97e | 246 | ls7166_cs2 = 1; |
matthewhall115 | 0:2c721947a97e | 247 | } |
matthewhall115 | 0:2c721947a97e | 248 | } |
matthewhall115 | 0:2c721947a97e | 249 | |
matthewhall115 | 0:2c721947a97e | 250 | void LS7366_reset_counter(int chan_num){ |
matthewhall115 | 0:2c721947a97e | 251 | spi.format(8, 0); // set up SPI for 8 data bits, mode 0 |
matthewhall115 | 0:2c721947a97e | 252 | spi.frequency(2000000); // 2MHz SPI clock |
matthewhall115 | 0:2c721947a97e | 253 | |
matthewhall115 | 0:2c721947a97e | 254 | if(chan_num!=2){ // activate chip select |
matthewhall115 | 0:2c721947a97e | 255 | ls7166_cs1 = 0; |
matthewhall115 | 0:2c721947a97e | 256 | } |
matthewhall115 | 0:2c721947a97e | 257 | else{ |
matthewhall115 | 0:2c721947a97e | 258 | ls7166_cs2 = 0; |
matthewhall115 | 0:2c721947a97e | 259 | } |
matthewhall115 | 0:2c721947a97e | 260 | wait_us(1); // short delay |
matthewhall115 | 0:2c721947a97e | 261 | LS7366_cmd(CLR,CNTR); // Clear the counter register |
matthewhall115 | 0:2c721947a97e | 262 | if(chan_num!=2){ // de-activate chip select |
matthewhall115 | 0:2c721947a97e | 263 | ls7166_cs1 = 1; |
matthewhall115 | 0:2c721947a97e | 264 | } |
matthewhall115 | 0:2c721947a97e | 265 | else{ |
matthewhall115 | 0:2c721947a97e | 266 | ls7166_cs2 = 1; |
matthewhall115 | 0:2c721947a97e | 267 | } |
matthewhall115 | 0:2c721947a97e | 268 | wait_us(1); // short delay |
matthewhall115 | 0:2c721947a97e | 269 | |
matthewhall115 | 0:2c721947a97e | 270 | if(chan_num!=2){ // activate chip select |
matthewhall115 | 0:2c721947a97e | 271 | ls7166_cs1 = 0; |
matthewhall115 | 0:2c721947a97e | 272 | } |
matthewhall115 | 0:2c721947a97e | 273 | else{ |
matthewhall115 | 0:2c721947a97e | 274 | ls7166_cs2 = 0; |
matthewhall115 | 0:2c721947a97e | 275 | } |
matthewhall115 | 0:2c721947a97e | 276 | wait_us(1); // short delay |
matthewhall115 | 0:2c721947a97e | 277 | LS7366_cmd(LOAD,CNTR); // load counter reg |
matthewhall115 | 0:2c721947a97e | 278 | if(chan_num!=2){ // de-activate chip select |
matthewhall115 | 0:2c721947a97e | 279 | ls7166_cs1 = 1; |
matthewhall115 | 0:2c721947a97e | 280 | } |
matthewhall115 | 0:2c721947a97e | 281 | else{ |
matthewhall115 | 0:2c721947a97e | 282 | ls7166_cs2 = 1; |
matthewhall115 | 0:2c721947a97e | 283 | } |
matthewhall115 | 0:2c721947a97e | 284 | } |
matthewhall115 | 0:2c721947a97e | 285 | |
matthewhall115 | 0:2c721947a97e | 286 | void LS7366_write_DTR(int chan_num, long enc_value){ |
matthewhall115 | 0:2c721947a97e | 287 | union bytes // Union to speed up byte writes |
matthewhall115 | 0:2c721947a97e | 288 | { |
matthewhall115 | 0:2c721947a97e | 289 | char byte_enc[4]; |
matthewhall115 | 0:2c721947a97e | 290 | long long_enc; |
matthewhall115 | 0:2c721947a97e | 291 | }counter; |
matthewhall115 | 0:2c721947a97e | 292 | |
matthewhall115 | 0:2c721947a97e | 293 | spi.format(8, 0); // set up SPI for 8 data bits, mode 0 |
matthewhall115 | 0:2c721947a97e | 294 | spi.frequency(2000000); // 2MHz SPI clock |
matthewhall115 | 0:2c721947a97e | 295 | |
matthewhall115 | 0:2c721947a97e | 296 | counter.long_enc = enc_value; // pass enc_value to Union |
matthewhall115 | 0:2c721947a97e | 297 | |
matthewhall115 | 0:2c721947a97e | 298 | if(chan_num!=2){ // activate chip select |
matthewhall115 | 0:2c721947a97e | 299 | ls7166_cs1 = 0; |
matthewhall115 | 0:2c721947a97e | 300 | } |
matthewhall115 | 0:2c721947a97e | 301 | else{ |
matthewhall115 | 0:2c721947a97e | 302 | ls7166_cs2 = 0; |
matthewhall115 | 0:2c721947a97e | 303 | } |
matthewhall115 | 0:2c721947a97e | 304 | wait_us(1); // short delay |
matthewhall115 | 0:2c721947a97e | 305 | LS7366_cmd(WR,DTR); // Write to the Data Transfer Register |
matthewhall115 | 0:2c721947a97e | 306 | spi.write(counter.byte_enc[3]); // Write the 32-bit encoder value |
matthewhall115 | 0:2c721947a97e | 307 | spi.write(counter.byte_enc[2]); |
matthewhall115 | 0:2c721947a97e | 308 | spi.write(counter.byte_enc[1]); |
matthewhall115 | 0:2c721947a97e | 309 | spi.write(counter.byte_enc[0]); |
matthewhall115 | 0:2c721947a97e | 310 | if(chan_num!=2){ // de-activate the chip select |
matthewhall115 | 0:2c721947a97e | 311 | ls7166_cs1 = 1; |
matthewhall115 | 0:2c721947a97e | 312 | } |
matthewhall115 | 0:2c721947a97e | 313 | else{ |
matthewhall115 | 0:2c721947a97e | 314 | ls7166_cs2 = 1; |
matthewhall115 | 0:2c721947a97e | 315 | } |
matthewhall115 | 0:2c721947a97e | 316 | |
matthewhall115 | 0:2c721947a97e | 317 | wait_us(1); // short delay |
matthewhall115 | 0:2c721947a97e | 318 | if(chan_num!=2){ // activate chip select |
matthewhall115 | 0:2c721947a97e | 319 | ls7166_cs1 = 0; |
matthewhall115 | 0:2c721947a97e | 320 | } |
matthewhall115 | 0:2c721947a97e | 321 | else{ |
matthewhall115 | 0:2c721947a97e | 322 | ls7166_cs2 = 0; |
matthewhall115 | 0:2c721947a97e | 323 | } |
matthewhall115 | 0:2c721947a97e | 324 | wait_us(1); // short delay |
matthewhall115 | 0:2c721947a97e | 325 | LS7366_cmd(LOAD,CNTR); // load command to the counter register from DTR |
matthewhall115 | 0:2c721947a97e | 326 | if(chan_num!=2){ // de-activate chip select |
matthewhall115 | 0:2c721947a97e | 327 | ls7166_cs1 = 1; |
matthewhall115 | 0:2c721947a97e | 328 | } |
matthewhall115 | 0:2c721947a97e | 329 | else{ |
matthewhall115 | 0:2c721947a97e | 330 | ls7166_cs2 = 1; |
matthewhall115 | 0:2c721947a97e | 331 | } |
matthewhall115 | 0:2c721947a97e | 332 | } |
matthewhall115 | 0:2c721947a97e | 333 | |
matthewhall115 | 0:2c721947a97e | 334 | //------- MAX522 routines --------------------------------- |
matthewhall115 | 0:2c721947a97e | 335 | void write_max522(int chan, float volts){ |
matthewhall115 | 0:2c721947a97e | 336 | int cmd=0x20; //set UB3 |
matthewhall115 | 0:2c721947a97e | 337 | int data_word = (int)((volts/5.0) * 256.0); |
matthewhall115 | 0:2c721947a97e | 338 | if(chan != 2) |
matthewhall115 | 0:2c721947a97e | 339 | cmd |= 0x01; //set DAC A out |
matthewhall115 | 0:2c721947a97e | 340 | else |
matthewhall115 | 0:2c721947a97e | 341 | cmd |= 0x02; //set DACB out |
matthewhall115 | 0:2c721947a97e | 342 | |
matthewhall115 | 0:2c721947a97e | 343 | // pc.printf("cmd=0x%4X data_word=0x%4X \r\n", cmd, data_word); |
matthewhall115 | 0:2c721947a97e | 344 | |
matthewhall115 | 0:2c721947a97e | 345 | spi.format(8, 0); |
matthewhall115 | 0:2c721947a97e | 346 | spi.frequency(2000000); |
matthewhall115 | 0:2c721947a97e | 347 | max522_cs = 0; |
matthewhall115 | 0:2c721947a97e | 348 | spi.write(cmd & 0xFF); |
matthewhall115 | 0:2c721947a97e | 349 | spi.write(data_word & 0xFF); |
matthewhall115 | 0:2c721947a97e | 350 | max522_cs = 1; |
matthewhall115 | 0:2c721947a97e | 351 | } |
matthewhall115 | 0:2c721947a97e | 352 | |
matthewhall115 | 0:2c721947a97e | 353 | void mbedWSEsbcInit(unsigned long pcbaud){ |
matthewhall115 | 0:2c721947a97e | 354 | led1 = 0; //Initialize all LEDs as off |
matthewhall115 | 0:2c721947a97e | 355 | led2 = 0; |
matthewhall115 | 0:2c721947a97e | 356 | led3 = 0; |
matthewhall115 | 0:2c721947a97e | 357 | led4 = 0; |
matthewhall115 | 0:2c721947a97e | 358 | max1270_cs = 1; //Initialize all chip selects as off |
matthewhall115 | 0:2c721947a97e | 359 | max522_cs = 1; |
matthewhall115 | 0:2c721947a97e | 360 | ls7166_cs1 = 1; |
matthewhall115 | 0:2c721947a97e | 361 | ls7166_cs2 = 1; |
matthewhall115 | 0:2c721947a97e | 362 | |
matthewhall115 | 0:2c721947a97e | 363 | wait(.2); //delay at beginning for voltage settle purposes |
matthewhall115 | 0:2c721947a97e | 364 | |
matthewhall115 | 0:2c721947a97e | 365 | mot_en1.period_us(50); //20KHz for DC motor control PWM |
matthewhall115 | 0:2c721947a97e | 366 | pc.baud(pcbaud); //Set up serial port baud rate |
matthewhall115 | 0:2c721947a97e | 367 | pc.printf("\r\n"); |
matthewhall115 | 0:2c721947a97e | 368 | xbee.baud(9600); |
matthewhall115 | 0:2c721947a97e | 369 | |
matthewhall115 | 0:2c721947a97e | 370 | LS7366_reset_counter(1); |
matthewhall115 | 0:2c721947a97e | 371 | LS7366_quad_mode_x4(1); |
matthewhall115 | 0:2c721947a97e | 372 | LS7366_write_DTR(1,0); |
matthewhall115 | 0:2c721947a97e | 373 | |
matthewhall115 | 0:2c721947a97e | 374 | LS7366_reset_counter(2); |
matthewhall115 | 0:2c721947a97e | 375 | LS7366_quad_mode_x4(2); |
matthewhall115 | 0:2c721947a97e | 376 | LS7366_write_DTR(2,0); |
matthewhall115 | 0:2c721947a97e | 377 | |
matthewhall115 | 0:2c721947a97e | 378 | t.start(); // Set up timer |
matthewhall115 | 0:2c721947a97e | 379 | }//mbedWSEsbc_init() |