Martin Werluschnig / Mbed 2 deprecated Diplomarbeit_MW_CW

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Dependencies:   mbed

mbed/PeripheralNames.h@0:afeca64a6543, 2018-10-17 (annotated)

Committer:
martwerl
Date:
Wed Oct 17 17:19:45 2018 +0000
Revision:
0:afeca64a6543
Diplomarbeit_MW_CW

Who changed what in which revision?

UserRevisionLine numberNew contents of line
martwerl 0:afeca64a6543 1 /* mbed Microcontroller Library
martwerl 0:afeca64a6543 2 * Copyright (c) 2006-2013 ARM Limited
martwerl 0:afeca64a6543 3 *
martwerl 0:afeca64a6543 4 * Permission is hereby granted, free of charge, to any person obtaining a copy
martwerl 0:afeca64a6543 5 * of this software and associated documentation files (the "Software"), to deal
martwerl 0:afeca64a6543 6 * in the Software without restriction, including without limitation the rights
martwerl 0:afeca64a6543 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
martwerl 0:afeca64a6543 8 * copies of the Software, and to permit persons to whom the Software is
martwerl 0:afeca64a6543 9 * furnished to do so, subject to the following conditions:
martwerl 0:afeca64a6543 10 *
martwerl 0:afeca64a6543 11 * The above copyright notice and this permission notice shall be included in
martwerl 0:afeca64a6543 12 * all copies or substantial portions of the Software.
martwerl 0:afeca64a6543 13 *
martwerl 0:afeca64a6543 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
martwerl 0:afeca64a6543 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
martwerl 0:afeca64a6543 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
martwerl 0:afeca64a6543 17 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
martwerl 0:afeca64a6543 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
martwerl 0:afeca64a6543 19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
martwerl 0:afeca64a6543 20 * SOFTWARE.
martwerl 0:afeca64a6543 21 */
martwerl 0:afeca64a6543 22 #ifndef MBED_PERIPHERALNAMES_H
martwerl 0:afeca64a6543 23 #define MBED_PERIPHERALNAMES_H
martwerl 0:afeca64a6543 24
martwerl 0:afeca64a6543 25 #include "cmsis.h"
martwerl 0:afeca64a6543 26
martwerl 0:afeca64a6543 27 #ifdef __cplusplus
martwerl 0:afeca64a6543 28 extern "C" {
martwerl 0:afeca64a6543 29 #endif
martwerl 0:afeca64a6543 30
martwerl 0:afeca64a6543 31 typedef enum {
martwerl 0:afeca64a6543 32 UART_0 = (int)LPC_UART0_BASE,
martwerl 0:afeca64a6543 33 UART_1 = (int)LPC_UART1_BASE,
martwerl 0:afeca64a6543 34 UART_2 = (int)LPC_UART2_BASE,
martwerl 0:afeca64a6543 35 UART_3 = (int)LPC_UART3_BASE
martwerl 0:afeca64a6543 36 } UARTName;
martwerl 0:afeca64a6543 37
martwerl 0:afeca64a6543 38 typedef enum {
martwerl 0:afeca64a6543 39 ADC0_0 = 0,
martwerl 0:afeca64a6543 40 ADC0_1,
martwerl 0:afeca64a6543 41 ADC0_2,
martwerl 0:afeca64a6543 42 ADC0_3,
martwerl 0:afeca64a6543 43 ADC0_4,
martwerl 0:afeca64a6543 44 ADC0_5,
martwerl 0:afeca64a6543 45 ADC0_6,
martwerl 0:afeca64a6543 46 ADC0_7
martwerl 0:afeca64a6543 47 } ADCName;
martwerl 0:afeca64a6543 48
martwerl 0:afeca64a6543 49 typedef enum {
martwerl 0:afeca64a6543 50 DAC_0 = 0
martwerl 0:afeca64a6543 51 } DACName;
martwerl 0:afeca64a6543 52
martwerl 0:afeca64a6543 53 typedef enum {
martwerl 0:afeca64a6543 54 SPI_0 = (int)LPC_SSP0_BASE,
martwerl 0:afeca64a6543 55 SPI_1 = (int)LPC_SSP1_BASE
martwerl 0:afeca64a6543 56 } SPIName;
martwerl 0:afeca64a6543 57
martwerl 0:afeca64a6543 58 typedef enum {
martwerl 0:afeca64a6543 59 I2C_0 = (int)LPC_I2C0_BASE,
martwerl 0:afeca64a6543 60 I2C_1 = (int)LPC_I2C1_BASE,
martwerl 0:afeca64a6543 61 I2C_2 = (int)LPC_I2C2_BASE
martwerl 0:afeca64a6543 62 } I2CName;
martwerl 0:afeca64a6543 63
martwerl 0:afeca64a6543 64 typedef enum {
martwerl 0:afeca64a6543 65 PWM_1 = 1,
martwerl 0:afeca64a6543 66 PWM_2,
martwerl 0:afeca64a6543 67 PWM_3,
martwerl 0:afeca64a6543 68 PWM_4,
martwerl 0:afeca64a6543 69 PWM_5,
martwerl 0:afeca64a6543 70 PWM_6
martwerl 0:afeca64a6543 71 } PWMName;
martwerl 0:afeca64a6543 72
martwerl 0:afeca64a6543 73 typedef enum {
martwerl 0:afeca64a6543 74 CAN_1 = (int)LPC_CAN1_BASE,
martwerl 0:afeca64a6543 75 CAN_2 = (int)LPC_CAN2_BASE
martwerl 0:afeca64a6543 76 } CANName;
martwerl 0:afeca64a6543 77
martwerl 0:afeca64a6543 78 #define STDIO_UART_TX USBTX
martwerl 0:afeca64a6543 79 #define STDIO_UART_RX USBRX
martwerl 0:afeca64a6543 80 #define STDIO_UART UART_0
martwerl 0:afeca64a6543 81
martwerl 0:afeca64a6543 82 #ifdef __cplusplus
martwerl 0:afeca64a6543 83 }
martwerl 0:afeca64a6543 84 #endif
martwerl 0:afeca64a6543 85
martwerl 0:afeca64a6543 86 #endif
martwerl 0:afeca64a6543 87