Marten Lootsma / SX1276Lib

Fork for adding SAM L21 Xplained Pro support

Fork of SX1276Lib by Semtech

sx1276/sx1276-hal.cpp@27:413f611964fc, 2017-05-16 (annotated)

Committer:
martinichka
Date:
Tue May 16 12:08:24 2017 +0000
Revision:
27:413f611964fc
Parent:
26:d09a8ef807e2 
Added pinning for SAM L21 Xplained Pro

Who changed what in which revision?

UserRevisionLine numberNew contents of line
GregCr 0:e6ceb13d2d05 1 /*
GregCr 0:e6ceb13d2d05 2 / _____) _ | |
GregCr 0:e6ceb13d2d05 3 ( (____ _____ ____ _| |_ _____ ____| |__
GregCr 0:e6ceb13d2d05 4 \____ \| ___ | (_ _) ___ |/ ___) _ \
GregCr 0:e6ceb13d2d05 5 _____) ) ____| | | || |_| ____( (___| | | |
GregCr 0:e6ceb13d2d05 6 (______/|_____)_|_|_| \__)_____)\____)_| |_|
mluis 22:7f3aab69cca9 7 (C) 2014 Semtech
GregCr 0:e6ceb13d2d05 8
GregCr 0:e6ceb13d2d05 9 Description: -
GregCr 0:e6ceb13d2d05 10
GregCr 0:e6ceb13d2d05 11 License: Revised BSD License, see LICENSE.TXT file include in the project
GregCr 0:e6ceb13d2d05 12
GregCr 0:e6ceb13d2d05 13 Maintainers: Miguel Luis, Gregory Cristian and Nicolas Huguenin
GregCr 0:e6ceb13d2d05 14 */
GregCr 0:e6ceb13d2d05 15 #include "sx1276-hal.h"
GregCr 0:e6ceb13d2d05 16
mluis 22:7f3aab69cca9 17 const RadioRegisters_t SX1276MB1xAS::RadioRegsInit[] = RADIO_INIT_REGISTERS_VALUE;
GregCr 0:e6ceb13d2d05 18
mluis 21:2e496deb7858 19 SX1276MB1xAS::SX1276MB1xAS( RadioEvents_t *events,
GregCr 0:e6ceb13d2d05 20 PinName mosi, PinName miso, PinName sclk, PinName nss, PinName reset,
GregCr 0:e6ceb13d2d05 21 PinName dio0, PinName dio1, PinName dio2, PinName dio3, PinName dio4, PinName dio5,
GregCr 0:e6ceb13d2d05 22 PinName antSwitch )
mluis 21:2e496deb7858 23 : SX1276( events, mosi, miso, sclk, nss, reset, dio0, dio1, dio2, dio3, dio4, dio5 ),
mluis 26:d09a8ef807e2 24 AntSwitch( antSwitch ),
GregCr 12:aa5b3bf7fdf4 25 #if( defined ( TARGET_NUCLEO_L152RE ) )
mluis 26:d09a8ef807e2 26 Fake( D8 )
martinichka 27:413f611964fc 27 #elif defined( TARGET_SAML21J18A )
martinichka 27:413f611964fc 28 Fake( PA09 )
GregCr 12:aa5b3bf7fdf4 29 #else
mluis 26:d09a8ef807e2 30 Fake( A3 )
GregCr 0:e6ceb13d2d05 31 #endif
GregCr 0:e6ceb13d2d05 32 {
mluis 21:2e496deb7858 33 this->RadioEvents = events;
mluis 21:2e496deb7858 34
GregCr 0:e6ceb13d2d05 35 Reset( );
mluis 26:d09a8ef807e2 36
GregCr 0:e6ceb13d2d05 37 RxChainCalibration( );
mluis 26:d09a8ef807e2 38
GregCr 0:e6ceb13d2d05 39 IoInit( );
mluis 26:d09a8ef807e2 40
GregCr 0:e6ceb13d2d05 41 SetOpMode( RF_OPMODE_SLEEP );
mluis 26:d09a8ef807e2 42
GregCr 0:e6ceb13d2d05 43 IoIrqInit( dioIrq );
mluis 26:d09a8ef807e2 44
GregCr 0:e6ceb13d2d05 45 RadioRegistersInit( );
GregCr 0:e6ceb13d2d05 46
GregCr 0:e6ceb13d2d05 47 SetModem( MODEM_FSK );
GregCr 0:e6ceb13d2d05 48
mluis 21:2e496deb7858 49 this->settings.State = RF_IDLE ;
GregCr 0:e6ceb13d2d05 50 }
GregCr 0:e6ceb13d2d05 51
mluis 26:d09a8ef807e2 52 SX1276MB1xAS::SX1276MB1xAS( RadioEvents_t *events )
GregCr 12:aa5b3bf7fdf4 53 #if defined ( TARGET_NUCLEO_L152RE )
mluis 21:2e496deb7858 54 : SX1276( events, D11, D12, D13, D10, A0, D2, D3, D4, D5, A3, D9 ), // For NUCLEO L152RE dio4 is on port A3
mluis 26:d09a8ef807e2 55 AntSwitch( A4 ),
mluis 26:d09a8ef807e2 56 Fake( D8 )
mluis 20:e05596ba4166 57 #elif defined( TARGET_LPC11U6X )
mluis 21:2e496deb7858 58 : SX1276( events, D11, D12, D13, D10, A0, D2, D3, D4, D5, D8, D9 ),
mluis 26:d09a8ef807e2 59 AntSwitch( P0_23 ),
mluis 26:d09a8ef807e2 60 Fake( A3 )
martinichka 27:413f611964fc 61 #elif defined( TARGET_SAML21J18A )
martinichka 27:413f611964fc 62 : SX1276( events, PB22, PB16, PB23, PA17, PA10, PA20, PA21, PB12, PB13, PB14, PB15),
martinichka 27:413f611964fc 63 AntSwitch( PA08 ),
martinichka 27:413f611964fc 64 Fake( PA09 )
GregCr 0:e6ceb13d2d05 65 #else
mluis 21:2e496deb7858 66 : SX1276( events, D11, D12, D13, D10, A0, D2, D3, D4, D5, D8, D9 ),
mluis 26:d09a8ef807e2 67 AntSwitch( A4 ),
mluis 26:d09a8ef807e2 68 Fake( A3 )
GregCr 0:e6ceb13d2d05 69 #endif
GregCr 0:e6ceb13d2d05 70 {
mluis 21:2e496deb7858 71 this->RadioEvents = events;
mluis 21:2e496deb7858 72
GregCr 0:e6ceb13d2d05 73 Reset( );
mluis 26:d09a8ef807e2 74
GregCr 5:11ec8a6ba4f0 75 boardConnected = UNKNOWN;
mluis 26:d09a8ef807e2 76
GregCr 1:f979673946c0 77 DetectBoardType( );
mluis 26:d09a8ef807e2 78
GregCr 0:e6ceb13d2d05 79 RxChainCalibration( );
mluis 26:d09a8ef807e2 80
GregCr 0:e6ceb13d2d05 81 IoInit( );
mluis 26:d09a8ef807e2 82
GregCr 0:e6ceb13d2d05 83 SetOpMode( RF_OPMODE_SLEEP );
GregCr 0:e6ceb13d2d05 84 IoIrqInit( dioIrq );
mluis 26:d09a8ef807e2 85
GregCr 0:e6ceb13d2d05 86 RadioRegistersInit( );
GregCr 0:e6ceb13d2d05 87
GregCr 0:e6ceb13d2d05 88 SetModem( MODEM_FSK );
GregCr 0:e6ceb13d2d05 89
mluis 21:2e496deb7858 90 this->settings.State = RF_IDLE ;
GregCr 0:e6ceb13d2d05 91 }
GregCr 0:e6ceb13d2d05 92
GregCr 0:e6ceb13d2d05 93 //-------------------------------------------------------------------------
GregCr 0:e6ceb13d2d05 94 // Board relative functions
GregCr 0:e6ceb13d2d05 95 //-------------------------------------------------------------------------
GregCr 2:5eb3066446dd 96 uint8_t SX1276MB1xAS::DetectBoardType( void )
GregCr 1:f979673946c0 97 {
GregCr 5:11ec8a6ba4f0 98 if( boardConnected == UNKNOWN )
GregCr 1:f979673946c0 99 {
mluis 26:d09a8ef807e2 100 this->AntSwitch.input( );
GregCr 5:11ec8a6ba4f0 101 wait_ms( 1 );
mluis 26:d09a8ef807e2 102 if( this->AntSwitch == 1 )
GregCr 5:11ec8a6ba4f0 103 {
GregCr 5:11ec8a6ba4f0 104 boardConnected = SX1276MB1LAS;
GregCr 5:11ec8a6ba4f0 105 }
GregCr 5:11ec8a6ba4f0 106 else
GregCr 5:11ec8a6ba4f0 107 {
GregCr 5:11ec8a6ba4f0 108 boardConnected = SX1276MB1MAS;
GregCr 5:11ec8a6ba4f0 109 }
mluis 26:d09a8ef807e2 110 this->AntSwitch.output( );
GregCr 5:11ec8a6ba4f0 111 wait_ms( 1 );
GregCr 1:f979673946c0 112 }
GregCr 2:5eb3066446dd 113 return ( boardConnected );
GregCr 1:f979673946c0 114 }
GregCr 0:e6ceb13d2d05 115
GregCr 0:e6ceb13d2d05 116 void SX1276MB1xAS::IoInit( void )
GregCr 0:e6ceb13d2d05 117 {
GregCr 0:e6ceb13d2d05 118 AntSwInit( );
GregCr 0:e6ceb13d2d05 119 SpiInit( );
GregCr 0:e6ceb13d2d05 120 }
GregCr 0:e6ceb13d2d05 121
mluis 22:7f3aab69cca9 122 void SX1276MB1xAS::RadioRegistersInit( )
mluis 22:7f3aab69cca9 123 {
GregCr 0:e6ceb13d2d05 124 uint8_t i = 0;
GregCr 0:e6ceb13d2d05 125 for( i = 0; i < sizeof( RadioRegsInit ) / sizeof( RadioRegisters_t ); i++ )
GregCr 0:e6ceb13d2d05 126 {
GregCr 0:e6ceb13d2d05 127 SetModem( RadioRegsInit[i].Modem );
GregCr 0:e6ceb13d2d05 128 Write( RadioRegsInit[i].Addr, RadioRegsInit[i].Value );
GregCr 0:e6ceb13d2d05 129 }
GregCr 0:e6ceb13d2d05 130 }
GregCr 0:e6ceb13d2d05 131
GregCr 0:e6ceb13d2d05 132 void SX1276MB1xAS::SpiInit( void )
GregCr 0:e6ceb13d2d05 133 {
GregCr 0:e6ceb13d2d05 134 nss = 1;
GregCr 0:e6ceb13d2d05 135 spi.format( 8,0 );
martinichka 27:413f611964fc 136 uint32_t frequencyToSet = 500000;
martinichka 27:413f611964fc 137 #if( defined ( TARGET_NUCLEO_L152RE ) || defined ( TARGET_LPC11U6X ) || defined ( TARGET_SAML21J18A ) )
GregCr 0:e6ceb13d2d05 138 spi.frequency( frequencyToSet );
GregCr 0:e6ceb13d2d05 139 #elif( defined ( TARGET_KL25Z ) ) //busclock frequency is halved -> double the spi frequency to compensate
GregCr 0:e6ceb13d2d05 140 spi.frequency( frequencyToSet * 2 );
GregCr 0:e6ceb13d2d05 141 #else
GregCr 0:e6ceb13d2d05 142 #warning "Check the board's SPI frequency"
GregCr 0:e6ceb13d2d05 143 #endif
GregCr 0:e6ceb13d2d05 144 wait(0.1);
GregCr 0:e6ceb13d2d05 145 }
GregCr 0:e6ceb13d2d05 146
GregCr 0:e6ceb13d2d05 147 void SX1276MB1xAS::IoIrqInit( DioIrqHandler *irqHandlers )
GregCr 0:e6ceb13d2d05 148 {
martinichka 27:413f611964fc 149 #if( defined ( TARGET_NUCLEO_L152RE ) || defined ( TARGET_LPC11U6X ) || defined ( TARGET_SAML21J18A ) )
mluis 26:d09a8ef807e2 150 dio0.mode( PullDown );
mluis 26:d09a8ef807e2 151 dio1.mode( PullDown );
mluis 26:d09a8ef807e2 152 dio2.mode( PullDown );
mluis 26:d09a8ef807e2 153 dio3.mode( PullDown );
mluis 26:d09a8ef807e2 154 dio4.mode( PullDown );
mluis 22:7f3aab69cca9 155 #endif
mluis 26:d09a8ef807e2 156 dio0.rise( mbed::callback( this, static_cast< TriggerMB1xAS > ( irqHandlers[0] ) ) );
mluis 26:d09a8ef807e2 157 dio1.rise( mbed::callback( this, static_cast< TriggerMB1xAS > ( irqHandlers[1] ) ) );
mluis 26:d09a8ef807e2 158 dio2.rise( mbed::callback( this, static_cast< TriggerMB1xAS > ( irqHandlers[2] ) ) );
mluis 26:d09a8ef807e2 159 dio3.rise( mbed::callback( this, static_cast< TriggerMB1xAS > ( irqHandlers[3] ) ) );
mluis 26:d09a8ef807e2 160 dio4.rise( mbed::callback( this, static_cast< TriggerMB1xAS > ( irqHandlers[4] ) ) );
GregCr 0:e6ceb13d2d05 161 }
GregCr 0:e6ceb13d2d05 162
GregCr 0:e6ceb13d2d05 163 void SX1276MB1xAS::IoDeInit( void )
GregCr 0:e6ceb13d2d05 164 {
GregCr 0:e6ceb13d2d05 165 //nothing
GregCr 0:e6ceb13d2d05 166 }
GregCr 0:e6ceb13d2d05 167
mluis 26:d09a8ef807e2 168 void SX1276MB1xAS::SetRfTxPower( int8_t power )
mluis 26:d09a8ef807e2 169 {
mluis 26:d09a8ef807e2 170 uint8_t paConfig = 0;
mluis 26:d09a8ef807e2 171 uint8_t paDac = 0;
mluis 26:d09a8ef807e2 172
mluis 26:d09a8ef807e2 173 paConfig = Read( REG_PACONFIG );
mluis 26:d09a8ef807e2 174 paDac = Read( REG_PADAC );
mluis 26:d09a8ef807e2 175
mluis 26:d09a8ef807e2 176 paConfig = ( paConfig & RF_PACONFIG_PASELECT_MASK ) | GetPaSelect( this->settings.Channel );
mluis 26:d09a8ef807e2 177 paConfig = ( paConfig & RF_PACONFIG_MAX_POWER_MASK ) | 0x70;
mluis 26:d09a8ef807e2 178
mluis 26:d09a8ef807e2 179 if( ( paConfig & RF_PACONFIG_PASELECT_PABOOST ) == RF_PACONFIG_PASELECT_PABOOST )
mluis 26:d09a8ef807e2 180 {
mluis 26:d09a8ef807e2 181 if( power > 17 )
mluis 26:d09a8ef807e2 182 {
mluis 26:d09a8ef807e2 183 paDac = ( paDac & RF_PADAC_20DBM_MASK ) | RF_PADAC_20DBM_ON;
mluis 26:d09a8ef807e2 184 }
mluis 26:d09a8ef807e2 185 else
mluis 26:d09a8ef807e2 186 {
mluis 26:d09a8ef807e2 187 paDac = ( paDac & RF_PADAC_20DBM_MASK ) | RF_PADAC_20DBM_OFF;
mluis 26:d09a8ef807e2 188 }
mluis 26:d09a8ef807e2 189 if( ( paDac & RF_PADAC_20DBM_ON ) == RF_PADAC_20DBM_ON )
mluis 26:d09a8ef807e2 190 {
mluis 26:d09a8ef807e2 191 if( power < 5 )
mluis 26:d09a8ef807e2 192 {
mluis 26:d09a8ef807e2 193 power = 5;
mluis 26:d09a8ef807e2 194 }
mluis 26:d09a8ef807e2 195 if( power > 20 )
mluis 26:d09a8ef807e2 196 {
mluis 26:d09a8ef807e2 197 power = 20;
mluis 26:d09a8ef807e2 198 }
mluis 26:d09a8ef807e2 199 paConfig = ( paConfig & RF_PACONFIG_OUTPUTPOWER_MASK ) | ( uint8_t )( ( uint16_t )( power - 5 ) & 0x0F );
mluis 26:d09a8ef807e2 200 }
mluis 26:d09a8ef807e2 201 else
mluis 26:d09a8ef807e2 202 {
mluis 26:d09a8ef807e2 203 if( power < 2 )
mluis 26:d09a8ef807e2 204 {
mluis 26:d09a8ef807e2 205 power = 2;
mluis 26:d09a8ef807e2 206 }
mluis 26:d09a8ef807e2 207 if( power > 17 )
mluis 26:d09a8ef807e2 208 {
mluis 26:d09a8ef807e2 209 power = 17;
mluis 26:d09a8ef807e2 210 }
mluis 26:d09a8ef807e2 211 paConfig = ( paConfig & RF_PACONFIG_OUTPUTPOWER_MASK ) | ( uint8_t )( ( uint16_t )( power - 2 ) & 0x0F );
mluis 26:d09a8ef807e2 212 }
mluis 26:d09a8ef807e2 213 }
mluis 26:d09a8ef807e2 214 else
mluis 26:d09a8ef807e2 215 {
mluis 26:d09a8ef807e2 216 if( power < -1 )
mluis 26:d09a8ef807e2 217 {
mluis 26:d09a8ef807e2 218 power = -1;
mluis 26:d09a8ef807e2 219 }
mluis 26:d09a8ef807e2 220 if( power > 14 )
mluis 26:d09a8ef807e2 221 {
mluis 26:d09a8ef807e2 222 power = 14;
mluis 26:d09a8ef807e2 223 }
mluis 26:d09a8ef807e2 224 paConfig = ( paConfig & RF_PACONFIG_OUTPUTPOWER_MASK ) | ( uint8_t )( ( uint16_t )( power + 1 ) & 0x0F );
mluis 26:d09a8ef807e2 225 }
mluis 26:d09a8ef807e2 226 Write( REG_PACONFIG, paConfig );
mluis 26:d09a8ef807e2 227 Write( REG_PADAC, paDac );
mluis 26:d09a8ef807e2 228 }
mluis 26:d09a8ef807e2 229
GregCr 0:e6ceb13d2d05 230 uint8_t SX1276MB1xAS::GetPaSelect( uint32_t channel )
GregCr 0:e6ceb13d2d05 231 {
GregCr 0:e6ceb13d2d05 232 if( channel > RF_MID_BAND_THRESH )
GregCr 0:e6ceb13d2d05 233 {
GregCr 3:ca84be1f3fac 234 if( boardConnected == SX1276MB1LAS )
GregCr 1:f979673946c0 235 {
GregCr 1:f979673946c0 236 return RF_PACONFIG_PASELECT_PABOOST;
GregCr 1:f979673946c0 237 }
GregCr 1:f979673946c0 238 else
GregCr 1:f979673946c0 239 {
GregCr 1:f979673946c0 240 return RF_PACONFIG_PASELECT_RFO;
GregCr 1:f979673946c0 241 }
GregCr 0:e6ceb13d2d05 242 }
GregCr 0:e6ceb13d2d05 243 else
GregCr 0:e6ceb13d2d05 244 {
GregCr 0:e6ceb13d2d05 245 return RF_PACONFIG_PASELECT_RFO;
GregCr 0:e6ceb13d2d05 246 }
GregCr 0:e6ceb13d2d05 247 }
GregCr 0:e6ceb13d2d05 248
GregCr 0:e6ceb13d2d05 249 void SX1276MB1xAS::SetAntSwLowPower( bool status )
GregCr 0:e6ceb13d2d05 250 {
GregCr 0:e6ceb13d2d05 251 if( isRadioActive != status )
GregCr 0:e6ceb13d2d05 252 {
GregCr 0:e6ceb13d2d05 253 isRadioActive = status;
GregCr 0:e6ceb13d2d05 254
GregCr 0:e6ceb13d2d05 255 if( status == false )
GregCr 0:e6ceb13d2d05 256 {
GregCr 0:e6ceb13d2d05 257 AntSwInit( );
GregCr 0:e6ceb13d2d05 258 }
GregCr 0:e6ceb13d2d05 259 else
GregCr 0:e6ceb13d2d05 260 {
GregCr 0:e6ceb13d2d05 261 AntSwDeInit( );
GregCr 0:e6ceb13d2d05 262 }
GregCr 0:e6ceb13d2d05 263 }
GregCr 0:e6ceb13d2d05 264 }
GregCr 0:e6ceb13d2d05 265
GregCr 0:e6ceb13d2d05 266 void SX1276MB1xAS::AntSwInit( void )
GregCr 0:e6ceb13d2d05 267 {
mluis 26:d09a8ef807e2 268 this->AntSwitch = 0;
GregCr 0:e6ceb13d2d05 269 }
GregCr 0:e6ceb13d2d05 270
GregCr 0:e6ceb13d2d05 271 void SX1276MB1xAS::AntSwDeInit( void )
GregCr 0:e6ceb13d2d05 272 {
mluis 26:d09a8ef807e2 273 this->AntSwitch = 0;
GregCr 0:e6ceb13d2d05 274 }
GregCr 0:e6ceb13d2d05 275
mluis 26:d09a8ef807e2 276 void SX1276MB1xAS::SetAntSw( uint8_t opMode )
GregCr 0:e6ceb13d2d05 277 {
mluis 26:d09a8ef807e2 278 switch( opMode )
GregCr 0:e6ceb13d2d05 279 {
mluis 26:d09a8ef807e2 280 case RFLR_OPMODE_TRANSMITTER:
mluis 26:d09a8ef807e2 281 this->AntSwitch = 1;
mluis 26:d09a8ef807e2 282 break;
mluis 26:d09a8ef807e2 283 case RFLR_OPMODE_RECEIVER:
mluis 26:d09a8ef807e2 284 case RFLR_OPMODE_RECEIVER_SINGLE:
mluis 26:d09a8ef807e2 285 case RFLR_OPMODE_CAD:
mluis 26:d09a8ef807e2 286 this->AntSwitch = 0;
mluis 26:d09a8ef807e2 287 break;
mluis 26:d09a8ef807e2 288 default:
mluis 26:d09a8ef807e2 289 this->AntSwitch = 0;
mluis 26:d09a8ef807e2 290 break;
GregCr 0:e6ceb13d2d05 291 }
GregCr 0:e6ceb13d2d05 292 }
GregCr 0:e6ceb13d2d05 293
GregCr 0:e6ceb13d2d05 294 bool SX1276MB1xAS::CheckRfFrequency( uint32_t frequency )
GregCr 0:e6ceb13d2d05 295 {
mluis 26:d09a8ef807e2 296 // Implement check. Currently all frequencies are supported
GregCr 0:e6ceb13d2d05 297 return true;
GregCr 0:e6ceb13d2d05 298 }
GregCr 0:e6ceb13d2d05 299
GregCr 0:e6ceb13d2d05 300 void SX1276MB1xAS::Reset( void )
GregCr 0:e6ceb13d2d05 301 {
mluis 26:d09a8ef807e2 302 reset.output( );
GregCr 0:e6ceb13d2d05 303 reset = 0;
GregCr 0:e6ceb13d2d05 304 wait_ms( 1 );
mluis 26:d09a8ef807e2 305 reset.input( );
GregCr 0:e6ceb13d2d05 306 wait_ms( 6 );
GregCr 0:e6ceb13d2d05 307 }
mluis 26:d09a8ef807e2 308
GregCr 0:e6ceb13d2d05 309 void SX1276MB1xAS::Write( uint8_t addr, uint8_t data )
GregCr 0:e6ceb13d2d05 310 {
GregCr 0:e6ceb13d2d05 311 Write( addr, &data, 1 );
GregCr 0:e6ceb13d2d05 312 }
GregCr 0:e6ceb13d2d05 313
GregCr 0:e6ceb13d2d05 314 uint8_t SX1276MB1xAS::Read( uint8_t addr )
GregCr 0:e6ceb13d2d05 315 {
GregCr 0:e6ceb13d2d05 316 uint8_t data;
GregCr 0:e6ceb13d2d05 317 Read( addr, &data, 1 );
GregCr 0:e6ceb13d2d05 318 return data;
GregCr 0:e6ceb13d2d05 319 }
GregCr 0:e6ceb13d2d05 320
GregCr 0:e6ceb13d2d05 321 void SX1276MB1xAS::Write( uint8_t addr, uint8_t *buffer, uint8_t size )
GregCr 0:e6ceb13d2d05 322 {
GregCr 0:e6ceb13d2d05 323 uint8_t i;
GregCr 0:e6ceb13d2d05 324
GregCr 0:e6ceb13d2d05 325 nss = 0;
GregCr 0:e6ceb13d2d05 326 spi.write( addr | 0x80 );
GregCr 0:e6ceb13d2d05 327 for( i = 0; i < size; i++ )
GregCr 0:e6ceb13d2d05 328 {
GregCr 0:e6ceb13d2d05 329 spi.write( buffer[i] );
GregCr 0:e6ceb13d2d05 330 }
GregCr 0:e6ceb13d2d05 331 nss = 1;
GregCr 0:e6ceb13d2d05 332 }
GregCr 0:e6ceb13d2d05 333
GregCr 0:e6ceb13d2d05 334 void SX1276MB1xAS::Read( uint8_t addr, uint8_t *buffer, uint8_t size )
GregCr 0:e6ceb13d2d05 335 {
GregCr 0:e6ceb13d2d05 336 uint8_t i;
GregCr 0:e6ceb13d2d05 337
GregCr 0:e6ceb13d2d05 338 nss = 0;
GregCr 0:e6ceb13d2d05 339 spi.write( addr & 0x7F );
GregCr 0:e6ceb13d2d05 340 for( i = 0; i < size; i++ )
GregCr 0:e6ceb13d2d05 341 {
GregCr 0:e6ceb13d2d05 342 buffer[i] = spi.write( 0 );
GregCr 0:e6ceb13d2d05 343 }
GregCr 0:e6ceb13d2d05 344 nss = 1;
GregCr 0:e6ceb13d2d05 345 }
GregCr 0:e6ceb13d2d05 346
GregCr 0:e6ceb13d2d05 347 void SX1276MB1xAS::WriteFifo( uint8_t *buffer, uint8_t size )
GregCr 0:e6ceb13d2d05 348 {
GregCr 0:e6ceb13d2d05 349 Write( 0, buffer, size );
GregCr 0:e6ceb13d2d05 350 }
GregCr 0:e6ceb13d2d05 351
GregCr 0:e6ceb13d2d05 352 void SX1276MB1xAS::ReadFifo( uint8_t *buffer, uint8_t size )
GregCr 0:e6ceb13d2d05 353 {
GregCr 0:e6ceb13d2d05 354 Read( 0, buffer, size );
GregCr 0:e6ceb13d2d05 355 }