eichi kowata / Mbed 2 deprecated geiger

http://http://diytec.web.fc2.com/mark2r2/

Dependencies:   EthernetNetIf NTPClient_NetServices mbed ConfigFile

adcdma.c@0:08a4d61cd84c, 2011-09-20 (annotated)

Committer:
mark2r2
Date:
Tue Sep 20 12:46:26 2011 +0000
Revision:
0:08a4d61cd84c
V1.0

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mark2r2 0:08a4d61cd84c 1 /*************************************************************
mark2r2 0:08a4d61cd84c 2
mark2r2 0:08a4d61cd84c 3 History
mark2r2 0:08a4d61cd84c 4 2011/07/26 - Add "shape_mode" option.
mark2r2 0:08a4d61cd84c 5
mark2r2 0:08a4d61cd84c 6
mark2r2 0:08a4d61cd84c 7 *************************************************************/
mark2r2 0:08a4d61cd84c 8 #include "MODDMA.h"
mark2r2 0:08a4d61cd84c 9
mark2r2 0:08a4d61cd84c 10 #define SAMPLE_BUFFER_LENGTH 256
mark2r2 0:08a4d61cd84c 11
mark2r2 0:08a4d61cd84c 12 extern int shape_mode;
mark2r2 0:08a4d61cd84c 13
mark2r2 0:08a4d61cd84c 14 // for ADC DMA read
mark2r2 0:08a4d61cd84c 15 static MODDMA dma;
mark2r2 0:08a4d61cd84c 16 static MODDMA_Config *conf = new MODDMA_Config;
mark2r2 0:08a4d61cd84c 17 static uint32_t adcInputBuffer[SAMPLE_BUFFER_LENGTH];
mark2r2 0:08a4d61cd84c 18
mark2r2 0:08a4d61cd84c 19 /******************
mark2r2 0:08a4d61cd84c 20 To read ADC DMA
mark2r2 0:08a4d61cd84c 21 *******************/
mark2r2 0:08a4d61cd84c 22 // Configuration callback on TC
mark2r2 0:08a4d61cd84c 23 void TC0_callback(void) {
mark2r2 0:08a4d61cd84c 24
mark2r2 0:08a4d61cd84c 25 MODDMA_Config *config = dma.getConfig();
mark2r2 0:08a4d61cd84c 26
mark2r2 0:08a4d61cd84c 27 // Disbale burst mode and switch off the IRQ flag.
mark2r2 0:08a4d61cd84c 28 LPC_ADC->ADCR &= ~(1UL << 16);
mark2r2 0:08a4d61cd84c 29 LPC_ADC->ADINTEN = 0;
mark2r2 0:08a4d61cd84c 30
mark2r2 0:08a4d61cd84c 31 // Finish the DMA cycle by shutting down the channel.
mark2r2 0:08a4d61cd84c 32 dma.haltAndWaitChannelComplete( (MODDMA::CHANNELS)config->channelNum());
mark2r2 0:08a4d61cd84c 33 dma.Disable( (MODDMA::CHANNELS)config->channelNum() );
mark2r2 0:08a4d61cd84c 34
mark2r2 0:08a4d61cd84c 35 // Clear DMA IRQ flags.
mark2r2 0:08a4d61cd84c 36 if (dma.irqType() == MODDMA::TcIrq) dma.clearTcIrq();
mark2r2 0:08a4d61cd84c 37 if (dma.irqType() == MODDMA::ErrIrq) dma.clearErrIrq();
mark2r2 0:08a4d61cd84c 38
mark2r2 0:08a4d61cd84c 39 int m=0,max=0,n=0;
mark2r2 0:08a4d61cd84c 40 int downtrend=0;
mark2r2 0:08a4d61cd84c 41 int errata=0;
mark2r2 0:08a4d61cd84c 42
mark2r2 0:08a4d61cd84c 43 for (int i = 0; i < SAMPLE_BUFFER_LENGTH; i++) {
mark2r2 0:08a4d61cd84c 44 int channel = (adcInputBuffer[i] >> 24) & 0x7;
mark2r2 0:08a4d61cd84c 45 int iVal = (adcInputBuffer[i] >> 4) & 0xFFF;
mark2r2 0:08a4d61cd84c 46 // double fVal = 3.3 * (double)((double)iVal) / ((double)0x1000); // scale to 0v to 3.3v
mark2r2 0:08a4d61cd84c 47 // pc.printf("Array index %02d : ADC input channel %d = 0x%03x %01.3f volts\n", i, channel, iVal, fVal);
mark2r2 0:08a4d61cd84c 48
mark2r2 0:08a4d61cd84c 49 if( channel == 0 ){
mark2r2 0:08a4d61cd84c 50
mark2r2 0:08a4d61cd84c 51 n = iVal;
mark2r2 0:08a4d61cd84c 52
mark2r2 0:08a4d61cd84c 53 //PEAKMAX
mark2r2 0:08a4d61cd84c 54 if(!downtrend){
mark2r2 0:08a4d61cd84c 55 max= n>max ? n:max;
mark2r2 0:08a4d61cd84c 56 if(n<max){
mark2r2 0:08a4d61cd84c 57 downtrend=1;
mark2r2 0:08a4d61cd84c 58 }
mark2r2 0:08a4d61cd84c 59 }else{
mark2r2 0:08a4d61cd84c 60 if (n>max+100)
mark2r2 0:08a4d61cd84c 61 errata=1;
mark2r2 0:08a4d61cd84c 62 }
mark2r2 0:08a4d61cd84c 63
mark2r2 0:08a4d61cd84c 64 //Accumulation
mark2r2 0:08a4d61cd84c 65 m+=n;
mark2r2 0:08a4d61cd84c 66
mark2r2 0:08a4d61cd84c 67 if (shape_mode) { // 2011/07/26
mark2r2 0:08a4d61cd84c 68 double fVal = 3.3 * (double)((double)n) / ((double)0x1000);
mark2r2 0:08a4d61cd84c 69 printf("%01.3f\n",fVal);
mark2r2 0:08a4d61cd84c 70 }
mark2r2 0:08a4d61cd84c 71 }
mark2r2 0:08a4d61cd84c 72
mark2r2 0:08a4d61cd84c 73 if(n==0 && max !=0) break;
mark2r2 0:08a4d61cd84c 74 }
mark2r2 0:08a4d61cd84c 75
mark2r2 0:08a4d61cd84c 76 if(!errata){
mark2r2 0:08a4d61cd84c 77 if (shape_mode) { // 2011/07/26
mark2r2 0:08a4d61cd84c 78 double fm = 3.3 * (double)((double)m) / ((double)0x1000);
mark2r2 0:08a4d61cd84c 79 double fmax = 3.3 * (double)((double)max) / ((double)0x1000);
mark2r2 0:08a4d61cd84c 80 printf("%01.3f,%01.3f\n",fm,fmax);
mark2r2 0:08a4d61cd84c 81 }
mark2r2 0:08a4d61cd84c 82 printf("%d,%d\n",m,max);
mark2r2 0:08a4d61cd84c 83
mark2r2 0:08a4d61cd84c 84 if (shape_mode) { // 2011/07/26
mark2r2 0:08a4d61cd84c 85 printf("-----\n");
mark2r2 0:08a4d61cd84c 86 }
mark2r2 0:08a4d61cd84c 87 }
mark2r2 0:08a4d61cd84c 88 }
mark2r2 0:08a4d61cd84c 89
mark2r2 0:08a4d61cd84c 90 // Configuration callback on Error
mark2r2 0:08a4d61cd84c 91 void ERR0_callback(void) {
mark2r2 0:08a4d61cd84c 92 // Switch off burst conversions.
mark2r2 0:08a4d61cd84c 93 LPC_ADC->ADCR |= ~(1UL << 16);
mark2r2 0:08a4d61cd84c 94 LPC_ADC->ADINTEN = 0;
mark2r2 0:08a4d61cd84c 95 error("Oh no! My Mbed EXPLODED! :( Only kidding, go find the problem");
mark2r2 0:08a4d61cd84c 96 }
mark2r2 0:08a4d61cd84c 97
mark2r2 0:08a4d61cd84c 98 void read_dma_data()
mark2r2 0:08a4d61cd84c 99 {
mark2r2 0:08a4d61cd84c 100 memset(adcInputBuffer, 0, sizeof(adcInputBuffer));
mark2r2 0:08a4d61cd84c 101
mark2r2 0:08a4d61cd84c 102 // Prepare configuration.
mark2r2 0:08a4d61cd84c 103 dma.Setup( conf );
mark2r2 0:08a4d61cd84c 104
mark2r2 0:08a4d61cd84c 105 // Enable configuration.
mark2r2 0:08a4d61cd84c 106 dma.Enable( conf );
mark2r2 0:08a4d61cd84c 107
mark2r2 0:08a4d61cd84c 108 // Enable ADC irq flag (to DMA).
mark2r2 0:08a4d61cd84c 109 // Note, don't set the individual flags,
mark2r2 0:08a4d61cd84c 110 // just set the global flag.
mark2r2 0:08a4d61cd84c 111 LPC_ADC->ADINTEN = 0x100;
mark2r2 0:08a4d61cd84c 112
mark2r2 0:08a4d61cd84c 113 // Enable burst mode on inputs 0 and 1.
mark2r2 0:08a4d61cd84c 114 LPC_ADC->ADCR |= (1UL << 16);
mark2r2 0:08a4d61cd84c 115 return;
mark2r2 0:08a4d61cd84c 116 }
mark2r2 0:08a4d61cd84c 117
mark2r2 0:08a4d61cd84c 118 void setup_adcdma()
mark2r2 0:08a4d61cd84c 119 {
mark2r2 0:08a4d61cd84c 120 // We use the ADC irq to trigger DMA and the manual says
mark2r2 0:08a4d61cd84c 121 // that in this case the NVIC for ADC must be disabled.
mark2r2 0:08a4d61cd84c 122 NVIC_DisableIRQ(ADC_IRQn);
mark2r2 0:08a4d61cd84c 123
mark2r2 0:08a4d61cd84c 124 // Power up the ADC and set PCLK
mark2r2 0:08a4d61cd84c 125 LPC_SC->PCONP |= (1UL << 12);
mark2r2 0:08a4d61cd84c 126 LPC_SC->PCLKSEL0 &= ~(3UL << 24); // PCLK = CCLK/4 96M/4 = 24MHz
mark2r2 0:08a4d61cd84c 127
mark2r2 0:08a4d61cd84c 128 // Enable the ADC, 12MHz
mark2r2 0:08a4d61cd84c 129 LPC_ADC->ADCR = (1UL << 21) | (1UL << 8) | (1UL << 0);
mark2r2 0:08a4d61cd84c 130
mark2r2 0:08a4d61cd84c 131 // Set the pin functions to ADC
mark2r2 0:08a4d61cd84c 132 LPC_PINCON->PINSEL1 &= ~(3UL << 14); /* P0.23, Mbed p15. */
mark2r2 0:08a4d61cd84c 133 LPC_PINCON->PINSEL1 |= (1UL << 14);
mark2r2 0:08a4d61cd84c 134
mark2r2 0:08a4d61cd84c 135 // Prepare an ADC configuration.
mark2r2 0:08a4d61cd84c 136 // MODDMA_Config *conf = new MODDMA_Config;
mark2r2 0:08a4d61cd84c 137
mark2r2 0:08a4d61cd84c 138 conf
mark2r2 0:08a4d61cd84c 139 ->channelNum ( MODDMA::Channel_0 )
mark2r2 0:08a4d61cd84c 140 ->srcMemAddr ( 0 )
mark2r2 0:08a4d61cd84c 141 ->dstMemAddr ( (uint32_t)adcInputBuffer )
mark2r2 0:08a4d61cd84c 142 ->transferSize ( SAMPLE_BUFFER_LENGTH )
mark2r2 0:08a4d61cd84c 143 ->transferType ( MODDMA::p2m )
mark2r2 0:08a4d61cd84c 144 ->transferWidth ( MODDMA::word )
mark2r2 0:08a4d61cd84c 145 ->srcConn ( MODDMA::ADC )
mark2r2 0:08a4d61cd84c 146 ->dstConn ( 0 )
mark2r2 0:08a4d61cd84c 147 ->dmaLLI ( 0 )
mark2r2 0:08a4d61cd84c 148 ->attach_tc ( &TC0_callback )
mark2r2 0:08a4d61cd84c 149 ->attach_err ( &ERR0_callback )
mark2r2 0:08a4d61cd84c 150 ; // end conf.
mark2r2 0:08a4d61cd84c 151 }
mark2r2 0:08a4d61cd84c 152