k64f watchdog example

Dependencies:   mbed

Committer:
manitou
Date:
Mon Apr 10 11:10:26 2017 +0000
Revision:
1:c0b9e466e9e5
Parent:
0:93e3779ebc48
update

Who changed what in which revision?

UserRevisionLine numberNew contents of line
manitou 1:c0b9e466e9e5 1 // k64 wdog using 1khz LPO (10% accuracy)
manitou 0:93e3779ebc48 2 #include "mbed.h"
manitou 0:93e3779ebc48 3
manitou 0:93e3779ebc48 4 #define PRREG(z) printf(#z" 0x%x\n",z)
manitou 0:93e3779ebc48 5 Timer tmr;
manitou 0:93e3779ebc48 6
manitou 1:c0b9e466e9e5 7 void wdog_init(uint32_t ms) {
manitou 0:93e3779ebc48 8 __disable_irq();
manitou 0:93e3779ebc48 9 WDOG->UNLOCK = WDOG_UNLOCK_WDOGUNLOCK(0xC520); /* Key 1 */
manitou 0:93e3779ebc48 10 WDOG->UNLOCK = WDOG_UNLOCK_WDOGUNLOCK(0xD928); /* Key 2 */
manitou 0:93e3779ebc48 11 __NOP();
manitou 0:93e3779ebc48 12 __NOP();
manitou 0:93e3779ebc48 13
manitou 1:c0b9e466e9e5 14 WDOG_TOVALL = (uint16_t)(ms & 0xffff); // sets the time-out value
manitou 1:c0b9e466e9e5 15 WDOG_TOVALH = (uint16_t)((ms>>16) & 0xffff);
manitou 0:93e3779ebc48 16 WDOG_STCTRLH = (WDOG_STCTRLH_ALLOWUPDATE_MASK | WDOG_STCTRLH_WDOGEN_MASK | WDOG_STCTRLH_WAITEN_MASK | WDOG_STCTRLH_STOPEN_MASK); // Enable WDG
manitou 0:93e3779ebc48 17 WDOG_PRESC = 0; // prescaler
manitou 0:93e3779ebc48 18 __enable_irq();
manitou 0:93e3779ebc48 19 }
manitou 0:93e3779ebc48 20
manitou 1:c0b9e466e9e5 21 void wdog_disable() {
manitou 1:c0b9e466e9e5 22 __disable_irq();
manitou 1:c0b9e466e9e5 23 WDOG->UNLOCK = WDOG_UNLOCK_WDOGUNLOCK(0xC520); /* Key 1 */
manitou 1:c0b9e466e9e5 24 WDOG->UNLOCK = WDOG_UNLOCK_WDOGUNLOCK(0xD928); /* Key 2 */
manitou 1:c0b9e466e9e5 25 __NOP();
manitou 1:c0b9e466e9e5 26 __NOP();
manitou 1:c0b9e466e9e5 27 WDOG_STCTRLH = WDOG_STCTRLH_ALLOWUPDATE_MASK;
manitou 1:c0b9e466e9e5 28 __enable_irq();
manitou 1:c0b9e466e9e5 29 }
manitou 1:c0b9e466e9e5 30
manitou 1:c0b9e466e9e5 31 void wdog_kick() {
manitou 0:93e3779ebc48 32 __disable_irq();
manitou 0:93e3779ebc48 33 WDOG_REFRESH = 0xA602;
manitou 0:93e3779ebc48 34 WDOG_REFRESH = 0xB480;
manitou 0:93e3779ebc48 35 __enable_irq();
manitou 0:93e3779ebc48 36 }
manitou 0:93e3779ebc48 37
manitou 0:93e3779ebc48 38 int main() {
manitou 0:93e3779ebc48 39 int i,fbus,flashbus;
manitou 0:93e3779ebc48 40 fbus = SystemCoreClock / (((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV2_MASK) >> SIM_CLKDIV1_OUTDIV2_SHIFT) + 1);
manitou 0:93e3779ebc48 41 flashbus = SystemCoreClock / (((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV4_MASK) >> SIM_CLKDIV1_OUTDIV4_SHIFT) + 1);
manitou 0:93e3779ebc48 42 printf("\nSystemCoreClock %d fbus %d flash %d %s %s\n",SystemCoreClock,fbus,flashbus,__TIME__,__DATE__);
manitou 1:c0b9e466e9e5 43 PRREG(RCM_SRS0); // reset reason
manitou 1:c0b9e466e9e5 44 PRREG(RCM_SRS1);
manitou 0:93e3779ebc48 45 PRREG(WDOG->STCTRLH);
manitou 0:93e3779ebc48 46 PRREG(WDOG->PRESC);
manitou 0:93e3779ebc48 47 PRREG(WDOG->TOVALL);
manitou 0:93e3779ebc48 48 PRREG(WDOG->TOVALH);
manitou 0:93e3779ebc48 49 PRREG(WDOG->RSTCNT);
manitou 1:c0b9e466e9e5 50 wdog_init(4000); // 4 sec timeout
manitou 1:c0b9e466e9e5 51 PRREG(WDOG->STCTRLH);
manitou 1:c0b9e466e9e5 52 PRREG(WDOG->PRESC);
manitou 1:c0b9e466e9e5 53 PRREG(WDOG->TOVALL);
manitou 1:c0b9e466e9e5 54 PRREG(WDOG->TOVALH);
manitou 1:c0b9e466e9e5 55
manitou 0:93e3779ebc48 56 wait_ms(100);
manitou 1:c0b9e466e9e5 57 wdog_kick();
manitou 1:c0b9e466e9e5 58 for (i=1;i<=5; i++) {
manitou 0:93e3779ebc48 59 printf("running %d\n",i);
manitou 0:93e3779ebc48 60 wait(1.0);
manitou 1:c0b9e466e9e5 61 wdog_kick();
manitou 0:93e3779ebc48 62 }
manitou 0:93e3779ebc48 63 printf("long wait reset\n");
manitou 0:93e3779ebc48 64 wait(5.0);
manitou 0:93e3779ebc48 65 printf("never happen\n");
manitou 0:93e3779ebc48 66 }