Li Weiyi / Mbed 2 deprecated BalanceCar

虽然移植完毕，但是不work。需要细调……

Dependencies:   mbed

I2Cdev.cpp@0:a4d8f5b3c546, 2016-06-04 (annotated)

Committer:
lixianyu
Date:
Sat Jun 04 03:16:52 2016 +0000
Revision:
0:a4d8f5b3c546
Child:
2:99785a1007a4
Pass compile!!

Who changed what in which revision?

UserRevisionLine numberNew contents of line
lixianyu 0:a4d8f5b3c546 1 #include "I2Cdev.h"
lixianyu 0:a4d8f5b3c546 2
lixianyu 0:a4d8f5b3c546 3 static uint8_t buffer[24];
lixianyu 0:a4d8f5b3c546 4 I2C g_i2c(P0_11, P0_10);
lixianyu 0:a4d8f5b3c546 5
lixianyu 0:a4d8f5b3c546 6 uint16_t I2Cdev::readTimeout = I2CDEV_DEFAULT_READ_TIMEOUT;
lixianyu 0:a4d8f5b3c546 7
lixianyu 0:a4d8f5b3c546 8 /** Default constructor.
lixianyu 0:a4d8f5b3c546 9 */
lixianyu 0:a4d8f5b3c546 10 I2Cdev::I2Cdev()
lixianyu 0:a4d8f5b3c546 11 {
lixianyu 0:a4d8f5b3c546 12 g_i2c.frequency(400000);
lixianyu 0:a4d8f5b3c546 13 }
lixianyu 0:a4d8f5b3c546 14
lixianyu 0:a4d8f5b3c546 15 /** Read a single bit from an 8-bit device register.
lixianyu 0:a4d8f5b3c546 16 * @param devAddr I2C slave device address
lixianyu 0:a4d8f5b3c546 17 * @param regAddr Register regAddr to read from
lixianyu 0:a4d8f5b3c546 18 * @param bitNum Bit position to read (0-7)
lixianyu 0:a4d8f5b3c546 19 * @param data Container for single bit value
lixianyu 0:a4d8f5b3c546 20 * @param timeout Optional read timeout in milliseconds (0 to disable, leave off to use default class value in I2Cdev::readTimeout)
lixianyu 0:a4d8f5b3c546 21 * @return Status of read operation (true = success)
lixianyu 0:a4d8f5b3c546 22 */
lixianyu 0:a4d8f5b3c546 23 int8_t I2Cdev::readBit(uint8_t devAddr, uint8_t regAddr, uint8_t bitNum, uint8_t *data, uint16_t timeout)
lixianyu 0:a4d8f5b3c546 24 {
lixianyu 0:a4d8f5b3c546 25 uint8_t b;
lixianyu 0:a4d8f5b3c546 26 uint8_t count = readByte(devAddr, regAddr, &b, timeout);
lixianyu 0:a4d8f5b3c546 27 *data = b & (1 << bitNum);
lixianyu 0:a4d8f5b3c546 28 return count;
lixianyu 0:a4d8f5b3c546 29 }
lixianyu 0:a4d8f5b3c546 30
lixianyu 0:a4d8f5b3c546 31 /** Read a single bit from a 16-bit device register.
lixianyu 0:a4d8f5b3c546 32 * @param devAddr I2C slave device address
lixianyu 0:a4d8f5b3c546 33 * @param regAddr Register regAddr to read from
lixianyu 0:a4d8f5b3c546 34 * @param bitNum Bit position to read (0-15)
lixianyu 0:a4d8f5b3c546 35 * @param data Container for single bit value
lixianyu 0:a4d8f5b3c546 36 * @param timeout Optional read timeout in milliseconds (0 to disable, leave off to use default class value in I2Cdev::readTimeout)
lixianyu 0:a4d8f5b3c546 37 * @return Status of read operation (true = success)
lixianyu 0:a4d8f5b3c546 38 */
lixianyu 0:a4d8f5b3c546 39 int8_t I2Cdev::readBitW(uint8_t devAddr, uint8_t regAddr, uint8_t bitNum, uint16_t *data, uint16_t timeout)
lixianyu 0:a4d8f5b3c546 40 {
lixianyu 0:a4d8f5b3c546 41 uint16_t b;
lixianyu 0:a4d8f5b3c546 42 uint8_t count = readWord(devAddr, regAddr, &b, timeout);
lixianyu 0:a4d8f5b3c546 43 *data = b & (1 << bitNum);
lixianyu 0:a4d8f5b3c546 44 return count;
lixianyu 0:a4d8f5b3c546 45 }
lixianyu 0:a4d8f5b3c546 46
lixianyu 0:a4d8f5b3c546 47 /** Read multiple bits from an 8-bit device register.
lixianyu 0:a4d8f5b3c546 48 * @param devAddr I2C slave device address
lixianyu 0:a4d8f5b3c546 49 * @param regAddr Register regAddr to read from
lixianyu 0:a4d8f5b3c546 50 * @param bitStart First bit position to read (0-7)
lixianyu 0:a4d8f5b3c546 51 * @param length Number of bits to read (not more than 8)
lixianyu 0:a4d8f5b3c546 52 * @param data Container for right-aligned value (i.e. '101' read from any bitStart position will equal 0x05)
lixianyu 0:a4d8f5b3c546 53 * @param timeout Optional read timeout in milliseconds (0 to disable, leave off to use default class value in I2Cdev::readTimeout)
lixianyu 0:a4d8f5b3c546 54 * @return Status of read operation (true = success)
lixianyu 0:a4d8f5b3c546 55 */
lixianyu 0:a4d8f5b3c546 56 int8_t I2Cdev::readBits(uint8_t devAddr, uint8_t regAddr, uint8_t bitStart, uint8_t length, uint8_t *data, uint16_t timeout)
lixianyu 0:a4d8f5b3c546 57 {
lixianyu 0:a4d8f5b3c546 58 // 01101001 read byte
lixianyu 0:a4d8f5b3c546 59 // 76543210 bit numbers
lixianyu 0:a4d8f5b3c546 60 // xxx args: bitStart=4, length=3
lixianyu 0:a4d8f5b3c546 61 // 010 masked
lixianyu 0:a4d8f5b3c546 62 // -> 010 shifted
lixianyu 0:a4d8f5b3c546 63 uint8_t count, b;
lixianyu 0:a4d8f5b3c546 64 if ((count = readByte(devAddr, regAddr, &b, timeout)) != 0) {
lixianyu 0:a4d8f5b3c546 65 uint8_t mask = ((1 << length) - 1) << (bitStart - length + 1);
lixianyu 0:a4d8f5b3c546 66 b &= mask;
lixianyu 0:a4d8f5b3c546 67 b >>= (bitStart - length + 1);
lixianyu 0:a4d8f5b3c546 68 *data = b;
lixianyu 0:a4d8f5b3c546 69 }
lixianyu 0:a4d8f5b3c546 70 return count;
lixianyu 0:a4d8f5b3c546 71 }
lixianyu 0:a4d8f5b3c546 72
lixianyu 0:a4d8f5b3c546 73 /** Read multiple bits from a 16-bit device register.
lixianyu 0:a4d8f5b3c546 74 * @param devAddr I2C slave device address
lixianyu 0:a4d8f5b3c546 75 * @param regAddr Register regAddr to read from
lixianyu 0:a4d8f5b3c546 76 * @param bitStart First bit position to read (0-15)
lixianyu 0:a4d8f5b3c546 77 * @param length Number of bits to read (not more than 16)
lixianyu 0:a4d8f5b3c546 78 * @param data Container for right-aligned value (i.e. '101' read from any bitStart position will equal 0x05)
lixianyu 0:a4d8f5b3c546 79 * @param timeout Optional read timeout in milliseconds (0 to disable, leave off to use default class value in I2Cdev::readTimeout)
lixianyu 0:a4d8f5b3c546 80 * @return Status of read operation (1 = success, 0 = failure, -1 = timeout)
lixianyu 0:a4d8f5b3c546 81 */
lixianyu 0:a4d8f5b3c546 82 int8_t I2Cdev::readBitsW(uint8_t devAddr, uint8_t regAddr, uint8_t bitStart, uint8_t length, uint16_t *data, uint16_t timeout)
lixianyu 0:a4d8f5b3c546 83 {
lixianyu 0:a4d8f5b3c546 84 // 1101011001101001 read byte
lixianyu 0:a4d8f5b3c546 85 // fedcba9876543210 bit numbers
lixianyu 0:a4d8f5b3c546 86 // xxx args: bitStart=12, length=3
lixianyu 0:a4d8f5b3c546 87 // 010 masked
lixianyu 0:a4d8f5b3c546 88 // -> 010 shifted
lixianyu 0:a4d8f5b3c546 89 uint8_t count;
lixianyu 0:a4d8f5b3c546 90 uint16_t w;
lixianyu 0:a4d8f5b3c546 91 if ((count = readWord(devAddr, regAddr, &w, timeout)) != 0) {
lixianyu 0:a4d8f5b3c546 92 uint16_t mask = ((1 << length) - 1) << (bitStart - length + 1);
lixianyu 0:a4d8f5b3c546 93 w &= mask;
lixianyu 0:a4d8f5b3c546 94 w >>= (bitStart - length + 1);
lixianyu 0:a4d8f5b3c546 95 *data = w;
lixianyu 0:a4d8f5b3c546 96 }
lixianyu 0:a4d8f5b3c546 97 return count;
lixianyu 0:a4d8f5b3c546 98 }
lixianyu 0:a4d8f5b3c546 99
lixianyu 0:a4d8f5b3c546 100 /** Read single byte from an 8-bit device register.
lixianyu 0:a4d8f5b3c546 101 * @param devAddr I2C slave device address
lixianyu 0:a4d8f5b3c546 102 * @param regAddr Register regAddr to read from
lixianyu 0:a4d8f5b3c546 103 * @param data Container for byte value read from device
lixianyu 0:a4d8f5b3c546 104 * @param timeout Optional read timeout in milliseconds (0 to disable, leave off to use default class value in I2Cdev::readTimeout)
lixianyu 0:a4d8f5b3c546 105 * @return Status of read operation (true = success)
lixianyu 0:a4d8f5b3c546 106 */
lixianyu 0:a4d8f5b3c546 107 int8_t I2Cdev::readByte(uint8_t devAddr, uint8_t regAddr, uint8_t *data, uint16_t timeout)
lixianyu 0:a4d8f5b3c546 108 {
lixianyu 0:a4d8f5b3c546 109 return readBytes(devAddr, regAddr, 1, data, timeout);
lixianyu 0:a4d8f5b3c546 110 }
lixianyu 0:a4d8f5b3c546 111
lixianyu 0:a4d8f5b3c546 112 /** Read single word from a 16-bit device register.
lixianyu 0:a4d8f5b3c546 113 * @param devAddr I2C slave device address
lixianyu 0:a4d8f5b3c546 114 * @param regAddr Register regAddr to read from
lixianyu 0:a4d8f5b3c546 115 * @param data Container for word value read from device
lixianyu 0:a4d8f5b3c546 116 * @param timeout Optional read timeout in milliseconds (0 to disable, leave off to use default class value in I2Cdev::readTimeout)
lixianyu 0:a4d8f5b3c546 117 * @return Status of read operation (true = success)
lixianyu 0:a4d8f5b3c546 118 */
lixianyu 0:a4d8f5b3c546 119 int8_t I2Cdev::readWord(uint8_t devAddr, uint8_t regAddr, uint16_t *data, uint16_t timeout)
lixianyu 0:a4d8f5b3c546 120 {
lixianyu 0:a4d8f5b3c546 121 return readWords(devAddr, regAddr, 1, data, timeout);
lixianyu 0:a4d8f5b3c546 122 }
lixianyu 0:a4d8f5b3c546 123
lixianyu 0:a4d8f5b3c546 124 /** Read multiple bytes from an 8-bit device register.
lixianyu 0:a4d8f5b3c546 125 * @param devAddr I2C slave device address
lixianyu 0:a4d8f5b3c546 126 * @param regAddr First register regAddr to read from
lixianyu 0:a4d8f5b3c546 127 * @param length Number of bytes to read
lixianyu 0:a4d8f5b3c546 128 * @param data Buffer to store read data in
lixianyu 0:a4d8f5b3c546 129 * @param timeout Optional read timeout in milliseconds (0 to disable, leave off to use default class value in I2Cdev::readTimeout)
lixianyu 0:a4d8f5b3c546 130 * @return Number of bytes read (-1 indicates failure)
lixianyu 0:a4d8f5b3c546 131 */
lixianyu 0:a4d8f5b3c546 132 int8_t I2Cdev::readBytes(uint8_t devAddr, uint8_t regAddr, uint8_t length, uint8_t *data, uint16_t timeout)
lixianyu 0:a4d8f5b3c546 133 {
lixianyu 0:a4d8f5b3c546 134 g_i2c.write(devAddr << 1, (char*)&regAddr, 1, false);
lixianyu 0:a4d8f5b3c546 135 uint8_t realReadAddr = (devAddr << 1) | 0x01;
lixianyu 0:a4d8f5b3c546 136 int retRead = g_i2c.read(realReadAddr, (char*)data, length);
lixianyu 0:a4d8f5b3c546 137 if (retRead == 0) {
lixianyu 0:a4d8f5b3c546 138 return length;
lixianyu 0:a4d8f5b3c546 139 }
lixianyu 0:a4d8f5b3c546 140 return -1;
lixianyu 0:a4d8f5b3c546 141 }
lixianyu 0:a4d8f5b3c546 142
lixianyu 0:a4d8f5b3c546 143 /** Read multiple words from a 16-bit device register.
lixianyu 0:a4d8f5b3c546 144 * @param devAddr I2C slave device address
lixianyu 0:a4d8f5b3c546 145 * @param regAddr First register regAddr to read from
lixianyu 0:a4d8f5b3c546 146 * @param length Number of words to read
lixianyu 0:a4d8f5b3c546 147 * @param data Buffer to store read data in
lixianyu 0:a4d8f5b3c546 148 * @param timeout Optional read timeout in milliseconds (0 to disable, leave off to use default class value in I2Cdev::readTimeout)
lixianyu 0:a4d8f5b3c546 149 * @return Number of words read (0 indicates failure)
lixianyu 0:a4d8f5b3c546 150 */
lixianyu 0:a4d8f5b3c546 151 int8_t I2Cdev::readWords(uint8_t devAddr, uint8_t regAddr, uint8_t length, uint16_t *data, uint16_t timeout)
lixianyu 0:a4d8f5b3c546 152 {
lixianyu 0:a4d8f5b3c546 153 g_i2c.write(devAddr << 1, (char*)&regAddr, 1, false);
lixianyu 0:a4d8f5b3c546 154 uint8_t realReadAddr = (devAddr << 1) | 0x01;
lixianyu 0:a4d8f5b3c546 155 int retRead = g_i2c.read(realReadAddr, (char*)data, length*2);
lixianyu 0:a4d8f5b3c546 156 if (retRead == 0) {
lixianyu 0:a4d8f5b3c546 157 return length;
lixianyu 0:a4d8f5b3c546 158 }
lixianyu 0:a4d8f5b3c546 159 return 0;
lixianyu 0:a4d8f5b3c546 160 }
lixianyu 0:a4d8f5b3c546 161
lixianyu 0:a4d8f5b3c546 162 /** write a single bit in an 8-bit device register.
lixianyu 0:a4d8f5b3c546 163 * @param devAddr I2C slave device address
lixianyu 0:a4d8f5b3c546 164 * @param regAddr Register regAddr to write to
lixianyu 0:a4d8f5b3c546 165 * @param bitNum Bit position to write (0-7)
lixianyu 0:a4d8f5b3c546 166 * @param value New bit value to write
lixianyu 0:a4d8f5b3c546 167 * @return Status of operation (true = success)
lixianyu 0:a4d8f5b3c546 168 */
lixianyu 0:a4d8f5b3c546 169 bool I2Cdev::writeBit(uint8_t devAddr, uint8_t regAddr, uint8_t bitNum, uint8_t data)
lixianyu 0:a4d8f5b3c546 170 {
lixianyu 0:a4d8f5b3c546 171 uint8_t b;
lixianyu 0:a4d8f5b3c546 172 readByte(devAddr, regAddr, &b);
lixianyu 0:a4d8f5b3c546 173 b = (data != 0) ? (b | (1 << bitNum)) : (b & ~(1 << bitNum));
lixianyu 0:a4d8f5b3c546 174 return writeByte(devAddr, regAddr, b);
lixianyu 0:a4d8f5b3c546 175 }
lixianyu 0:a4d8f5b3c546 176
lixianyu 0:a4d8f5b3c546 177 /** write a single bit in a 16-bit device register.
lixianyu 0:a4d8f5b3c546 178 * @param devAddr I2C slave device address
lixianyu 0:a4d8f5b3c546 179 * @param regAddr Register regAddr to write to
lixianyu 0:a4d8f5b3c546 180 * @param bitNum Bit position to write (0-15)
lixianyu 0:a4d8f5b3c546 181 * @param value New bit value to write
lixianyu 0:a4d8f5b3c546 182 * @return Status of operation (true = success)
lixianyu 0:a4d8f5b3c546 183 */
lixianyu 0:a4d8f5b3c546 184 bool I2Cdev::writeBitW(uint8_t devAddr, uint8_t regAddr, uint8_t bitNum, uint16_t data)
lixianyu 0:a4d8f5b3c546 185 {
lixianyu 0:a4d8f5b3c546 186 uint16_t w;
lixianyu 0:a4d8f5b3c546 187 readWord(devAddr, regAddr, &w);
lixianyu 0:a4d8f5b3c546 188 w = (data != 0) ? (w | (1 << bitNum)) : (w & ~(1 << bitNum));
lixianyu 0:a4d8f5b3c546 189 return writeWord(devAddr, regAddr, w);
lixianyu 0:a4d8f5b3c546 190 }
lixianyu 0:a4d8f5b3c546 191
lixianyu 0:a4d8f5b3c546 192 /** Write multiple bits in an 8-bit device register.
lixianyu 0:a4d8f5b3c546 193 * @param devAddr I2C slave device address
lixianyu 0:a4d8f5b3c546 194 * @param regAddr Register regAddr to write to
lixianyu 0:a4d8f5b3c546 195 * @param bitStart First bit position to write (0-7)
lixianyu 0:a4d8f5b3c546 196 * @param length Number of bits to write (not more than 8)
lixianyu 0:a4d8f5b3c546 197 * @param data Right-aligned value to write
lixianyu 0:a4d8f5b3c546 198 * @return Status of operation (true = success)
lixianyu 0:a4d8f5b3c546 199 */
lixianyu 0:a4d8f5b3c546 200 bool I2Cdev::writeBits(uint8_t devAddr, uint8_t regAddr, uint8_t bitStart, uint8_t length, uint8_t data)
lixianyu 0:a4d8f5b3c546 201 {
lixianyu 0:a4d8f5b3c546 202 // 010 value to write
lixianyu 0:a4d8f5b3c546 203 // 76543210 bit numbers
lixianyu 0:a4d8f5b3c546 204 // xxx args: bitStart=4, length=3
lixianyu 0:a4d8f5b3c546 205 // 00011100 mask byte
lixianyu 0:a4d8f5b3c546 206 // 10101111 original value (sample)
lixianyu 0:a4d8f5b3c546 207 // 10100011 original & ~mask
lixianyu 0:a4d8f5b3c546 208 // 10101011 masked | value
lixianyu 0:a4d8f5b3c546 209 uint8_t b;
lixianyu 0:a4d8f5b3c546 210 if (readByte(devAddr, regAddr, &b) != 0) {
lixianyu 0:a4d8f5b3c546 211 uint8_t mask = ((1 << length) - 1) << (bitStart - length + 1);
lixianyu 0:a4d8f5b3c546 212 data <<= (bitStart - length + 1); // shift data into correct position
lixianyu 0:a4d8f5b3c546 213 data &= mask; // zero all non-important bits in data
lixianyu 0:a4d8f5b3c546 214 b &= ~(mask); // zero all important bits in existing byte
lixianyu 0:a4d8f5b3c546 215 b |= data; // combine data with existing byte
lixianyu 0:a4d8f5b3c546 216 return writeByte(devAddr, regAddr, b);
lixianyu 0:a4d8f5b3c546 217 } else {
lixianyu 0:a4d8f5b3c546 218 return false;
lixianyu 0:a4d8f5b3c546 219 }
lixianyu 0:a4d8f5b3c546 220 }
lixianyu 0:a4d8f5b3c546 221
lixianyu 0:a4d8f5b3c546 222 /** Write multiple bits in a 16-bit device register.
lixianyu 0:a4d8f5b3c546 223 * @param devAddr I2C slave device address
lixianyu 0:a4d8f5b3c546 224 * @param regAddr Register regAddr to write to
lixianyu 0:a4d8f5b3c546 225 * @param bitStart First bit position to write (0-15)
lixianyu 0:a4d8f5b3c546 226 * @param length Number of bits to write (not more than 16)
lixianyu 0:a4d8f5b3c546 227 * @param data Right-aligned value to write
lixianyu 0:a4d8f5b3c546 228 * @return Status of operation (true = success)
lixianyu 0:a4d8f5b3c546 229 */
lixianyu 0:a4d8f5b3c546 230 bool I2Cdev::writeBitsW(uint8_t devAddr, uint8_t regAddr, uint8_t bitStart, uint8_t length, uint16_t data)
lixianyu 0:a4d8f5b3c546 231 {
lixianyu 0:a4d8f5b3c546 232 // 010 value to write
lixianyu 0:a4d8f5b3c546 233 // fedcba9876543210 bit numbers
lixianyu 0:a4d8f5b3c546 234 // xxx args: bitStart=12, length=3
lixianyu 0:a4d8f5b3c546 235 // 0001110000000000 mask byte
lixianyu 0:a4d8f5b3c546 236 // 1010111110010110 original value (sample)
lixianyu 0:a4d8f5b3c546 237 // 1010001110010110 original & ~mask
lixianyu 0:a4d8f5b3c546 238 // 1010101110010110 masked | value
lixianyu 0:a4d8f5b3c546 239 uint16_t w;
lixianyu 0:a4d8f5b3c546 240 if (readWord(devAddr, regAddr, &w) != 0) {
lixianyu 0:a4d8f5b3c546 241 uint8_t mask = ((1 << length) - 1) << (bitStart - length + 1);
lixianyu 0:a4d8f5b3c546 242 data <<= (bitStart - length + 1); // shift data into correct position
lixianyu 0:a4d8f5b3c546 243 data &= mask; // zero all non-important bits in data
lixianyu 0:a4d8f5b3c546 244 w &= ~(mask); // zero all important bits in existing word
lixianyu 0:a4d8f5b3c546 245 w |= data; // combine data with existing word
lixianyu 0:a4d8f5b3c546 246 return writeWord(devAddr, regAddr, w);
lixianyu 0:a4d8f5b3c546 247 } else {
lixianyu 0:a4d8f5b3c546 248 return false;
lixianyu 0:a4d8f5b3c546 249 }
lixianyu 0:a4d8f5b3c546 250 }
lixianyu 0:a4d8f5b3c546 251
lixianyu 0:a4d8f5b3c546 252 /** Write single byte to an 8-bit device register.
lixianyu 0:a4d8f5b3c546 253 * @param devAddr I2C slave device address
lixianyu 0:a4d8f5b3c546 254 * @param regAddr Register address to write to
lixianyu 0:a4d8f5b3c546 255 * @param data New byte value to write
lixianyu 0:a4d8f5b3c546 256 * @return Status of operation (true = success)
lixianyu 0:a4d8f5b3c546 257 */
lixianyu 0:a4d8f5b3c546 258 bool I2Cdev::writeByte(uint8_t devAddr, uint8_t regAddr, uint8_t data)
lixianyu 0:a4d8f5b3c546 259 {
lixianyu 0:a4d8f5b3c546 260 return writeBytes(devAddr, regAddr, 1, &data);
lixianyu 0:a4d8f5b3c546 261 }
lixianyu 0:a4d8f5b3c546 262
lixianyu 0:a4d8f5b3c546 263 /** Write single word to a 16-bit device register.
lixianyu 0:a4d8f5b3c546 264 * @param devAddr I2C slave device address
lixianyu 0:a4d8f5b3c546 265 * @param regAddr Register address to write to
lixianyu 0:a4d8f5b3c546 266 * @param data New word value to write
lixianyu 0:a4d8f5b3c546 267 * @return Status of operation (true = success)
lixianyu 0:a4d8f5b3c546 268 */
lixianyu 0:a4d8f5b3c546 269 bool I2Cdev::writeWord(uint8_t devAddr, uint8_t regAddr, uint16_t data)
lixianyu 0:a4d8f5b3c546 270 {
lixianyu 0:a4d8f5b3c546 271 return writeWords(devAddr, regAddr, 1, &data);
lixianyu 0:a4d8f5b3c546 272 }
lixianyu 0:a4d8f5b3c546 273
lixianyu 0:a4d8f5b3c546 274 /** Write multiple bytes to an 8-bit device register.
lixianyu 0:a4d8f5b3c546 275 * @param devAddr I2C slave device address
lixianyu 0:a4d8f5b3c546 276 * @param regAddr First register address to write to
lixianyu 0:a4d8f5b3c546 277 * @param length Number of bytes to write
lixianyu 0:a4d8f5b3c546 278 * @param data Buffer to copy new data from
lixianyu 0:a4d8f5b3c546 279 * @return Status of operation (true = success)
lixianyu 0:a4d8f5b3c546 280 */
lixianyu 0:a4d8f5b3c546 281 bool I2Cdev::writeBytes(uint8_t devAddr, uint8_t regAddr, uint8_t length, uint8_t* data)
lixianyu 0:a4d8f5b3c546 282 {
lixianyu 0:a4d8f5b3c546 283 uint8_t i;
lixianyu 0:a4d8f5b3c546 284 uint8_t *p = buffer;
lixianyu 0:a4d8f5b3c546 285
lixianyu 0:a4d8f5b3c546 286 /* Copy address and data to local buffer for burst write */
lixianyu 0:a4d8f5b3c546 287 *p++ = regAddr;
lixianyu 0:a4d8f5b3c546 288 for (i = 0; i < length; i++) {
lixianyu 0:a4d8f5b3c546 289 *p++ = *data++;
lixianyu 0:a4d8f5b3c546 290 }
lixianyu 0:a4d8f5b3c546 291 length++;
lixianyu 0:a4d8f5b3c546 292 /* Send address and data */
lixianyu 0:a4d8f5b3c546 293 int status = g_i2c.write(devAddr << 1, (char*)buffer, length, false);
lixianyu 0:a4d8f5b3c546 294 return status == 0;
lixianyu 0:a4d8f5b3c546 295 }
lixianyu 0:a4d8f5b3c546 296
lixianyu 0:a4d8f5b3c546 297 /** Write multiple words to a 16-bit device register.
lixianyu 0:a4d8f5b3c546 298 * @param devAddr I2C slave device address
lixianyu 0:a4d8f5b3c546 299 * @param regAddr First register address to write to
lixianyu 0:a4d8f5b3c546 300 * @param length Number of words to write
lixianyu 0:a4d8f5b3c546 301 * @param data Buffer to copy new data from
lixianyu 0:a4d8f5b3c546 302 * @return Status of operation (true = success)
lixianyu 0:a4d8f5b3c546 303 */
lixianyu 0:a4d8f5b3c546 304 bool I2Cdev::writeWords(uint8_t devAddr, uint8_t regAddr, uint8_t length, uint16_t* data)
lixianyu 0:a4d8f5b3c546 305 {
lixianyu 0:a4d8f5b3c546 306 uint16_t i;
lixianyu 0:a4d8f5b3c546 307 uint8_t *p = buffer;
lixianyu 0:a4d8f5b3c546 308 uint16_t realLen = length * 2;
lixianyu 0:a4d8f5b3c546 309
lixianyu 0:a4d8f5b3c546 310 /* Copy address and data to local buffer for burst write */
lixianyu 0:a4d8f5b3c546 311 *p++ = regAddr;
lixianyu 0:a4d8f5b3c546 312 for (i = 0; i < realLen; i++) {
lixianyu 0:a4d8f5b3c546 313 *p++ = *data++;
lixianyu 0:a4d8f5b3c546 314 }
lixianyu 0:a4d8f5b3c546 315 realLen++;
lixianyu 0:a4d8f5b3c546 316 /* Send address and data */
lixianyu 0:a4d8f5b3c546 317 int status = g_i2c.write(devAddr << 1, (char*)buffer, realLen, false);
lixianyu 0:a4d8f5b3c546 318 return status == 0;
lixianyu 0:a4d8f5b3c546 319 }