Li Weiyi
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BalanceCar
虽然移植完毕,但是不work。需要细调……
I2Cdev.cpp@2:99785a1007a4, 2016-06-07 (annotated)
- Committer:
- lixianyu
- Date:
- Tue Jun 07 05:26:03 2016 +0000
- Revision:
- 2:99785a1007a4
- Parent:
- 0:a4d8f5b3c546
Still not work......commit first.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
lixianyu | 0:a4d8f5b3c546 | 1 | #include "I2Cdev.h" |
lixianyu | 0:a4d8f5b3c546 | 2 | |
lixianyu | 2:99785a1007a4 | 3 | extern DigitalOut myled; |
lixianyu | 0:a4d8f5b3c546 | 4 | static uint8_t buffer[24]; |
lixianyu | 0:a4d8f5b3c546 | 5 | I2C g_i2c(P0_11, P0_10); |
lixianyu | 0:a4d8f5b3c546 | 6 | |
lixianyu | 0:a4d8f5b3c546 | 7 | uint16_t I2Cdev::readTimeout = I2CDEV_DEFAULT_READ_TIMEOUT; |
lixianyu | 0:a4d8f5b3c546 | 8 | |
lixianyu | 2:99785a1007a4 | 9 | void I2Cdev::init() |
lixianyu | 2:99785a1007a4 | 10 | { |
lixianyu | 2:99785a1007a4 | 11 | g_i2c.frequency(267000); |
lixianyu | 2:99785a1007a4 | 12 | } |
lixianyu | 2:99785a1007a4 | 13 | |
lixianyu | 0:a4d8f5b3c546 | 14 | /** Default constructor. |
lixianyu | 0:a4d8f5b3c546 | 15 | */ |
lixianyu | 0:a4d8f5b3c546 | 16 | I2Cdev::I2Cdev() |
lixianyu | 0:a4d8f5b3c546 | 17 | { |
lixianyu | 0:a4d8f5b3c546 | 18 | g_i2c.frequency(400000); |
lixianyu | 2:99785a1007a4 | 19 | //myled = 1; |
lixianyu | 0:a4d8f5b3c546 | 20 | } |
lixianyu | 0:a4d8f5b3c546 | 21 | |
lixianyu | 0:a4d8f5b3c546 | 22 | /** Read a single bit from an 8-bit device register. |
lixianyu | 0:a4d8f5b3c546 | 23 | * @param devAddr I2C slave device address |
lixianyu | 0:a4d8f5b3c546 | 24 | * @param regAddr Register regAddr to read from |
lixianyu | 0:a4d8f5b3c546 | 25 | * @param bitNum Bit position to read (0-7) |
lixianyu | 0:a4d8f5b3c546 | 26 | * @param data Container for single bit value |
lixianyu | 0:a4d8f5b3c546 | 27 | * @param timeout Optional read timeout in milliseconds (0 to disable, leave off to use default class value in I2Cdev::readTimeout) |
lixianyu | 0:a4d8f5b3c546 | 28 | * @return Status of read operation (true = success) |
lixianyu | 0:a4d8f5b3c546 | 29 | */ |
lixianyu | 0:a4d8f5b3c546 | 30 | int8_t I2Cdev::readBit(uint8_t devAddr, uint8_t regAddr, uint8_t bitNum, uint8_t *data, uint16_t timeout) |
lixianyu | 0:a4d8f5b3c546 | 31 | { |
lixianyu | 0:a4d8f5b3c546 | 32 | uint8_t b; |
lixianyu | 0:a4d8f5b3c546 | 33 | uint8_t count = readByte(devAddr, regAddr, &b, timeout); |
lixianyu | 0:a4d8f5b3c546 | 34 | *data = b & (1 << bitNum); |
lixianyu | 0:a4d8f5b3c546 | 35 | return count; |
lixianyu | 0:a4d8f5b3c546 | 36 | } |
lixianyu | 0:a4d8f5b3c546 | 37 | |
lixianyu | 0:a4d8f5b3c546 | 38 | /** Read a single bit from a 16-bit device register. |
lixianyu | 0:a4d8f5b3c546 | 39 | * @param devAddr I2C slave device address |
lixianyu | 0:a4d8f5b3c546 | 40 | * @param regAddr Register regAddr to read from |
lixianyu | 0:a4d8f5b3c546 | 41 | * @param bitNum Bit position to read (0-15) |
lixianyu | 0:a4d8f5b3c546 | 42 | * @param data Container for single bit value |
lixianyu | 0:a4d8f5b3c546 | 43 | * @param timeout Optional read timeout in milliseconds (0 to disable, leave off to use default class value in I2Cdev::readTimeout) |
lixianyu | 0:a4d8f5b3c546 | 44 | * @return Status of read operation (true = success) |
lixianyu | 0:a4d8f5b3c546 | 45 | */ |
lixianyu | 0:a4d8f5b3c546 | 46 | int8_t I2Cdev::readBitW(uint8_t devAddr, uint8_t regAddr, uint8_t bitNum, uint16_t *data, uint16_t timeout) |
lixianyu | 0:a4d8f5b3c546 | 47 | { |
lixianyu | 0:a4d8f5b3c546 | 48 | uint16_t b; |
lixianyu | 0:a4d8f5b3c546 | 49 | uint8_t count = readWord(devAddr, regAddr, &b, timeout); |
lixianyu | 0:a4d8f5b3c546 | 50 | *data = b & (1 << bitNum); |
lixianyu | 0:a4d8f5b3c546 | 51 | return count; |
lixianyu | 0:a4d8f5b3c546 | 52 | } |
lixianyu | 0:a4d8f5b3c546 | 53 | |
lixianyu | 0:a4d8f5b3c546 | 54 | /** Read multiple bits from an 8-bit device register. |
lixianyu | 0:a4d8f5b3c546 | 55 | * @param devAddr I2C slave device address |
lixianyu | 0:a4d8f5b3c546 | 56 | * @param regAddr Register regAddr to read from |
lixianyu | 0:a4d8f5b3c546 | 57 | * @param bitStart First bit position to read (0-7) |
lixianyu | 0:a4d8f5b3c546 | 58 | * @param length Number of bits to read (not more than 8) |
lixianyu | 0:a4d8f5b3c546 | 59 | * @param data Container for right-aligned value (i.e. '101' read from any bitStart position will equal 0x05) |
lixianyu | 0:a4d8f5b3c546 | 60 | * @param timeout Optional read timeout in milliseconds (0 to disable, leave off to use default class value in I2Cdev::readTimeout) |
lixianyu | 0:a4d8f5b3c546 | 61 | * @return Status of read operation (true = success) |
lixianyu | 0:a4d8f5b3c546 | 62 | */ |
lixianyu | 0:a4d8f5b3c546 | 63 | int8_t I2Cdev::readBits(uint8_t devAddr, uint8_t regAddr, uint8_t bitStart, uint8_t length, uint8_t *data, uint16_t timeout) |
lixianyu | 0:a4d8f5b3c546 | 64 | { |
lixianyu | 0:a4d8f5b3c546 | 65 | // 01101001 read byte |
lixianyu | 0:a4d8f5b3c546 | 66 | // 76543210 bit numbers |
lixianyu | 0:a4d8f5b3c546 | 67 | // xxx args: bitStart=4, length=3 |
lixianyu | 0:a4d8f5b3c546 | 68 | // 010 masked |
lixianyu | 0:a4d8f5b3c546 | 69 | // -> 010 shifted |
lixianyu | 0:a4d8f5b3c546 | 70 | uint8_t count, b; |
lixianyu | 0:a4d8f5b3c546 | 71 | if ((count = readByte(devAddr, regAddr, &b, timeout)) != 0) { |
lixianyu | 0:a4d8f5b3c546 | 72 | uint8_t mask = ((1 << length) - 1) << (bitStart - length + 1); |
lixianyu | 0:a4d8f5b3c546 | 73 | b &= mask; |
lixianyu | 0:a4d8f5b3c546 | 74 | b >>= (bitStart - length + 1); |
lixianyu | 0:a4d8f5b3c546 | 75 | *data = b; |
lixianyu | 0:a4d8f5b3c546 | 76 | } |
lixianyu | 0:a4d8f5b3c546 | 77 | return count; |
lixianyu | 0:a4d8f5b3c546 | 78 | } |
lixianyu | 0:a4d8f5b3c546 | 79 | |
lixianyu | 0:a4d8f5b3c546 | 80 | /** Read multiple bits from a 16-bit device register. |
lixianyu | 0:a4d8f5b3c546 | 81 | * @param devAddr I2C slave device address |
lixianyu | 0:a4d8f5b3c546 | 82 | * @param regAddr Register regAddr to read from |
lixianyu | 0:a4d8f5b3c546 | 83 | * @param bitStart First bit position to read (0-15) |
lixianyu | 0:a4d8f5b3c546 | 84 | * @param length Number of bits to read (not more than 16) |
lixianyu | 0:a4d8f5b3c546 | 85 | * @param data Container for right-aligned value (i.e. '101' read from any bitStart position will equal 0x05) |
lixianyu | 0:a4d8f5b3c546 | 86 | * @param timeout Optional read timeout in milliseconds (0 to disable, leave off to use default class value in I2Cdev::readTimeout) |
lixianyu | 0:a4d8f5b3c546 | 87 | * @return Status of read operation (1 = success, 0 = failure, -1 = timeout) |
lixianyu | 0:a4d8f5b3c546 | 88 | */ |
lixianyu | 0:a4d8f5b3c546 | 89 | int8_t I2Cdev::readBitsW(uint8_t devAddr, uint8_t regAddr, uint8_t bitStart, uint8_t length, uint16_t *data, uint16_t timeout) |
lixianyu | 0:a4d8f5b3c546 | 90 | { |
lixianyu | 0:a4d8f5b3c546 | 91 | // 1101011001101001 read byte |
lixianyu | 0:a4d8f5b3c546 | 92 | // fedcba9876543210 bit numbers |
lixianyu | 0:a4d8f5b3c546 | 93 | // xxx args: bitStart=12, length=3 |
lixianyu | 0:a4d8f5b3c546 | 94 | // 010 masked |
lixianyu | 0:a4d8f5b3c546 | 95 | // -> 010 shifted |
lixianyu | 0:a4d8f5b3c546 | 96 | uint8_t count; |
lixianyu | 0:a4d8f5b3c546 | 97 | uint16_t w; |
lixianyu | 0:a4d8f5b3c546 | 98 | if ((count = readWord(devAddr, regAddr, &w, timeout)) != 0) { |
lixianyu | 0:a4d8f5b3c546 | 99 | uint16_t mask = ((1 << length) - 1) << (bitStart - length + 1); |
lixianyu | 0:a4d8f5b3c546 | 100 | w &= mask; |
lixianyu | 0:a4d8f5b3c546 | 101 | w >>= (bitStart - length + 1); |
lixianyu | 0:a4d8f5b3c546 | 102 | *data = w; |
lixianyu | 0:a4d8f5b3c546 | 103 | } |
lixianyu | 0:a4d8f5b3c546 | 104 | return count; |
lixianyu | 0:a4d8f5b3c546 | 105 | } |
lixianyu | 0:a4d8f5b3c546 | 106 | |
lixianyu | 0:a4d8f5b3c546 | 107 | /** Read single byte from an 8-bit device register. |
lixianyu | 0:a4d8f5b3c546 | 108 | * @param devAddr I2C slave device address |
lixianyu | 0:a4d8f5b3c546 | 109 | * @param regAddr Register regAddr to read from |
lixianyu | 0:a4d8f5b3c546 | 110 | * @param data Container for byte value read from device |
lixianyu | 0:a4d8f5b3c546 | 111 | * @param timeout Optional read timeout in milliseconds (0 to disable, leave off to use default class value in I2Cdev::readTimeout) |
lixianyu | 0:a4d8f5b3c546 | 112 | * @return Status of read operation (true = success) |
lixianyu | 0:a4d8f5b3c546 | 113 | */ |
lixianyu | 0:a4d8f5b3c546 | 114 | int8_t I2Cdev::readByte(uint8_t devAddr, uint8_t regAddr, uint8_t *data, uint16_t timeout) |
lixianyu | 0:a4d8f5b3c546 | 115 | { |
lixianyu | 0:a4d8f5b3c546 | 116 | return readBytes(devAddr, regAddr, 1, data, timeout); |
lixianyu | 0:a4d8f5b3c546 | 117 | } |
lixianyu | 0:a4d8f5b3c546 | 118 | |
lixianyu | 0:a4d8f5b3c546 | 119 | /** Read single word from a 16-bit device register. |
lixianyu | 0:a4d8f5b3c546 | 120 | * @param devAddr I2C slave device address |
lixianyu | 0:a4d8f5b3c546 | 121 | * @param regAddr Register regAddr to read from |
lixianyu | 0:a4d8f5b3c546 | 122 | * @param data Container for word value read from device |
lixianyu | 0:a4d8f5b3c546 | 123 | * @param timeout Optional read timeout in milliseconds (0 to disable, leave off to use default class value in I2Cdev::readTimeout) |
lixianyu | 0:a4d8f5b3c546 | 124 | * @return Status of read operation (true = success) |
lixianyu | 0:a4d8f5b3c546 | 125 | */ |
lixianyu | 0:a4d8f5b3c546 | 126 | int8_t I2Cdev::readWord(uint8_t devAddr, uint8_t regAddr, uint16_t *data, uint16_t timeout) |
lixianyu | 0:a4d8f5b3c546 | 127 | { |
lixianyu | 0:a4d8f5b3c546 | 128 | return readWords(devAddr, regAddr, 1, data, timeout); |
lixianyu | 0:a4d8f5b3c546 | 129 | } |
lixianyu | 0:a4d8f5b3c546 | 130 | |
lixianyu | 0:a4d8f5b3c546 | 131 | /** Read multiple bytes from an 8-bit device register. |
lixianyu | 0:a4d8f5b3c546 | 132 | * @param devAddr I2C slave device address |
lixianyu | 0:a4d8f5b3c546 | 133 | * @param regAddr First register regAddr to read from |
lixianyu | 0:a4d8f5b3c546 | 134 | * @param length Number of bytes to read |
lixianyu | 0:a4d8f5b3c546 | 135 | * @param data Buffer to store read data in |
lixianyu | 0:a4d8f5b3c546 | 136 | * @param timeout Optional read timeout in milliseconds (0 to disable, leave off to use default class value in I2Cdev::readTimeout) |
lixianyu | 0:a4d8f5b3c546 | 137 | * @return Number of bytes read (-1 indicates failure) |
lixianyu | 0:a4d8f5b3c546 | 138 | */ |
lixianyu | 0:a4d8f5b3c546 | 139 | int8_t I2Cdev::readBytes(uint8_t devAddr, uint8_t regAddr, uint8_t length, uint8_t *data, uint16_t timeout) |
lixianyu | 0:a4d8f5b3c546 | 140 | { |
lixianyu | 0:a4d8f5b3c546 | 141 | g_i2c.write(devAddr << 1, (char*)®Addr, 1, false); |
lixianyu | 0:a4d8f5b3c546 | 142 | uint8_t realReadAddr = (devAddr << 1) | 0x01; |
lixianyu | 0:a4d8f5b3c546 | 143 | int retRead = g_i2c.read(realReadAddr, (char*)data, length); |
lixianyu | 0:a4d8f5b3c546 | 144 | if (retRead == 0) { |
lixianyu | 0:a4d8f5b3c546 | 145 | return length; |
lixianyu | 0:a4d8f5b3c546 | 146 | } |
lixianyu | 0:a4d8f5b3c546 | 147 | return -1; |
lixianyu | 0:a4d8f5b3c546 | 148 | } |
lixianyu | 0:a4d8f5b3c546 | 149 | |
lixianyu | 0:a4d8f5b3c546 | 150 | /** Read multiple words from a 16-bit device register. |
lixianyu | 0:a4d8f5b3c546 | 151 | * @param devAddr I2C slave device address |
lixianyu | 0:a4d8f5b3c546 | 152 | * @param regAddr First register regAddr to read from |
lixianyu | 0:a4d8f5b3c546 | 153 | * @param length Number of words to read |
lixianyu | 0:a4d8f5b3c546 | 154 | * @param data Buffer to store read data in |
lixianyu | 0:a4d8f5b3c546 | 155 | * @param timeout Optional read timeout in milliseconds (0 to disable, leave off to use default class value in I2Cdev::readTimeout) |
lixianyu | 0:a4d8f5b3c546 | 156 | * @return Number of words read (0 indicates failure) |
lixianyu | 0:a4d8f5b3c546 | 157 | */ |
lixianyu | 0:a4d8f5b3c546 | 158 | int8_t I2Cdev::readWords(uint8_t devAddr, uint8_t regAddr, uint8_t length, uint16_t *data, uint16_t timeout) |
lixianyu | 0:a4d8f5b3c546 | 159 | { |
lixianyu | 0:a4d8f5b3c546 | 160 | g_i2c.write(devAddr << 1, (char*)®Addr, 1, false); |
lixianyu | 0:a4d8f5b3c546 | 161 | uint8_t realReadAddr = (devAddr << 1) | 0x01; |
lixianyu | 0:a4d8f5b3c546 | 162 | int retRead = g_i2c.read(realReadAddr, (char*)data, length*2); |
lixianyu | 0:a4d8f5b3c546 | 163 | if (retRead == 0) { |
lixianyu | 0:a4d8f5b3c546 | 164 | return length; |
lixianyu | 0:a4d8f5b3c546 | 165 | } |
lixianyu | 0:a4d8f5b3c546 | 166 | return 0; |
lixianyu | 0:a4d8f5b3c546 | 167 | } |
lixianyu | 0:a4d8f5b3c546 | 168 | |
lixianyu | 0:a4d8f5b3c546 | 169 | /** write a single bit in an 8-bit device register. |
lixianyu | 0:a4d8f5b3c546 | 170 | * @param devAddr I2C slave device address |
lixianyu | 0:a4d8f5b3c546 | 171 | * @param regAddr Register regAddr to write to |
lixianyu | 0:a4d8f5b3c546 | 172 | * @param bitNum Bit position to write (0-7) |
lixianyu | 0:a4d8f5b3c546 | 173 | * @param value New bit value to write |
lixianyu | 0:a4d8f5b3c546 | 174 | * @return Status of operation (true = success) |
lixianyu | 0:a4d8f5b3c546 | 175 | */ |
lixianyu | 0:a4d8f5b3c546 | 176 | bool I2Cdev::writeBit(uint8_t devAddr, uint8_t regAddr, uint8_t bitNum, uint8_t data) |
lixianyu | 0:a4d8f5b3c546 | 177 | { |
lixianyu | 0:a4d8f5b3c546 | 178 | uint8_t b; |
lixianyu | 0:a4d8f5b3c546 | 179 | readByte(devAddr, regAddr, &b); |
lixianyu | 0:a4d8f5b3c546 | 180 | b = (data != 0) ? (b | (1 << bitNum)) : (b & ~(1 << bitNum)); |
lixianyu | 0:a4d8f5b3c546 | 181 | return writeByte(devAddr, regAddr, b); |
lixianyu | 0:a4d8f5b3c546 | 182 | } |
lixianyu | 0:a4d8f5b3c546 | 183 | |
lixianyu | 0:a4d8f5b3c546 | 184 | /** write a single bit in a 16-bit device register. |
lixianyu | 0:a4d8f5b3c546 | 185 | * @param devAddr I2C slave device address |
lixianyu | 0:a4d8f5b3c546 | 186 | * @param regAddr Register regAddr to write to |
lixianyu | 0:a4d8f5b3c546 | 187 | * @param bitNum Bit position to write (0-15) |
lixianyu | 0:a4d8f5b3c546 | 188 | * @param value New bit value to write |
lixianyu | 0:a4d8f5b3c546 | 189 | * @return Status of operation (true = success) |
lixianyu | 0:a4d8f5b3c546 | 190 | */ |
lixianyu | 0:a4d8f5b3c546 | 191 | bool I2Cdev::writeBitW(uint8_t devAddr, uint8_t regAddr, uint8_t bitNum, uint16_t data) |
lixianyu | 0:a4d8f5b3c546 | 192 | { |
lixianyu | 0:a4d8f5b3c546 | 193 | uint16_t w; |
lixianyu | 0:a4d8f5b3c546 | 194 | readWord(devAddr, regAddr, &w); |
lixianyu | 0:a4d8f5b3c546 | 195 | w = (data != 0) ? (w | (1 << bitNum)) : (w & ~(1 << bitNum)); |
lixianyu | 0:a4d8f5b3c546 | 196 | return writeWord(devAddr, regAddr, w); |
lixianyu | 0:a4d8f5b3c546 | 197 | } |
lixianyu | 0:a4d8f5b3c546 | 198 | |
lixianyu | 0:a4d8f5b3c546 | 199 | /** Write multiple bits in an 8-bit device register. |
lixianyu | 0:a4d8f5b3c546 | 200 | * @param devAddr I2C slave device address |
lixianyu | 0:a4d8f5b3c546 | 201 | * @param regAddr Register regAddr to write to |
lixianyu | 0:a4d8f5b3c546 | 202 | * @param bitStart First bit position to write (0-7) |
lixianyu | 0:a4d8f5b3c546 | 203 | * @param length Number of bits to write (not more than 8) |
lixianyu | 0:a4d8f5b3c546 | 204 | * @param data Right-aligned value to write |
lixianyu | 0:a4d8f5b3c546 | 205 | * @return Status of operation (true = success) |
lixianyu | 0:a4d8f5b3c546 | 206 | */ |
lixianyu | 0:a4d8f5b3c546 | 207 | bool I2Cdev::writeBits(uint8_t devAddr, uint8_t regAddr, uint8_t bitStart, uint8_t length, uint8_t data) |
lixianyu | 0:a4d8f5b3c546 | 208 | { |
lixianyu | 0:a4d8f5b3c546 | 209 | // 010 value to write |
lixianyu | 0:a4d8f5b3c546 | 210 | // 76543210 bit numbers |
lixianyu | 0:a4d8f5b3c546 | 211 | // xxx args: bitStart=4, length=3 |
lixianyu | 0:a4d8f5b3c546 | 212 | // 00011100 mask byte |
lixianyu | 0:a4d8f5b3c546 | 213 | // 10101111 original value (sample) |
lixianyu | 0:a4d8f5b3c546 | 214 | // 10100011 original & ~mask |
lixianyu | 0:a4d8f5b3c546 | 215 | // 10101011 masked | value |
lixianyu | 0:a4d8f5b3c546 | 216 | uint8_t b; |
lixianyu | 0:a4d8f5b3c546 | 217 | if (readByte(devAddr, regAddr, &b) != 0) { |
lixianyu | 0:a4d8f5b3c546 | 218 | uint8_t mask = ((1 << length) - 1) << (bitStart - length + 1); |
lixianyu | 0:a4d8f5b3c546 | 219 | data <<= (bitStart - length + 1); // shift data into correct position |
lixianyu | 0:a4d8f5b3c546 | 220 | data &= mask; // zero all non-important bits in data |
lixianyu | 0:a4d8f5b3c546 | 221 | b &= ~(mask); // zero all important bits in existing byte |
lixianyu | 0:a4d8f5b3c546 | 222 | b |= data; // combine data with existing byte |
lixianyu | 0:a4d8f5b3c546 | 223 | return writeByte(devAddr, regAddr, b); |
lixianyu | 0:a4d8f5b3c546 | 224 | } else { |
lixianyu | 0:a4d8f5b3c546 | 225 | return false; |
lixianyu | 0:a4d8f5b3c546 | 226 | } |
lixianyu | 0:a4d8f5b3c546 | 227 | } |
lixianyu | 0:a4d8f5b3c546 | 228 | |
lixianyu | 0:a4d8f5b3c546 | 229 | /** Write multiple bits in a 16-bit device register. |
lixianyu | 0:a4d8f5b3c546 | 230 | * @param devAddr I2C slave device address |
lixianyu | 0:a4d8f5b3c546 | 231 | * @param regAddr Register regAddr to write to |
lixianyu | 0:a4d8f5b3c546 | 232 | * @param bitStart First bit position to write (0-15) |
lixianyu | 0:a4d8f5b3c546 | 233 | * @param length Number of bits to write (not more than 16) |
lixianyu | 0:a4d8f5b3c546 | 234 | * @param data Right-aligned value to write |
lixianyu | 0:a4d8f5b3c546 | 235 | * @return Status of operation (true = success) |
lixianyu | 0:a4d8f5b3c546 | 236 | */ |
lixianyu | 0:a4d8f5b3c546 | 237 | bool I2Cdev::writeBitsW(uint8_t devAddr, uint8_t regAddr, uint8_t bitStart, uint8_t length, uint16_t data) |
lixianyu | 0:a4d8f5b3c546 | 238 | { |
lixianyu | 0:a4d8f5b3c546 | 239 | // 010 value to write |
lixianyu | 0:a4d8f5b3c546 | 240 | // fedcba9876543210 bit numbers |
lixianyu | 0:a4d8f5b3c546 | 241 | // xxx args: bitStart=12, length=3 |
lixianyu | 0:a4d8f5b3c546 | 242 | // 0001110000000000 mask byte |
lixianyu | 0:a4d8f5b3c546 | 243 | // 1010111110010110 original value (sample) |
lixianyu | 0:a4d8f5b3c546 | 244 | // 1010001110010110 original & ~mask |
lixianyu | 0:a4d8f5b3c546 | 245 | // 1010101110010110 masked | value |
lixianyu | 0:a4d8f5b3c546 | 246 | uint16_t w; |
lixianyu | 0:a4d8f5b3c546 | 247 | if (readWord(devAddr, regAddr, &w) != 0) { |
lixianyu | 0:a4d8f5b3c546 | 248 | uint8_t mask = ((1 << length) - 1) << (bitStart - length + 1); |
lixianyu | 0:a4d8f5b3c546 | 249 | data <<= (bitStart - length + 1); // shift data into correct position |
lixianyu | 0:a4d8f5b3c546 | 250 | data &= mask; // zero all non-important bits in data |
lixianyu | 0:a4d8f5b3c546 | 251 | w &= ~(mask); // zero all important bits in existing word |
lixianyu | 0:a4d8f5b3c546 | 252 | w |= data; // combine data with existing word |
lixianyu | 0:a4d8f5b3c546 | 253 | return writeWord(devAddr, regAddr, w); |
lixianyu | 0:a4d8f5b3c546 | 254 | } else { |
lixianyu | 0:a4d8f5b3c546 | 255 | return false; |
lixianyu | 0:a4d8f5b3c546 | 256 | } |
lixianyu | 0:a4d8f5b3c546 | 257 | } |
lixianyu | 0:a4d8f5b3c546 | 258 | |
lixianyu | 0:a4d8f5b3c546 | 259 | /** Write single byte to an 8-bit device register. |
lixianyu | 0:a4d8f5b3c546 | 260 | * @param devAddr I2C slave device address |
lixianyu | 0:a4d8f5b3c546 | 261 | * @param regAddr Register address to write to |
lixianyu | 0:a4d8f5b3c546 | 262 | * @param data New byte value to write |
lixianyu | 0:a4d8f5b3c546 | 263 | * @return Status of operation (true = success) |
lixianyu | 0:a4d8f5b3c546 | 264 | */ |
lixianyu | 0:a4d8f5b3c546 | 265 | bool I2Cdev::writeByte(uint8_t devAddr, uint8_t regAddr, uint8_t data) |
lixianyu | 0:a4d8f5b3c546 | 266 | { |
lixianyu | 0:a4d8f5b3c546 | 267 | return writeBytes(devAddr, regAddr, 1, &data); |
lixianyu | 0:a4d8f5b3c546 | 268 | } |
lixianyu | 0:a4d8f5b3c546 | 269 | |
lixianyu | 0:a4d8f5b3c546 | 270 | /** Write single word to a 16-bit device register. |
lixianyu | 0:a4d8f5b3c546 | 271 | * @param devAddr I2C slave device address |
lixianyu | 0:a4d8f5b3c546 | 272 | * @param regAddr Register address to write to |
lixianyu | 0:a4d8f5b3c546 | 273 | * @param data New word value to write |
lixianyu | 0:a4d8f5b3c546 | 274 | * @return Status of operation (true = success) |
lixianyu | 0:a4d8f5b3c546 | 275 | */ |
lixianyu | 0:a4d8f5b3c546 | 276 | bool I2Cdev::writeWord(uint8_t devAddr, uint8_t regAddr, uint16_t data) |
lixianyu | 0:a4d8f5b3c546 | 277 | { |
lixianyu | 0:a4d8f5b3c546 | 278 | return writeWords(devAddr, regAddr, 1, &data); |
lixianyu | 0:a4d8f5b3c546 | 279 | } |
lixianyu | 0:a4d8f5b3c546 | 280 | |
lixianyu | 0:a4d8f5b3c546 | 281 | /** Write multiple bytes to an 8-bit device register. |
lixianyu | 0:a4d8f5b3c546 | 282 | * @param devAddr I2C slave device address |
lixianyu | 0:a4d8f5b3c546 | 283 | * @param regAddr First register address to write to |
lixianyu | 0:a4d8f5b3c546 | 284 | * @param length Number of bytes to write |
lixianyu | 0:a4d8f5b3c546 | 285 | * @param data Buffer to copy new data from |
lixianyu | 0:a4d8f5b3c546 | 286 | * @return Status of operation (true = success) |
lixianyu | 0:a4d8f5b3c546 | 287 | */ |
lixianyu | 0:a4d8f5b3c546 | 288 | bool I2Cdev::writeBytes(uint8_t devAddr, uint8_t regAddr, uint8_t length, uint8_t* data) |
lixianyu | 0:a4d8f5b3c546 | 289 | { |
lixianyu | 0:a4d8f5b3c546 | 290 | uint8_t i; |
lixianyu | 0:a4d8f5b3c546 | 291 | uint8_t *p = buffer; |
lixianyu | 0:a4d8f5b3c546 | 292 | |
lixianyu | 0:a4d8f5b3c546 | 293 | /* Copy address and data to local buffer for burst write */ |
lixianyu | 0:a4d8f5b3c546 | 294 | *p++ = regAddr; |
lixianyu | 0:a4d8f5b3c546 | 295 | for (i = 0; i < length; i++) { |
lixianyu | 0:a4d8f5b3c546 | 296 | *p++ = *data++; |
lixianyu | 0:a4d8f5b3c546 | 297 | } |
lixianyu | 0:a4d8f5b3c546 | 298 | length++; |
lixianyu | 0:a4d8f5b3c546 | 299 | /* Send address and data */ |
lixianyu | 0:a4d8f5b3c546 | 300 | int status = g_i2c.write(devAddr << 1, (char*)buffer, length, false); |
lixianyu | 0:a4d8f5b3c546 | 301 | return status == 0; |
lixianyu | 0:a4d8f5b3c546 | 302 | } |
lixianyu | 0:a4d8f5b3c546 | 303 | |
lixianyu | 0:a4d8f5b3c546 | 304 | /** Write multiple words to a 16-bit device register. |
lixianyu | 0:a4d8f5b3c546 | 305 | * @param devAddr I2C slave device address |
lixianyu | 0:a4d8f5b3c546 | 306 | * @param regAddr First register address to write to |
lixianyu | 0:a4d8f5b3c546 | 307 | * @param length Number of words to write |
lixianyu | 0:a4d8f5b3c546 | 308 | * @param data Buffer to copy new data from |
lixianyu | 0:a4d8f5b3c546 | 309 | * @return Status of operation (true = success) |
lixianyu | 0:a4d8f5b3c546 | 310 | */ |
lixianyu | 0:a4d8f5b3c546 | 311 | bool I2Cdev::writeWords(uint8_t devAddr, uint8_t regAddr, uint8_t length, uint16_t* data) |
lixianyu | 0:a4d8f5b3c546 | 312 | { |
lixianyu | 0:a4d8f5b3c546 | 313 | uint16_t i; |
lixianyu | 0:a4d8f5b3c546 | 314 | uint8_t *p = buffer; |
lixianyu | 0:a4d8f5b3c546 | 315 | uint16_t realLen = length * 2; |
lixianyu | 0:a4d8f5b3c546 | 316 | |
lixianyu | 0:a4d8f5b3c546 | 317 | /* Copy address and data to local buffer for burst write */ |
lixianyu | 0:a4d8f5b3c546 | 318 | *p++ = regAddr; |
lixianyu | 0:a4d8f5b3c546 | 319 | for (i = 0; i < realLen; i++) { |
lixianyu | 0:a4d8f5b3c546 | 320 | *p++ = *data++; |
lixianyu | 0:a4d8f5b3c546 | 321 | } |
lixianyu | 0:a4d8f5b3c546 | 322 | realLen++; |
lixianyu | 0:a4d8f5b3c546 | 323 | /* Send address and data */ |
lixianyu | 0:a4d8f5b3c546 | 324 | int status = g_i2c.write(devAddr << 1, (char*)buffer, realLen, false); |
lixianyu | 0:a4d8f5b3c546 | 325 | return status == 0; |
lixianyu | 0:a4d8f5b3c546 | 326 | } |