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MPU6050.cpp
00001 // I2Cdev library collection - MPU6050 I2C device class 00002 // Based on InvenSense MPU-6050 register map document rev. 2.0, 5/19/2011 (RM-MPU-6000A-00) 00003 // 8/24/2011 by Jeff Rowberg <jeff@rowberg.net> 00004 // Updates should (hopefully) always be available at https://github.com/jrowberg/i2cdevlib 00005 // 00006 // Changelog: 00007 // ... - ongoing debug release 00008 00009 // NOTE: THIS IS ONLY A PARIAL RELEASE. THIS DEVICE CLASS IS CURRENTLY UNDERGOING ACTIVE 00010 // DEVELOPMENT AND IS STILL MISSING SOME IMPORTANT FEATURES. PLEASE KEEP THIS IN MIND IF 00011 // YOU DECIDE TO USE THIS PARTICULAR CODE FOR ANYTHING. 00012 00013 /* ============================================ 00014 I2Cdev device library code is placed under the MIT license 00015 Copyright (c) 2012 Jeff Rowberg 00016 00017 Permission is hereby granted, free of charge, to any person obtaining a copy 00018 of this software and associated documentation files (the "Software"), to deal 00019 in the Software without restriction, including without limitation the rights 00020 to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 00021 copies of the Software, and to permit persons to whom the Software is 00022 furnished to do so, subject to the following conditions: 00023 00024 The above copyright notice and this permission notice shall be included in 00025 all copies or substantial portions of the Software. 00026 00027 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 00028 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 00029 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 00030 AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 00031 LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 00032 OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 00033 THE SOFTWARE. 00034 =============================================== 00035 */ 00036 00037 #include "MPU6050.h" 00038 extern DigitalOut myled; 00039 #define pgm_read_byte(addr) (*(const unsigned char *)(addr)) 00040 /** Default constructor, uses default I2C address. 00041 * @see MPU6050_DEFAULT_ADDRESS 00042 */ 00043 MPU6050::MPU6050() { 00044 devAddr = MPU6050_DEFAULT_ADDRESS; 00045 //myled = 1; 00046 } 00047 00048 /** Specific address constructor. 00049 * @param address I2C address 00050 * @see MPU6050_DEFAULT_ADDRESS 00051 * @see MPU6050_ADDRESS_AD0_LOW 00052 * @see MPU6050_ADDRESS_AD0_HIGH 00053 */ 00054 MPU6050::MPU6050(uint8_t address) { 00055 devAddr = address; 00056 } 00057 00058 /** Power on and prepare for general usage. 00059 * This will activate the device and take it out of sleep mode (which must be done 00060 * after start-up). This function also sets both the accelerometer and the gyroscope 00061 * to their most sensitive settings, namely +/- 2g and +/- 250 degrees/sec, and sets 00062 * the clock source to use the X Gyro for reference, which is slightly better than 00063 * the default internal clock source. 00064 */ 00065 void MPU6050::initialize() { 00066 //I2Cdev i2cdev; 00067 I2Cdev::init(); 00068 setClockSource(MPU6050_CLOCK_PLL_XGYRO); 00069 setFullScaleGyroRange(MPU6050_GYRO_FS_250); 00070 setFullScaleAccelRange(MPU6050_ACCEL_FS_2); 00071 setSleepEnabled(false); // thanks to Jack Elston for pointing this one out! 00072 } 00073 00074 /** Verify the I2C connection. 00075 * Make sure the device is connected and responds as expected. 00076 * @return True if connection is valid, false otherwise 00077 */ 00078 bool MPU6050::testConnection() { 00079 return getDeviceID() == 0x34; 00080 } 00081 00082 // AUX_VDDIO register (InvenSense demo code calls this RA_*G_OFFS_TC) 00083 00084 /** Get the auxiliary I2C supply voltage level. 00085 * When set to 1, the auxiliary I2C bus high logic level is VDD. When cleared to 00086 * 0, the auxiliary I2C bus high logic level is VLOGIC. This does not apply to 00087 * the MPU-6000, which does not have a VLOGIC pin. 00088 * @return I2C supply voltage level (0=VLOGIC, 1=VDD) 00089 */ 00090 uint8_t MPU6050::getAuxVDDIOLevel() { 00091 I2Cdev::readBit(devAddr, MPU6050_RA_YG_OFFS_TC, MPU6050_TC_PWR_MODE_BIT, buffer); 00092 return buffer[0]; 00093 } 00094 /** Set the auxiliary I2C supply voltage level. 00095 * When set to 1, the auxiliary I2C bus high logic level is VDD. When cleared to 00096 * 0, the auxiliary I2C bus high logic level is VLOGIC. This does not apply to 00097 * the MPU-6000, which does not have a VLOGIC pin. 00098 * @param level I2C supply voltage level (0=VLOGIC, 1=VDD) 00099 */ 00100 void MPU6050::setAuxVDDIOLevel(uint8_t level) { 00101 I2Cdev::writeBit(devAddr, MPU6050_RA_YG_OFFS_TC, MPU6050_TC_PWR_MODE_BIT, level); 00102 } 00103 00104 // SMPLRT_DIV register 00105 00106 /** Get gyroscope output rate divider. 00107 * The sensor register output, FIFO output, DMP sampling, Motion detection, Zero 00108 * Motion detection, and Free Fall detection are all based on the Sample Rate. 00109 * The Sample Rate is generated by dividing the gyroscope output rate by 00110 * SMPLRT_DIV: 00111 * 00112 * Sample Rate = Gyroscope Output Rate / (1 + SMPLRT_DIV) 00113 * 00114 * where Gyroscope Output Rate = 8kHz when the DLPF is disabled (DLPF_CFG = 0 or 00115 * 7), and 1kHz when the DLPF is enabled (see Register 26). 00116 * 00117 * Note: The accelerometer output rate is 1kHz. This means that for a Sample 00118 * Rate greater than 1kHz, the same accelerometer sample may be output to the 00119 * FIFO, DMP, and sensor registers more than once. 00120 * 00121 * For a diagram of the gyroscope and accelerometer signal paths, see Section 8 00122 * of the MPU-6000/MPU-6050 Product Specification document. 00123 * 00124 * @return Current sample rate 00125 * @see MPU6050_RA_SMPLRT_DIV 00126 */ 00127 uint8_t MPU6050::getRate() { 00128 I2Cdev::readByte(devAddr, MPU6050_RA_SMPLRT_DIV, buffer); 00129 return buffer[0]; 00130 } 00131 /** Set gyroscope sample rate divider. 00132 * @param rate New sample rate divider 00133 * @see getRate() 00134 * @see MPU6050_RA_SMPLRT_DIV 00135 */ 00136 void MPU6050::setRate(uint8_t rate) { 00137 I2Cdev::writeByte(devAddr, MPU6050_RA_SMPLRT_DIV, rate); 00138 } 00139 00140 // CONFIG register 00141 00142 /** Get external FSYNC configuration. 00143 * Configures the external Frame Synchronization (FSYNC) pin sampling. An 00144 * external signal connected to the FSYNC pin can be sampled by configuring 00145 * EXT_SYNC_SET. Signal changes to the FSYNC pin are latched so that short 00146 * strobes may be captured. The latched FSYNC signal will be sampled at the 00147 * Sampling Rate, as defined in register 25. After sampling, the latch will 00148 * reset to the current FSYNC signal state. 00149 * 00150 * The sampled value will be reported in place of the least significant bit in 00151 * a sensor data register determined by the value of EXT_SYNC_SET according to 00152 * the following table. 00153 * 00154 * <pre> 00155 * EXT_SYNC_SET | FSYNC Bit Location 00156 * -------------+------------------- 00157 * 0 | Input disabled 00158 * 1 | TEMP_OUT_L[0] 00159 * 2 | GYRO_XOUT_L[0] 00160 * 3 | GYRO_YOUT_L[0] 00161 * 4 | GYRO_ZOUT_L[0] 00162 * 5 | ACCEL_XOUT_L[0] 00163 * 6 | ACCEL_YOUT_L[0] 00164 * 7 | ACCEL_ZOUT_L[0] 00165 * </pre> 00166 * 00167 * @return FSYNC configuration value 00168 */ 00169 uint8_t MPU6050::getExternalFrameSync() { 00170 I2Cdev::readBits(devAddr, MPU6050_RA_CONFIG, MPU6050_CFG_EXT_SYNC_SET_BIT, MPU6050_CFG_EXT_SYNC_SET_LENGTH, buffer); 00171 return buffer[0]; 00172 } 00173 /** Set external FSYNC configuration. 00174 * @see getExternalFrameSync() 00175 * @see MPU6050_RA_CONFIG 00176 * @param sync New FSYNC configuration value 00177 */ 00178 void MPU6050::setExternalFrameSync(uint8_t sync) { 00179 I2Cdev::writeBits(devAddr, MPU6050_RA_CONFIG, MPU6050_CFG_EXT_SYNC_SET_BIT, MPU6050_CFG_EXT_SYNC_SET_LENGTH, sync); 00180 } 00181 /** Get digital low-pass filter configuration. 00182 * The DLPF_CFG parameter sets the digital low pass filter configuration. It 00183 * also determines the internal sampling rate used by the device as shown in 00184 * the table below. 00185 * 00186 * Note: The accelerometer output rate is 1kHz. This means that for a Sample 00187 * Rate greater than 1kHz, the same accelerometer sample may be output to the 00188 * FIFO, DMP, and sensor registers more than once. 00189 * 00190 * <pre> 00191 * | ACCELEROMETER | GYROSCOPE 00192 * DLPF_CFG | Bandwidth | Delay | Bandwidth | Delay | Sample Rate 00193 * ---------+-----------+--------+-----------+--------+------------- 00194 * 0 | 260Hz | 0ms | 256Hz | 0.98ms | 8kHz 00195 * 1 | 184Hz | 2.0ms | 188Hz | 1.9ms | 1kHz 00196 * 2 | 94Hz | 3.0ms | 98Hz | 2.8ms | 1kHz 00197 * 3 | 44Hz | 4.9ms | 42Hz | 4.8ms | 1kHz 00198 * 4 | 21Hz | 8.5ms | 20Hz | 8.3ms | 1kHz 00199 * 5 | 10Hz | 13.8ms | 10Hz | 13.4ms | 1kHz 00200 * 6 | 5Hz | 19.0ms | 5Hz | 18.6ms | 1kHz 00201 * 7 | -- Reserved -- | -- Reserved -- | Reserved 00202 * </pre> 00203 * 00204 * @return DLFP configuration 00205 * @see MPU6050_RA_CONFIG 00206 * @see MPU6050_CFG_DLPF_CFG_BIT 00207 * @see MPU6050_CFG_DLPF_CFG_LENGTH 00208 */ 00209 uint8_t MPU6050::getDLPFMode() { 00210 I2Cdev::readBits(devAddr, MPU6050_RA_CONFIG, MPU6050_CFG_DLPF_CFG_BIT, MPU6050_CFG_DLPF_CFG_LENGTH, buffer); 00211 return buffer[0]; 00212 } 00213 /** Set digital low-pass filter configuration. 00214 * @param mode New DLFP configuration setting 00215 * @see getDLPFBandwidth() 00216 * @see MPU6050_DLPF_BW_256 00217 * @see MPU6050_RA_CONFIG 00218 * @see MPU6050_CFG_DLPF_CFG_BIT 00219 * @see MPU6050_CFG_DLPF_CFG_LENGTH 00220 */ 00221 void MPU6050::setDLPFMode(uint8_t mode) { 00222 I2Cdev::writeBits(devAddr, MPU6050_RA_CONFIG, MPU6050_CFG_DLPF_CFG_BIT, MPU6050_CFG_DLPF_CFG_LENGTH, mode); 00223 } 00224 00225 // GYRO_CONFIG register 00226 00227 /** Get full-scale gyroscope range. 00228 * The FS_SEL parameter allows setting the full-scale range of the gyro sensors, 00229 * as described in the table below. 00230 * 00231 * <pre> 00232 * 0 = +/- 250 degrees/sec 00233 * 1 = +/- 500 degrees/sec 00234 * 2 = +/- 1000 degrees/sec 00235 * 3 = +/- 2000 degrees/sec 00236 * </pre> 00237 * 00238 * @return Current full-scale gyroscope range setting 00239 * @see MPU6050_GYRO_FS_250 00240 * @see MPU6050_RA_GYRO_CONFIG 00241 * @see MPU6050_GCONFIG_FS_SEL_BIT 00242 * @see MPU6050_GCONFIG_FS_SEL_LENGTH 00243 */ 00244 uint8_t MPU6050::getFullScaleGyroRange() { 00245 I2Cdev::readBits(devAddr, MPU6050_RA_GYRO_CONFIG, MPU6050_GCONFIG_FS_SEL_BIT, MPU6050_GCONFIG_FS_SEL_LENGTH, buffer); 00246 return buffer[0]; 00247 } 00248 /** Set full-scale gyroscope range. 00249 * @param range New full-scale gyroscope range value 00250 * @see getFullScaleRange() 00251 * @see MPU6050_GYRO_FS_250 00252 * @see MPU6050_RA_GYRO_CONFIG 00253 * @see MPU6050_GCONFIG_FS_SEL_BIT 00254 * @see MPU6050_GCONFIG_FS_SEL_LENGTH 00255 */ 00256 void MPU6050::setFullScaleGyroRange(uint8_t range) { 00257 I2Cdev::writeBits(devAddr, MPU6050_RA_GYRO_CONFIG, MPU6050_GCONFIG_FS_SEL_BIT, MPU6050_GCONFIG_FS_SEL_LENGTH, range); 00258 } 00259 00260 // ACCEL_CONFIG register 00261 00262 /** Get self-test enabled setting for accelerometer X axis. 00263 * @return Self-test enabled value 00264 * @see MPU6050_RA_ACCEL_CONFIG 00265 */ 00266 bool MPU6050::getAccelXSelfTest() { 00267 I2Cdev::readBit(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_XA_ST_BIT, buffer); 00268 return buffer[0]; 00269 } 00270 /** Get self-test enabled setting for accelerometer X axis. 00271 * @param enabled Self-test enabled value 00272 * @see MPU6050_RA_ACCEL_CONFIG 00273 */ 00274 void MPU6050::setAccelXSelfTest(bool enabled) { 00275 I2Cdev::writeBit(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_XA_ST_BIT, enabled); 00276 } 00277 /** Get self-test enabled value for accelerometer Y axis. 00278 * @return Self-test enabled value 00279 * @see MPU6050_RA_ACCEL_CONFIG 00280 */ 00281 bool MPU6050::getAccelYSelfTest() { 00282 I2Cdev::readBit(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_YA_ST_BIT, buffer); 00283 return buffer[0]; 00284 } 00285 /** Get self-test enabled value for accelerometer Y axis. 00286 * @param enabled Self-test enabled value 00287 * @see MPU6050_RA_ACCEL_CONFIG 00288 */ 00289 void MPU6050::setAccelYSelfTest(bool enabled) { 00290 I2Cdev::writeBit(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_YA_ST_BIT, enabled); 00291 } 00292 /** Get self-test enabled value for accelerometer Z axis. 00293 * @return Self-test enabled value 00294 * @see MPU6050_RA_ACCEL_CONFIG 00295 */ 00296 bool MPU6050::getAccelZSelfTest() { 00297 I2Cdev::readBit(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_ZA_ST_BIT, buffer); 00298 return buffer[0]; 00299 } 00300 /** Set self-test enabled value for accelerometer Z axis. 00301 * @param enabled Self-test enabled value 00302 * @see MPU6050_RA_ACCEL_CONFIG 00303 */ 00304 void MPU6050::setAccelZSelfTest(bool enabled) { 00305 I2Cdev::writeBit(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_ZA_ST_BIT, enabled); 00306 } 00307 /** Get full-scale accelerometer range. 00308 * The FS_SEL parameter allows setting the full-scale range of the accelerometer 00309 * sensors, as described in the table below. 00310 * 00311 * <pre> 00312 * 0 = +/- 2g 00313 * 1 = +/- 4g 00314 * 2 = +/- 8g 00315 * 3 = +/- 16g 00316 * </pre> 00317 * 00318 * @return Current full-scale accelerometer range setting 00319 * @see MPU6050_ACCEL_FS_2 00320 * @see MPU6050_RA_ACCEL_CONFIG 00321 * @see MPU6050_ACONFIG_AFS_SEL_BIT 00322 * @see MPU6050_ACONFIG_AFS_SEL_LENGTH 00323 */ 00324 uint8_t MPU6050::getFullScaleAccelRange() { 00325 I2Cdev::readBits(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_AFS_SEL_BIT, MPU6050_ACONFIG_AFS_SEL_LENGTH, buffer); 00326 return buffer[0]; 00327 } 00328 /** Set full-scale accelerometer range. 00329 * @param range New full-scale accelerometer range setting 00330 * @see getFullScaleAccelRange() 00331 */ 00332 void MPU6050::setFullScaleAccelRange(uint8_t range) { 00333 I2Cdev::writeBits(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_AFS_SEL_BIT, MPU6050_ACONFIG_AFS_SEL_LENGTH, range); 00334 } 00335 /** Get the high-pass filter configuration. 00336 * The DHPF is a filter module in the path leading to motion detectors (Free 00337 * Fall, Motion threshold, and Zero Motion). The high pass filter output is not 00338 * available to the data registers (see Figure in Section 8 of the MPU-6000/ 00339 * MPU-6050 Product Specification document). 00340 * 00341 * The high pass filter has three modes: 00342 * 00343 * <pre> 00344 * Reset: The filter output settles to zero within one sample. This 00345 * effectively disables the high pass filter. This mode may be toggled 00346 * to quickly settle the filter. 00347 * 00348 * On: The high pass filter will pass signals above the cut off frequency. 00349 * 00350 * Hold: When triggered, the filter holds the present sample. The filter 00351 * output will be the difference between the input sample and the held 00352 * sample. 00353 * </pre> 00354 * 00355 * <pre> 00356 * ACCEL_HPF | Filter Mode | Cut-off Frequency 00357 * ----------+-------------+------------------ 00358 * 0 | Reset | None 00359 * 1 | On | 5Hz 00360 * 2 | On | 2.5Hz 00361 * 3 | On | 1.25Hz 00362 * 4 | On | 0.63Hz 00363 * 7 | Hold | None 00364 * </pre> 00365 * 00366 * @return Current high-pass filter configuration 00367 * @see MPU6050_DHPF_RESET 00368 * @see MPU6050_RA_ACCEL_CONFIG 00369 */ 00370 uint8_t MPU6050::getDHPFMode() { 00371 I2Cdev::readBits(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_ACCEL_HPF_BIT, MPU6050_ACONFIG_ACCEL_HPF_LENGTH, buffer); 00372 return buffer[0]; 00373 } 00374 /** Set the high-pass filter configuration. 00375 * @param bandwidth New high-pass filter configuration 00376 * @see setDHPFMode() 00377 * @see MPU6050_DHPF_RESET 00378 * @see MPU6050_RA_ACCEL_CONFIG 00379 */ 00380 void MPU6050::setDHPFMode(uint8_t bandwidth) { 00381 I2Cdev::writeBits(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_ACCEL_HPF_BIT, MPU6050_ACONFIG_ACCEL_HPF_LENGTH, bandwidth); 00382 } 00383 00384 // FF_THR register 00385 00386 /** Get free-fall event acceleration threshold. 00387 * This register configures the detection threshold for Free Fall event 00388 * detection. The unit of FF_THR is 1LSB = 2mg. Free Fall is detected when the 00389 * absolute value of the accelerometer measurements for the three axes are each 00390 * less than the detection threshold. This condition increments the Free Fall 00391 * duration counter (Register 30). The Free Fall interrupt is triggered when the 00392 * Free Fall duration counter reaches the time specified in FF_DUR. 00393 * 00394 * For more details on the Free Fall detection interrupt, see Section 8.2 of the 00395 * MPU-6000/MPU-6050 Product Specification document as well as Registers 56 and 00396 * 58 of this document. 00397 * 00398 * @return Current free-fall acceleration threshold value (LSB = 2mg) 00399 * @see MPU6050_RA_FF_THR 00400 */ 00401 uint8_t MPU6050::getFreefallDetectionThreshold() { 00402 I2Cdev::readByte(devAddr, MPU6050_RA_FF_THR, buffer); 00403 return buffer[0]; 00404 } 00405 /** Get free-fall event acceleration threshold. 00406 * @param threshold New free-fall acceleration threshold value (LSB = 2mg) 00407 * @see getFreefallDetectionThreshold() 00408 * @see MPU6050_RA_FF_THR 00409 */ 00410 void MPU6050::setFreefallDetectionThreshold(uint8_t threshold) { 00411 I2Cdev::writeByte(devAddr, MPU6050_RA_FF_THR, threshold); 00412 } 00413 00414 // FF_DUR register 00415 00416 /** Get free-fall event duration threshold. 00417 * This register configures the duration counter threshold for Free Fall event 00418 * detection. The duration counter ticks at 1kHz, therefore FF_DUR has a unit 00419 * of 1 LSB = 1 ms. 00420 * 00421 * The Free Fall duration counter increments while the absolute value of the 00422 * accelerometer measurements are each less than the detection threshold 00423 * (Register 29). The Free Fall interrupt is triggered when the Free Fall 00424 * duration counter reaches the time specified in this register. 00425 * 00426 * For more details on the Free Fall detection interrupt, see Section 8.2 of 00427 * the MPU-6000/MPU-6050 Product Specification document as well as Registers 56 00428 * and 58 of this document. 00429 * 00430 * @return Current free-fall duration threshold value (LSB = 1ms) 00431 * @see MPU6050_RA_FF_DUR 00432 */ 00433 uint8_t MPU6050::getFreefallDetectionDuration() { 00434 I2Cdev::readByte(devAddr, MPU6050_RA_FF_DUR, buffer); 00435 return buffer[0]; 00436 } 00437 /** Get free-fall event duration threshold. 00438 * @param duration New free-fall duration threshold value (LSB = 1ms) 00439 * @see getFreefallDetectionDuration() 00440 * @see MPU6050_RA_FF_DUR 00441 */ 00442 void MPU6050::setFreefallDetectionDuration(uint8_t duration) { 00443 I2Cdev::writeByte(devAddr, MPU6050_RA_FF_DUR, duration); 00444 } 00445 00446 // MOT_THR register 00447 00448 /** Get motion detection event acceleration threshold. 00449 * This register configures the detection threshold for Motion interrupt 00450 * generation. The unit of MOT_THR is 1LSB = 2mg. Motion is detected when the 00451 * absolute value of any of the accelerometer measurements exceeds this Motion 00452 * detection threshold. This condition increments the Motion detection duration 00453 * counter (Register 32). The Motion detection interrupt is triggered when the 00454 * Motion Detection counter reaches the time count specified in MOT_DUR 00455 * (Register 32). 00456 * 00457 * The Motion interrupt will indicate the axis and polarity of detected motion 00458 * in MOT_DETECT_STATUS (Register 97). 00459 * 00460 * For more details on the Motion detection interrupt, see Section 8.3 of the 00461 * MPU-6000/MPU-6050 Product Specification document as well as Registers 56 and 00462 * 58 of this document. 00463 * 00464 * @return Current motion detection acceleration threshold value (LSB = 2mg) 00465 * @see MPU6050_RA_MOT_THR 00466 */ 00467 uint8_t MPU6050::getMotionDetectionThreshold() { 00468 I2Cdev::readByte(devAddr, MPU6050_RA_MOT_THR, buffer); 00469 return buffer[0]; 00470 } 00471 /** Set free-fall event acceleration threshold. 00472 * @param threshold New motion detection acceleration threshold value (LSB = 2mg) 00473 * @see getMotionDetectionThreshold() 00474 * @see MPU6050_RA_MOT_THR 00475 */ 00476 void MPU6050::setMotionDetectionThreshold(uint8_t threshold) { 00477 I2Cdev::writeByte(devAddr, MPU6050_RA_MOT_THR, threshold); 00478 } 00479 00480 // MOT_DUR register 00481 00482 /** Get motion detection event duration threshold. 00483 * This register configures the duration counter threshold for Motion interrupt 00484 * generation. The duration counter ticks at 1 kHz, therefore MOT_DUR has a unit 00485 * of 1LSB = 1ms. The Motion detection duration counter increments when the 00486 * absolute value of any of the accelerometer measurements exceeds the Motion 00487 * detection threshold (Register 31). The Motion detection interrupt is 00488 * triggered when the Motion detection counter reaches the time count specified 00489 * in this register. 00490 * 00491 * For more details on the Motion detection interrupt, see Section 8.3 of the 00492 * MPU-6000/MPU-6050 Product Specification document. 00493 * 00494 * @return Current motion detection duration threshold value (LSB = 1ms) 00495 * @see MPU6050_RA_MOT_DUR 00496 */ 00497 uint8_t MPU6050::getMotionDetectionDuration() { 00498 I2Cdev::readByte(devAddr, MPU6050_RA_MOT_DUR, buffer); 00499 return buffer[0]; 00500 } 00501 /** Set motion detection event duration threshold. 00502 * @param duration New motion detection duration threshold value (LSB = 1ms) 00503 * @see getMotionDetectionDuration() 00504 * @see MPU6050_RA_MOT_DUR 00505 */ 00506 void MPU6050::setMotionDetectionDuration(uint8_t duration) { 00507 I2Cdev::writeByte(devAddr, MPU6050_RA_MOT_DUR, duration); 00508 } 00509 00510 // ZRMOT_THR register 00511 00512 /** Get zero motion detection event acceleration threshold. 00513 * This register configures the detection threshold for Zero Motion interrupt 00514 * generation. The unit of ZRMOT_THR is 1LSB = 2mg. Zero Motion is detected when 00515 * the absolute value of the accelerometer measurements for the 3 axes are each 00516 * less than the detection threshold. This condition increments the Zero Motion 00517 * duration counter (Register 34). The Zero Motion interrupt is triggered when 00518 * the Zero Motion duration counter reaches the time count specified in 00519 * ZRMOT_DUR (Register 34). 00520 * 00521 * Unlike Free Fall or Motion detection, Zero Motion detection triggers an 00522 * interrupt both when Zero Motion is first detected and when Zero Motion is no 00523 * longer detected. 00524 * 00525 * When a zero motion event is detected, a Zero Motion Status will be indicated 00526 * in the MOT_DETECT_STATUS register (Register 97). When a motion-to-zero-motion 00527 * condition is detected, the status bit is set to 1. When a zero-motion-to- 00528 * motion condition is detected, the status bit is set to 0. 00529 * 00530 * For more details on the Zero Motion detection interrupt, see Section 8.4 of 00531 * the MPU-6000/MPU-6050 Product Specification document as well as Registers 56 00532 * and 58 of this document. 00533 * 00534 * @return Current zero motion detection acceleration threshold value (LSB = 2mg) 00535 * @see MPU6050_RA_ZRMOT_THR 00536 */ 00537 uint8_t MPU6050::getZeroMotionDetectionThreshold() { 00538 I2Cdev::readByte(devAddr, MPU6050_RA_ZRMOT_THR, buffer); 00539 return buffer[0]; 00540 } 00541 /** Set zero motion detection event acceleration threshold. 00542 * @param threshold New zero motion detection acceleration threshold value (LSB = 2mg) 00543 * @see getZeroMotionDetectionThreshold() 00544 * @see MPU6050_RA_ZRMOT_THR 00545 */ 00546 void MPU6050::setZeroMotionDetectionThreshold(uint8_t threshold) { 00547 I2Cdev::writeByte(devAddr, MPU6050_RA_ZRMOT_THR, threshold); 00548 } 00549 00550 // ZRMOT_DUR register 00551 00552 /** Get zero motion detection event duration threshold. 00553 * This register configures the duration counter threshold for Zero Motion 00554 * interrupt generation. The duration counter ticks at 16 Hz, therefore 00555 * ZRMOT_DUR has a unit of 1 LSB = 64 ms. The Zero Motion duration counter 00556 * increments while the absolute value of the accelerometer measurements are 00557 * each less than the detection threshold (Register 33). The Zero Motion 00558 * interrupt is triggered when the Zero Motion duration counter reaches the time 00559 * count specified in this register. 00560 * 00561 * For more details on the Zero Motion detection interrupt, see Section 8.4 of 00562 * the MPU-6000/MPU-6050 Product Specification document, as well as Registers 56 00563 * and 58 of this document. 00564 * 00565 * @return Current zero motion detection duration threshold value (LSB = 64ms) 00566 * @see MPU6050_RA_ZRMOT_DUR 00567 */ 00568 uint8_t MPU6050::getZeroMotionDetectionDuration() { 00569 I2Cdev::readByte(devAddr, MPU6050_RA_ZRMOT_DUR, buffer); 00570 return buffer[0]; 00571 } 00572 /** Set zero motion detection event duration threshold. 00573 * @param duration New zero motion detection duration threshold value (LSB = 1ms) 00574 * @see getZeroMotionDetectionDuration() 00575 * @see MPU6050_RA_ZRMOT_DUR 00576 */ 00577 void MPU6050::setZeroMotionDetectionDuration(uint8_t duration) { 00578 I2Cdev::writeByte(devAddr, MPU6050_RA_ZRMOT_DUR, duration); 00579 } 00580 00581 // FIFO_EN register 00582 00583 /** Get temperature FIFO enabled value. 00584 * When set to 1, this bit enables TEMP_OUT_H and TEMP_OUT_L (Registers 65 and 00585 * 66) to be written into the FIFO buffer. 00586 * @return Current temperature FIFO enabled value 00587 * @see MPU6050_RA_FIFO_EN 00588 */ 00589 bool MPU6050::getTempFIFOEnabled() { 00590 I2Cdev::readBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_TEMP_FIFO_EN_BIT, buffer); 00591 return buffer[0]; 00592 } 00593 /** Set temperature FIFO enabled value. 00594 * @param enabled New temperature FIFO enabled value 00595 * @see getTempFIFOEnabled() 00596 * @see MPU6050_RA_FIFO_EN 00597 */ 00598 void MPU6050::setTempFIFOEnabled(bool enabled) { 00599 I2Cdev::writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_TEMP_FIFO_EN_BIT, enabled); 00600 } 00601 /** Get gyroscope X-axis FIFO enabled value. 00602 * When set to 1, this bit enables GYRO_XOUT_H and GYRO_XOUT_L (Registers 67 and 00603 * 68) to be written into the FIFO buffer. 00604 * @return Current gyroscope X-axis FIFO enabled value 00605 * @see MPU6050_RA_FIFO_EN 00606 */ 00607 bool MPU6050::getXGyroFIFOEnabled() { 00608 I2Cdev::readBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_XG_FIFO_EN_BIT, buffer); 00609 return buffer[0]; 00610 } 00611 /** Set gyroscope X-axis FIFO enabled value. 00612 * @param enabled New gyroscope X-axis FIFO enabled value 00613 * @see getXGyroFIFOEnabled() 00614 * @see MPU6050_RA_FIFO_EN 00615 */ 00616 void MPU6050::setXGyroFIFOEnabled(bool enabled) { 00617 I2Cdev::writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_XG_FIFO_EN_BIT, enabled); 00618 } 00619 /** Get gyroscope Y-axis FIFO enabled value. 00620 * When set to 1, this bit enables GYRO_YOUT_H and GYRO_YOUT_L (Registers 69 and 00621 * 70) to be written into the FIFO buffer. 00622 * @return Current gyroscope Y-axis FIFO enabled value 00623 * @see MPU6050_RA_FIFO_EN 00624 */ 00625 bool MPU6050::getYGyroFIFOEnabled() { 00626 I2Cdev::readBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_YG_FIFO_EN_BIT, buffer); 00627 return buffer[0]; 00628 } 00629 /** Set gyroscope Y-axis FIFO enabled value. 00630 * @param enabled New gyroscope Y-axis FIFO enabled value 00631 * @see getYGyroFIFOEnabled() 00632 * @see MPU6050_RA_FIFO_EN 00633 */ 00634 void MPU6050::setYGyroFIFOEnabled(bool enabled) { 00635 I2Cdev::writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_YG_FIFO_EN_BIT, enabled); 00636 } 00637 /** Get gyroscope Z-axis FIFO enabled value. 00638 * When set to 1, this bit enables GYRO_ZOUT_H and GYRO_ZOUT_L (Registers 71 and 00639 * 72) to be written into the FIFO buffer. 00640 * @return Current gyroscope Z-axis FIFO enabled value 00641 * @see MPU6050_RA_FIFO_EN 00642 */ 00643 bool MPU6050::getZGyroFIFOEnabled() { 00644 I2Cdev::readBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_ZG_FIFO_EN_BIT, buffer); 00645 return buffer[0]; 00646 } 00647 /** Set gyroscope Z-axis FIFO enabled value. 00648 * @param enabled New gyroscope Z-axis FIFO enabled value 00649 * @see getZGyroFIFOEnabled() 00650 * @see MPU6050_RA_FIFO_EN 00651 */ 00652 void MPU6050::setZGyroFIFOEnabled(bool enabled) { 00653 I2Cdev::writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_ZG_FIFO_EN_BIT, enabled); 00654 } 00655 /** Get accelerometer FIFO enabled value. 00656 * When set to 1, this bit enables ACCEL_XOUT_H, ACCEL_XOUT_L, ACCEL_YOUT_H, 00657 * ACCEL_YOUT_L, ACCEL_ZOUT_H, and ACCEL_ZOUT_L (Registers 59 to 64) to be 00658 * written into the FIFO buffer. 00659 * @return Current accelerometer FIFO enabled value 00660 * @see MPU6050_RA_FIFO_EN 00661 */ 00662 bool MPU6050::getAccelFIFOEnabled() { 00663 I2Cdev::readBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_ACCEL_FIFO_EN_BIT, buffer); 00664 return buffer[0]; 00665 } 00666 /** Set accelerometer FIFO enabled value. 00667 * @param enabled New accelerometer FIFO enabled value 00668 * @see getAccelFIFOEnabled() 00669 * @see MPU6050_RA_FIFO_EN 00670 */ 00671 void MPU6050::setAccelFIFOEnabled(bool enabled) { 00672 I2Cdev::writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_ACCEL_FIFO_EN_BIT, enabled); 00673 } 00674 /** Get Slave 2 FIFO enabled value. 00675 * When set to 1, this bit enables EXT_SENS_DATA registers (Registers 73 to 96) 00676 * associated with Slave 2 to be written into the FIFO buffer. 00677 * @return Current Slave 2 FIFO enabled value 00678 * @see MPU6050_RA_FIFO_EN 00679 */ 00680 bool MPU6050::getSlave2FIFOEnabled() { 00681 I2Cdev::readBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_SLV2_FIFO_EN_BIT, buffer); 00682 return buffer[0]; 00683 } 00684 /** Set Slave 2 FIFO enabled value. 00685 * @param enabled New Slave 2 FIFO enabled value 00686 * @see getSlave2FIFOEnabled() 00687 * @see MPU6050_RA_FIFO_EN 00688 */ 00689 void MPU6050::setSlave2FIFOEnabled(bool enabled) { 00690 I2Cdev::writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_SLV2_FIFO_EN_BIT, enabled); 00691 } 00692 /** Get Slave 1 FIFO enabled value. 00693 * When set to 1, this bit enables EXT_SENS_DATA registers (Registers 73 to 96) 00694 * associated with Slave 1 to be written into the FIFO buffer. 00695 * @return Current Slave 1 FIFO enabled value 00696 * @see MPU6050_RA_FIFO_EN 00697 */ 00698 bool MPU6050::getSlave1FIFOEnabled() { 00699 I2Cdev::readBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_SLV1_FIFO_EN_BIT, buffer); 00700 return buffer[0]; 00701 } 00702 /** Set Slave 1 FIFO enabled value. 00703 * @param enabled New Slave 1 FIFO enabled value 00704 * @see getSlave1FIFOEnabled() 00705 * @see MPU6050_RA_FIFO_EN 00706 */ 00707 void MPU6050::setSlave1FIFOEnabled(bool enabled) { 00708 I2Cdev::writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_SLV1_FIFO_EN_BIT, enabled); 00709 } 00710 /** Get Slave 0 FIFO enabled value. 00711 * When set to 1, this bit enables EXT_SENS_DATA registers (Registers 73 to 96) 00712 * associated with Slave 0 to be written into the FIFO buffer. 00713 * @return Current Slave 0 FIFO enabled value 00714 * @see MPU6050_RA_FIFO_EN 00715 */ 00716 bool MPU6050::getSlave0FIFOEnabled() { 00717 I2Cdev::readBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_SLV0_FIFO_EN_BIT, buffer); 00718 return buffer[0]; 00719 } 00720 /** Set Slave 0 FIFO enabled value. 00721 * @param enabled New Slave 0 FIFO enabled value 00722 * @see getSlave0FIFOEnabled() 00723 * @see MPU6050_RA_FIFO_EN 00724 */ 00725 void MPU6050::setSlave0FIFOEnabled(bool enabled) { 00726 I2Cdev::writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_SLV0_FIFO_EN_BIT, enabled); 00727 } 00728 00729 // I2C_MST_CTRL register 00730 00731 /** Get multi-master enabled value. 00732 * Multi-master capability allows multiple I2C masters to operate on the same 00733 * bus. In circuits where multi-master capability is required, set MULT_MST_EN 00734 * to 1. This will increase current drawn by approximately 30uA. 00735 * 00736 * In circuits where multi-master capability is required, the state of the I2C 00737 * bus must always be monitored by each separate I2C Master. Before an I2C 00738 * Master can assume arbitration of the bus, it must first confirm that no other 00739 * I2C Master has arbitration of the bus. When MULT_MST_EN is set to 1, the 00740 * MPU-60X0's bus arbitration detection logic is turned on, enabling it to 00741 * detect when the bus is available. 00742 * 00743 * @return Current multi-master enabled value 00744 * @see MPU6050_RA_I2C_MST_CTRL 00745 */ 00746 bool MPU6050::getMultiMasterEnabled() { 00747 I2Cdev::readBit(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_MULT_MST_EN_BIT, buffer); 00748 return buffer[0]; 00749 } 00750 /** Set multi-master enabled value. 00751 * @param enabled New multi-master enabled value 00752 * @see getMultiMasterEnabled() 00753 * @see MPU6050_RA_I2C_MST_CTRL 00754 */ 00755 void MPU6050::setMultiMasterEnabled(bool enabled) { 00756 I2Cdev::writeBit(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_MULT_MST_EN_BIT, enabled); 00757 } 00758 /** Get wait-for-external-sensor-data enabled value. 00759 * When the WAIT_FOR_ES bit is set to 1, the Data Ready interrupt will be 00760 * delayed until External Sensor data from the Slave Devices are loaded into the 00761 * EXT_SENS_DATA registers. This is used to ensure that both the internal sensor 00762 * data (i.e. from gyro and accel) and external sensor data have been loaded to 00763 * their respective data registers (i.e. the data is synced) when the Data Ready 00764 * interrupt is triggered. 00765 * 00766 * @return Current wait-for-external-sensor-data enabled value 00767 * @see MPU6050_RA_I2C_MST_CTRL 00768 */ 00769 bool MPU6050::getWaitForExternalSensorEnabled() { 00770 I2Cdev::readBit(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_WAIT_FOR_ES_BIT, buffer); 00771 return buffer[0]; 00772 } 00773 /** Set wait-for-external-sensor-data enabled value. 00774 * @param enabled New wait-for-external-sensor-data enabled value 00775 * @see getWaitForExternalSensorEnabled() 00776 * @see MPU6050_RA_I2C_MST_CTRL 00777 */ 00778 void MPU6050::setWaitForExternalSensorEnabled(bool enabled) { 00779 I2Cdev::writeBit(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_WAIT_FOR_ES_BIT, enabled); 00780 } 00781 /** Get Slave 3 FIFO enabled value. 00782 * When set to 1, this bit enables EXT_SENS_DATA registers (Registers 73 to 96) 00783 * associated with Slave 3 to be written into the FIFO buffer. 00784 * @return Current Slave 3 FIFO enabled value 00785 * @see MPU6050_RA_MST_CTRL 00786 */ 00787 bool MPU6050::getSlave3FIFOEnabled() { 00788 I2Cdev::readBit(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_SLV_3_FIFO_EN_BIT, buffer); 00789 return buffer[0]; 00790 } 00791 /** Set Slave 3 FIFO enabled value. 00792 * @param enabled New Slave 3 FIFO enabled value 00793 * @see getSlave3FIFOEnabled() 00794 * @see MPU6050_RA_MST_CTRL 00795 */ 00796 void MPU6050::setSlave3FIFOEnabled(bool enabled) { 00797 I2Cdev::writeBit(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_SLV_3_FIFO_EN_BIT, enabled); 00798 } 00799 /** Get slave read/write transition enabled value. 00800 * The I2C_MST_P_NSR bit configures the I2C Master's transition from one slave 00801 * read to the next slave read. If the bit equals 0, there will be a restart 00802 * between reads. If the bit equals 1, there will be a stop followed by a start 00803 * of the following read. When a write transaction follows a read transaction, 00804 * the stop followed by a start of the successive write will be always used. 00805 * 00806 * @return Current slave read/write transition enabled value 00807 * @see MPU6050_RA_I2C_MST_CTRL 00808 */ 00809 bool MPU6050::getSlaveReadWriteTransitionEnabled() { 00810 I2Cdev::readBit(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_I2C_MST_P_NSR_BIT, buffer); 00811 return buffer[0]; 00812 } 00813 /** Set slave read/write transition enabled value. 00814 * @param enabled New slave read/write transition enabled value 00815 * @see getSlaveReadWriteTransitionEnabled() 00816 * @see MPU6050_RA_I2C_MST_CTRL 00817 */ 00818 void MPU6050::setSlaveReadWriteTransitionEnabled(bool enabled) { 00819 I2Cdev::writeBit(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_I2C_MST_P_NSR_BIT, enabled); 00820 } 00821 /** Get I2C master clock speed. 00822 * I2C_MST_CLK is a 4 bit unsigned value which configures a divider on the 00823 * MPU-60X0 internal 8MHz clock. It sets the I2C master clock speed according to 00824 * the following table: 00825 * 00826 * <pre> 00827 * I2C_MST_CLK | I2C Master Clock Speed | 8MHz Clock Divider 00828 * ------------+------------------------+------------------- 00829 * 0 | 348kHz | 23 00830 * 1 | 333kHz | 24 00831 * 2 | 320kHz | 25 00832 * 3 | 308kHz | 26 00833 * 4 | 296kHz | 27 00834 * 5 | 286kHz | 28 00835 * 6 | 276kHz | 29 00836 * 7 | 267kHz | 30 00837 * 8 | 258kHz | 31 00838 * 9 | 500kHz | 16 00839 * 10 | 471kHz | 17 00840 * 11 | 444kHz | 18 00841 * 12 | 421kHz | 19 00842 * 13 | 400kHz | 20 00843 * 14 | 381kHz | 21 00844 * 15 | 364kHz | 22 00845 * </pre> 00846 * 00847 * @return Current I2C master clock speed 00848 * @see MPU6050_RA_I2C_MST_CTRL 00849 */ 00850 uint8_t MPU6050::getMasterClockSpeed() { 00851 I2Cdev::readBits(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_I2C_MST_CLK_BIT, MPU6050_I2C_MST_CLK_LENGTH, buffer); 00852 return buffer[0]; 00853 } 00854 /** Set I2C master clock speed. 00855 * @reparam speed Current I2C master clock speed 00856 * @see MPU6050_RA_I2C_MST_CTRL 00857 */ 00858 void MPU6050::setMasterClockSpeed(uint8_t speed) { 00859 I2Cdev::writeBits(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_I2C_MST_CLK_BIT, MPU6050_I2C_MST_CLK_LENGTH, speed); 00860 } 00861 00862 // I2C_SLV* registers (Slave 0-3) 00863 00864 /** Get the I2C address of the specified slave (0-3). 00865 * Note that Bit 7 (MSB) controls read/write mode. If Bit 7 is set, it's a read 00866 * operation, and if it is cleared, then it's a write operation. The remaining 00867 * bits (6-0) are the 7-bit device address of the slave device. 00868 * 00869 * In read mode, the result of the read is placed in the lowest available 00870 * EXT_SENS_DATA register. For further information regarding the allocation of 00871 * read results, please refer to the EXT_SENS_DATA register description 00872 * (Registers 73 - 96). 00873 * 00874 * The MPU-6050 supports a total of five slaves, but Slave 4 has unique 00875 * characteristics, and so it has its own functions (getSlave4* and setSlave4*). 00876 * 00877 * I2C data transactions are performed at the Sample Rate, as defined in 00878 * Register 25. The user is responsible for ensuring that I2C data transactions 00879 * to and from each enabled Slave can be completed within a single period of the 00880 * Sample Rate. 00881 * 00882 * The I2C slave access rate can be reduced relative to the Sample Rate. This 00883 * reduced access rate is determined by I2C_MST_DLY (Register 52). Whether a 00884 * slave's access rate is reduced relative to the Sample Rate is determined by 00885 * I2C_MST_DELAY_CTRL (Register 103). 00886 * 00887 * The processing order for the slaves is fixed. The sequence followed for 00888 * processing the slaves is Slave 0, Slave 1, Slave 2, Slave 3 and Slave 4. If a 00889 * particular Slave is disabled it will be skipped. 00890 * 00891 * Each slave can either be accessed at the sample rate or at a reduced sample 00892 * rate. In a case where some slaves are accessed at the Sample Rate and some 00893 * slaves are accessed at the reduced rate, the sequence of accessing the slaves 00894 * (Slave 0 to Slave 4) is still followed. However, the reduced rate slaves will 00895 * be skipped if their access rate dictates that they should not be accessed 00896 * during that particular cycle. For further information regarding the reduced 00897 * access rate, please refer to Register 52. Whether a slave is accessed at the 00898 * Sample Rate or at the reduced rate is determined by the Delay Enable bits in 00899 * Register 103. 00900 * 00901 * @param num Slave number (0-3) 00902 * @return Current address for specified slave 00903 * @see MPU6050_RA_I2C_SLV0_ADDR 00904 */ 00905 uint8_t MPU6050::getSlaveAddress(uint8_t num) { 00906 if (num > 3) return 0; 00907 I2Cdev::readByte(devAddr, MPU6050_RA_I2C_SLV0_ADDR + num*3, buffer); 00908 return buffer[0]; 00909 } 00910 /** Set the I2C address of the specified slave (0-3). 00911 * @param num Slave number (0-3) 00912 * @param address New address for specified slave 00913 * @see getSlaveAddress() 00914 * @see MPU6050_RA_I2C_SLV0_ADDR 00915 */ 00916 void MPU6050::setSlaveAddress(uint8_t num, uint8_t address) { 00917 if (num > 3) return; 00918 I2Cdev::writeByte(devAddr, MPU6050_RA_I2C_SLV0_ADDR + num*3, address); 00919 } 00920 /** Get the active internal register for the specified slave (0-3). 00921 * Read/write operations for this slave will be done to whatever internal 00922 * register address is stored in this MPU register. 00923 * 00924 * The MPU-6050 supports a total of five slaves, but Slave 4 has unique 00925 * characteristics, and so it has its own functions. 00926 * 00927 * @param num Slave number (0-3) 00928 * @return Current active register for specified slave 00929 * @see MPU6050_RA_I2C_SLV0_REG 00930 */ 00931 uint8_t MPU6050::getSlaveRegister(uint8_t num) { 00932 if (num > 3) return 0; 00933 I2Cdev::readByte(devAddr, MPU6050_RA_I2C_SLV0_REG + num*3, buffer); 00934 return buffer[0]; 00935 } 00936 /** Set the active internal register for the specified slave (0-3). 00937 * @param num Slave number (0-3) 00938 * @param reg New active register for specified slave 00939 * @see getSlaveRegister() 00940 * @see MPU6050_RA_I2C_SLV0_REG 00941 */ 00942 void MPU6050::setSlaveRegister(uint8_t num, uint8_t reg) { 00943 if (num > 3) return; 00944 I2Cdev::writeByte(devAddr, MPU6050_RA_I2C_SLV0_REG + num*3, reg); 00945 } 00946 /** Get the enabled value for the specified slave (0-3). 00947 * When set to 1, this bit enables Slave 0 for data transfer operations. When 00948 * cleared to 0, this bit disables Slave 0 from data transfer operations. 00949 * @param num Slave number (0-3) 00950 * @return Current enabled value for specified slave 00951 * @see MPU6050_RA_I2C_SLV0_CTRL 00952 */ 00953 bool MPU6050::getSlaveEnabled(uint8_t num) { 00954 if (num > 3) return 0; 00955 I2Cdev::readBit(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_EN_BIT, buffer); 00956 return buffer[0]; 00957 } 00958 /** Set the enabled value for the specified slave (0-3). 00959 * @param num Slave number (0-3) 00960 * @param enabled New enabled value for specified slave 00961 * @see getSlaveEnabled() 00962 * @see MPU6050_RA_I2C_SLV0_CTRL 00963 */ 00964 void MPU6050::setSlaveEnabled(uint8_t num, bool enabled) { 00965 if (num > 3) return; 00966 I2Cdev::writeBit(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_EN_BIT, enabled); 00967 } 00968 /** Get word pair byte-swapping enabled for the specified slave (0-3). 00969 * When set to 1, this bit enables byte swapping. When byte swapping is enabled, 00970 * the high and low bytes of a word pair are swapped. Please refer to 00971 * I2C_SLV0_GRP for the pairing convention of the word pairs. When cleared to 0, 00972 * bytes transferred to and from Slave 0 will be written to EXT_SENS_DATA 00973 * registers in the order they were transferred. 00974 * 00975 * @param num Slave number (0-3) 00976 * @return Current word pair byte-swapping enabled value for specified slave 00977 * @see MPU6050_RA_I2C_SLV0_CTRL 00978 */ 00979 bool MPU6050::getSlaveWordByteSwap(uint8_t num) { 00980 if (num > 3) return 0; 00981 I2Cdev::readBit(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_BYTE_SW_BIT, buffer); 00982 return buffer[0]; 00983 } 00984 /** Set word pair byte-swapping enabled for the specified slave (0-3). 00985 * @param num Slave number (0-3) 00986 * @param enabled New word pair byte-swapping enabled value for specified slave 00987 * @see getSlaveWordByteSwap() 00988 * @see MPU6050_RA_I2C_SLV0_CTRL 00989 */ 00990 void MPU6050::setSlaveWordByteSwap(uint8_t num, bool enabled) { 00991 if (num > 3) return; 00992 I2Cdev::writeBit(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_BYTE_SW_BIT, enabled); 00993 } 00994 /** Get write mode for the specified slave (0-3). 00995 * When set to 1, the transaction will read or write data only. When cleared to 00996 * 0, the transaction will write a register address prior to reading or writing 00997 * data. This should equal 0 when specifying the register address within the 00998 * Slave device to/from which the ensuing data transaction will take place. 00999 * 01000 * @param num Slave number (0-3) 01001 * @return Current write mode for specified slave (0 = register address + data, 1 = data only) 01002 * @see MPU6050_RA_I2C_SLV0_CTRL 01003 */ 01004 bool MPU6050::getSlaveWriteMode(uint8_t num) { 01005 if (num > 3) return 0; 01006 I2Cdev::readBit(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_REG_DIS_BIT, buffer); 01007 return buffer[0]; 01008 } 01009 /** Set write mode for the specified slave (0-3). 01010 * @param num Slave number (0-3) 01011 * @param mode New write mode for specified slave (0 = register address + data, 1 = data only) 01012 * @see getSlaveWriteMode() 01013 * @see MPU6050_RA_I2C_SLV0_CTRL 01014 */ 01015 void MPU6050::setSlaveWriteMode(uint8_t num, bool mode) { 01016 if (num > 3) return; 01017 I2Cdev::writeBit(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_REG_DIS_BIT, mode); 01018 } 01019 /** Get word pair grouping order offset for the specified slave (0-3). 01020 * This sets specifies the grouping order of word pairs received from registers. 01021 * When cleared to 0, bytes from register addresses 0 and 1, 2 and 3, etc (even, 01022 * then odd register addresses) are paired to form a word. When set to 1, bytes 01023 * from register addresses are paired 1 and 2, 3 and 4, etc. (odd, then even 01024 * register addresses) are paired to form a word. 01025 * 01026 * @param num Slave number (0-3) 01027 * @return Current word pair grouping order offset for specified slave 01028 * @see MPU6050_RA_I2C_SLV0_CTRL 01029 */ 01030 bool MPU6050::getSlaveWordGroupOffset(uint8_t num) { 01031 if (num > 3) return 0; 01032 I2Cdev::readBit(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_GRP_BIT, buffer); 01033 return buffer[0]; 01034 } 01035 /** Set word pair grouping order offset for the specified slave (0-3). 01036 * @param num Slave number (0-3) 01037 * @param enabled New word pair grouping order offset for specified slave 01038 * @see getSlaveWordGroupOffset() 01039 * @see MPU6050_RA_I2C_SLV0_CTRL 01040 */ 01041 void MPU6050::setSlaveWordGroupOffset(uint8_t num, bool enabled) { 01042 if (num > 3) return; 01043 I2Cdev::writeBit(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_GRP_BIT, enabled); 01044 } 01045 /** Get number of bytes to read for the specified slave (0-3). 01046 * Specifies the number of bytes transferred to and from Slave 0. Clearing this 01047 * bit to 0 is equivalent to disabling the register by writing 0 to I2C_SLV0_EN. 01048 * @param num Slave number (0-3) 01049 * @return Number of bytes to read for specified slave 01050 * @see MPU6050_RA_I2C_SLV0_CTRL 01051 */ 01052 uint8_t MPU6050::getSlaveDataLength(uint8_t num) { 01053 if (num > 3) return 0; 01054 I2Cdev::readBits(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_LEN_BIT, MPU6050_I2C_SLV_LEN_LENGTH, buffer); 01055 return buffer[0]; 01056 } 01057 /** Set number of bytes to read for the specified slave (0-3). 01058 * @param num Slave number (0-3) 01059 * @param length Number of bytes to read for specified slave 01060 * @see getSlaveDataLength() 01061 * @see MPU6050_RA_I2C_SLV0_CTRL 01062 */ 01063 void MPU6050::setSlaveDataLength(uint8_t num, uint8_t length) { 01064 if (num > 3) return; 01065 I2Cdev::writeBits(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_LEN_BIT, MPU6050_I2C_SLV_LEN_LENGTH, length); 01066 } 01067 01068 // I2C_SLV* registers (Slave 4) 01069 01070 /** Get the I2C address of Slave 4. 01071 * Note that Bit 7 (MSB) controls read/write mode. If Bit 7 is set, it's a read 01072 * operation, and if it is cleared, then it's a write operation. The remaining 01073 * bits (6-0) are the 7-bit device address of the slave device. 01074 * 01075 * @return Current address for Slave 4 01076 * @see getSlaveAddress() 01077 * @see MPU6050_RA_I2C_SLV4_ADDR 01078 */ 01079 uint8_t MPU6050::getSlave4Address() { 01080 I2Cdev::readByte(devAddr, MPU6050_RA_I2C_SLV4_ADDR, buffer); 01081 return buffer[0]; 01082 } 01083 /** Set the I2C address of Slave 4. 01084 * @param address New address for Slave 4 01085 * @see getSlave4Address() 01086 * @see MPU6050_RA_I2C_SLV4_ADDR 01087 */ 01088 void MPU6050::setSlave4Address(uint8_t address) { 01089 I2Cdev::writeByte(devAddr, MPU6050_RA_I2C_SLV4_ADDR, address); 01090 } 01091 /** Get the active internal register for the Slave 4. 01092 * Read/write operations for this slave will be done to whatever internal 01093 * register address is stored in this MPU register. 01094 * 01095 * @return Current active register for Slave 4 01096 * @see MPU6050_RA_I2C_SLV4_REG 01097 */ 01098 uint8_t MPU6050::getSlave4Register() { 01099 I2Cdev::readByte(devAddr, MPU6050_RA_I2C_SLV4_REG, buffer); 01100 return buffer[0]; 01101 } 01102 /** Set the active internal register for Slave 4. 01103 * @param reg New active register for Slave 4 01104 * @see getSlave4Register() 01105 * @see MPU6050_RA_I2C_SLV4_REG 01106 */ 01107 void MPU6050::setSlave4Register(uint8_t reg) { 01108 I2Cdev::writeByte(devAddr, MPU6050_RA_I2C_SLV4_REG, reg); 01109 } 01110 /** Set new byte to write to Slave 4. 01111 * This register stores the data to be written into the Slave 4. If I2C_SLV4_RW 01112 * is set 1 (set to read), this register has no effect. 01113 * @param data New byte to write to Slave 4 01114 * @see MPU6050_RA_I2C_SLV4_DO 01115 */ 01116 void MPU6050::setSlave4OutputByte(uint8_t data) { 01117 I2Cdev::writeByte(devAddr, MPU6050_RA_I2C_SLV4_DO, data); 01118 } 01119 /** Get the enabled value for the Slave 4. 01120 * When set to 1, this bit enables Slave 4 for data transfer operations. When 01121 * cleared to 0, this bit disables Slave 4 from data transfer operations. 01122 * @return Current enabled value for Slave 4 01123 * @see MPU6050_RA_I2C_SLV4_CTRL 01124 */ 01125 bool MPU6050::getSlave4Enabled() { 01126 I2Cdev::readBit(devAddr, MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_EN_BIT, buffer); 01127 return buffer[0]; 01128 } 01129 /** Set the enabled value for Slave 4. 01130 * @param enabled New enabled value for Slave 4 01131 * @see getSlave4Enabled() 01132 * @see MPU6050_RA_I2C_SLV4_CTRL 01133 */ 01134 void MPU6050::setSlave4Enabled(bool enabled) { 01135 I2Cdev::writeBit(devAddr, MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_EN_BIT, enabled); 01136 } 01137 /** Get the enabled value for Slave 4 transaction interrupts. 01138 * When set to 1, this bit enables the generation of an interrupt signal upon 01139 * completion of a Slave 4 transaction. When cleared to 0, this bit disables the 01140 * generation of an interrupt signal upon completion of a Slave 4 transaction. 01141 * The interrupt status can be observed in Register 54. 01142 * 01143 * @return Current enabled value for Slave 4 transaction interrupts. 01144 * @see MPU6050_RA_I2C_SLV4_CTRL 01145 */ 01146 bool MPU6050::getSlave4InterruptEnabled() { 01147 I2Cdev::readBit(devAddr, MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_INT_EN_BIT, buffer); 01148 return buffer[0]; 01149 } 01150 /** Set the enabled value for Slave 4 transaction interrupts. 01151 * @param enabled New enabled value for Slave 4 transaction interrupts. 01152 * @see getSlave4InterruptEnabled() 01153 * @see MPU6050_RA_I2C_SLV4_CTRL 01154 */ 01155 void MPU6050::setSlave4InterruptEnabled(bool enabled) { 01156 I2Cdev::writeBit(devAddr, MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_INT_EN_BIT, enabled); 01157 } 01158 /** Get write mode for Slave 4. 01159 * When set to 1, the transaction will read or write data only. When cleared to 01160 * 0, the transaction will write a register address prior to reading or writing 01161 * data. This should equal 0 when specifying the register address within the 01162 * Slave device to/from which the ensuing data transaction will take place. 01163 * 01164 * @return Current write mode for Slave 4 (0 = register address + data, 1 = data only) 01165 * @see MPU6050_RA_I2C_SLV4_CTRL 01166 */ 01167 bool MPU6050::getSlave4WriteMode() { 01168 I2Cdev::readBit(devAddr, MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_REG_DIS_BIT, buffer); 01169 return buffer[0]; 01170 } 01171 /** Set write mode for the Slave 4. 01172 * @param mode New write mode for Slave 4 (0 = register address + data, 1 = data only) 01173 * @see getSlave4WriteMode() 01174 * @see MPU6050_RA_I2C_SLV4_CTRL 01175 */ 01176 void MPU6050::setSlave4WriteMode(bool mode) { 01177 I2Cdev::writeBit(devAddr, MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_REG_DIS_BIT, mode); 01178 } 01179 /** Get Slave 4 master delay value. 01180 * This configures the reduced access rate of I2C slaves relative to the Sample 01181 * Rate. When a slave's access rate is decreased relative to the Sample Rate, 01182 * the slave is accessed every: 01183 * 01184 * 1 / (1 + I2C_MST_DLY) samples 01185 * 01186 * This base Sample Rate in turn is determined by SMPLRT_DIV (register 25) and 01187 * DLPF_CFG (register 26). Whether a slave's access rate is reduced relative to 01188 * the Sample Rate is determined by I2C_MST_DELAY_CTRL (register 103). For 01189 * further information regarding the Sample Rate, please refer to register 25. 01190 * 01191 * @return Current Slave 4 master delay value 01192 * @see MPU6050_RA_I2C_SLV4_CTRL 01193 */ 01194 uint8_t MPU6050::getSlave4MasterDelay() { 01195 I2Cdev::readBits(devAddr, MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_MST_DLY_BIT, MPU6050_I2C_SLV4_MST_DLY_LENGTH, buffer); 01196 return buffer[0]; 01197 } 01198 /** Set Slave 4 master delay value. 01199 * @param delay New Slave 4 master delay value 01200 * @see getSlave4MasterDelay() 01201 * @see MPU6050_RA_I2C_SLV4_CTRL 01202 */ 01203 void MPU6050::setSlave4MasterDelay(uint8_t delay) { 01204 I2Cdev::writeBits(devAddr, MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_MST_DLY_BIT, MPU6050_I2C_SLV4_MST_DLY_LENGTH, delay); 01205 } 01206 /** Get last available byte read from Slave 4. 01207 * This register stores the data read from Slave 4. This field is populated 01208 * after a read transaction. 01209 * @return Last available byte read from to Slave 4 01210 * @see MPU6050_RA_I2C_SLV4_DI 01211 */ 01212 uint8_t MPU6050::getSlate4InputByte() { 01213 I2Cdev::readByte(devAddr, MPU6050_RA_I2C_SLV4_DI, buffer); 01214 return buffer[0]; 01215 } 01216 01217 // I2C_MST_STATUS register 01218 01219 /** Get FSYNC interrupt status. 01220 * This bit reflects the status of the FSYNC interrupt from an external device 01221 * into the MPU-60X0. This is used as a way to pass an external interrupt 01222 * through the MPU-60X0 to the host application processor. When set to 1, this 01223 * bit will cause an interrupt if FSYNC_INT_EN is asserted in INT_PIN_CFG 01224 * (Register 55). 01225 * @return FSYNC interrupt status 01226 * @see MPU6050_RA_I2C_MST_STATUS 01227 */ 01228 bool MPU6050::getPassthroughStatus() { 01229 I2Cdev::readBit(devAddr, MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_PASS_THROUGH_BIT, buffer); 01230 return buffer[0]; 01231 } 01232 /** Get Slave 4 transaction done status. 01233 * Automatically sets to 1 when a Slave 4 transaction has completed. This 01234 * triggers an interrupt if the I2C_MST_INT_EN bit in the INT_ENABLE register 01235 * (Register 56) is asserted and if the SLV_4_DONE_INT bit is asserted in the 01236 * I2C_SLV4_CTRL register (Register 52). 01237 * @return Slave 4 transaction done status 01238 * @see MPU6050_RA_I2C_MST_STATUS 01239 */ 01240 bool MPU6050::getSlave4IsDone() { 01241 I2Cdev::readBit(devAddr, MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_I2C_SLV4_DONE_BIT, buffer); 01242 return buffer[0]; 01243 } 01244 /** Get master arbitration lost status. 01245 * This bit automatically sets to 1 when the I2C Master has lost arbitration of 01246 * the auxiliary I2C bus (an error condition). This triggers an interrupt if the 01247 * I2C_MST_INT_EN bit in the INT_ENABLE register (Register 56) is asserted. 01248 * @return Master arbitration lost status 01249 * @see MPU6050_RA_I2C_MST_STATUS 01250 */ 01251 bool MPU6050::getLostArbitration() { 01252 I2Cdev::readBit(devAddr, MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_I2C_LOST_ARB_BIT, buffer); 01253 return buffer[0]; 01254 } 01255 /** Get Slave 4 NACK status. 01256 * This bit automatically sets to 1 when the I2C Master receives a NACK in a 01257 * transaction with Slave 4. This triggers an interrupt if the I2C_MST_INT_EN 01258 * bit in the INT_ENABLE register (Register 56) is asserted. 01259 * @return Slave 4 NACK interrupt status 01260 * @see MPU6050_RA_I2C_MST_STATUS 01261 */ 01262 bool MPU6050::getSlave4Nack() { 01263 I2Cdev::readBit(devAddr, MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_I2C_SLV4_NACK_BIT, buffer); 01264 return buffer[0]; 01265 } 01266 /** Get Slave 3 NACK status. 01267 * This bit automatically sets to 1 when the I2C Master receives a NACK in a 01268 * transaction with Slave 3. This triggers an interrupt if the I2C_MST_INT_EN 01269 * bit in the INT_ENABLE register (Register 56) is asserted. 01270 * @return Slave 3 NACK interrupt status 01271 * @see MPU6050_RA_I2C_MST_STATUS 01272 */ 01273 bool MPU6050::getSlave3Nack() { 01274 I2Cdev::readBit(devAddr, MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_I2C_SLV3_NACK_BIT, buffer); 01275 return buffer[0]; 01276 } 01277 /** Get Slave 2 NACK status. 01278 * This bit automatically sets to 1 when the I2C Master receives a NACK in a 01279 * transaction with Slave 2. This triggers an interrupt if the I2C_MST_INT_EN 01280 * bit in the INT_ENABLE register (Register 56) is asserted. 01281 * @return Slave 2 NACK interrupt status 01282 * @see MPU6050_RA_I2C_MST_STATUS 01283 */ 01284 bool MPU6050::getSlave2Nack() { 01285 I2Cdev::readBit(devAddr, MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_I2C_SLV2_NACK_BIT, buffer); 01286 return buffer[0]; 01287 } 01288 /** Get Slave 1 NACK status. 01289 * This bit automatically sets to 1 when the I2C Master receives a NACK in a 01290 * transaction with Slave 1. This triggers an interrupt if the I2C_MST_INT_EN 01291 * bit in the INT_ENABLE register (Register 56) is asserted. 01292 * @return Slave 1 NACK interrupt status 01293 * @see MPU6050_RA_I2C_MST_STATUS 01294 */ 01295 bool MPU6050::getSlave1Nack() { 01296 I2Cdev::readBit(devAddr, MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_I2C_SLV1_NACK_BIT, buffer); 01297 return buffer[0]; 01298 } 01299 /** Get Slave 0 NACK status. 01300 * This bit automatically sets to 1 when the I2C Master receives a NACK in a 01301 * transaction with Slave 0. This triggers an interrupt if the I2C_MST_INT_EN 01302 * bit in the INT_ENABLE register (Register 56) is asserted. 01303 * @return Slave 0 NACK interrupt status 01304 * @see MPU6050_RA_I2C_MST_STATUS 01305 */ 01306 bool MPU6050::getSlave0Nack() { 01307 I2Cdev::readBit(devAddr, MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_I2C_SLV0_NACK_BIT, buffer); 01308 return buffer[0]; 01309 } 01310 01311 // INT_PIN_CFG register 01312 01313 /** Get interrupt logic level mode. 01314 * Will be set 0 for active-high, 1 for active-low. 01315 * @return Current interrupt mode (0=active-high, 1=active-low) 01316 * @see MPU6050_RA_INT_PIN_CFG 01317 * @see MPU6050_INTCFG_INT_LEVEL_BIT 01318 */ 01319 bool MPU6050::getInterruptMode() { 01320 I2Cdev::readBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_INT_LEVEL_BIT, buffer); 01321 return buffer[0]; 01322 } 01323 /** Set interrupt logic level mode. 01324 * @param mode New interrupt mode (0=active-high, 1=active-low) 01325 * @see getInterruptMode() 01326 * @see MPU6050_RA_INT_PIN_CFG 01327 * @see MPU6050_INTCFG_INT_LEVEL_BIT 01328 */ 01329 void MPU6050::setInterruptMode(bool mode) { 01330 I2Cdev::writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_INT_LEVEL_BIT, mode); 01331 } 01332 /** Get interrupt drive mode. 01333 * Will be set 0 for push-pull, 1 for open-drain. 01334 * @return Current interrupt drive mode (0=push-pull, 1=open-drain) 01335 * @see MPU6050_RA_INT_PIN_CFG 01336 * @see MPU6050_INTCFG_INT_OPEN_BIT 01337 */ 01338 bool MPU6050::getInterruptDrive() { 01339 I2Cdev::readBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_INT_OPEN_BIT, buffer); 01340 return buffer[0]; 01341 } 01342 /** Set interrupt drive mode. 01343 * @param drive New interrupt drive mode (0=push-pull, 1=open-drain) 01344 * @see getInterruptDrive() 01345 * @see MPU6050_RA_INT_PIN_CFG 01346 * @see MPU6050_INTCFG_INT_OPEN_BIT 01347 */ 01348 void MPU6050::setInterruptDrive(bool drive) { 01349 I2Cdev::writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_INT_OPEN_BIT, drive); 01350 } 01351 /** Get interrupt latch mode. 01352 * Will be set 0 for 50us-pulse, 1 for latch-until-int-cleared. 01353 * @return Current latch mode (0=50us-pulse, 1=latch-until-int-cleared) 01354 * @see MPU6050_RA_INT_PIN_CFG 01355 * @see MPU6050_INTCFG_LATCH_INT_EN_BIT 01356 */ 01357 bool MPU6050::getInterruptLatch() { 01358 I2Cdev::readBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_LATCH_INT_EN_BIT, buffer); 01359 return buffer[0]; 01360 } 01361 /** Set interrupt latch mode. 01362 * @param latch New latch mode (0=50us-pulse, 1=latch-until-int-cleared) 01363 * @see getInterruptLatch() 01364 * @see MPU6050_RA_INT_PIN_CFG 01365 * @see MPU6050_INTCFG_LATCH_INT_EN_BIT 01366 */ 01367 void MPU6050::setInterruptLatch(bool latch) { 01368 I2Cdev::writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_LATCH_INT_EN_BIT, latch); 01369 } 01370 /** Get interrupt latch clear mode. 01371 * Will be set 0 for status-read-only, 1 for any-register-read. 01372 * @return Current latch clear mode (0=status-read-only, 1=any-register-read) 01373 * @see MPU6050_RA_INT_PIN_CFG 01374 * @see MPU6050_INTCFG_INT_RD_CLEAR_BIT 01375 */ 01376 bool MPU6050::getInterruptLatchClear() { 01377 I2Cdev::readBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_INT_RD_CLEAR_BIT, buffer); 01378 return buffer[0]; 01379 } 01380 /** Set interrupt latch clear mode. 01381 * @param clear New latch clear mode (0=status-read-only, 1=any-register-read) 01382 * @see getInterruptLatchClear() 01383 * @see MPU6050_RA_INT_PIN_CFG 01384 * @see MPU6050_INTCFG_INT_RD_CLEAR_BIT 01385 */ 01386 void MPU6050::setInterruptLatchClear(bool clear) { 01387 I2Cdev::writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_INT_RD_CLEAR_BIT, clear); 01388 } 01389 /** Get FSYNC interrupt logic level mode. 01390 * @return Current FSYNC interrupt mode (0=active-high, 1=active-low) 01391 * @see getFSyncInterruptMode() 01392 * @see MPU6050_RA_INT_PIN_CFG 01393 * @see MPU6050_INTCFG_FSYNC_INT_LEVEL_BIT 01394 */ 01395 bool MPU6050::getFSyncInterruptLevel() { 01396 I2Cdev::readBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_FSYNC_INT_LEVEL_BIT, buffer); 01397 return buffer[0]; 01398 } 01399 /** Set FSYNC interrupt logic level mode. 01400 * @param mode New FSYNC interrupt mode (0=active-high, 1=active-low) 01401 * @see getFSyncInterruptMode() 01402 * @see MPU6050_RA_INT_PIN_CFG 01403 * @see MPU6050_INTCFG_FSYNC_INT_LEVEL_BIT 01404 */ 01405 void MPU6050::setFSyncInterruptLevel(bool level) { 01406 I2Cdev::writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_FSYNC_INT_LEVEL_BIT, level); 01407 } 01408 /** Get FSYNC pin interrupt enabled setting. 01409 * Will be set 0 for disabled, 1 for enabled. 01410 * @return Current interrupt enabled setting 01411 * @see MPU6050_RA_INT_PIN_CFG 01412 * @see MPU6050_INTCFG_FSYNC_INT_EN_BIT 01413 */ 01414 bool MPU6050::getFSyncInterruptEnabled() { 01415 I2Cdev::readBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_FSYNC_INT_EN_BIT, buffer); 01416 return buffer[0]; 01417 } 01418 /** Set FSYNC pin interrupt enabled setting. 01419 * @param enabled New FSYNC pin interrupt enabled setting 01420 * @see getFSyncInterruptEnabled() 01421 * @see MPU6050_RA_INT_PIN_CFG 01422 * @see MPU6050_INTCFG_FSYNC_INT_EN_BIT 01423 */ 01424 void MPU6050::setFSyncInterruptEnabled(bool enabled) { 01425 I2Cdev::writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_FSYNC_INT_EN_BIT, enabled); 01426 } 01427 /** Get I2C bypass enabled status. 01428 * When this bit is equal to 1 and I2C_MST_EN (Register 106 bit[5]) is equal to 01429 * 0, the host application processor will be able to directly access the 01430 * auxiliary I2C bus of the MPU-60X0. When this bit is equal to 0, the host 01431 * application processor will not be able to directly access the auxiliary I2C 01432 * bus of the MPU-60X0 regardless of the state of I2C_MST_EN (Register 106 01433 * bit[5]). 01434 * @return Current I2C bypass enabled status 01435 * @see MPU6050_RA_INT_PIN_CFG 01436 * @see MPU6050_INTCFG_I2C_BYPASS_EN_BIT 01437 */ 01438 bool MPU6050::getI2CBypassEnabled() { 01439 I2Cdev::readBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_I2C_BYPASS_EN_BIT, buffer); 01440 return buffer[0]; 01441 } 01442 /** Set I2C bypass enabled status. 01443 * When this bit is equal to 1 and I2C_MST_EN (Register 106 bit[5]) is equal to 01444 * 0, the host application processor will be able to directly access the 01445 * auxiliary I2C bus of the MPU-60X0. When this bit is equal to 0, the host 01446 * application processor will not be able to directly access the auxiliary I2C 01447 * bus of the MPU-60X0 regardless of the state of I2C_MST_EN (Register 106 01448 * bit[5]). 01449 * @param enabled New I2C bypass enabled status 01450 * @see MPU6050_RA_INT_PIN_CFG 01451 * @see MPU6050_INTCFG_I2C_BYPASS_EN_BIT 01452 */ 01453 void MPU6050::setI2CBypassEnabled(bool enabled) { 01454 I2Cdev::writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_I2C_BYPASS_EN_BIT, enabled); 01455 } 01456 /** Get reference clock output enabled status. 01457 * When this bit is equal to 1, a reference clock output is provided at the 01458 * CLKOUT pin. When this bit is equal to 0, the clock output is disabled. For 01459 * further information regarding CLKOUT, please refer to the MPU-60X0 Product 01460 * Specification document. 01461 * @return Current reference clock output enabled status 01462 * @see MPU6050_RA_INT_PIN_CFG 01463 * @see MPU6050_INTCFG_CLKOUT_EN_BIT 01464 */ 01465 bool MPU6050::getClockOutputEnabled() { 01466 I2Cdev::readBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_CLKOUT_EN_BIT, buffer); 01467 return buffer[0]; 01468 } 01469 /** Set reference clock output enabled status. 01470 * When this bit is equal to 1, a reference clock output is provided at the 01471 * CLKOUT pin. When this bit is equal to 0, the clock output is disabled. For 01472 * further information regarding CLKOUT, please refer to the MPU-60X0 Product 01473 * Specification document. 01474 * @param enabled New reference clock output enabled status 01475 * @see MPU6050_RA_INT_PIN_CFG 01476 * @see MPU6050_INTCFG_CLKOUT_EN_BIT 01477 */ 01478 void MPU6050::setClockOutputEnabled(bool enabled) { 01479 I2Cdev::writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_CLKOUT_EN_BIT, enabled); 01480 } 01481 01482 // INT_ENABLE register 01483 01484 /** Get full interrupt enabled status. 01485 * Full register byte for all interrupts, for quick reading. Each bit will be 01486 * set 0 for disabled, 1 for enabled. 01487 * @return Current interrupt enabled status 01488 * @see MPU6050_RA_INT_ENABLE 01489 * @see MPU6050_INTERRUPT_FF_BIT 01490 **/ 01491 uint8_t MPU6050::getIntEnabled() { 01492 I2Cdev::readByte(devAddr, MPU6050_RA_INT_ENABLE, buffer); 01493 return buffer[0]; 01494 } 01495 /** Set full interrupt enabled status. 01496 * Full register byte for all interrupts, for quick reading. Each bit should be 01497 * set 0 for disabled, 1 for enabled. 01498 * @param enabled New interrupt enabled status 01499 * @see getIntFreefallEnabled() 01500 * @see MPU6050_RA_INT_ENABLE 01501 * @see MPU6050_INTERRUPT_FF_BIT 01502 **/ 01503 void MPU6050::setIntEnabled(uint8_t enabled) { 01504 I2Cdev::writeByte(devAddr, MPU6050_RA_INT_ENABLE, enabled); 01505 } 01506 /** Get Free Fall interrupt enabled status. 01507 * Will be set 0 for disabled, 1 for enabled. 01508 * @return Current interrupt enabled status 01509 * @see MPU6050_RA_INT_ENABLE 01510 * @see MPU6050_INTERRUPT_FF_BIT 01511 **/ 01512 bool MPU6050::getIntFreefallEnabled() { 01513 I2Cdev::readBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_FF_BIT, buffer); 01514 return buffer[0]; 01515 } 01516 /** Set Free Fall interrupt enabled status. 01517 * @param enabled New interrupt enabled status 01518 * @see getIntFreefallEnabled() 01519 * @see MPU6050_RA_INT_ENABLE 01520 * @see MPU6050_INTERRUPT_FF_BIT 01521 **/ 01522 void MPU6050::setIntFreefallEnabled(bool enabled) { 01523 I2Cdev::writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_FF_BIT, enabled); 01524 } 01525 /** Get Motion Detection interrupt enabled status. 01526 * Will be set 0 for disabled, 1 for enabled. 01527 * @return Current interrupt enabled status 01528 * @see MPU6050_RA_INT_ENABLE 01529 * @see MPU6050_INTERRUPT_MOT_BIT 01530 **/ 01531 bool MPU6050::getIntMotionEnabled() { 01532 I2Cdev::readBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_MOT_BIT, buffer); 01533 return buffer[0]; 01534 } 01535 /** Set Motion Detection interrupt enabled status. 01536 * @param enabled New interrupt enabled status 01537 * @see getIntMotionEnabled() 01538 * @see MPU6050_RA_INT_ENABLE 01539 * @see MPU6050_INTERRUPT_MOT_BIT 01540 **/ 01541 void MPU6050::setIntMotionEnabled(bool enabled) { 01542 I2Cdev::writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_MOT_BIT, enabled); 01543 } 01544 /** Get Zero Motion Detection interrupt enabled status. 01545 * Will be set 0 for disabled, 1 for enabled. 01546 * @return Current interrupt enabled status 01547 * @see MPU6050_RA_INT_ENABLE 01548 * @see MPU6050_INTERRUPT_ZMOT_BIT 01549 **/ 01550 bool MPU6050::getIntZeroMotionEnabled() { 01551 I2Cdev::readBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_ZMOT_BIT, buffer); 01552 return buffer[0]; 01553 } 01554 /** Set Zero Motion Detection interrupt enabled status. 01555 * @param enabled New interrupt enabled status 01556 * @see getIntZeroMotionEnabled() 01557 * @see MPU6050_RA_INT_ENABLE 01558 * @see MPU6050_INTERRUPT_ZMOT_BIT 01559 **/ 01560 void MPU6050::setIntZeroMotionEnabled(bool enabled) { 01561 I2Cdev::writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_ZMOT_BIT, enabled); 01562 } 01563 /** Get FIFO Buffer Overflow interrupt enabled status. 01564 * Will be set 0 for disabled, 1 for enabled. 01565 * @return Current interrupt enabled status 01566 * @see MPU6050_RA_INT_ENABLE 01567 * @see MPU6050_INTERRUPT_FIFO_OFLOW_BIT 01568 **/ 01569 bool MPU6050::getIntFIFOBufferOverflowEnabled() { 01570 I2Cdev::readBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_FIFO_OFLOW_BIT, buffer); 01571 return buffer[0]; 01572 } 01573 /** Set FIFO Buffer Overflow interrupt enabled status. 01574 * @param enabled New interrupt enabled status 01575 * @see getIntFIFOBufferOverflowEnabled() 01576 * @see MPU6050_RA_INT_ENABLE 01577 * @see MPU6050_INTERRUPT_FIFO_OFLOW_BIT 01578 **/ 01579 void MPU6050::setIntFIFOBufferOverflowEnabled(bool enabled) { 01580 I2Cdev::writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_FIFO_OFLOW_BIT, enabled); 01581 } 01582 /** Get I2C Master interrupt enabled status. 01583 * This enables any of the I2C Master interrupt sources to generate an 01584 * interrupt. Will be set 0 for disabled, 1 for enabled. 01585 * @return Current interrupt enabled status 01586 * @see MPU6050_RA_INT_ENABLE 01587 * @see MPU6050_INTERRUPT_I2C_MST_INT_BIT 01588 **/ 01589 bool MPU6050::getIntI2CMasterEnabled() { 01590 I2Cdev::readBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_I2C_MST_INT_BIT, buffer); 01591 return buffer[0]; 01592 } 01593 /** Set I2C Master interrupt enabled status. 01594 * @param enabled New interrupt enabled status 01595 * @see getIntI2CMasterEnabled() 01596 * @see MPU6050_RA_INT_ENABLE 01597 * @see MPU6050_INTERRUPT_I2C_MST_INT_BIT 01598 **/ 01599 void MPU6050::setIntI2CMasterEnabled(bool enabled) { 01600 I2Cdev::writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_I2C_MST_INT_BIT, enabled); 01601 } 01602 /** Get Data Ready interrupt enabled setting. 01603 * This event occurs each time a write operation to all of the sensor registers 01604 * has been completed. Will be set 0 for disabled, 1 for enabled. 01605 * @return Current interrupt enabled status 01606 * @see MPU6050_RA_INT_ENABLE 01607 * @see MPU6050_INTERRUPT_DATA_RDY_BIT 01608 */ 01609 bool MPU6050::getIntDataReadyEnabled() { 01610 I2Cdev::readBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_DATA_RDY_BIT, buffer); 01611 return buffer[0]; 01612 } 01613 /** Set Data Ready interrupt enabled status. 01614 * @param enabled New interrupt enabled status 01615 * @see getIntDataReadyEnabled() 01616 * @see MPU6050_RA_INT_CFG 01617 * @see MPU6050_INTERRUPT_DATA_RDY_BIT 01618 */ 01619 void MPU6050::setIntDataReadyEnabled(bool enabled) { 01620 I2Cdev::writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_DATA_RDY_BIT, enabled); 01621 } 01622 01623 // INT_STATUS register 01624 01625 /** Get full set of interrupt status bits. 01626 * These bits clear to 0 after the register has been read. Very useful 01627 * for getting multiple INT statuses, since each single bit read clears 01628 * all of them because it has to read the whole byte. 01629 * @return Current interrupt status 01630 * @see MPU6050_RA_INT_STATUS 01631 */ 01632 uint8_t MPU6050::getIntStatus() { 01633 I2Cdev::readByte(devAddr, MPU6050_RA_INT_STATUS, buffer); 01634 return buffer[0]; 01635 } 01636 /** Get Free Fall interrupt status. 01637 * This bit automatically sets to 1 when a Free Fall interrupt has been 01638 * generated. The bit clears to 0 after the register has been read. 01639 * @return Current interrupt status 01640 * @see MPU6050_RA_INT_STATUS 01641 * @see MPU6050_INTERRUPT_FF_BIT 01642 */ 01643 bool MPU6050::getIntFreefallStatus() { 01644 I2Cdev::readBit(devAddr, MPU6050_RA_INT_STATUS, MPU6050_INTERRUPT_FF_BIT, buffer); 01645 return buffer[0]; 01646 } 01647 /** Get Motion Detection interrupt status. 01648 * This bit automatically sets to 1 when a Motion Detection interrupt has been 01649 * generated. The bit clears to 0 after the register has been read. 01650 * @return Current interrupt status 01651 * @see MPU6050_RA_INT_STATUS 01652 * @see MPU6050_INTERRUPT_MOT_BIT 01653 */ 01654 bool MPU6050::getIntMotionStatus() { 01655 I2Cdev::readBit(devAddr, MPU6050_RA_INT_STATUS, MPU6050_INTERRUPT_MOT_BIT, buffer); 01656 return buffer[0]; 01657 } 01658 /** Get Zero Motion Detection interrupt status. 01659 * This bit automatically sets to 1 when a Zero Motion Detection interrupt has 01660 * been generated. The bit clears to 0 after the register has been read. 01661 * @return Current interrupt status 01662 * @see MPU6050_RA_INT_STATUS 01663 * @see MPU6050_INTERRUPT_ZMOT_BIT 01664 */ 01665 bool MPU6050::getIntZeroMotionStatus() { 01666 I2Cdev::readBit(devAddr, MPU6050_RA_INT_STATUS, MPU6050_INTERRUPT_ZMOT_BIT, buffer); 01667 return buffer[0]; 01668 } 01669 /** Get FIFO Buffer Overflow interrupt status. 01670 * This bit automatically sets to 1 when a Free Fall interrupt has been 01671 * generated. The bit clears to 0 after the register has been read. 01672 * @return Current interrupt status 01673 * @see MPU6050_RA_INT_STATUS 01674 * @see MPU6050_INTERRUPT_FIFO_OFLOW_BIT 01675 */ 01676 bool MPU6050::getIntFIFOBufferOverflowStatus() { 01677 I2Cdev::readBit(devAddr, MPU6050_RA_INT_STATUS, MPU6050_INTERRUPT_FIFO_OFLOW_BIT, buffer); 01678 return buffer[0]; 01679 } 01680 /** Get I2C Master interrupt status. 01681 * This bit automatically sets to 1 when an I2C Master interrupt has been 01682 * generated. For a list of I2C Master interrupts, please refer to Register 54. 01683 * The bit clears to 0 after the register has been read. 01684 * @return Current interrupt status 01685 * @see MPU6050_RA_INT_STATUS 01686 * @see MPU6050_INTERRUPT_I2C_MST_INT_BIT 01687 */ 01688 bool MPU6050::getIntI2CMasterStatus() { 01689 I2Cdev::readBit(devAddr, MPU6050_RA_INT_STATUS, MPU6050_INTERRUPT_I2C_MST_INT_BIT, buffer); 01690 return buffer[0]; 01691 } 01692 /** Get Data Ready interrupt status. 01693 * This bit automatically sets to 1 when a Data Ready interrupt has been 01694 * generated. The bit clears to 0 after the register has been read. 01695 * @return Current interrupt status 01696 * @see MPU6050_RA_INT_STATUS 01697 * @see MPU6050_INTERRUPT_DATA_RDY_BIT 01698 */ 01699 bool MPU6050::getIntDataReadyStatus() { 01700 I2Cdev::readBit(devAddr, MPU6050_RA_INT_STATUS, MPU6050_INTERRUPT_DATA_RDY_BIT, buffer); 01701 return buffer[0]; 01702 } 01703 01704 // ACCEL_*OUT_* registers 01705 01706 /** Get raw 9-axis motion sensor readings (accel/gyro/compass). 01707 * FUNCTION NOT FULLY IMPLEMENTED YET. 01708 * @param ax 16-bit signed integer container for accelerometer X-axis value 01709 * @param ay 16-bit signed integer container for accelerometer Y-axis value 01710 * @param az 16-bit signed integer container for accelerometer Z-axis value 01711 * @param gx 16-bit signed integer container for gyroscope X-axis value 01712 * @param gy 16-bit signed integer container for gyroscope Y-axis value 01713 * @param gz 16-bit signed integer container for gyroscope Z-axis value 01714 * @param mx 16-bit signed integer container for magnetometer X-axis value 01715 * @param my 16-bit signed integer container for magnetometer Y-axis value 01716 * @param mz 16-bit signed integer container for magnetometer Z-axis value 01717 * @see getMotion6() 01718 * @see getAcceleration() 01719 * @see getRotation() 01720 * @see MPU6050_RA_ACCEL_XOUT_H 01721 */ 01722 void MPU6050::getMotion9(int16_t* ax, int16_t* ay, int16_t* az, int16_t* gx, int16_t* gy, int16_t* gz, int16_t* mx, int16_t* my, int16_t* mz) { 01723 getMotion6(ax, ay, az, gx, gy, gz); 01724 // TODO: magnetometer integration 01725 } 01726 /** Get raw 6-axis motion sensor readings (accel/gyro). 01727 * Retrieves all currently available motion sensor values. 01728 * @param ax 16-bit signed integer container for accelerometer X-axis value 01729 * @param ay 16-bit signed integer container for accelerometer Y-axis value 01730 * @param az 16-bit signed integer container for accelerometer Z-axis value 01731 * @param gx 16-bit signed integer container for gyroscope X-axis value 01732 * @param gy 16-bit signed integer container for gyroscope Y-axis value 01733 * @param gz 16-bit signed integer container for gyroscope Z-axis value 01734 * @see getAcceleration() 01735 * @see getRotation() 01736 * @see MPU6050_RA_ACCEL_XOUT_H 01737 */ 01738 void MPU6050::getMotion6(int16_t* ax, int16_t* ay, int16_t* az, int16_t* gx, int16_t* gy, int16_t* gz) { 01739 I2Cdev::readBytes(devAddr, MPU6050_RA_ACCEL_XOUT_H, 14, buffer); 01740 *ax = (((int16_t)buffer[0]) << 8) | buffer[1]; 01741 *ay = (((int16_t)buffer[2]) << 8) | buffer[3]; 01742 *az = (((int16_t)buffer[4]) << 8) | buffer[5]; 01743 *gx = (((int16_t)buffer[8]) << 8) | buffer[9]; 01744 *gy = (((int16_t)buffer[10]) << 8) | buffer[11]; 01745 *gz = (((int16_t)buffer[12]) << 8) | buffer[13]; 01746 } 01747 /** Get 3-axis accelerometer readings. 01748 * These registers store the most recent accelerometer measurements. 01749 * Accelerometer measurements are written to these registers at the Sample Rate 01750 * as defined in Register 25. 01751 * 01752 * The accelerometer measurement registers, along with the temperature 01753 * measurement registers, gyroscope measurement registers, and external sensor 01754 * data registers, are composed of two sets of registers: an internal register 01755 * set and a user-facing read register set. 01756 * 01757 * The data within the accelerometer sensors' internal register set is always 01758 * updated at the Sample Rate. Meanwhile, the user-facing read register set 01759 * duplicates the internal register set's data values whenever the serial 01760 * interface is idle. This guarantees that a burst read of sensor registers will 01761 * read measurements from the same sampling instant. Note that if burst reads 01762 * are not used, the user is responsible for ensuring a set of single byte reads 01763 * correspond to a single sampling instant by checking the Data Ready interrupt. 01764 * 01765 * Each 16-bit accelerometer measurement has a full scale defined in ACCEL_FS 01766 * (Register 28). For each full scale setting, the accelerometers' sensitivity 01767 * per LSB in ACCEL_xOUT is shown in the table below: 01768 * 01769 * <pre> 01770 * AFS_SEL | Full Scale Range | LSB Sensitivity 01771 * --------+------------------+---------------- 01772 * 0 | +/- 2g | 8192 LSB/mg 01773 * 1 | +/- 4g | 4096 LSB/mg 01774 * 2 | +/- 8g | 2048 LSB/mg 01775 * 3 | +/- 16g | 1024 LSB/mg 01776 * </pre> 01777 * 01778 * @param x 16-bit signed integer container for X-axis acceleration 01779 * @param y 16-bit signed integer container for Y-axis acceleration 01780 * @param z 16-bit signed integer container for Z-axis acceleration 01781 * @see MPU6050_RA_GYRO_XOUT_H 01782 */ 01783 void MPU6050::getAcceleration(int16_t* x, int16_t* y, int16_t* z) { 01784 I2Cdev::readBytes(devAddr, MPU6050_RA_ACCEL_XOUT_H, 6, buffer); 01785 *x = (((int16_t)buffer[0]) << 8) | buffer[1]; 01786 *y = (((int16_t)buffer[2]) << 8) | buffer[3]; 01787 *z = (((int16_t)buffer[4]) << 8) | buffer[5]; 01788 } 01789 /** Get X-axis accelerometer reading. 01790 * @return X-axis acceleration measurement in 16-bit 2's complement format 01791 * @see getMotion6() 01792 * @see MPU6050_RA_ACCEL_XOUT_H 01793 */ 01794 int16_t MPU6050::getAccelerationX() { 01795 I2Cdev::readBytes(devAddr, MPU6050_RA_ACCEL_XOUT_H, 2, buffer); 01796 return (((int16_t)buffer[0]) << 8) | buffer[1]; 01797 } 01798 /** Get Y-axis accelerometer reading. 01799 * @return Y-axis acceleration measurement in 16-bit 2's complement format 01800 * @see getMotion6() 01801 * @see MPU6050_RA_ACCEL_YOUT_H 01802 */ 01803 int16_t MPU6050::getAccelerationY() { 01804 I2Cdev::readBytes(devAddr, MPU6050_RA_ACCEL_YOUT_H, 2, buffer); 01805 return (((int16_t)buffer[0]) << 8) | buffer[1]; 01806 } 01807 /** Get Z-axis accelerometer reading. 01808 * @return Z-axis acceleration measurement in 16-bit 2's complement format 01809 * @see getMotion6() 01810 * @see MPU6050_RA_ACCEL_ZOUT_H 01811 */ 01812 int16_t MPU6050::getAccelerationZ() { 01813 I2Cdev::readBytes(devAddr, MPU6050_RA_ACCEL_ZOUT_H, 2, buffer); 01814 return (((int16_t)buffer[0]) << 8) | buffer[1]; 01815 } 01816 01817 // TEMP_OUT_* registers 01818 01819 /** Get current internal temperature. 01820 * @return Temperature reading in 16-bit 2's complement format 01821 * @see MPU6050_RA_TEMP_OUT_H 01822 */ 01823 int16_t MPU6050::getTemperature() { 01824 I2Cdev::readBytes(devAddr, MPU6050_RA_TEMP_OUT_H, 2, buffer); 01825 return (((int16_t)buffer[0]) << 8) | buffer[1]; 01826 } 01827 01828 // GYRO_*OUT_* registers 01829 01830 /** Get 3-axis gyroscope readings. 01831 * These gyroscope measurement registers, along with the accelerometer 01832 * measurement registers, temperature measurement registers, and external sensor 01833 * data registers, are composed of two sets of registers: an internal register 01834 * set and a user-facing read register set. 01835 * The data within the gyroscope sensors' internal register set is always 01836 * updated at the Sample Rate. Meanwhile, the user-facing read register set 01837 * duplicates the internal register set's data values whenever the serial 01838 * interface is idle. This guarantees that a burst read of sensor registers will 01839 * read measurements from the same sampling instant. Note that if burst reads 01840 * are not used, the user is responsible for ensuring a set of single byte reads 01841 * correspond to a single sampling instant by checking the Data Ready interrupt. 01842 * 01843 * Each 16-bit gyroscope measurement has a full scale defined in FS_SEL 01844 * (Register 27). For each full scale setting, the gyroscopes' sensitivity per 01845 * LSB in GYRO_xOUT is shown in the table below: 01846 * 01847 * <pre> 01848 * FS_SEL | Full Scale Range | LSB Sensitivity 01849 * -------+--------------------+---------------- 01850 * 0 | +/- 250 degrees/s | 131 LSB/deg/s 01851 * 1 | +/- 500 degrees/s | 65.5 LSB/deg/s 01852 * 2 | +/- 1000 degrees/s | 32.8 LSB/deg/s 01853 * 3 | +/- 2000 degrees/s | 16.4 LSB/deg/s 01854 * </pre> 01855 * 01856 * @param x 16-bit signed integer container for X-axis rotation 01857 * @param y 16-bit signed integer container for Y-axis rotation 01858 * @param z 16-bit signed integer container for Z-axis rotation 01859 * @see getMotion6() 01860 * @see MPU6050_RA_GYRO_XOUT_H 01861 */ 01862 void MPU6050::getRotation(int16_t* x, int16_t* y, int16_t* z) { 01863 I2Cdev::readBytes(devAddr, MPU6050_RA_GYRO_XOUT_H, 6, buffer); 01864 *x = (((int16_t)buffer[0]) << 8) | buffer[1]; 01865 *y = (((int16_t)buffer[2]) << 8) | buffer[3]; 01866 *z = (((int16_t)buffer[4]) << 8) | buffer[5]; 01867 } 01868 /** Get X-axis gyroscope reading. 01869 * @return X-axis rotation measurement in 16-bit 2's complement format 01870 * @see getMotion6() 01871 * @see MPU6050_RA_GYRO_XOUT_H 01872 */ 01873 int16_t MPU6050::getRotationX() { 01874 I2Cdev::readBytes(devAddr, MPU6050_RA_GYRO_XOUT_H, 2, buffer); 01875 return (((int16_t)buffer[0]) << 8) | buffer[1]; 01876 } 01877 /** Get Y-axis gyroscope reading. 01878 * @return Y-axis rotation measurement in 16-bit 2's complement format 01879 * @see getMotion6() 01880 * @see MPU6050_RA_GYRO_YOUT_H 01881 */ 01882 int16_t MPU6050::getRotationY() { 01883 I2Cdev::readBytes(devAddr, MPU6050_RA_GYRO_YOUT_H, 2, buffer); 01884 return (((int16_t)buffer[0]) << 8) | buffer[1]; 01885 } 01886 /** Get Z-axis gyroscope reading. 01887 * @return Z-axis rotation measurement in 16-bit 2's complement format 01888 * @see getMotion6() 01889 * @see MPU6050_RA_GYRO_ZOUT_H 01890 */ 01891 int16_t MPU6050::getRotationZ() { 01892 I2Cdev::readBytes(devAddr, MPU6050_RA_GYRO_ZOUT_H, 2, buffer); 01893 return (((int16_t)buffer[0]) << 8) | buffer[1]; 01894 } 01895 01896 // EXT_SENS_DATA_* registers 01897 01898 /** Read single byte from external sensor data register. 01899 * These registers store data read from external sensors by the Slave 0, 1, 2, 01900 * and 3 on the auxiliary I2C interface. Data read by Slave 4 is stored in 01901 * I2C_SLV4_DI (Register 53). 01902 * 01903 * External sensor data is written to these registers at the Sample Rate as 01904 * defined in Register 25. This access rate can be reduced by using the Slave 01905 * Delay Enable registers (Register 103). 01906 * 01907 * External sensor data registers, along with the gyroscope measurement 01908 * registers, accelerometer measurement registers, and temperature measurement 01909 * registers, are composed of two sets of registers: an internal register set 01910 * and a user-facing read register set. 01911 * 01912 * The data within the external sensors' internal register set is always updated 01913 * at the Sample Rate (or the reduced access rate) whenever the serial interface 01914 * is idle. This guarantees that a burst read of sensor registers will read 01915 * measurements from the same sampling instant. Note that if burst reads are not 01916 * used, the user is responsible for ensuring a set of single byte reads 01917 * correspond to a single sampling instant by checking the Data Ready interrupt. 01918 * 01919 * Data is placed in these external sensor data registers according to 01920 * I2C_SLV0_CTRL, I2C_SLV1_CTRL, I2C_SLV2_CTRL, and I2C_SLV3_CTRL (Registers 39, 01921 * 42, 45, and 48). When more than zero bytes are read (I2C_SLVx_LEN > 0) from 01922 * an enabled slave (I2C_SLVx_EN = 1), the slave is read at the Sample Rate (as 01923 * defined in Register 25) or delayed rate (if specified in Register 52 and 01924 * 103). During each Sample cycle, slave reads are performed in order of Slave 01925 * number. If all slaves are enabled with more than zero bytes to be read, the 01926 * order will be Slave 0, followed by Slave 1, Slave 2, and Slave 3. 01927 * 01928 * Each enabled slave will have EXT_SENS_DATA registers associated with it by 01929 * number of bytes read (I2C_SLVx_LEN) in order of slave number, starting from 01930 * EXT_SENS_DATA_00. Note that this means enabling or disabling a slave may 01931 * change the higher numbered slaves' associated registers. Furthermore, if 01932 * fewer total bytes are being read from the external sensors as a result of 01933 * such a change, then the data remaining in the registers which no longer have 01934 * an associated slave device (i.e. high numbered registers) will remain in 01935 * these previously allocated registers unless reset. 01936 * 01937 * If the sum of the read lengths of all SLVx transactions exceed the number of 01938 * available EXT_SENS_DATA registers, the excess bytes will be dropped. There 01939 * are 24 EXT_SENS_DATA registers and hence the total read lengths between all 01940 * the slaves cannot be greater than 24 or some bytes will be lost. 01941 * 01942 * Note: Slave 4's behavior is distinct from that of Slaves 0-3. For further 01943 * information regarding the characteristics of Slave 4, please refer to 01944 * Registers 49 to 53. 01945 * 01946 * EXAMPLE: 01947 * Suppose that Slave 0 is enabled with 4 bytes to be read (I2C_SLV0_EN = 1 and 01948 * I2C_SLV0_LEN = 4) while Slave 1 is enabled with 2 bytes to be read so that 01949 * I2C_SLV1_EN = 1 and I2C_SLV1_LEN = 2. In such a situation, EXT_SENS_DATA _00 01950 * through _03 will be associated with Slave 0, while EXT_SENS_DATA _04 and 05 01951 * will be associated with Slave 1. If Slave 2 is enabled as well, registers 01952 * starting from EXT_SENS_DATA_06 will be allocated to Slave 2. 01953 * 01954 * If Slave 2 is disabled while Slave 3 is enabled in this same situation, then 01955 * registers starting from EXT_SENS_DATA_06 will be allocated to Slave 3 01956 * instead. 01957 * 01958 * REGISTER ALLOCATION FOR DYNAMIC DISABLE VS. NORMAL DISABLE: 01959 * If a slave is disabled at any time, the space initially allocated to the 01960 * slave in the EXT_SENS_DATA register, will remain associated with that slave. 01961 * This is to avoid dynamic adjustment of the register allocation. 01962 * 01963 * The allocation of the EXT_SENS_DATA registers is recomputed only when (1) all 01964 * slaves are disabled, or (2) the I2C_MST_RST bit is set (Register 106). 01965 * 01966 * This above is also true if one of the slaves gets NACKed and stops 01967 * functioning. 01968 * 01969 * @param position Starting position (0-23) 01970 * @return Byte read from register 01971 */ 01972 uint8_t MPU6050::getExternalSensorByte(int position) { 01973 I2Cdev::readByte(devAddr, MPU6050_RA_EXT_SENS_DATA_00 + position, buffer); 01974 return buffer[0]; 01975 } 01976 /** Read word (2 bytes) from external sensor data registers. 01977 * @param position Starting position (0-21) 01978 * @return Word read from register 01979 * @see getExternalSensorByte() 01980 */ 01981 uint16_t MPU6050::getExternalSensorWord(int position) { 01982 I2Cdev::readBytes(devAddr, MPU6050_RA_EXT_SENS_DATA_00 + position, 2, buffer); 01983 return (((uint16_t)buffer[0]) << 8) | buffer[1]; 01984 } 01985 /** Read double word (4 bytes) from external sensor data registers. 01986 * @param position Starting position (0-20) 01987 * @return Double word read from registers 01988 * @see getExternalSensorByte() 01989 */ 01990 uint32_t MPU6050::getExternalSensorDWord(int position) { 01991 I2Cdev::readBytes(devAddr, MPU6050_RA_EXT_SENS_DATA_00 + position, 4, buffer); 01992 return (((uint32_t)buffer[0]) << 24) | (((uint32_t)buffer[1]) << 16) | (((uint16_t)buffer[2]) << 8) | buffer[3]; 01993 } 01994 01995 // MOT_DETECT_STATUS register 01996 01997 /** Get X-axis negative motion detection interrupt status. 01998 * @return Motion detection status 01999 * @see MPU6050_RA_MOT_DETECT_STATUS 02000 * @see MPU6050_MOTION_MOT_XNEG_BIT 02001 */ 02002 bool MPU6050::getXNegMotionDetected() { 02003 I2Cdev::readBit(devAddr, MPU6050_RA_MOT_DETECT_STATUS, MPU6050_MOTION_MOT_XNEG_BIT, buffer); 02004 return buffer[0]; 02005 } 02006 /** Get X-axis positive motion detection interrupt status. 02007 * @return Motion detection status 02008 * @see MPU6050_RA_MOT_DETECT_STATUS 02009 * @see MPU6050_MOTION_MOT_XPOS_BIT 02010 */ 02011 bool MPU6050::getXPosMotionDetected() { 02012 I2Cdev::readBit(devAddr, MPU6050_RA_MOT_DETECT_STATUS, MPU6050_MOTION_MOT_XPOS_BIT, buffer); 02013 return buffer[0]; 02014 } 02015 /** Get Y-axis negative motion detection interrupt status. 02016 * @return Motion detection status 02017 * @see MPU6050_RA_MOT_DETECT_STATUS 02018 * @see MPU6050_MOTION_MOT_YNEG_BIT 02019 */ 02020 bool MPU6050::getYNegMotionDetected() { 02021 I2Cdev::readBit(devAddr, MPU6050_RA_MOT_DETECT_STATUS, MPU6050_MOTION_MOT_YNEG_BIT, buffer); 02022 return buffer[0]; 02023 } 02024 /** Get Y-axis positive motion detection interrupt status. 02025 * @return Motion detection status 02026 * @see MPU6050_RA_MOT_DETECT_STATUS 02027 * @see MPU6050_MOTION_MOT_YPOS_BIT 02028 */ 02029 bool MPU6050::getYPosMotionDetected() { 02030 I2Cdev::readBit(devAddr, MPU6050_RA_MOT_DETECT_STATUS, MPU6050_MOTION_MOT_YPOS_BIT, buffer); 02031 return buffer[0]; 02032 } 02033 /** Get Z-axis negative motion detection interrupt status. 02034 * @return Motion detection status 02035 * @see MPU6050_RA_MOT_DETECT_STATUS 02036 * @see MPU6050_MOTION_MOT_ZNEG_BIT 02037 */ 02038 bool MPU6050::getZNegMotionDetected() { 02039 I2Cdev::readBit(devAddr, MPU6050_RA_MOT_DETECT_STATUS, MPU6050_MOTION_MOT_ZNEG_BIT, buffer); 02040 return buffer[0]; 02041 } 02042 /** Get Z-axis positive motion detection interrupt status. 02043 * @return Motion detection status 02044 * @see MPU6050_RA_MOT_DETECT_STATUS 02045 * @see MPU6050_MOTION_MOT_ZPOS_BIT 02046 */ 02047 bool MPU6050::getZPosMotionDetected() { 02048 I2Cdev::readBit(devAddr, MPU6050_RA_MOT_DETECT_STATUS, MPU6050_MOTION_MOT_ZPOS_BIT, buffer); 02049 return buffer[0]; 02050 } 02051 /** Get zero motion detection interrupt status. 02052 * @return Motion detection status 02053 * @see MPU6050_RA_MOT_DETECT_STATUS 02054 * @see MPU6050_MOTION_MOT_ZRMOT_BIT 02055 */ 02056 bool MPU6050::getZeroMotionDetected() { 02057 I2Cdev::readBit(devAddr, MPU6050_RA_MOT_DETECT_STATUS, MPU6050_MOTION_MOT_ZRMOT_BIT, buffer); 02058 return buffer[0]; 02059 } 02060 02061 // I2C_SLV*_DO register 02062 02063 /** Write byte to Data Output container for specified slave. 02064 * This register holds the output data written into Slave when Slave is set to 02065 * write mode. For further information regarding Slave control, please 02066 * refer to Registers 37 to 39 and immediately following. 02067 * @param num Slave number (0-3) 02068 * @param data Byte to write 02069 * @see MPU6050_RA_I2C_SLV0_DO 02070 */ 02071 void MPU6050::setSlaveOutputByte(uint8_t num, uint8_t data) { 02072 if (num > 3) return; 02073 I2Cdev::writeByte(devAddr, MPU6050_RA_I2C_SLV0_DO + num, data); 02074 } 02075 02076 // I2C_MST_DELAY_CTRL register 02077 02078 /** Get external data shadow delay enabled status. 02079 * This register is used to specify the timing of external sensor data 02080 * shadowing. When DELAY_ES_SHADOW is set to 1, shadowing of external 02081 * sensor data is delayed until all data has been received. 02082 * @return Current external data shadow delay enabled status. 02083 * @see MPU6050_RA_I2C_MST_DELAY_CTRL 02084 * @see MPU6050_DELAYCTRL_DELAY_ES_SHADOW_BIT 02085 */ 02086 bool MPU6050::getExternalShadowDelayEnabled() { 02087 I2Cdev::readBit(devAddr, MPU6050_RA_I2C_MST_DELAY_CTRL, MPU6050_DELAYCTRL_DELAY_ES_SHADOW_BIT, buffer); 02088 return buffer[0]; 02089 } 02090 /** Set external data shadow delay enabled status. 02091 * @param enabled New external data shadow delay enabled status. 02092 * @see getExternalShadowDelayEnabled() 02093 * @see MPU6050_RA_I2C_MST_DELAY_CTRL 02094 * @see MPU6050_DELAYCTRL_DELAY_ES_SHADOW_BIT 02095 */ 02096 void MPU6050::setExternalShadowDelayEnabled(bool enabled) { 02097 I2Cdev::writeBit(devAddr, MPU6050_RA_I2C_MST_DELAY_CTRL, MPU6050_DELAYCTRL_DELAY_ES_SHADOW_BIT, enabled); 02098 } 02099 /** Get slave delay enabled status. 02100 * When a particular slave delay is enabled, the rate of access for the that 02101 * slave device is reduced. When a slave's access rate is decreased relative to 02102 * the Sample Rate, the slave is accessed every: 02103 * 02104 * 1 / (1 + I2C_MST_DLY) Samples 02105 * 02106 * This base Sample Rate in turn is determined by SMPLRT_DIV (register * 25) 02107 * and DLPF_CFG (register 26). 02108 * 02109 * For further information regarding I2C_MST_DLY, please refer to register 52. 02110 * For further information regarding the Sample Rate, please refer to register 25. 02111 * 02112 * @param num Slave number (0-4) 02113 * @return Current slave delay enabled status. 02114 * @see MPU6050_RA_I2C_MST_DELAY_CTRL 02115 * @see MPU6050_DELAYCTRL_I2C_SLV0_DLY_EN_BIT 02116 */ 02117 bool MPU6050::getSlaveDelayEnabled(uint8_t num) { 02118 // MPU6050_DELAYCTRL_I2C_SLV4_DLY_EN_BIT is 4, SLV3 is 3, etc. 02119 if (num > 4) return 0; 02120 I2Cdev::readBit(devAddr, MPU6050_RA_I2C_MST_DELAY_CTRL, num, buffer); 02121 return buffer[0]; 02122 } 02123 /** Set slave delay enabled status. 02124 * @param num Slave number (0-4) 02125 * @param enabled New slave delay enabled status. 02126 * @see MPU6050_RA_I2C_MST_DELAY_CTRL 02127 * @see MPU6050_DELAYCTRL_I2C_SLV0_DLY_EN_BIT 02128 */ 02129 void MPU6050::setSlaveDelayEnabled(uint8_t num, bool enabled) { 02130 I2Cdev::writeBit(devAddr, MPU6050_RA_I2C_MST_DELAY_CTRL, num, enabled); 02131 } 02132 02133 // SIGNAL_PATH_RESET register 02134 02135 /** Reset gyroscope signal path. 02136 * The reset will revert the signal path analog to digital converters and 02137 * filters to their power up configurations. 02138 * @see MPU6050_RA_SIGNAL_PATH_RESET 02139 * @see MPU6050_PATHRESET_GYRO_RESET_BIT 02140 */ 02141 void MPU6050::resetGyroscopePath() { 02142 I2Cdev::writeBit(devAddr, MPU6050_RA_SIGNAL_PATH_RESET, MPU6050_PATHRESET_GYRO_RESET_BIT, true); 02143 } 02144 /** Reset accelerometer signal path. 02145 * The reset will revert the signal path analog to digital converters and 02146 * filters to their power up configurations. 02147 * @see MPU6050_RA_SIGNAL_PATH_RESET 02148 * @see MPU6050_PATHRESET_ACCEL_RESET_BIT 02149 */ 02150 void MPU6050::resetAccelerometerPath() { 02151 I2Cdev::writeBit(devAddr, MPU6050_RA_SIGNAL_PATH_RESET, MPU6050_PATHRESET_ACCEL_RESET_BIT, true); 02152 } 02153 /** Reset temperature sensor signal path. 02154 * The reset will revert the signal path analog to digital converters and 02155 * filters to their power up configurations. 02156 * @see MPU6050_RA_SIGNAL_PATH_RESET 02157 * @see MPU6050_PATHRESET_TEMP_RESET_BIT 02158 */ 02159 void MPU6050::resetTemperaturePath() { 02160 I2Cdev::writeBit(devAddr, MPU6050_RA_SIGNAL_PATH_RESET, MPU6050_PATHRESET_TEMP_RESET_BIT, true); 02161 } 02162 02163 // MOT_DETECT_CTRL register 02164 02165 /** Get accelerometer power-on delay. 02166 * The accelerometer data path provides samples to the sensor registers, Motion 02167 * detection, Zero Motion detection, and Free Fall detection modules. The 02168 * signal path contains filters which must be flushed on wake-up with new 02169 * samples before the detection modules begin operations. The default wake-up 02170 * delay, of 4ms can be lengthened by up to 3ms. This additional delay is 02171 * specified in ACCEL_ON_DELAY in units of 1 LSB = 1 ms. The user may select 02172 * any value above zero unless instructed otherwise by InvenSense. Please refer 02173 * to Section 8 of the MPU-6000/MPU-6050 Product Specification document for 02174 * further information regarding the detection modules. 02175 * @return Current accelerometer power-on delay 02176 * @see MPU6050_RA_MOT_DETECT_CTRL 02177 * @see MPU6050_DETECT_ACCEL_ON_DELAY_BIT 02178 */ 02179 uint8_t MPU6050::getAccelerometerPowerOnDelay() { 02180 I2Cdev::readBits(devAddr, MPU6050_RA_MOT_DETECT_CTRL, MPU6050_DETECT_ACCEL_ON_DELAY_BIT, MPU6050_DETECT_ACCEL_ON_DELAY_LENGTH, buffer); 02181 return buffer[0]; 02182 } 02183 /** Set accelerometer power-on delay. 02184 * @param delay New accelerometer power-on delay (0-3) 02185 * @see getAccelerometerPowerOnDelay() 02186 * @see MPU6050_RA_MOT_DETECT_CTRL 02187 * @see MPU6050_DETECT_ACCEL_ON_DELAY_BIT 02188 */ 02189 void MPU6050::setAccelerometerPowerOnDelay(uint8_t delay) { 02190 I2Cdev::writeBits(devAddr, MPU6050_RA_MOT_DETECT_CTRL, MPU6050_DETECT_ACCEL_ON_DELAY_BIT, MPU6050_DETECT_ACCEL_ON_DELAY_LENGTH, delay); 02191 } 02192 /** Get Free Fall detection counter decrement configuration. 02193 * Detection is registered by the Free Fall detection module after accelerometer 02194 * measurements meet their respective threshold conditions over a specified 02195 * number of samples. When the threshold conditions are met, the corresponding 02196 * detection counter increments by 1. The user may control the rate at which the 02197 * detection counter decrements when the threshold condition is not met by 02198 * configuring FF_COUNT. The decrement rate can be set according to the 02199 * following table: 02200 * 02201 * <pre> 02202 * FF_COUNT | Counter Decrement 02203 * ---------+------------------ 02204 * 0 | Reset 02205 * 1 | 1 02206 * 2 | 2 02207 * 3 | 4 02208 * </pre> 02209 * 02210 * When FF_COUNT is configured to 0 (reset), any non-qualifying sample will 02211 * reset the counter to 0. For further information on Free Fall detection, 02212 * please refer to Registers 29 to 32. 02213 * 02214 * @return Current decrement configuration 02215 * @see MPU6050_RA_MOT_DETECT_CTRL 02216 * @see MPU6050_DETECT_FF_COUNT_BIT 02217 */ 02218 uint8_t MPU6050::getFreefallDetectionCounterDecrement() { 02219 I2Cdev::readBits(devAddr, MPU6050_RA_MOT_DETECT_CTRL, MPU6050_DETECT_FF_COUNT_BIT, MPU6050_DETECT_FF_COUNT_LENGTH, buffer); 02220 return buffer[0]; 02221 } 02222 /** Set Free Fall detection counter decrement configuration. 02223 * @param decrement New decrement configuration value 02224 * @see getFreefallDetectionCounterDecrement() 02225 * @see MPU6050_RA_MOT_DETECT_CTRL 02226 * @see MPU6050_DETECT_FF_COUNT_BIT 02227 */ 02228 void MPU6050::setFreefallDetectionCounterDecrement(uint8_t decrement) { 02229 I2Cdev::writeBits(devAddr, MPU6050_RA_MOT_DETECT_CTRL, MPU6050_DETECT_FF_COUNT_BIT, MPU6050_DETECT_FF_COUNT_LENGTH, decrement); 02230 } 02231 /** Get Motion detection counter decrement configuration. 02232 * Detection is registered by the Motion detection module after accelerometer 02233 * measurements meet their respective threshold conditions over a specified 02234 * number of samples. When the threshold conditions are met, the corresponding 02235 * detection counter increments by 1. The user may control the rate at which the 02236 * detection counter decrements when the threshold condition is not met by 02237 * configuring MOT_COUNT. The decrement rate can be set according to the 02238 * following table: 02239 * 02240 * <pre> 02241 * MOT_COUNT | Counter Decrement 02242 * ----------+------------------ 02243 * 0 | Reset 02244 * 1 | 1 02245 * 2 | 2 02246 * 3 | 4 02247 * </pre> 02248 * 02249 * When MOT_COUNT is configured to 0 (reset), any non-qualifying sample will 02250 * reset the counter to 0. For further information on Motion detection, 02251 * please refer to Registers 29 to 32. 02252 * 02253 */ 02254 uint8_t MPU6050::getMotionDetectionCounterDecrement() { 02255 I2Cdev::readBits(devAddr, MPU6050_RA_MOT_DETECT_CTRL, MPU6050_DETECT_MOT_COUNT_BIT, MPU6050_DETECT_MOT_COUNT_LENGTH, buffer); 02256 return buffer[0]; 02257 } 02258 /** Set Motion detection counter decrement configuration. 02259 * @param decrement New decrement configuration value 02260 * @see getMotionDetectionCounterDecrement() 02261 * @see MPU6050_RA_MOT_DETECT_CTRL 02262 * @see MPU6050_DETECT_MOT_COUNT_BIT 02263 */ 02264 void MPU6050::setMotionDetectionCounterDecrement(uint8_t decrement) { 02265 I2Cdev::writeBits(devAddr, MPU6050_RA_MOT_DETECT_CTRL, MPU6050_DETECT_MOT_COUNT_BIT, MPU6050_DETECT_MOT_COUNT_LENGTH, decrement); 02266 } 02267 02268 // USER_CTRL register 02269 02270 /** Get FIFO enabled status. 02271 * When this bit is set to 0, the FIFO buffer is disabled. The FIFO buffer 02272 * cannot be written to or read from while disabled. The FIFO buffer's state 02273 * does not change unless the MPU-60X0 is power cycled. 02274 * @return Current FIFO enabled status 02275 * @see MPU6050_RA_USER_CTRL 02276 * @see MPU6050_USERCTRL_FIFO_EN_BIT 02277 */ 02278 bool MPU6050::getFIFOEnabled() { 02279 I2Cdev::readBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_FIFO_EN_BIT, buffer); 02280 return buffer[0]; 02281 } 02282 /** Set FIFO enabled status. 02283 * @param enabled New FIFO enabled status 02284 * @see getFIFOEnabled() 02285 * @see MPU6050_RA_USER_CTRL 02286 * @see MPU6050_USERCTRL_FIFO_EN_BIT 02287 */ 02288 void MPU6050::setFIFOEnabled(bool enabled) { 02289 I2Cdev::writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_FIFO_EN_BIT, enabled); 02290 } 02291 /** Get I2C Master Mode enabled status. 02292 * When this mode is enabled, the MPU-60X0 acts as the I2C Master to the 02293 * external sensor slave devices on the auxiliary I2C bus. When this bit is 02294 * cleared to 0, the auxiliary I2C bus lines (AUX_DA and AUX_CL) are logically 02295 * driven by the primary I2C bus (SDA and SCL). This is a precondition to 02296 * enabling Bypass Mode. For further information regarding Bypass Mode, please 02297 * refer to Register 55. 02298 * @return Current I2C Master Mode enabled status 02299 * @see MPU6050_RA_USER_CTRL 02300 * @see MPU6050_USERCTRL_I2C_MST_EN_BIT 02301 */ 02302 bool MPU6050::getI2CMasterModeEnabled() { 02303 I2Cdev::readBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_I2C_MST_EN_BIT, buffer); 02304 return buffer[0]; 02305 } 02306 /** Set I2C Master Mode enabled status. 02307 * @param enabled New I2C Master Mode enabled status 02308 * @see getI2CMasterModeEnabled() 02309 * @see MPU6050_RA_USER_CTRL 02310 * @see MPU6050_USERCTRL_I2C_MST_EN_BIT 02311 */ 02312 void MPU6050::setI2CMasterModeEnabled(bool enabled) { 02313 I2Cdev::writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_I2C_MST_EN_BIT, enabled); 02314 } 02315 /** Switch from I2C to SPI mode (MPU-6000 only) 02316 * If this is set, the primary SPI interface will be enabled in place of the 02317 * disabled primary I2C interface. 02318 */ 02319 void MPU6050::switchSPIEnabled(bool enabled) { 02320 I2Cdev::writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_I2C_IF_DIS_BIT, enabled); 02321 } 02322 /** Reset the FIFO. 02323 * This bit resets the FIFO buffer when set to 1 while FIFO_EN equals 0. This 02324 * bit automatically clears to 0 after the reset has been triggered. 02325 * @see MPU6050_RA_USER_CTRL 02326 * @see MPU6050_USERCTRL_FIFO_RESET_BIT 02327 */ 02328 void MPU6050::resetFIFO() { 02329 I2Cdev::writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_FIFO_RESET_BIT, true); 02330 } 02331 /** Reset the I2C Master. 02332 * This bit resets the I2C Master when set to 1 while I2C_MST_EN equals 0. 02333 * This bit automatically clears to 0 after the reset has been triggered. 02334 * @see MPU6050_RA_USER_CTRL 02335 * @see MPU6050_USERCTRL_I2C_MST_RESET_BIT 02336 */ 02337 void MPU6050::resetI2CMaster() { 02338 I2Cdev::writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_I2C_MST_RESET_BIT, true); 02339 } 02340 /** Reset all sensor registers and signal paths. 02341 * When set to 1, this bit resets the signal paths for all sensors (gyroscopes, 02342 * accelerometers, and temperature sensor). This operation will also clear the 02343 * sensor registers. This bit automatically clears to 0 after the reset has been 02344 * triggered. 02345 * 02346 * When resetting only the signal path (and not the sensor registers), please 02347 * use Register 104, SIGNAL_PATH_RESET. 02348 * 02349 * @see MPU6050_RA_USER_CTRL 02350 * @see MPU6050_USERCTRL_SIG_COND_RESET_BIT 02351 */ 02352 void MPU6050::resetSensors() { 02353 I2Cdev::writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_SIG_COND_RESET_BIT, true); 02354 } 02355 02356 // PWR_MGMT_1 register 02357 02358 /** Trigger a full device reset. 02359 * A small delay of ~50ms may be desirable after triggering a reset. 02360 * @see MPU6050_RA_PWR_MGMT_1 02361 * @see MPU6050_PWR1_DEVICE_RESET_BIT 02362 */ 02363 void MPU6050::reset() { 02364 I2Cdev::writeBit(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_DEVICE_RESET_BIT, true); 02365 } 02366 /** Get sleep mode status. 02367 * Setting the SLEEP bit in the register puts the device into very low power 02368 * sleep mode. In this mode, only the serial interface and internal registers 02369 * remain active, allowing for a very low standby current. Clearing this bit 02370 * puts the device back into normal mode. To save power, the individual standby 02371 * selections for each of the gyros should be used if any gyro axis is not used 02372 * by the application. 02373 * @return Current sleep mode enabled status 02374 * @see MPU6050_RA_PWR_MGMT_1 02375 * @see MPU6050_PWR1_SLEEP_BIT 02376 */ 02377 bool MPU6050::getSleepEnabled() { 02378 I2Cdev::readBit(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_SLEEP_BIT, buffer); 02379 return buffer[0]; 02380 } 02381 /** Set sleep mode status. 02382 * @param enabled New sleep mode enabled status 02383 * @see getSleepEnabled() 02384 * @see MPU6050_RA_PWR_MGMT_1 02385 * @see MPU6050_PWR1_SLEEP_BIT 02386 */ 02387 void MPU6050::setSleepEnabled(bool enabled) { 02388 I2Cdev::writeBit(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_SLEEP_BIT, enabled); 02389 } 02390 /** Get wake cycle enabled status. 02391 * When this bit is set to 1 and SLEEP is disabled, the MPU-60X0 will cycle 02392 * between sleep mode and waking up to take a single sample of data from active 02393 * sensors at a rate determined by LP_WAKE_CTRL (register 108). 02394 * @return Current sleep mode enabled status 02395 * @see MPU6050_RA_PWR_MGMT_1 02396 * @see MPU6050_PWR1_CYCLE_BIT 02397 */ 02398 bool MPU6050::getWakeCycleEnabled() { 02399 I2Cdev::readBit(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_CYCLE_BIT, buffer); 02400 return buffer[0]; 02401 } 02402 /** Set wake cycle enabled status. 02403 * @param enabled New sleep mode enabled status 02404 * @see getWakeCycleEnabled() 02405 * @see MPU6050_RA_PWR_MGMT_1 02406 * @see MPU6050_PWR1_CYCLE_BIT 02407 */ 02408 void MPU6050::setWakeCycleEnabled(bool enabled) { 02409 I2Cdev::writeBit(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_CYCLE_BIT, enabled); 02410 } 02411 /** Get temperature sensor enabled status. 02412 * Control the usage of the internal temperature sensor. 02413 * 02414 * Note: this register stores the *disabled* value, but for consistency with the 02415 * rest of the code, the function is named and used with standard true/false 02416 * values to indicate whether the sensor is enabled or disabled, respectively. 02417 * 02418 * @return Current temperature sensor enabled status 02419 * @see MPU6050_RA_PWR_MGMT_1 02420 * @see MPU6050_PWR1_TEMP_DIS_BIT 02421 */ 02422 bool MPU6050::getTempSensorEnabled() { 02423 I2Cdev::readBit(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_TEMP_DIS_BIT, buffer); 02424 return buffer[0] == 0; // 1 is actually disabled here 02425 } 02426 /** Set temperature sensor enabled status. 02427 * Note: this register stores the *disabled* value, but for consistency with the 02428 * rest of the code, the function is named and used with standard true/false 02429 * values to indicate whether the sensor is enabled or disabled, respectively. 02430 * 02431 * @param enabled New temperature sensor enabled status 02432 * @see getTempSensorEnabled() 02433 * @see MPU6050_RA_PWR_MGMT_1 02434 * @see MPU6050_PWR1_TEMP_DIS_BIT 02435 */ 02436 void MPU6050::setTempSensorEnabled(bool enabled) { 02437 // 1 is actually disabled here 02438 I2Cdev::writeBit(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_TEMP_DIS_BIT, !enabled); 02439 } 02440 /** Get clock source setting. 02441 * @return Current clock source setting 02442 * @see MPU6050_RA_PWR_MGMT_1 02443 * @see MPU6050_PWR1_CLKSEL_BIT 02444 * @see MPU6050_PWR1_CLKSEL_LENGTH 02445 */ 02446 uint8_t MPU6050::getClockSource() { 02447 I2Cdev::readBits(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_CLKSEL_BIT, MPU6050_PWR1_CLKSEL_LENGTH, buffer); 02448 return buffer[0]; 02449 } 02450 /** Set clock source setting. 02451 * An internal 8MHz oscillator, gyroscope based clock, or external sources can 02452 * be selected as the MPU-60X0 clock source. When the internal 8 MHz oscillator 02453 * or an external source is chosen as the clock source, the MPU-60X0 can operate 02454 * in low power modes with the gyroscopes disabled. 02455 * 02456 * Upon power up, the MPU-60X0 clock source defaults to the internal oscillator. 02457 * However, it is highly recommended that the device be configured to use one of 02458 * the gyroscopes (or an external clock source) as the clock reference for 02459 * improved stability. The clock source can be selected according to the following table: 02460 * 02461 * <pre> 02462 * CLK_SEL | Clock Source 02463 * --------+-------------------------------------- 02464 * 0 | Internal oscillator 02465 * 1 | PLL with X Gyro reference 02466 * 2 | PLL with Y Gyro reference 02467 * 3 | PLL with Z Gyro reference 02468 * 4 | PLL with external 32.768kHz reference 02469 * 5 | PLL with external 19.2MHz reference 02470 * 6 | Reserved 02471 * 7 | Stops the clock and keeps the timing generator in reset 02472 * </pre> 02473 * 02474 * @param source New clock source setting 02475 * @see getClockSource() 02476 * @see MPU6050_RA_PWR_MGMT_1 02477 * @see MPU6050_PWR1_CLKSEL_BIT 02478 * @see MPU6050_PWR1_CLKSEL_LENGTH 02479 */ 02480 void MPU6050::setClockSource(uint8_t source) { 02481 I2Cdev::writeBits(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_CLKSEL_BIT, MPU6050_PWR1_CLKSEL_LENGTH, source); 02482 } 02483 02484 // PWR_MGMT_2 register 02485 02486 /** Get wake frequency in Accel-Only Low Power Mode. 02487 * The MPU-60X0 can be put into Accerlerometer Only Low Power Mode by setting 02488 * PWRSEL to 1 in the Power Management 1 register (Register 107). In this mode, 02489 * the device will power off all devices except for the primary I2C interface, 02490 * waking only the accelerometer at fixed intervals to take a single 02491 * measurement. The frequency of wake-ups can be configured with LP_WAKE_CTRL 02492 * as shown below: 02493 * 02494 * <pre> 02495 * LP_WAKE_CTRL | Wake-up Frequency 02496 * -------------+------------------ 02497 * 0 | 1.25 Hz 02498 * 1 | 2.5 Hz 02499 * 2 | 5 Hz 02500 * 3 | 10 Hz 02501 * <pre> 02502 * 02503 * For further information regarding the MPU-60X0's power modes, please refer to 02504 * Register 107. 02505 * 02506 * @return Current wake frequency 02507 * @see MPU6050_RA_PWR_MGMT_2 02508 */ 02509 uint8_t MPU6050::getWakeFrequency() { 02510 I2Cdev::readBits(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_LP_WAKE_CTRL_BIT, MPU6050_PWR2_LP_WAKE_CTRL_LENGTH, buffer); 02511 return buffer[0]; 02512 } 02513 /** Set wake frequency in Accel-Only Low Power Mode. 02514 * @param frequency New wake frequency 02515 * @see MPU6050_RA_PWR_MGMT_2 02516 */ 02517 void MPU6050::setWakeFrequency(uint8_t frequency) { 02518 I2Cdev::writeBits(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_LP_WAKE_CTRL_BIT, MPU6050_PWR2_LP_WAKE_CTRL_LENGTH, frequency); 02519 } 02520 02521 /** Get X-axis accelerometer standby enabled status. 02522 * If enabled, the X-axis will not gather or report data (or use power). 02523 * @return Current X-axis standby enabled status 02524 * @see MPU6050_RA_PWR_MGMT_2 02525 * @see MPU6050_PWR2_STBY_XA_BIT 02526 */ 02527 bool MPU6050::getStandbyXAccelEnabled() { 02528 I2Cdev::readBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_XA_BIT, buffer); 02529 return buffer[0]; 02530 } 02531 /** Set X-axis accelerometer standby enabled status. 02532 * @param New X-axis standby enabled status 02533 * @see getStandbyXAccelEnabled() 02534 * @see MPU6050_RA_PWR_MGMT_2 02535 * @see MPU6050_PWR2_STBY_XA_BIT 02536 */ 02537 void MPU6050::setStandbyXAccelEnabled(bool enabled) { 02538 I2Cdev::writeBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_XA_BIT, enabled); 02539 } 02540 /** Get Y-axis accelerometer standby enabled status. 02541 * If enabled, the Y-axis will not gather or report data (or use power). 02542 * @return Current Y-axis standby enabled status 02543 * @see MPU6050_RA_PWR_MGMT_2 02544 * @see MPU6050_PWR2_STBY_YA_BIT 02545 */ 02546 bool MPU6050::getStandbyYAccelEnabled() { 02547 I2Cdev::readBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_YA_BIT, buffer); 02548 return buffer[0]; 02549 } 02550 /** Set Y-axis accelerometer standby enabled status. 02551 * @param New Y-axis standby enabled status 02552 * @see getStandbyYAccelEnabled() 02553 * @see MPU6050_RA_PWR_MGMT_2 02554 * @see MPU6050_PWR2_STBY_YA_BIT 02555 */ 02556 void MPU6050::setStandbyYAccelEnabled(bool enabled) { 02557 I2Cdev::writeBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_YA_BIT, enabled); 02558 } 02559 /** Get Z-axis accelerometer standby enabled status. 02560 * If enabled, the Z-axis will not gather or report data (or use power). 02561 * @return Current Z-axis standby enabled status 02562 * @see MPU6050_RA_PWR_MGMT_2 02563 * @see MPU6050_PWR2_STBY_ZA_BIT 02564 */ 02565 bool MPU6050::getStandbyZAccelEnabled() { 02566 I2Cdev::readBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_ZA_BIT, buffer); 02567 return buffer[0]; 02568 } 02569 /** Set Z-axis accelerometer standby enabled status. 02570 * @param New Z-axis standby enabled status 02571 * @see getStandbyZAccelEnabled() 02572 * @see MPU6050_RA_PWR_MGMT_2 02573 * @see MPU6050_PWR2_STBY_ZA_BIT 02574 */ 02575 void MPU6050::setStandbyZAccelEnabled(bool enabled) { 02576 I2Cdev::writeBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_ZA_BIT, enabled); 02577 } 02578 /** Get X-axis gyroscope standby enabled status. 02579 * If enabled, the X-axis will not gather or report data (or use power). 02580 * @return Current X-axis standby enabled status 02581 * @see MPU6050_RA_PWR_MGMT_2 02582 * @see MPU6050_PWR2_STBY_XG_BIT 02583 */ 02584 bool MPU6050::getStandbyXGyroEnabled() { 02585 I2Cdev::readBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_XG_BIT, buffer); 02586 return buffer[0]; 02587 } 02588 /** Set X-axis gyroscope standby enabled status. 02589 * @param New X-axis standby enabled status 02590 * @see getStandbyXGyroEnabled() 02591 * @see MPU6050_RA_PWR_MGMT_2 02592 * @see MPU6050_PWR2_STBY_XG_BIT 02593 */ 02594 void MPU6050::setStandbyXGyroEnabled(bool enabled) { 02595 I2Cdev::writeBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_XG_BIT, enabled); 02596 } 02597 /** Get Y-axis gyroscope standby enabled status. 02598 * If enabled, the Y-axis will not gather or report data (or use power). 02599 * @return Current Y-axis standby enabled status 02600 * @see MPU6050_RA_PWR_MGMT_2 02601 * @see MPU6050_PWR2_STBY_YG_BIT 02602 */ 02603 bool MPU6050::getStandbyYGyroEnabled() { 02604 I2Cdev::readBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_YG_BIT, buffer); 02605 return buffer[0]; 02606 } 02607 /** Set Y-axis gyroscope standby enabled status. 02608 * @param New Y-axis standby enabled status 02609 * @see getStandbyYGyroEnabled() 02610 * @see MPU6050_RA_PWR_MGMT_2 02611 * @see MPU6050_PWR2_STBY_YG_BIT 02612 */ 02613 void MPU6050::setStandbyYGyroEnabled(bool enabled) { 02614 I2Cdev::writeBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_YG_BIT, enabled); 02615 } 02616 /** Get Z-axis gyroscope standby enabled status. 02617 * If enabled, the Z-axis will not gather or report data (or use power). 02618 * @return Current Z-axis standby enabled status 02619 * @see MPU6050_RA_PWR_MGMT_2 02620 * @see MPU6050_PWR2_STBY_ZG_BIT 02621 */ 02622 bool MPU6050::getStandbyZGyroEnabled() { 02623 I2Cdev::readBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_ZG_BIT, buffer); 02624 return buffer[0]; 02625 } 02626 /** Set Z-axis gyroscope standby enabled status. 02627 * @param New Z-axis standby enabled status 02628 * @see getStandbyZGyroEnabled() 02629 * @see MPU6050_RA_PWR_MGMT_2 02630 * @see MPU6050_PWR2_STBY_ZG_BIT 02631 */ 02632 void MPU6050::setStandbyZGyroEnabled(bool enabled) { 02633 I2Cdev::writeBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_ZG_BIT, enabled); 02634 } 02635 02636 // FIFO_COUNT* registers 02637 02638 /** Get current FIFO buffer size. 02639 * This value indicates the number of bytes stored in the FIFO buffer. This 02640 * number is in turn the number of bytes that can be read from the FIFO buffer 02641 * and it is directly proportional to the number of samples available given the 02642 * set of sensor data bound to be stored in the FIFO (register 35 and 36). 02643 * @return Current FIFO buffer size 02644 */ 02645 uint16_t MPU6050::getFIFOCount() { 02646 I2Cdev::readBytes(devAddr, MPU6050_RA_FIFO_COUNTH, 2, buffer); 02647 return (((uint16_t)buffer[0]) << 8) | buffer[1]; 02648 } 02649 02650 // FIFO_R_W register 02651 02652 /** Get byte from FIFO buffer. 02653 * This register is used to read and write data from the FIFO buffer. Data is 02654 * written to the FIFO in order of register number (from lowest to highest). If 02655 * all the FIFO enable flags (see below) are enabled and all External Sensor 02656 * Data registers (Registers 73 to 96) are associated with a Slave device, the 02657 * contents of registers 59 through 96 will be written in order at the Sample 02658 * Rate. 02659 * 02660 * The contents of the sensor data registers (Registers 59 to 96) are written 02661 * into the FIFO buffer when their corresponding FIFO enable flags are set to 1 02662 * in FIFO_EN (Register 35). An additional flag for the sensor data registers 02663 * associated with I2C Slave 3 can be found in I2C_MST_CTRL (Register 36). 02664 * 02665 * If the FIFO buffer has overflowed, the status bit FIFO_OFLOW_INT is 02666 * automatically set to 1. This bit is located in INT_STATUS (Register 58). 02667 * When the FIFO buffer has overflowed, the oldest data will be lost and new 02668 * data will be written to the FIFO. 02669 * 02670 * If the FIFO buffer is empty, reading this register will return the last byte 02671 * that was previously read from the FIFO until new data is available. The user 02672 * should check FIFO_COUNT to ensure that the FIFO buffer is not read when 02673 * empty. 02674 * 02675 * @return Byte from FIFO buffer 02676 */ 02677 uint8_t MPU6050::getFIFOByte() { 02678 I2Cdev::readByte(devAddr, MPU6050_RA_FIFO_R_W, buffer); 02679 return buffer[0]; 02680 } 02681 void MPU6050::getFIFOBytes(uint8_t *data, uint8_t length) { 02682 I2Cdev::readBytes(devAddr, MPU6050_RA_FIFO_R_W, length, data); 02683 } 02684 /** Write byte to FIFO buffer. 02685 * @see getFIFOByte() 02686 * @see MPU6050_RA_FIFO_R_W 02687 */ 02688 void MPU6050::setFIFOByte(uint8_t data) { 02689 I2Cdev::writeByte(devAddr, MPU6050_RA_FIFO_R_W, data); 02690 } 02691 02692 // WHO_AM_I register 02693 02694 /** Get Device ID. 02695 * This register is used to verify the identity of the device (0b110100, 0x34). 02696 * @return Device ID (6 bits only! should be 0x34) 02697 * @see MPU6050_RA_WHO_AM_I 02698 * @see MPU6050_WHO_AM_I_BIT 02699 * @see MPU6050_WHO_AM_I_LENGTH 02700 */ 02701 uint8_t MPU6050::getDeviceID() { 02702 I2Cdev::readBits(devAddr, MPU6050_RA_WHO_AM_I, MPU6050_WHO_AM_I_BIT, MPU6050_WHO_AM_I_LENGTH, buffer); 02703 return buffer[0]; 02704 } 02705 /** Set Device ID. 02706 * Write a new ID into the WHO_AM_I register (no idea why this should ever be 02707 * necessary though). 02708 * @param id New device ID to set. 02709 * @see getDeviceID() 02710 * @see MPU6050_RA_WHO_AM_I 02711 * @see MPU6050_WHO_AM_I_BIT 02712 * @see MPU6050_WHO_AM_I_LENGTH 02713 */ 02714 void MPU6050::setDeviceID(uint8_t id) { 02715 I2Cdev::writeBits(devAddr, MPU6050_RA_WHO_AM_I, MPU6050_WHO_AM_I_BIT, MPU6050_WHO_AM_I_LENGTH, id); 02716 } 02717 02718 // ======== UNDOCUMENTED/DMP REGISTERS/METHODS ======== 02719 02720 // XG_OFFS_TC register 02721 02722 uint8_t MPU6050::getOTPBankValid() { 02723 I2Cdev::readBit(devAddr, MPU6050_RA_XG_OFFS_TC, MPU6050_TC_OTP_BNK_VLD_BIT, buffer); 02724 return buffer[0]; 02725 } 02726 void MPU6050::setOTPBankValid(bool enabled) { 02727 I2Cdev::writeBit(devAddr, MPU6050_RA_XG_OFFS_TC, MPU6050_TC_OTP_BNK_VLD_BIT, enabled); 02728 } 02729 int8_t MPU6050::getXGyroOffsetTC() { 02730 I2Cdev::readBits(devAddr, MPU6050_RA_XG_OFFS_TC, MPU6050_TC_OFFSET_BIT, MPU6050_TC_OFFSET_LENGTH, buffer); 02731 return buffer[0]; 02732 } 02733 void MPU6050::setXGyroOffsetTC(int8_t offset) { 02734 I2Cdev::writeBits(devAddr, MPU6050_RA_XG_OFFS_TC, MPU6050_TC_OFFSET_BIT, MPU6050_TC_OFFSET_LENGTH, offset); 02735 } 02736 02737 // YG_OFFS_TC register 02738 02739 int8_t MPU6050::getYGyroOffsetTC() { 02740 I2Cdev::readBits(devAddr, MPU6050_RA_YG_OFFS_TC, MPU6050_TC_OFFSET_BIT, MPU6050_TC_OFFSET_LENGTH, buffer); 02741 return buffer[0]; 02742 } 02743 void MPU6050::setYGyroOffsetTC(int8_t offset) { 02744 I2Cdev::writeBits(devAddr, MPU6050_RA_YG_OFFS_TC, MPU6050_TC_OFFSET_BIT, MPU6050_TC_OFFSET_LENGTH, offset); 02745 } 02746 02747 // ZG_OFFS_TC register 02748 02749 int8_t MPU6050::getZGyroOffsetTC() { 02750 I2Cdev::readBits(devAddr, MPU6050_RA_ZG_OFFS_TC, MPU6050_TC_OFFSET_BIT, MPU6050_TC_OFFSET_LENGTH, buffer); 02751 return buffer[0]; 02752 } 02753 void MPU6050::setZGyroOffsetTC(int8_t offset) { 02754 I2Cdev::writeBits(devAddr, MPU6050_RA_ZG_OFFS_TC, MPU6050_TC_OFFSET_BIT, MPU6050_TC_OFFSET_LENGTH, offset); 02755 } 02756 02757 // X_FINE_GAIN register 02758 02759 int8_t MPU6050::getXFineGain() { 02760 I2Cdev::readByte(devAddr, MPU6050_RA_X_FINE_GAIN, buffer); 02761 return buffer[0]; 02762 } 02763 void MPU6050::setXFineGain(int8_t gain) { 02764 I2Cdev::writeByte(devAddr, MPU6050_RA_X_FINE_GAIN, gain); 02765 } 02766 02767 // Y_FINE_GAIN register 02768 02769 int8_t MPU6050::getYFineGain() { 02770 I2Cdev::readByte(devAddr, MPU6050_RA_Y_FINE_GAIN, buffer); 02771 return buffer[0]; 02772 } 02773 void MPU6050::setYFineGain(int8_t gain) { 02774 I2Cdev::writeByte(devAddr, MPU6050_RA_Y_FINE_GAIN, gain); 02775 } 02776 02777 // Z_FINE_GAIN register 02778 02779 int8_t MPU6050::getZFineGain() { 02780 I2Cdev::readByte(devAddr, MPU6050_RA_Z_FINE_GAIN, buffer); 02781 return buffer[0]; 02782 } 02783 void MPU6050::setZFineGain(int8_t gain) { 02784 I2Cdev::writeByte(devAddr, MPU6050_RA_Z_FINE_GAIN, gain); 02785 } 02786 02787 // XA_OFFS_* registers 02788 02789 int16_t MPU6050::getXAccelOffset() { 02790 I2Cdev::readBytes(devAddr, MPU6050_RA_XA_OFFS_H, 2, buffer); 02791 return (((int16_t)buffer[0]) << 8) | buffer[1]; 02792 } 02793 void MPU6050::setXAccelOffset(int16_t offset) { 02794 I2Cdev::writeWord(devAddr, MPU6050_RA_XA_OFFS_H, offset); 02795 } 02796 02797 // YA_OFFS_* register 02798 02799 int16_t MPU6050::getYAccelOffset() { 02800 I2Cdev::readBytes(devAddr, MPU6050_RA_YA_OFFS_H, 2, buffer); 02801 return (((int16_t)buffer[0]) << 8) | buffer[1]; 02802 } 02803 void MPU6050::setYAccelOffset(int16_t offset) { 02804 I2Cdev::writeWord(devAddr, MPU6050_RA_YA_OFFS_H, offset); 02805 } 02806 02807 // ZA_OFFS_* register 02808 02809 int16_t MPU6050::getZAccelOffset() { 02810 I2Cdev::readBytes(devAddr, MPU6050_RA_ZA_OFFS_H, 2, buffer); 02811 return (((int16_t)buffer[0]) << 8) | buffer[1]; 02812 } 02813 void MPU6050::setZAccelOffset(int16_t offset) { 02814 I2Cdev::writeWord(devAddr, MPU6050_RA_ZA_OFFS_H, offset); 02815 } 02816 02817 // XG_OFFS_USR* registers 02818 02819 int16_t MPU6050::getXGyroOffset() { 02820 I2Cdev::readBytes(devAddr, MPU6050_RA_XG_OFFS_USRH, 2, buffer); 02821 return (((int16_t)buffer[0]) << 8) | buffer[1]; 02822 } 02823 void MPU6050::setXGyroOffset(int16_t offset) { 02824 I2Cdev::writeWord(devAddr, MPU6050_RA_XG_OFFS_USRH, offset); 02825 } 02826 02827 // YG_OFFS_USR* register 02828 02829 int16_t MPU6050::getYGyroOffset() { 02830 I2Cdev::readBytes(devAddr, MPU6050_RA_YG_OFFS_USRH, 2, buffer); 02831 return (((int16_t)buffer[0]) << 8) | buffer[1]; 02832 } 02833 void MPU6050::setYGyroOffset(int16_t offset) { 02834 I2Cdev::writeWord(devAddr, MPU6050_RA_YG_OFFS_USRH, offset); 02835 } 02836 02837 // ZG_OFFS_USR* register 02838 02839 int16_t MPU6050::getZGyroOffset() { 02840 I2Cdev::readBytes(devAddr, MPU6050_RA_ZG_OFFS_USRH, 2, buffer); 02841 return (((int16_t)buffer[0]) << 8) | buffer[1]; 02842 } 02843 void MPU6050::setZGyroOffset(int16_t offset) { 02844 I2Cdev::writeWord(devAddr, MPU6050_RA_ZG_OFFS_USRH, offset); 02845 } 02846 02847 // INT_ENABLE register (DMP functions) 02848 02849 bool MPU6050::getIntPLLReadyEnabled() { 02850 I2Cdev::readBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_PLL_RDY_INT_BIT, buffer); 02851 return buffer[0]; 02852 } 02853 void MPU6050::setIntPLLReadyEnabled(bool enabled) { 02854 I2Cdev::writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_PLL_RDY_INT_BIT, enabled); 02855 } 02856 bool MPU6050::getIntDMPEnabled() { 02857 I2Cdev::readBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_DMP_INT_BIT, buffer); 02858 return buffer[0]; 02859 } 02860 void MPU6050::setIntDMPEnabled(bool enabled) { 02861 I2Cdev::writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_DMP_INT_BIT, enabled); 02862 } 02863 02864 // DMP_INT_STATUS 02865 02866 bool MPU6050::getDMPInt5Status() { 02867 I2Cdev::readBit(devAddr, MPU6050_RA_DMP_INT_STATUS, MPU6050_DMPINT_5_BIT, buffer); 02868 return buffer[0]; 02869 } 02870 bool MPU6050::getDMPInt4Status() { 02871 I2Cdev::readBit(devAddr, MPU6050_RA_DMP_INT_STATUS, MPU6050_DMPINT_4_BIT, buffer); 02872 return buffer[0]; 02873 } 02874 bool MPU6050::getDMPInt3Status() { 02875 I2Cdev::readBit(devAddr, MPU6050_RA_DMP_INT_STATUS, MPU6050_DMPINT_3_BIT, buffer); 02876 return buffer[0]; 02877 } 02878 bool MPU6050::getDMPInt2Status() { 02879 I2Cdev::readBit(devAddr, MPU6050_RA_DMP_INT_STATUS, MPU6050_DMPINT_2_BIT, buffer); 02880 return buffer[0]; 02881 } 02882 bool MPU6050::getDMPInt1Status() { 02883 I2Cdev::readBit(devAddr, MPU6050_RA_DMP_INT_STATUS, MPU6050_DMPINT_1_BIT, buffer); 02884 return buffer[0]; 02885 } 02886 bool MPU6050::getDMPInt0Status() { 02887 I2Cdev::readBit(devAddr, MPU6050_RA_DMP_INT_STATUS, MPU6050_DMPINT_0_BIT, buffer); 02888 return buffer[0]; 02889 } 02890 02891 // INT_STATUS register (DMP functions) 02892 02893 bool MPU6050::getIntPLLReadyStatus() { 02894 I2Cdev::readBit(devAddr, MPU6050_RA_INT_STATUS, MPU6050_INTERRUPT_PLL_RDY_INT_BIT, buffer); 02895 return buffer[0]; 02896 } 02897 bool MPU6050::getIntDMPStatus() { 02898 I2Cdev::readBit(devAddr, MPU6050_RA_INT_STATUS, MPU6050_INTERRUPT_DMP_INT_BIT, buffer); 02899 return buffer[0]; 02900 } 02901 02902 // USER_CTRL register (DMP functions) 02903 02904 bool MPU6050::getDMPEnabled() { 02905 I2Cdev::readBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_DMP_EN_BIT, buffer); 02906 return buffer[0]; 02907 } 02908 void MPU6050::setDMPEnabled(bool enabled) { 02909 I2Cdev::writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_DMP_EN_BIT, enabled); 02910 } 02911 void MPU6050::resetDMP() { 02912 I2Cdev::writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_DMP_RESET_BIT, true); 02913 } 02914 02915 // BANK_SEL register 02916 02917 void MPU6050::setMemoryBank(uint8_t bank, bool prefetchEnabled, bool userBank) { 02918 bank &= 0x1F; 02919 if (userBank) bank |= 0x20; 02920 if (prefetchEnabled) bank |= 0x40; 02921 I2Cdev::writeByte(devAddr, MPU6050_RA_BANK_SEL, bank); 02922 } 02923 02924 // MEM_START_ADDR register 02925 02926 void MPU6050::setMemoryStartAddress(uint8_t address) { 02927 I2Cdev::writeByte(devAddr, MPU6050_RA_MEM_START_ADDR, address); 02928 } 02929 02930 // MEM_R_W register 02931 02932 uint8_t MPU6050::readMemoryByte() { 02933 I2Cdev::readByte(devAddr, MPU6050_RA_MEM_R_W, buffer); 02934 return buffer[0]; 02935 } 02936 void MPU6050::writeMemoryByte(uint8_t data) { 02937 I2Cdev::writeByte(devAddr, MPU6050_RA_MEM_R_W, data); 02938 } 02939 void MPU6050::readMemoryBlock(uint8_t *data, uint16_t dataSize, uint8_t bank, uint8_t address) { 02940 setMemoryBank(bank); 02941 setMemoryStartAddress(address); 02942 uint8_t chunkSize; 02943 for (uint16_t i = 0; i < dataSize;) { 02944 // determine correct chunk size according to bank position and data size 02945 chunkSize = MPU6050_DMP_MEMORY_CHUNK_SIZE; 02946 02947 // make sure we don't go past the data size 02948 if (i + chunkSize > dataSize) chunkSize = dataSize - i; 02949 02950 // make sure this chunk doesn't go past the bank boundary (256 bytes) 02951 if (chunkSize > 256 - address) chunkSize = 256 - address; 02952 02953 // read the chunk of data as specified 02954 I2Cdev::readBytes(devAddr, MPU6050_RA_MEM_R_W, chunkSize, data + i); 02955 02956 // increase byte index by [chunkSize] 02957 i += chunkSize; 02958 02959 // uint8_t automatically wraps to 0 at 256 02960 address += chunkSize; 02961 02962 // if we aren't done, update bank (if necessary) and address 02963 if (i < dataSize) { 02964 if (address == 0) bank++; 02965 setMemoryBank(bank); 02966 setMemoryStartAddress(address); 02967 } 02968 } 02969 } 02970 bool MPU6050::writeMemoryBlock(const uint8_t *data, uint16_t dataSize, uint8_t bank, uint8_t address, bool verify, bool useProgMem) { 02971 setMemoryBank(bank); 02972 setMemoryStartAddress(address); 02973 uint8_t chunkSize; 02974 uint8_t *verifyBuffer; 02975 uint8_t *progBuffer; 02976 uint16_t i; 02977 uint8_t j; 02978 if (verify) verifyBuffer = (uint8_t *)malloc(MPU6050_DMP_MEMORY_CHUNK_SIZE); 02979 if (useProgMem) progBuffer = (uint8_t *)malloc(MPU6050_DMP_MEMORY_CHUNK_SIZE); 02980 for (i = 0; i < dataSize;) { 02981 // determine correct chunk size according to bank position and data size 02982 chunkSize = MPU6050_DMP_MEMORY_CHUNK_SIZE; 02983 02984 // make sure we don't go past the data size 02985 if (i + chunkSize > dataSize) chunkSize = dataSize - i; 02986 02987 // make sure this chunk doesn't go past the bank boundary (256 bytes) 02988 if (chunkSize > 256 - address) chunkSize = 256 - address; 02989 02990 if (useProgMem) { 02991 // write the chunk of data as specified 02992 for (j = 0; j < chunkSize; j++) progBuffer[j] = pgm_read_byte(data + i + j); 02993 } else { 02994 // write the chunk of data as specified 02995 progBuffer = (uint8_t *)data + i; 02996 } 02997 02998 I2Cdev::writeBytes(devAddr, MPU6050_RA_MEM_R_W, chunkSize, progBuffer); 02999 03000 // verify data if needed 03001 if (verify && verifyBuffer) { 03002 setMemoryBank(bank); 03003 setMemoryStartAddress(address); 03004 I2Cdev::readBytes(devAddr, MPU6050_RA_MEM_R_W, chunkSize, verifyBuffer); 03005 if (memcmp(progBuffer, verifyBuffer, chunkSize) != 0) { 03006 /*Serial.print("Block write verification error, bank "); 03007 Serial.print(bank, DEC); 03008 Serial.print(", address "); 03009 Serial.print(address, DEC); 03010 Serial.print("!\nExpected:"); 03011 for (j = 0; j < chunkSize; j++) { 03012 Serial.print(" 0x"); 03013 if (progBuffer[j] < 16) Serial.print("0"); 03014 Serial.print(progBuffer[j], HEX); 03015 } 03016 Serial.print("\nReceived:"); 03017 for (uint8_t j = 0; j < chunkSize; j++) { 03018 Serial.print(" 0x"); 03019 if (verifyBuffer[i + j] < 16) Serial.print("0"); 03020 Serial.print(verifyBuffer[i + j], HEX); 03021 } 03022 Serial.print("\n");*/ 03023 free(verifyBuffer); 03024 if (useProgMem) free(progBuffer); 03025 return false; // uh oh. 03026 } 03027 } 03028 03029 // increase byte index by [chunkSize] 03030 i += chunkSize; 03031 03032 // uint8_t automatically wraps to 0 at 256 03033 address += chunkSize; 03034 03035 // if we aren't done, update bank (if necessary) and address 03036 if (i < dataSize) { 03037 if (address == 0) bank++; 03038 setMemoryBank(bank); 03039 setMemoryStartAddress(address); 03040 } 03041 } 03042 if (verify) free(verifyBuffer); 03043 if (useProgMem) free(progBuffer); 03044 return true; 03045 } 03046 bool MPU6050::writeProgMemoryBlock(const uint8_t *data, uint16_t dataSize, uint8_t bank, uint8_t address, bool verify) { 03047 return writeMemoryBlock(data, dataSize, bank, address, verify, true); 03048 } 03049 bool MPU6050::writeDMPConfigurationSet(const uint8_t *data, uint16_t dataSize, bool useProgMem) { 03050 uint8_t *progBuffer, success, special; 03051 uint16_t i, j; 03052 if (useProgMem) { 03053 progBuffer = (uint8_t *)malloc(8); // assume 8-byte blocks, realloc later if necessary 03054 } 03055 03056 // config set data is a long string of blocks with the following structure: 03057 // [bank] [offset] [length] [byte[0], byte[1], ..., byte[length]] 03058 uint8_t bank, offset, length; 03059 for (i = 0; i < dataSize;) { 03060 if (useProgMem) { 03061 bank = pgm_read_byte(data + i++); 03062 offset = pgm_read_byte(data + i++); 03063 length = pgm_read_byte(data + i++); 03064 } else { 03065 bank = data[i++]; 03066 offset = data[i++]; 03067 length = data[i++]; 03068 } 03069 03070 // write data or perform special action 03071 if (length > 0) { 03072 // regular block of data to write 03073 /*Serial.print("Writing config block to bank "); 03074 Serial.print(bank); 03075 Serial.print(", offset "); 03076 Serial.print(offset); 03077 Serial.print(", length="); 03078 Serial.println(length);*/ 03079 if (useProgMem) { 03080 if (sizeof(progBuffer) < length) progBuffer = (uint8_t *)realloc(progBuffer, length); 03081 for (j = 0; j < length; j++) progBuffer[j] = pgm_read_byte(data + i + j); 03082 } else { 03083 progBuffer = (uint8_t *)data + i; 03084 } 03085 success = writeMemoryBlock(progBuffer, length, bank, offset, true); 03086 i += length; 03087 } else { 03088 // special instruction 03089 // NOTE: this kind of behavior (what and when to do certain things) 03090 // is totally undocumented. This code is in here based on observed 03091 // behavior only, and exactly why (or even whether) it has to be here 03092 // is anybody's guess for now. 03093 if (useProgMem) { 03094 special = pgm_read_byte(data + i++); 03095 } else { 03096 special = data[i++]; 03097 } 03098 /*Serial.print("Special command code "); 03099 Serial.print(special, HEX); 03100 Serial.println(" found...");*/ 03101 if (special == 0x01) { 03102 // enable DMP-related interrupts 03103 03104 //setIntZeroMotionEnabled(true); 03105 //setIntFIFOBufferOverflowEnabled(true); 03106 //setIntDMPEnabled(true); 03107 I2Cdev::writeByte(devAddr, MPU6050_RA_INT_ENABLE, 0x32); // single operation 03108 03109 success = true; 03110 } else { 03111 // unknown special command 03112 success = false; 03113 } 03114 } 03115 03116 if (!success) { 03117 if (useProgMem) free(progBuffer); 03118 return false; // uh oh 03119 } 03120 } 03121 if (useProgMem) free(progBuffer); 03122 return true; 03123 } 03124 bool MPU6050::writeProgDMPConfigurationSet(const uint8_t *data, uint16_t dataSize) { 03125 return writeDMPConfigurationSet(data, dataSize, true); 03126 } 03127 03128 // DMP_CFG_1 register 03129 03130 uint8_t MPU6050::getDMPConfig1() { 03131 I2Cdev::readByte(devAddr, MPU6050_RA_DMP_CFG_1, buffer); 03132 return buffer[0]; 03133 } 03134 void MPU6050::setDMPConfig1(uint8_t config) { 03135 I2Cdev::writeByte(devAddr, MPU6050_RA_DMP_CFG_1, config); 03136 } 03137 03138 // DMP_CFG_2 register 03139 03140 uint8_t MPU6050::getDMPConfig2() { 03141 I2Cdev::readByte(devAddr, MPU6050_RA_DMP_CFG_2, buffer); 03142 return buffer[0]; 03143 } 03144 void MPU6050::setDMPConfig2(uint8_t config) { 03145 I2Cdev::writeByte(devAddr, MPU6050_RA_DMP_CFG_2, config); 03146 }
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