This is the DDRO software we write to operate the chip

Dependencies:   mbed

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Show/hide line numbers scan.h Source File

scan.h

00001 #include "mbed.h"
00002 
00003 class PLL{
00004     public:
00005         PLL();
00006         void setFBK_MODE(int MODE);//feedback mode, 0 for external, 1 for internal
00007         int setPLL(int frequency);// main PLL setting function
00008         int testPLL();// use to test PLL working
00009         int check_lock();// check if PLL is locked
00010     private:
00011         unsigned int* A;//scan chain bit vector
00012         int FB_MODE;//feedback mode, 0 for external, 1 for internal
00013         void initScan();// initialize the scan chain
00014         int scanIn();// write A to scan chain
00015         int scanOut();// read scan chain value to A
00016         void loadChip();// load the scan in value to chip
00017         void loadChain();// load the scan chain value from chip
00018         void scanAction();// step in the value by 1 bit
00019         void setVector();// set bit-vector A for test
00020         void plloutAon();// set PLLout A on and B off
00021         void plloutBon();// set PLLout A off and B on
00022         void setPrediv(int val);//Setting the Prediv bits A[143:138] Range 1-32
00023         void setFbDivPreScaler(int val);//Setting the Feedback Divider Pre-scalar bits A[136:134] Range: 1-4
00024         void setFbDiv(int val);//Setting the Feedback Divider bits A[133:126] Range: 1-255
00025         void setFwDivPreScalerA(int val);//Setting the Forward Divider Pre-scalar bits for A A[150:149] Range: 1,2,4
00026         void setFwDivA(int val);//Setting the Forward Divider Pre-scalar bits A[148:144] Range: 1-32
00027         void setFwDivPreScalerB(int val);//Setting the Forward Divider Pre-scalar bits for B A[150:149] Range: 1,2,4
00028         void setFwDivB(int val);//Setting the Forward Divider Pre-scalar bits for B A[148:144] Range: 1-32
00029         void setLFTUNE(int interval);//Setting LFTUNE A[83:43] Range: 0(2.5-3.2) - 1(3.2-5.0)
00030         void setFFTUNE(int interval);//Setting FFTUNE A[41:26]
00031         void setINTFBK();//Setting feedback mode A[42]
00032         void setROandOther();//Setting(disabling) ring_osc A[7:0]
00033         void setINTMUX(int clk);//Setting internal clk source bits A[9:8] Range: 0: HCLK_EXT 1: ring_osc 2: PLLOUT_A 3: PLLOUT_B
00034         void setEXTMUX(int clk);//Setting external clk source bits A[15:14] Range: 0: HCLK_EXT 1: HCLK_divider 2: PLLOUT_A 3: PLLOUT_B
00035         void setEXTDIV(int val);//Setting clk divider bits for B A[13:10] Range: 0-15, divided by 2^val
00036         void resetPLL(int val);//Setting PLL_RESET A[158], range: 0:unreset 1:reset
00037 };