Diff: cmsis_dsp/BasicMathFunctions/arm_offset_f32.c

Revision:

3:7a284390b0ce

Parent:

2:da51fb522205

diff -r da51fb522205 -r 7a284390b0ce cmsis_dsp/BasicMathFunctions/arm_offset_f32.c
--- a/cmsis_dsp/BasicMathFunctions/arm_offset_f32.c	Thu May 30 17:10:11 2013 +0100
+++ b/cmsis_dsp/BasicMathFunctions/arm_offset_f32.c	Fri Nov 08 13:45:10 2013 +0000
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_offset_f32.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * ---------------------------------------------------------------------------- */
 #include "arm_math.h"
 
@@ -47,7 +52,9 @@
  *     pDst[n] = pSrc[n] + offset,   0 <= n < blockSize.        
  * </pre>        
  *        
- * There are separate functions for floating-point, Q7, Q15, and Q31 data types.        
+ * The functions support in-place computation allowing the source and
+ * destination pointers to reference the same memory buffer.
+ * There are separate functions for floating-point, Q7, Q15, and Q31 data types.
  */
 
 /**        
@@ -73,7 +80,7 @@
 {
   uint32_t blkCnt;                               /* loop counter */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
 /* Run the below code for Cortex-M4 and Cortex-M3 */
   float32_t in1, in2, in3, in4;
@@ -140,7 +147,7 @@
   /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
   while(blkCnt > 0u)
   {