Kevin Kadooka / mbed-dev

Fork of mbed-dev build 137, last build before FAT file system appears to be broken. Also reduced HSE timeout time in STM4XX HAL

Fork of mbed-dev by mbed official

targets/TARGET_NXP/TARGET_LPC82X/analogin_api.c@149:156823d33999, 2016-10-28 (annotated)

Committer:
<>
Date:
Fri Oct 28 11:17:30 2016 +0100
Revision:
149:156823d33999
Parent:
targets/hal/TARGET_NXP/TARGET_LPC82X/analogin_api.c@144:ef7eb2e8f9f7 
This updates the lib to the mbed lib v128



NOTE: This release includes a restructuring of the file and directory locations and thus some

include paths in your code may need updating accordingly.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /* mbed Microcontroller Library
<> 144:ef7eb2e8f9f7 2 * Copyright (c) 2006-2013 ARM Limited
<> 144:ef7eb2e8f9f7 3 *
<> 144:ef7eb2e8f9f7 4 * Licensed under the Apache License, Version 2.0 (the "License");
<> 144:ef7eb2e8f9f7 5 * you may not use this file except in compliance with the License.
<> 144:ef7eb2e8f9f7 6 * You may obtain a copy of the License at
<> 144:ef7eb2e8f9f7 7 *
<> 144:ef7eb2e8f9f7 8 * http://www.apache.org/licenses/LICENSE-2.0
<> 144:ef7eb2e8f9f7 9 *
<> 144:ef7eb2e8f9f7 10 * Unless required by applicable law or agreed to in writing, software
<> 144:ef7eb2e8f9f7 11 * distributed under the License is distributed on an "AS IS" BASIS,
<> 144:ef7eb2e8f9f7 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
<> 144:ef7eb2e8f9f7 13 * See the License for the specific language governing permissions and
<> 144:ef7eb2e8f9f7 14 * limitations under the License.
<> 144:ef7eb2e8f9f7 15 */
<> 144:ef7eb2e8f9f7 16 #include "mbed_assert.h"
<> 144:ef7eb2e8f9f7 17 #include "analogin_api.h"
<> 144:ef7eb2e8f9f7 18 #include "cmsis.h"
<> 144:ef7eb2e8f9f7 19 #include "pinmap.h"
<> 144:ef7eb2e8f9f7 20 #include "PeripheralNames.h"
<> 144:ef7eb2e8f9f7 21
<> 144:ef7eb2e8f9f7 22 #if DEVICE_ANALOGIN
<> 144:ef7eb2e8f9f7 23
<> 144:ef7eb2e8f9f7 24 #define ANALOGIN_MEDIAN_FILTER 1
<> 144:ef7eb2e8f9f7 25
<> 144:ef7eb2e8f9f7 26 #define ADC_RANGE 0xFFF
<> 144:ef7eb2e8f9f7 27
<> 144:ef7eb2e8f9f7 28 static const PinMap PinMap_ADC[] = {
<> 144:ef7eb2e8f9f7 29 {P0_7 , ADC_0, 0},
<> 144:ef7eb2e8f9f7 30 {P0_6 , ADC_1, 0},
<> 144:ef7eb2e8f9f7 31 {P0_14, ADC_2, 0},
<> 144:ef7eb2e8f9f7 32 {P0_23, ADC_3, 0},
<> 144:ef7eb2e8f9f7 33 {P0_22, ADC_4, 0},
<> 144:ef7eb2e8f9f7 34 {P0_21, ADC_5, 0},
<> 144:ef7eb2e8f9f7 35 {P0_20, ADC_6, 0},
<> 144:ef7eb2e8f9f7 36 {P0_19, ADC_7, 0},
<> 144:ef7eb2e8f9f7 37 {P0_18, ADC_8, 0},
<> 144:ef7eb2e8f9f7 38 {P0_17, ADC_9, 0},
<> 144:ef7eb2e8f9f7 39 {P0_13, ADC_10,0},
<> 144:ef7eb2e8f9f7 40 {P0_4 , ADC_11,0},
<> 144:ef7eb2e8f9f7 41 };
<> 144:ef7eb2e8f9f7 42
<> 144:ef7eb2e8f9f7 43 void analogin_init(analogin_t *obj, PinName pin)
<> 144:ef7eb2e8f9f7 44 {
<> 144:ef7eb2e8f9f7 45 obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC);
<> 144:ef7eb2e8f9f7 46 MBED_ASSERT(obj->adc != (ADCName)NC);
<> 144:ef7eb2e8f9f7 47
<> 144:ef7eb2e8f9f7 48 LPC_SYSCON->SYSAHBCLKCTRL |= (1UL << 6);
<> 144:ef7eb2e8f9f7 49 // pin enable
<> 144:ef7eb2e8f9f7 50 LPC_SWM->PINENABLE0 &= ~(1UL << (13 + obj->adc));
<> 144:ef7eb2e8f9f7 51 // configure GPIO as input
<> 144:ef7eb2e8f9f7 52 LPC_GPIO_PORT->DIR0 &= ~(1UL << (pin >> PIN_SHIFT));
<> 144:ef7eb2e8f9f7 53
<> 144:ef7eb2e8f9f7 54 LPC_SYSCON->PDRUNCFG &= ~(1 << 4);
<> 144:ef7eb2e8f9f7 55 LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 24);
<> 144:ef7eb2e8f9f7 56
<> 144:ef7eb2e8f9f7 57 __IO LPC_ADC_Type *adc_reg = LPC_ADC;
<> 144:ef7eb2e8f9f7 58
<> 144:ef7eb2e8f9f7 59 // determine the system clock divider for a 500kHz ADC clock during calibration
<> 144:ef7eb2e8f9f7 60 uint32_t clkdiv = (SystemCoreClock / 500000) - 1;
<> 144:ef7eb2e8f9f7 61
<> 144:ef7eb2e8f9f7 62 // perform a self-calibration
<> 144:ef7eb2e8f9f7 63 adc_reg->CTRL = (1UL << 30) | (clkdiv & 0xFF);
<> 144:ef7eb2e8f9f7 64 while ((adc_reg->CTRL & (1UL << 30)) != 0);
<> 144:ef7eb2e8f9f7 65 }
<> 144:ef7eb2e8f9f7 66
<> 144:ef7eb2e8f9f7 67 static inline uint32_t adc_read(analogin_t *obj)
<> 144:ef7eb2e8f9f7 68 {
<> 144:ef7eb2e8f9f7 69 uint32_t channels;
<> 144:ef7eb2e8f9f7 70 __IO LPC_ADC_Type *adc_reg = LPC_ADC;
<> 144:ef7eb2e8f9f7 71
<> 144:ef7eb2e8f9f7 72 channels = (obj->adc & 0x1F);
<> 144:ef7eb2e8f9f7 73
<> 144:ef7eb2e8f9f7 74 // select channel
<> 144:ef7eb2e8f9f7 75 adc_reg->SEQA_CTRL &= ~(0xFFF);
<> 144:ef7eb2e8f9f7 76 adc_reg->SEQA_CTRL |= (1UL << channels);
<> 144:ef7eb2e8f9f7 77
<> 144:ef7eb2e8f9f7 78 // start conversion and sequence enable
<> 144:ef7eb2e8f9f7 79 adc_reg->SEQA_CTRL |= ((1UL << 26) | (1UL << 31));
<> 144:ef7eb2e8f9f7 80
<> 144:ef7eb2e8f9f7 81 // Repeatedly get the sample data until DONE bit
<> 144:ef7eb2e8f9f7 82 volatile uint32_t data;
<> 144:ef7eb2e8f9f7 83 do {
<> 144:ef7eb2e8f9f7 84 data = adc_reg->SEQA_GDAT;
<> 144:ef7eb2e8f9f7 85 } while ((data & (1UL << 31)) == 0);
<> 144:ef7eb2e8f9f7 86
<> 144:ef7eb2e8f9f7 87 // Stop conversion
<> 144:ef7eb2e8f9f7 88 adc_reg->SEQA_CTRL &= ~(1UL << 31);
<> 144:ef7eb2e8f9f7 89
<> 144:ef7eb2e8f9f7 90 return ((data >> 4) & ADC_RANGE);
<> 144:ef7eb2e8f9f7 91 }
<> 144:ef7eb2e8f9f7 92
<> 144:ef7eb2e8f9f7 93 static inline void order(uint32_t *a, uint32_t *b)
<> 144:ef7eb2e8f9f7 94 {
<> 144:ef7eb2e8f9f7 95 if (*a > *b) {
<> 144:ef7eb2e8f9f7 96 uint32_t t = *a;
<> 144:ef7eb2e8f9f7 97 *a = *b;
<> 144:ef7eb2e8f9f7 98 *b = t;
<> 144:ef7eb2e8f9f7 99 }
<> 144:ef7eb2e8f9f7 100 }
<> 144:ef7eb2e8f9f7 101
<> 144:ef7eb2e8f9f7 102 static inline uint32_t adc_read_u32(analogin_t *obj)
<> 144:ef7eb2e8f9f7 103 {
<> 144:ef7eb2e8f9f7 104 uint32_t value;
<> 144:ef7eb2e8f9f7 105 #if ANALOGIN_MEDIAN_FILTER
<> 144:ef7eb2e8f9f7 106 uint32_t v1 = adc_read(obj);
<> 144:ef7eb2e8f9f7 107 uint32_t v2 = adc_read(obj);
<> 144:ef7eb2e8f9f7 108 uint32_t v3 = adc_read(obj);
<> 144:ef7eb2e8f9f7 109 order(&v1, &v2);
<> 144:ef7eb2e8f9f7 110 order(&v2, &v3);
<> 144:ef7eb2e8f9f7 111 order(&v1, &v2);
<> 144:ef7eb2e8f9f7 112 value = v2;
<> 144:ef7eb2e8f9f7 113 #else
<> 144:ef7eb2e8f9f7 114 value = adc_read(obj);
<> 144:ef7eb2e8f9f7 115 #endif
<> 144:ef7eb2e8f9f7 116 return value;
<> 144:ef7eb2e8f9f7 117 }
<> 144:ef7eb2e8f9f7 118
<> 144:ef7eb2e8f9f7 119 uint16_t analogin_read_u16(analogin_t *obj)
<> 144:ef7eb2e8f9f7 120 {
<> 144:ef7eb2e8f9f7 121 uint32_t value = adc_read_u32(obj);
<> 144:ef7eb2e8f9f7 122 return (value << 4) | ((value >> 8) & 0x000F); // 12 bit
<> 144:ef7eb2e8f9f7 123 }
<> 144:ef7eb2e8f9f7 124
<> 144:ef7eb2e8f9f7 125 float analogin_read(analogin_t *obj)
<> 144:ef7eb2e8f9f7 126 {
<> 144:ef7eb2e8f9f7 127 uint32_t value = adc_read_u32(obj);
<> 144:ef7eb2e8f9f7 128 return (float)value * (1.0f / (float)ADC_RANGE);
<> 144:ef7eb2e8f9f7 129 }
<> 144:ef7eb2e8f9f7 130
<> 144:ef7eb2e8f9f7 131 #endif