hadif azli / Mbed 2 deprecated TEST123

BLYNK TEST

Dependencies:   mbed Blynk

I2Cdev.cpp@4:e5018e5ba340, 2016-06-16 (annotated)

Committer:
lixianyu
Date:
Thu Jun 16 08:12:33 2016 +0000
Revision:
4:e5018e5ba340
Parent:
3:4cd9171ba989 
ok

Who changed what in which revision?

UserRevisionLine numberNew contents of line
lixianyu 3:4cd9171ba989 1 #if 0
lixianyu 2:6cd3b0947188 2 #include "I2Cdev.h"
lixianyu 2:6cd3b0947188 3
lixianyu 2:6cd3b0947188 4 extern DigitalOut myled;
lixianyu 2:6cd3b0947188 5 static uint8_t buffer[24];
lixianyu 2:6cd3b0947188 6 //I2C g_i2c1(P0_11, P0_10);
lixianyu 2:6cd3b0947188 7 extern I2C g_i2c;
lixianyu 2:6cd3b0947188 8
lixianyu 2:6cd3b0947188 9 uint16_t I2Cdev::readTimeout = I2CDEV_DEFAULT_READ_TIMEOUT;
lixianyu 2:6cd3b0947188 10
lixianyu 2:6cd3b0947188 11 void I2Cdev::init()
lixianyu 2:6cd3b0947188 12 {
lixianyu 2:6cd3b0947188 13 g_i2c.frequency(267000);
lixianyu 2:6cd3b0947188 14 }
lixianyu 2:6cd3b0947188 15
lixianyu 2:6cd3b0947188 16 /** Default constructor.
lixianyu 2:6cd3b0947188 17 */
lixianyu 2:6cd3b0947188 18 I2Cdev::I2Cdev()
lixianyu 2:6cd3b0947188 19 {
lixianyu 2:6cd3b0947188 20 g_i2c.frequency(400000);
lixianyu 2:6cd3b0947188 21 //myled = 1;
lixianyu 2:6cd3b0947188 22 }
lixianyu 2:6cd3b0947188 23
lixianyu 2:6cd3b0947188 24 /** Read a single bit from an 8-bit device register.
lixianyu 2:6cd3b0947188 25 * @param devAddr I2C slave device address
lixianyu 2:6cd3b0947188 26 * @param regAddr Register regAddr to read from
lixianyu 2:6cd3b0947188 27 * @param bitNum Bit position to read (0-7)
lixianyu 2:6cd3b0947188 28 * @param data Container for single bit value
lixianyu 2:6cd3b0947188 29 * @param timeout Optional read timeout in milliseconds (0 to disable, leave off to use default class value in I2Cdev::readTimeout)
lixianyu 2:6cd3b0947188 30 * @return Status of read operation (true = success)
lixianyu 2:6cd3b0947188 31 */
lixianyu 2:6cd3b0947188 32 int8_t I2Cdev::readBit(uint8_t devAddr, uint8_t regAddr, uint8_t bitNum, uint8_t *data, uint16_t timeout)
lixianyu 2:6cd3b0947188 33 {
lixianyu 2:6cd3b0947188 34 uint8_t b;
lixianyu 2:6cd3b0947188 35 uint8_t count = readByte(devAddr, regAddr, &b, timeout);
lixianyu 2:6cd3b0947188 36 *data = b & (1 << bitNum);
lixianyu 2:6cd3b0947188 37 return count;
lixianyu 2:6cd3b0947188 38 }
lixianyu 2:6cd3b0947188 39
lixianyu 2:6cd3b0947188 40 /** Read a single bit from a 16-bit device register.
lixianyu 2:6cd3b0947188 41 * @param devAddr I2C slave device address
lixianyu 2:6cd3b0947188 42 * @param regAddr Register regAddr to read from
lixianyu 2:6cd3b0947188 43 * @param bitNum Bit position to read (0-15)
lixianyu 2:6cd3b0947188 44 * @param data Container for single bit value
lixianyu 2:6cd3b0947188 45 * @param timeout Optional read timeout in milliseconds (0 to disable, leave off to use default class value in I2Cdev::readTimeout)
lixianyu 2:6cd3b0947188 46 * @return Status of read operation (true = success)
lixianyu 2:6cd3b0947188 47 */
lixianyu 2:6cd3b0947188 48 int8_t I2Cdev::readBitW(uint8_t devAddr, uint8_t regAddr, uint8_t bitNum, uint16_t *data, uint16_t timeout)
lixianyu 2:6cd3b0947188 49 {
lixianyu 2:6cd3b0947188 50 uint16_t b;
lixianyu 2:6cd3b0947188 51 uint8_t count = readWord(devAddr, regAddr, &b, timeout);
lixianyu 2:6cd3b0947188 52 *data = b & (1 << bitNum);
lixianyu 2:6cd3b0947188 53 return count;
lixianyu 2:6cd3b0947188 54 }
lixianyu 2:6cd3b0947188 55
lixianyu 2:6cd3b0947188 56 /** Read multiple bits from an 8-bit device register.
lixianyu 2:6cd3b0947188 57 * @param devAddr I2C slave device address
lixianyu 2:6cd3b0947188 58 * @param regAddr Register regAddr to read from
lixianyu 2:6cd3b0947188 59 * @param bitStart First bit position to read (0-7)
lixianyu 2:6cd3b0947188 60 * @param length Number of bits to read (not more than 8)
lixianyu 2:6cd3b0947188 61 * @param data Container for right-aligned value (i.e. '101' read from any bitStart position will equal 0x05)
lixianyu 2:6cd3b0947188 62 * @param timeout Optional read timeout in milliseconds (0 to disable, leave off to use default class value in I2Cdev::readTimeout)
lixianyu 2:6cd3b0947188 63 * @return Status of read operation (true = success)
lixianyu 2:6cd3b0947188 64 */
lixianyu 2:6cd3b0947188 65 int8_t I2Cdev::readBits(uint8_t devAddr, uint8_t regAddr, uint8_t bitStart, uint8_t length, uint8_t *data, uint16_t timeout)
lixianyu 2:6cd3b0947188 66 {
lixianyu 2:6cd3b0947188 67 // 01101001 read byte
lixianyu 2:6cd3b0947188 68 // 76543210 bit numbers
lixianyu 2:6cd3b0947188 69 // xxx args: bitStart=4, length=3
lixianyu 2:6cd3b0947188 70 // 010 masked
lixianyu 2:6cd3b0947188 71 // -> 010 shifted
lixianyu 2:6cd3b0947188 72 uint8_t count, b;
lixianyu 2:6cd3b0947188 73 if ((count = readByte(devAddr, regAddr, &b, timeout)) != 0) {
lixianyu 2:6cd3b0947188 74 uint8_t mask = ((1 << length) - 1) << (bitStart - length + 1);
lixianyu 2:6cd3b0947188 75 b &= mask;
lixianyu 2:6cd3b0947188 76 b >>= (bitStart - length + 1);
lixianyu 2:6cd3b0947188 77 *data = b;
lixianyu 2:6cd3b0947188 78 }
lixianyu 2:6cd3b0947188 79 return count;
lixianyu 2:6cd3b0947188 80 }
lixianyu 2:6cd3b0947188 81
lixianyu 2:6cd3b0947188 82 /** Read multiple bits from a 16-bit device register.
lixianyu 2:6cd3b0947188 83 * @param devAddr I2C slave device address
lixianyu 2:6cd3b0947188 84 * @param regAddr Register regAddr to read from
lixianyu 2:6cd3b0947188 85 * @param bitStart First bit position to read (0-15)
lixianyu 2:6cd3b0947188 86 * @param length Number of bits to read (not more than 16)
lixianyu 2:6cd3b0947188 87 * @param data Container for right-aligned value (i.e. '101' read from any bitStart position will equal 0x05)
lixianyu 2:6cd3b0947188 88 * @param timeout Optional read timeout in milliseconds (0 to disable, leave off to use default class value in I2Cdev::readTimeout)
lixianyu 2:6cd3b0947188 89 * @return Status of read operation (1 = success, 0 = failure, -1 = timeout)
lixianyu 2:6cd3b0947188 90 */
lixianyu 2:6cd3b0947188 91 int8_t I2Cdev::readBitsW(uint8_t devAddr, uint8_t regAddr, uint8_t bitStart, uint8_t length, uint16_t *data, uint16_t timeout)
lixianyu 2:6cd3b0947188 92 {
lixianyu 2:6cd3b0947188 93 // 1101011001101001 read byte
lixianyu 2:6cd3b0947188 94 // fedcba9876543210 bit numbers
lixianyu 2:6cd3b0947188 95 // xxx args: bitStart=12, length=3
lixianyu 2:6cd3b0947188 96 // 010 masked
lixianyu 2:6cd3b0947188 97 // -> 010 shifted
lixianyu 2:6cd3b0947188 98 uint8_t count;
lixianyu 2:6cd3b0947188 99 uint16_t w;
lixianyu 2:6cd3b0947188 100 if ((count = readWord(devAddr, regAddr, &w, timeout)) != 0) {
lixianyu 2:6cd3b0947188 101 uint16_t mask = ((1 << length) - 1) << (bitStart - length + 1);
lixianyu 2:6cd3b0947188 102 w &= mask;
lixianyu 2:6cd3b0947188 103 w >>= (bitStart - length + 1);
lixianyu 2:6cd3b0947188 104 *data = w;
lixianyu 2:6cd3b0947188 105 }
lixianyu 2:6cd3b0947188 106 return count;
lixianyu 2:6cd3b0947188 107 }
lixianyu 2:6cd3b0947188 108
lixianyu 2:6cd3b0947188 109 /** Read single byte from an 8-bit device register.
lixianyu 2:6cd3b0947188 110 * @param devAddr I2C slave device address
lixianyu 2:6cd3b0947188 111 * @param regAddr Register regAddr to read from
lixianyu 2:6cd3b0947188 112 * @param data Container for byte value read from device
lixianyu 2:6cd3b0947188 113 * @param timeout Optional read timeout in milliseconds (0 to disable, leave off to use default class value in I2Cdev::readTimeout)
lixianyu 2:6cd3b0947188 114 * @return Status of read operation (true = success)
lixianyu 2:6cd3b0947188 115 */
lixianyu 2:6cd3b0947188 116 int8_t I2Cdev::readByte(uint8_t devAddr, uint8_t regAddr, uint8_t *data, uint16_t timeout)
lixianyu 2:6cd3b0947188 117 {
lixianyu 2:6cd3b0947188 118 return readBytes(devAddr, regAddr, 1, data, timeout);
lixianyu 2:6cd3b0947188 119 }
lixianyu 2:6cd3b0947188 120
lixianyu 2:6cd3b0947188 121 /** Read single word from a 16-bit device register.
lixianyu 2:6cd3b0947188 122 * @param devAddr I2C slave device address
lixianyu 2:6cd3b0947188 123 * @param regAddr Register regAddr to read from
lixianyu 2:6cd3b0947188 124 * @param data Container for word value read from device
lixianyu 2:6cd3b0947188 125 * @param timeout Optional read timeout in milliseconds (0 to disable, leave off to use default class value in I2Cdev::readTimeout)
lixianyu 2:6cd3b0947188 126 * @return Status of read operation (true = success)
lixianyu 2:6cd3b0947188 127 */
lixianyu 2:6cd3b0947188 128 int8_t I2Cdev::readWord(uint8_t devAddr, uint8_t regAddr, uint16_t *data, uint16_t timeout)
lixianyu 2:6cd3b0947188 129 {
lixianyu 2:6cd3b0947188 130 return readWords(devAddr, regAddr, 1, data, timeout);
lixianyu 2:6cd3b0947188 131 }
lixianyu 2:6cd3b0947188 132
lixianyu 2:6cd3b0947188 133 /** Read multiple bytes from an 8-bit device register.
lixianyu 2:6cd3b0947188 134 * @param devAddr I2C slave device address
lixianyu 2:6cd3b0947188 135 * @param regAddr First register regAddr to read from
lixianyu 2:6cd3b0947188 136 * @param length Number of bytes to read
lixianyu 2:6cd3b0947188 137 * @param data Buffer to store read data in
lixianyu 2:6cd3b0947188 138 * @param timeout Optional read timeout in milliseconds (0 to disable, leave off to use default class value in I2Cdev::readTimeout)
lixianyu 2:6cd3b0947188 139 * @return Number of bytes read (-1 indicates failure)
lixianyu 2:6cd3b0947188 140 */
lixianyu 2:6cd3b0947188 141 int8_t I2Cdev::readBytes(uint8_t devAddr, uint8_t regAddr, uint8_t length, uint8_t *data, uint16_t timeout)
lixianyu 2:6cd3b0947188 142 {
lixianyu 2:6cd3b0947188 143 g_i2c.write(devAddr << 1, (char*)&regAddr, 1, false);
lixianyu 2:6cd3b0947188 144 uint8_t realReadAddr = (devAddr << 1) | 0x01;
lixianyu 2:6cd3b0947188 145 int retRead = g_i2c.read(realReadAddr, (char*)data, length);
lixianyu 2:6cd3b0947188 146 if (retRead == 0) {
lixianyu 2:6cd3b0947188 147 return length;
lixianyu 2:6cd3b0947188 148 }
lixianyu 2:6cd3b0947188 149 return -1;
lixianyu 2:6cd3b0947188 150 }
lixianyu 2:6cd3b0947188 151
lixianyu 2:6cd3b0947188 152 int8_t I2Cdev::readBytesOnly(uint8_t devAddr, uint8_t length, uint8_t *data, uint16_t timeout)
lixianyu 2:6cd3b0947188 153 {
lixianyu 2:6cd3b0947188 154 uint8_t realReadAddr = (devAddr << 1) | 0x01;
lixianyu 2:6cd3b0947188 155 int retRead = g_i2c.read(realReadAddr, (char*)data, length);
lixianyu 2:6cd3b0947188 156 if (retRead == 0) {
lixianyu 2:6cd3b0947188 157 return length;
lixianyu 2:6cd3b0947188 158 }
lixianyu 2:6cd3b0947188 159 return -1;
lixianyu 2:6cd3b0947188 160 }
lixianyu 2:6cd3b0947188 161
lixianyu 2:6cd3b0947188 162 /** Read multiple words from a 16-bit device register.
lixianyu 2:6cd3b0947188 163 * @param devAddr I2C slave device address
lixianyu 2:6cd3b0947188 164 * @param regAddr First register regAddr to read from
lixianyu 2:6cd3b0947188 165 * @param length Number of words to read
lixianyu 2:6cd3b0947188 166 * @param data Buffer to store read data in
lixianyu 2:6cd3b0947188 167 * @param timeout Optional read timeout in milliseconds (0 to disable, leave off to use default class value in I2Cdev::readTimeout)
lixianyu 2:6cd3b0947188 168 * @return Number of words read (0 indicates failure)
lixianyu 2:6cd3b0947188 169 */
lixianyu 2:6cd3b0947188 170 int8_t I2Cdev::readWords(uint8_t devAddr, uint8_t regAddr, uint8_t length, uint16_t *data, uint16_t timeout)
lixianyu 2:6cd3b0947188 171 {
lixianyu 2:6cd3b0947188 172 g_i2c.write(devAddr << 1, (char*)&regAddr, 1, false);
lixianyu 2:6cd3b0947188 173 uint8_t realReadAddr = (devAddr << 1) | 0x01;
lixianyu 2:6cd3b0947188 174 int retRead = g_i2c.read(realReadAddr, (char*)data, length*2);
lixianyu 2:6cd3b0947188 175 if (retRead == 0) {
lixianyu 2:6cd3b0947188 176 return length;
lixianyu 2:6cd3b0947188 177 }
lixianyu 2:6cd3b0947188 178 return 0;
lixianyu 2:6cd3b0947188 179 }
lixianyu 2:6cd3b0947188 180
lixianyu 2:6cd3b0947188 181 /** write a single bit in an 8-bit device register.
lixianyu 2:6cd3b0947188 182 * @param devAddr I2C slave device address
lixianyu 2:6cd3b0947188 183 * @param regAddr Register regAddr to write to
lixianyu 2:6cd3b0947188 184 * @param bitNum Bit position to write (0-7)
lixianyu 2:6cd3b0947188 185 * @param value New bit value to write
lixianyu 2:6cd3b0947188 186 * @return Status of operation (true = success)
lixianyu 2:6cd3b0947188 187 */
lixianyu 2:6cd3b0947188 188 bool I2Cdev::writeBit(uint8_t devAddr, uint8_t regAddr, uint8_t bitNum, uint8_t data)
lixianyu 2:6cd3b0947188 189 {
lixianyu 2:6cd3b0947188 190 uint8_t b;
lixianyu 2:6cd3b0947188 191 readByte(devAddr, regAddr, &b);
lixianyu 2:6cd3b0947188 192 b = (data != 0) ? (b | (1 << bitNum)) : (b & ~(1 << bitNum));
lixianyu 2:6cd3b0947188 193 return writeByte(devAddr, regAddr, b);
lixianyu 2:6cd3b0947188 194 }
lixianyu 2:6cd3b0947188 195
lixianyu 2:6cd3b0947188 196 /** write a single bit in a 16-bit device register.
lixianyu 2:6cd3b0947188 197 * @param devAddr I2C slave device address
lixianyu 2:6cd3b0947188 198 * @param regAddr Register regAddr to write to
lixianyu 2:6cd3b0947188 199 * @param bitNum Bit position to write (0-15)
lixianyu 2:6cd3b0947188 200 * @param value New bit value to write
lixianyu 2:6cd3b0947188 201 * @return Status of operation (true = success)
lixianyu 2:6cd3b0947188 202 */
lixianyu 2:6cd3b0947188 203 bool I2Cdev::writeBitW(uint8_t devAddr, uint8_t regAddr, uint8_t bitNum, uint16_t data)
lixianyu 2:6cd3b0947188 204 {
lixianyu 2:6cd3b0947188 205 uint16_t w;
lixianyu 2:6cd3b0947188 206 readWord(devAddr, regAddr, &w);
lixianyu 2:6cd3b0947188 207 w = (data != 0) ? (w | (1 << bitNum)) : (w & ~(1 << bitNum));
lixianyu 2:6cd3b0947188 208 return writeWord(devAddr, regAddr, w);
lixianyu 2:6cd3b0947188 209 }
lixianyu 2:6cd3b0947188 210
lixianyu 2:6cd3b0947188 211 /** Write multiple bits in an 8-bit device register.
lixianyu 2:6cd3b0947188 212 * @param devAddr I2C slave device address
lixianyu 2:6cd3b0947188 213 * @param regAddr Register regAddr to write to
lixianyu 2:6cd3b0947188 214 * @param bitStart First bit position to write (0-7)
lixianyu 2:6cd3b0947188 215 * @param length Number of bits to write (not more than 8)
lixianyu 2:6cd3b0947188 216 * @param data Right-aligned value to write
lixianyu 2:6cd3b0947188 217 * @return Status of operation (true = success)
lixianyu 2:6cd3b0947188 218 */
lixianyu 2:6cd3b0947188 219 bool I2Cdev::writeBits(uint8_t devAddr, uint8_t regAddr, uint8_t bitStart, uint8_t length, uint8_t data)
lixianyu 2:6cd3b0947188 220 {
lixianyu 2:6cd3b0947188 221 // 010 value to write
lixianyu 2:6cd3b0947188 222 // 76543210 bit numbers
lixianyu 2:6cd3b0947188 223 // xxx args: bitStart=4, length=3
lixianyu 2:6cd3b0947188 224 // 00011100 mask byte
lixianyu 2:6cd3b0947188 225 // 10101111 original value (sample)
lixianyu 2:6cd3b0947188 226 // 10100011 original & ~mask
lixianyu 2:6cd3b0947188 227 // 10101011 masked | value
lixianyu 2:6cd3b0947188 228 uint8_t b;
lixianyu 2:6cd3b0947188 229 if (readByte(devAddr, regAddr, &b) != 0) {
lixianyu 2:6cd3b0947188 230 uint8_t mask = ((1 << length) - 1) << (bitStart - length + 1);
lixianyu 2:6cd3b0947188 231 data <<= (bitStart - length + 1); // shift data into correct position
lixianyu 2:6cd3b0947188 232 data &= mask; // zero all non-important bits in data
lixianyu 2:6cd3b0947188 233 b &= ~(mask); // zero all important bits in existing byte
lixianyu 2:6cd3b0947188 234 b |= data; // combine data with existing byte
lixianyu 2:6cd3b0947188 235 return writeByte(devAddr, regAddr, b);
lixianyu 2:6cd3b0947188 236 } else {
lixianyu 2:6cd3b0947188 237 return false;
lixianyu 2:6cd3b0947188 238 }
lixianyu 2:6cd3b0947188 239 }
lixianyu 2:6cd3b0947188 240
lixianyu 2:6cd3b0947188 241 /** Write multiple bits in a 16-bit device register.
lixianyu 2:6cd3b0947188 242 * @param devAddr I2C slave device address
lixianyu 2:6cd3b0947188 243 * @param regAddr Register regAddr to write to
lixianyu 2:6cd3b0947188 244 * @param bitStart First bit position to write (0-15)
lixianyu 2:6cd3b0947188 245 * @param length Number of bits to write (not more than 16)
lixianyu 2:6cd3b0947188 246 * @param data Right-aligned value to write
lixianyu 2:6cd3b0947188 247 * @return Status of operation (true = success)
lixianyu 2:6cd3b0947188 248 */
lixianyu 2:6cd3b0947188 249 bool I2Cdev::writeBitsW(uint8_t devAddr, uint8_t regAddr, uint8_t bitStart, uint8_t length, uint16_t data)
lixianyu 2:6cd3b0947188 250 {
lixianyu 2:6cd3b0947188 251 // 010 value to write
lixianyu 2:6cd3b0947188 252 // fedcba9876543210 bit numbers
lixianyu 2:6cd3b0947188 253 // xxx args: bitStart=12, length=3
lixianyu 2:6cd3b0947188 254 // 0001110000000000 mask byte
lixianyu 2:6cd3b0947188 255 // 1010111110010110 original value (sample)
lixianyu 2:6cd3b0947188 256 // 1010001110010110 original & ~mask
lixianyu 2:6cd3b0947188 257 // 1010101110010110 masked | value
lixianyu 2:6cd3b0947188 258 uint16_t w;
lixianyu 2:6cd3b0947188 259 if (readWord(devAddr, regAddr, &w) != 0) {
lixianyu 2:6cd3b0947188 260 uint8_t mask = ((1 << length) - 1) << (bitStart - length + 1);
lixianyu 2:6cd3b0947188 261 data <<= (bitStart - length + 1); // shift data into correct position
lixianyu 2:6cd3b0947188 262 data &= mask; // zero all non-important bits in data
lixianyu 2:6cd3b0947188 263 w &= ~(mask); // zero all important bits in existing word
lixianyu 2:6cd3b0947188 264 w |= data; // combine data with existing word
lixianyu 2:6cd3b0947188 265 return writeWord(devAddr, regAddr, w);
lixianyu 2:6cd3b0947188 266 } else {
lixianyu 2:6cd3b0947188 267 return false;
lixianyu 2:6cd3b0947188 268 }
lixianyu 2:6cd3b0947188 269 }
lixianyu 2:6cd3b0947188 270
lixianyu 2:6cd3b0947188 271 /** Write single byte to an 8-bit device register.
lixianyu 2:6cd3b0947188 272 * @param devAddr I2C slave device address
lixianyu 2:6cd3b0947188 273 * @param regAddr Register address to write to
lixianyu 2:6cd3b0947188 274 * @param data New byte value to write
lixianyu 2:6cd3b0947188 275 * @return Status of operation (true = success)
lixianyu 2:6cd3b0947188 276 */
lixianyu 2:6cd3b0947188 277 bool I2Cdev::writeByte(uint8_t devAddr, uint8_t regAddr, uint8_t data)
lixianyu 2:6cd3b0947188 278 {
lixianyu 2:6cd3b0947188 279 return writeBytes(devAddr, regAddr, 1, &data);
lixianyu 2:6cd3b0947188 280 }
lixianyu 2:6cd3b0947188 281
lixianyu 2:6cd3b0947188 282 /** Write single word to a 16-bit device register.
lixianyu 2:6cd3b0947188 283 * @param devAddr I2C slave device address
lixianyu 2:6cd3b0947188 284 * @param regAddr Register address to write to
lixianyu 2:6cd3b0947188 285 * @param data New word value to write
lixianyu 2:6cd3b0947188 286 * @return Status of operation (true = success)
lixianyu 2:6cd3b0947188 287 */
lixianyu 2:6cd3b0947188 288 bool I2Cdev::writeWord(uint8_t devAddr, uint8_t regAddr, uint16_t data)
lixianyu 2:6cd3b0947188 289 {
lixianyu 2:6cd3b0947188 290 return writeWords(devAddr, regAddr, 1, &data);
lixianyu 2:6cd3b0947188 291 }
lixianyu 2:6cd3b0947188 292
lixianyu 2:6cd3b0947188 293 /** Write multiple bytes to an 8-bit device register.
lixianyu 2:6cd3b0947188 294 * @param devAddr I2C slave device address
lixianyu 2:6cd3b0947188 295 * @param regAddr First register address to write to
lixianyu 2:6cd3b0947188 296 * @param length Number of bytes to write
lixianyu 2:6cd3b0947188 297 * @param data Buffer to copy new data from
lixianyu 2:6cd3b0947188 298 * @return Status of operation (true = success)
lixianyu 2:6cd3b0947188 299 */
lixianyu 2:6cd3b0947188 300 bool I2Cdev::writeBytes(uint8_t devAddr, uint8_t regAddr, uint8_t length, uint8_t* data)
lixianyu 2:6cd3b0947188 301 {
lixianyu 2:6cd3b0947188 302 uint8_t i;
lixianyu 2:6cd3b0947188 303 uint8_t *p = buffer;
lixianyu 2:6cd3b0947188 304
lixianyu 2:6cd3b0947188 305 /* Copy address and data to local buffer for burst write */
lixianyu 2:6cd3b0947188 306 *p++ = regAddr;
lixianyu 2:6cd3b0947188 307 for (i = 0; i < length; i++) {
lixianyu 2:6cd3b0947188 308 *p++ = *data++;
lixianyu 2:6cd3b0947188 309 }
lixianyu 2:6cd3b0947188 310 length++;
lixianyu 2:6cd3b0947188 311 /* Send address and data */
lixianyu 2:6cd3b0947188 312 int status = g_i2c.write(devAddr << 1, (char*)buffer, length, false);
lixianyu 2:6cd3b0947188 313 return status == 0;
lixianyu 2:6cd3b0947188 314 }
lixianyu 2:6cd3b0947188 315
lixianyu 2:6cd3b0947188 316 /** Write multiple words to a 16-bit device register.
lixianyu 2:6cd3b0947188 317 * @param devAddr I2C slave device address
lixianyu 2:6cd3b0947188 318 * @param regAddr First register address to write to
lixianyu 2:6cd3b0947188 319 * @param length Number of words to write
lixianyu 2:6cd3b0947188 320 * @param data Buffer to copy new data from
lixianyu 2:6cd3b0947188 321 * @return Status of operation (true = success)
lixianyu 2:6cd3b0947188 322 */
lixianyu 2:6cd3b0947188 323 bool I2Cdev::writeWords(uint8_t devAddr, uint8_t regAddr, uint8_t length, uint16_t* data)
lixianyu 2:6cd3b0947188 324 {
lixianyu 2:6cd3b0947188 325 uint16_t i;
lixianyu 2:6cd3b0947188 326 uint8_t *p = buffer;
lixianyu 2:6cd3b0947188 327 uint16_t realLen = length * 2;
lixianyu 2:6cd3b0947188 328
lixianyu 2:6cd3b0947188 329 /* Copy address and data to local buffer for burst write */
lixianyu 2:6cd3b0947188 330 *p++ = regAddr;
lixianyu 2:6cd3b0947188 331 for (i = 0; i < realLen; i++) {
lixianyu 2:6cd3b0947188 332 *p++ = *data++;
lixianyu 2:6cd3b0947188 333 }
lixianyu 2:6cd3b0947188 334 realLen++;
lixianyu 2:6cd3b0947188 335 /* Send address and data */
lixianyu 2:6cd3b0947188 336 int status = g_i2c.write(devAddr << 1, (char*)buffer, realLen, false);
lixianyu 2:6cd3b0947188 337 return status == 0;
lixianyu 2:6cd3b0947188 338 }
lixianyu 3:4cd9171ba989 339 #endif