Check program for STM32F303K8 System Clock
Fork of study_step0 by
See
https://os.mbed.com/users/kenjiArai/notebook/nucleo-f303k8-hse-clock/#
sys_clk.cpp@2:68db9770a517, 2017-09-30 (annotated)
- Committer:
- kenjiArai
- Date:
- Sat Sep 30 21:12:20 2017 +0000
- Revision:
- 2:68db9770a517
- Parent:
- 1:e162361e197f
- Child:
- 3:5cba8c19a04b
Add DBG lines
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
kenjiArai | 1:e162361e197f | 1 | /* mbed Microcontroller Library |
kenjiArai | 1:e162361e197f | 2 | * Copyright (c) 2006-2017 ARM Limited |
kenjiArai | 1:e162361e197f | 3 | * |
kenjiArai | 1:e162361e197f | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
kenjiArai | 1:e162361e197f | 5 | * you may not use this file except in compliance with the License. |
kenjiArai | 1:e162361e197f | 6 | * You may obtain a copy of the License at |
kenjiArai | 1:e162361e197f | 7 | * |
kenjiArai | 1:e162361e197f | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
kenjiArai | 1:e162361e197f | 9 | * |
kenjiArai | 1:e162361e197f | 10 | * Unless required by applicable law or agreed to in writing, software |
kenjiArai | 1:e162361e197f | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
kenjiArai | 1:e162361e197f | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
kenjiArai | 1:e162361e197f | 13 | * See the License for the specific language governing permissions and |
kenjiArai | 1:e162361e197f | 14 | * limitations under the License. |
kenjiArai | 1:e162361e197f | 15 | */ |
kenjiArai | 1:e162361e197f | 16 | |
kenjiArai | 1:e162361e197f | 17 | /** |
kenjiArai | 1:e162361e197f | 18 | * This file configures the system clock as follows: |
kenjiArai | 1:e162361e197f | 19 | *----------------------------------------------------------------------------- |
kenjiArai | 1:e162361e197f | 20 | * System clock source | 1- USE_PLL_HSE_EXTC | 3- USE_PLL_HSI |
kenjiArai | 1:e162361e197f | 21 | * | (external 8 MHz clock) | (internal 8 MHz) |
kenjiArai | 1:e162361e197f | 22 | * | 2- USE_PLL_HSE_XTAL | |
kenjiArai | 1:e162361e197f | 23 | * | (external 8 MHz xtal) | |
kenjiArai | 1:e162361e197f | 24 | *----------------------------------------------------------------------------- |
kenjiArai | 1:e162361e197f | 25 | * SYSCLK(MHz) | 72 | 64 |
kenjiArai | 1:e162361e197f | 26 | *----------------------------------------------------------------------------- |
kenjiArai | 1:e162361e197f | 27 | * AHBCLK (MHz) | 72 | 64 |
kenjiArai | 1:e162361e197f | 28 | *----------------------------------------------------------------------------- |
kenjiArai | 1:e162361e197f | 29 | * APB1CLK (MHz) | 36 | 32 |
kenjiArai | 1:e162361e197f | 30 | *----------------------------------------------------------------------------- |
kenjiArai | 1:e162361e197f | 31 | * APB2CLK (MHz) | 72 | 64 |
kenjiArai | 1:e162361e197f | 32 | *----------------------------------------------------------------------------- |
kenjiArai | 1:e162361e197f | 33 | * USB capable | NO | NO |
kenjiArai | 1:e162361e197f | 34 | *----------------------------------------------------------------------------- |
kenjiArai | 1:e162361e197f | 35 | */ |
kenjiArai | 1:e162361e197f | 36 | |
kenjiArai | 1:e162361e197f | 37 | // Original source file -> system_clock.c |
kenjiArai | 1:e162361e197f | 38 | // \targets\TARGET_STM\TARGET_STM32F3\TARGET_STM32F303x8\TARGET_NUCLEO_F303K8 |
kenjiArai | 1:e162361e197f | 39 | // and |
kenjiArai | 1:e162361e197f | 40 | // Original source file -> stm32f3xx_hal_rcc.c |
kenjiArai | 1:e162361e197f | 41 | // \targets\TARGET_STM\TARGET_STM32F3\device\ |
kenjiArai | 1:e162361e197f | 42 | |
kenjiArai | 1:e162361e197f | 43 | // Modified by JH1PJL 2017-9-30 |
kenjiArai | 1:e162361e197f | 44 | |
kenjiArai | 1:e162361e197f | 45 | #include "mbed.h" |
kenjiArai | 1:e162361e197f | 46 | #include "stm32f3xx.h" |
kenjiArai | 1:e162361e197f | 47 | #include "mbed_assert.h" |
kenjiArai | 1:e162361e197f | 48 | |
kenjiArai | 1:e162361e197f | 49 | extern Serial pc; |
kenjiArai | 1:e162361e197f | 50 | extern void cpu_freq(); |
kenjiArai | 1:e162361e197f | 51 | |
kenjiArai | 1:e162361e197f | 52 | //#define DEBUG |
kenjiArai | 1:e162361e197f | 53 | |
kenjiArai | 1:e162361e197f | 54 | #ifdef DEBUG |
kenjiArai | 1:e162361e197f | 55 | #define DBG(...) pc.printf(__VA_ARGS__) |
kenjiArai | 1:e162361e197f | 56 | #else |
kenjiArai | 1:e162361e197f | 57 | #define DBG(...) {;} |
kenjiArai | 1:e162361e197f | 58 | #endif |
kenjiArai | 1:e162361e197f | 59 | |
kenjiArai | 1:e162361e197f | 60 | uint8_t SetSysClock_PLL_HSE(uint8_t bypass); |
kenjiArai | 1:e162361e197f | 61 | uint8_t SetSysClock_PLL_HSI(void); |
kenjiArai | 1:e162361e197f | 62 | HAL_StatusTypeDef HAL_RCC_OscConfig_modify(RCC_OscInitTypeDef *); |
kenjiArai | 1:e162361e197f | 63 | |
kenjiArai | 1:e162361e197f | 64 | /** |
kenjiArai | 1:e162361e197f | 65 | * @brief Configures the System clock source, |
kenjiArai | 1:e162361e197f | 66 | * PLL Multiplier and Divider factors, |
kenjiArai | 1:e162361e197f | 67 | * AHB/APBx prescalers and Flash settings |
kenjiArai | 1:e162361e197f | 68 | * @note This function should be called only once the RCC clock configuration |
kenjiArai | 1:e162361e197f | 69 | * is reset to the default reset state (done in SystemInit() function). |
kenjiArai | 1:e162361e197f | 70 | * @param None |
kenjiArai | 1:e162361e197f | 71 | * @retval None |
kenjiArai | 1:e162361e197f | 72 | */ |
kenjiArai | 1:e162361e197f | 73 | void SetSysClock_HSE_none_Xtal(void) |
kenjiArai | 1:e162361e197f | 74 | { |
kenjiArai | 1:e162361e197f | 75 | /* 1- Try to start with HSE and external clock */ |
kenjiArai | 1:e162361e197f | 76 | if (SetSysClock_PLL_HSE(1) == 0) |
kenjiArai | 1:e162361e197f | 77 | { |
kenjiArai | 1:e162361e197f | 78 | /* 2- If fail start with HSI clock */ |
kenjiArai | 1:e162361e197f | 79 | SetSysClock_PLL_HSI(); |
kenjiArai | 1:e162361e197f | 80 | } |
kenjiArai | 1:e162361e197f | 81 | } |
kenjiArai | 1:e162361e197f | 82 | |
kenjiArai | 1:e162361e197f | 83 | /******************************************************************************/ |
kenjiArai | 1:e162361e197f | 84 | /* PLL (clocked by HSE) used as System clock source */ |
kenjiArai | 1:e162361e197f | 85 | /******************************************************************************/ |
kenjiArai | 1:e162361e197f | 86 | uint8_t SetSysClock_PLL_HSE(uint8_t bypass) |
kenjiArai | 1:e162361e197f | 87 | { |
kenjiArai | 1:e162361e197f | 88 | RCC_ClkInitTypeDef RCC_ClkInitStruct; |
kenjiArai | 1:e162361e197f | 89 | RCC_OscInitTypeDef RCC_OscInitStruct; |
kenjiArai | 1:e162361e197f | 90 | |
kenjiArai | 1:e162361e197f | 91 | DBG("%u:\r\n", __LINE__); |
kenjiArai | 1:e162361e197f | 92 | /* Enable HSE oscillator and activate PLL with HSE as source */ |
kenjiArai | 1:e162361e197f | 93 | RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; |
kenjiArai | 1:e162361e197f | 94 | if (bypass == 0) { |
kenjiArai | 1:e162361e197f | 95 | /* External 8 MHz xtal on OSC_IN/OSC_OUT */ |
kenjiArai | 1:e162361e197f | 96 | RCC_OscInitStruct.HSEState = RCC_HSE_ON; |
kenjiArai | 1:e162361e197f | 97 | DBG("%u:\r\n", __LINE__); |
kenjiArai | 1:e162361e197f | 98 | } else { |
kenjiArai | 1:e162361e197f | 99 | /* External 8 MHz clock on OSC_IN */ |
kenjiArai | 1:e162361e197f | 100 | RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; |
kenjiArai | 1:e162361e197f | 101 | DBG("%u:\r\n", __LINE__); |
kenjiArai | 1:e162361e197f | 102 | } |
kenjiArai | 1:e162361e197f | 103 | RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; |
kenjiArai | 1:e162361e197f | 104 | RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; |
kenjiArai | 1:e162361e197f | 105 | RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; |
kenjiArai | 1:e162361e197f | 106 | RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9; // 72 MHz (8 MHz * 9) |
kenjiArai | 1:e162361e197f | 107 | DBG("%u:\r\n", __LINE__); |
kenjiArai | 1:e162361e197f | 108 | #ifndef DEBUG |
kenjiArai | 1:e162361e197f | 109 | if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { |
kenjiArai | 1:e162361e197f | 110 | #else |
kenjiArai | 1:e162361e197f | 111 | if (HAL_RCC_OscConfig_modify(&RCC_OscInitStruct) != HAL_OK) { |
kenjiArai | 1:e162361e197f | 112 | #endif |
kenjiArai | 1:e162361e197f | 113 | DBG("%u:\r\n", __LINE__); |
kenjiArai | 1:e162361e197f | 114 | return 0; // FAIL |
kenjiArai | 1:e162361e197f | 115 | } |
kenjiArai | 1:e162361e197f | 116 | |
kenjiArai | 1:e162361e197f | 117 | /* Select PLL as system clock source and |
kenjiArai | 1:e162361e197f | 118 | configure the HCLK, PCLK1 and PCLK2 clocks dividers */ |
kenjiArai | 1:e162361e197f | 119 | RCC_ClkInitStruct.ClockType = |
kenjiArai | 1:e162361e197f | 120 | (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK |
kenjiArai | 1:e162361e197f | 121 | | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); |
kenjiArai | 1:e162361e197f | 122 | RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; // 72 MHz |
kenjiArai | 1:e162361e197f | 123 | RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 72 MHz |
kenjiArai | 1:e162361e197f | 124 | RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; // 36 MHz |
kenjiArai | 1:e162361e197f | 125 | RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; // 72 MHz |
kenjiArai | 1:e162361e197f | 126 | DBG("%u:\r\n", __LINE__); |
kenjiArai | 1:e162361e197f | 127 | if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) { |
kenjiArai | 1:e162361e197f | 128 | DBG("%u:\r\n", __LINE__); |
kenjiArai | 1:e162361e197f | 129 | return 0; // FAIL |
kenjiArai | 1:e162361e197f | 130 | } |
kenjiArai | 1:e162361e197f | 131 | return 1; // OK |
kenjiArai | 1:e162361e197f | 132 | } |
kenjiArai | 1:e162361e197f | 133 | |
kenjiArai | 1:e162361e197f | 134 | /******************************************************************************/ |
kenjiArai | 1:e162361e197f | 135 | /* Configuration PLL (clocked by HSE) used as System clock source */ |
kenjiArai | 1:e162361e197f | 136 | /******************************************************************************/ |
kenjiArai | 1:e162361e197f | 137 | HAL_StatusTypeDef |
kenjiArai | 1:e162361e197f | 138 | HAL_RCC_OscConfig_modify(RCC_OscInitTypeDef *RCC_OscInitStruct) |
kenjiArai | 1:e162361e197f | 139 | { |
kenjiArai | 1:e162361e197f | 140 | uint32_t tickstart = 0U; |
kenjiArai | 1:e162361e197f | 141 | |
kenjiArai | 1:e162361e197f | 142 | /* Check the parameters */ |
kenjiArai | 1:e162361e197f | 143 | assert_param(RCC_OscInitStruct != NULL); |
kenjiArai | 1:e162361e197f | 144 | assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); |
kenjiArai | 1:e162361e197f | 145 | DBG("%u:\r\n", __LINE__); |
kenjiArai | 1:e162361e197f | 146 | |
kenjiArai | 1:e162361e197f | 147 | /*------------------------------- HSE Configuration ------------------------*/ |
kenjiArai | 1:e162361e197f | 148 | if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) |
kenjiArai | 1:e162361e197f | 149 | == RCC_OSCILLATORTYPE_HSE) |
kenjiArai | 1:e162361e197f | 150 | { |
kenjiArai | 1:e162361e197f | 151 | DBG("%u:\r\n", __LINE__); |
kenjiArai | 1:e162361e197f | 152 | /* Check the parameters */ |
kenjiArai | 1:e162361e197f | 153 | assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); |
kenjiArai | 1:e162361e197f | 154 | |
kenjiArai | 1:e162361e197f | 155 | /* When the HSE is used as system clock or clock source for PLL |
kenjiArai | 1:e162361e197f | 156 | in these cases it is not allowed to be disabled */ |
kenjiArai | 1:e162361e197f | 157 | if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) |
kenjiArai | 1:e162361e197f | 158 | || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) |
kenjiArai | 1:e162361e197f | 159 | && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE))) |
kenjiArai | 1:e162361e197f | 160 | { |
kenjiArai | 1:e162361e197f | 161 | DBG("%u:\r\n", __LINE__); |
kenjiArai | 1:e162361e197f | 162 | if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) |
kenjiArai | 1:e162361e197f | 163 | && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) |
kenjiArai | 1:e162361e197f | 164 | { |
kenjiArai | 1:e162361e197f | 165 | DBG("%u:\r\n", __LINE__); |
kenjiArai | 1:e162361e197f | 166 | return HAL_ERROR; |
kenjiArai | 1:e162361e197f | 167 | } |
kenjiArai | 1:e162361e197f | 168 | } |
kenjiArai | 1:e162361e197f | 169 | else |
kenjiArai | 1:e162361e197f | 170 | { |
kenjiArai | 1:e162361e197f | 171 | DBG("%u:\r\n", __LINE__); |
kenjiArai | 1:e162361e197f | 172 | /* Set the new HSE configuration ---------------------------------------*/ |
kenjiArai | 1:e162361e197f | 173 | __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); |
kenjiArai | 1:e162361e197f | 174 | |
kenjiArai | 1:e162361e197f | 175 | #if defined(RCC_CFGR_PLLSRC_HSI_DIV2) |
kenjiArai | 1:e162361e197f | 176 | DBG("%u:\r\n", __LINE__); |
kenjiArai | 1:e162361e197f | 177 | /* Configure the HSE predivision factor --------------------------------*/ |
kenjiArai | 1:e162361e197f | 178 | __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue); |
kenjiArai | 1:e162361e197f | 179 | #endif /* RCC_CFGR_PLLSRC_HSI_DIV2 */ |
kenjiArai | 1:e162361e197f | 180 | |
kenjiArai | 1:e162361e197f | 181 | /* Check the HSE State */ |
kenjiArai | 1:e162361e197f | 182 | if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF) |
kenjiArai | 1:e162361e197f | 183 | { |
kenjiArai | 1:e162361e197f | 184 | DBG("%u:\r\n", __LINE__); |
kenjiArai | 1:e162361e197f | 185 | // DBG("%u: RCC->CR=0x%x\r\n", __LINE__, RCC->CR); |
kenjiArai | 1:e162361e197f | 186 | /* Get Start Tick */ |
kenjiArai | 1:e162361e197f | 187 | tickstart = HAL_GetTick(); |
kenjiArai | 1:e162361e197f | 188 | |
kenjiArai | 1:e162361e197f | 189 | /* Wait till HSE is ready */ |
kenjiArai | 1:e162361e197f | 190 | while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) |
kenjiArai | 1:e162361e197f | 191 | { |
kenjiArai | 1:e162361e197f | 192 | if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) |
kenjiArai | 1:e162361e197f | 193 | { |
kenjiArai | 1:e162361e197f | 194 | DBG("%u:\r\n", __LINE__); |
kenjiArai | 1:e162361e197f | 195 | return HAL_TIMEOUT; |
kenjiArai | 1:e162361e197f | 196 | } |
kenjiArai | 1:e162361e197f | 197 | } |
kenjiArai | 1:e162361e197f | 198 | // DBG("%u: RCC->CR=0x%x\r\n", __LINE__, RCC->CR); |
kenjiArai | 1:e162361e197f | 199 | } |
kenjiArai | 1:e162361e197f | 200 | else |
kenjiArai | 1:e162361e197f | 201 | { |
kenjiArai | 1:e162361e197f | 202 | DBG("%u:\r\n", __LINE__); |
kenjiArai | 1:e162361e197f | 203 | /* Get Start Tick */ |
kenjiArai | 1:e162361e197f | 204 | tickstart = HAL_GetTick(); |
kenjiArai | 1:e162361e197f | 205 | |
kenjiArai | 1:e162361e197f | 206 | /* Wait till HSE is disabled */ |
kenjiArai | 1:e162361e197f | 207 | while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) |
kenjiArai | 1:e162361e197f | 208 | { |
kenjiArai | 1:e162361e197f | 209 | if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) |
kenjiArai | 1:e162361e197f | 210 | { |
kenjiArai | 1:e162361e197f | 211 | DBG("%u:\r\n", __LINE__); |
kenjiArai | 1:e162361e197f | 212 | return HAL_TIMEOUT; |
kenjiArai | 1:e162361e197f | 213 | } |
kenjiArai | 1:e162361e197f | 214 | } |
kenjiArai | 1:e162361e197f | 215 | } |
kenjiArai | 1:e162361e197f | 216 | } |
kenjiArai | 1:e162361e197f | 217 | } |
kenjiArai | 1:e162361e197f | 218 | /*-------------------------------- PLL Configuration -----------------------*/ |
kenjiArai | 1:e162361e197f | 219 | /* Check the parameters */ |
kenjiArai | 1:e162361e197f | 220 | assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); |
kenjiArai | 1:e162361e197f | 221 | if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) |
kenjiArai | 1:e162361e197f | 222 | { |
kenjiArai | 1:e162361e197f | 223 | DBG("%u:\r\n", __LINE__); |
kenjiArai | 1:e162361e197f | 224 | /* Check if the PLL is used as system clock or not */ |
kenjiArai | 1:e162361e197f | 225 | if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) |
kenjiArai | 1:e162361e197f | 226 | { |
kenjiArai | 1:e162361e197f | 227 | DBG("%u:\r\n", __LINE__); |
kenjiArai | 2:68db9770a517 | 228 | if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) |
kenjiArai | 2:68db9770a517 | 229 | { |
kenjiArai | 2:68db9770a517 | 230 | DBG("%u:\r\n", __LINE__); |
kenjiArai | 2:68db9770a517 | 231 | /* Check the parameters */ |
kenjiArai | 2:68db9770a517 | 232 | assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource)); |
kenjiArai | 2:68db9770a517 | 233 | assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL)); |
kenjiArai | 2:68db9770a517 | 234 | #if defined(RCC_CFGR_PLLSRC_HSI_PREDIV) |
kenjiArai | 2:68db9770a517 | 235 | assert_param(IS_RCC_PREDIV(RCC_OscInitStruct->PLL.PREDIV)); |
kenjiArai | 2:68db9770a517 | 236 | #endif |
kenjiArai | 2:68db9770a517 | 237 | |
kenjiArai | 2:68db9770a517 | 238 | /* Disable the main PLL. */ |
kenjiArai | 2:68db9770a517 | 239 | __HAL_RCC_PLL_DISABLE(); |
kenjiArai | 2:68db9770a517 | 240 | |
kenjiArai | 2:68db9770a517 | 241 | /* Get Start Tick */ |
kenjiArai | 2:68db9770a517 | 242 | tickstart = HAL_GetTick(); |
kenjiArai | 2:68db9770a517 | 243 | |
kenjiArai | 2:68db9770a517 | 244 | /* Wait till PLL is disabled */ |
kenjiArai | 2:68db9770a517 | 245 | while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) |
kenjiArai | 2:68db9770a517 | 246 | { |
kenjiArai | 2:68db9770a517 | 247 | DBG("%u:\r\n", __LINE__); |
kenjiArai | 2:68db9770a517 | 248 | if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) |
kenjiArai | 2:68db9770a517 | 249 | { |
kenjiArai | 2:68db9770a517 | 250 | DBG("%u:\r\n", __LINE__); |
kenjiArai | 2:68db9770a517 | 251 | return HAL_TIMEOUT; |
kenjiArai | 2:68db9770a517 | 252 | } |
kenjiArai | 2:68db9770a517 | 253 | } |
kenjiArai | 1:e162361e197f | 254 | |
kenjiArai | 2:68db9770a517 | 255 | #if defined(RCC_CFGR_PLLSRC_HSI_PREDIV) |
kenjiArai | 2:68db9770a517 | 256 | DBG("%u:\r\n", __LINE__); |
kenjiArai | 2:68db9770a517 | 257 | /* Configure the main PLL clock source, |
kenjiArai | 2:68db9770a517 | 258 | predivider and multiplication factor. */ |
kenjiArai | 2:68db9770a517 | 259 | __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, |
kenjiArai | 2:68db9770a517 | 260 | RCC_OscInitStruct->PLL.PREDIV, |
kenjiArai | 2:68db9770a517 | 261 | RCC_OscInitStruct->PLL.PLLMUL); |
kenjiArai | 2:68db9770a517 | 262 | #else |
kenjiArai | 2:68db9770a517 | 263 | DBG("%u:\r\n", __LINE__); |
kenjiArai | 2:68db9770a517 | 264 | /* Configure the main PLL clock source and multiplication factor. */ |
kenjiArai | 2:68db9770a517 | 265 | __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, |
kenjiArai | 2:68db9770a517 | 266 | RCC_OscInitStruct->PLL.PLLMUL); |
kenjiArai | 2:68db9770a517 | 267 | #endif /* RCC_CFGR_PLLSRC_HSI_PREDIV */ |
kenjiArai | 2:68db9770a517 | 268 | //?????????????????????????????????????????????????????????????????? |
kenjiArai | 2:68db9770a517 | 269 | // YOU CANNOT USE DEBUG CODE "DBG("%u:\r\n", __LINE__);" |
kenjiArai | 2:68db9770a517 | 270 | // BECAUSE CLOCK WILL CHANGE AND UART CLOCK IS DIFFERENT |
kenjiArai | 2:68db9770a517 | 271 | |
kenjiArai | 2:68db9770a517 | 272 | /* Enable the main PLL. */ |
kenjiArai | 2:68db9770a517 | 273 | __HAL_RCC_PLL_ENABLE(); |
kenjiArai | 2:68db9770a517 | 274 | |
kenjiArai | 2:68db9770a517 | 275 | /* Get Start Tick */ |
kenjiArai | 2:68db9770a517 | 276 | tickstart = HAL_GetTick(); |
kenjiArai | 1:e162361e197f | 277 | |
kenjiArai | 2:68db9770a517 | 278 | /* Wait till PLL is ready */ |
kenjiArai | 2:68db9770a517 | 279 | while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) |
kenjiArai | 2:68db9770a517 | 280 | { |
kenjiArai | 2:68db9770a517 | 281 | if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) |
kenjiArai | 2:68db9770a517 | 282 | { |
kenjiArai | 2:68db9770a517 | 283 | return HAL_TIMEOUT; |
kenjiArai | 2:68db9770a517 | 284 | } |
kenjiArai | 2:68db9770a517 | 285 | } |
kenjiArai | 2:68db9770a517 | 286 | //?????????????????????????????????????????????????????????????????? |
kenjiArai | 1:e162361e197f | 287 | } |
kenjiArai | 2:68db9770a517 | 288 | else |
kenjiArai | 1:e162361e197f | 289 | { |
kenjiArai | 2:68db9770a517 | 290 | DBG("%u:\r\n", __LINE__); |
kenjiArai | 2:68db9770a517 | 291 | /* Disable the main PLL. */ |
kenjiArai | 2:68db9770a517 | 292 | __HAL_RCC_PLL_DISABLE(); |
kenjiArai | 2:68db9770a517 | 293 | |
kenjiArai | 2:68db9770a517 | 294 | /* Get Start Tick */ |
kenjiArai | 2:68db9770a517 | 295 | tickstart = HAL_GetTick(); |
kenjiArai | 2:68db9770a517 | 296 | |
kenjiArai | 2:68db9770a517 | 297 | /* Wait till PLL is disabled */ |
kenjiArai | 2:68db9770a517 | 298 | while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) |
kenjiArai | 2:68db9770a517 | 299 | { |
kenjiArai | 2:68db9770a517 | 300 | if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) |
kenjiArai | 2:68db9770a517 | 301 | { |
kenjiArai | 2:68db9770a517 | 302 | DBG("%u:\r\n", __LINE__); |
kenjiArai | 2:68db9770a517 | 303 | return HAL_TIMEOUT; |
kenjiArai | 2:68db9770a517 | 304 | } |
kenjiArai | 2:68db9770a517 | 305 | } |
kenjiArai | 1:e162361e197f | 306 | } |
kenjiArai | 1:e162361e197f | 307 | } |
kenjiArai | 1:e162361e197f | 308 | else |
kenjiArai | 1:e162361e197f | 309 | { |
kenjiArai | 2:68db9770a517 | 310 | DBG("%u:\r\n", __LINE__); |
kenjiArai | 1:e162361e197f | 311 | return HAL_ERROR; |
kenjiArai | 1:e162361e197f | 312 | } |
kenjiArai | 1:e162361e197f | 313 | } |
kenjiArai | 1:e162361e197f | 314 | return HAL_OK; |
kenjiArai | 1:e162361e197f | 315 | } |
kenjiArai | 1:e162361e197f | 316 | |
kenjiArai | 1:e162361e197f | 317 | /******************************************************************************/ |
kenjiArai | 1:e162361e197f | 318 | /* PLL (clocked by HSI) used as System clock source */ |
kenjiArai | 1:e162361e197f | 319 | /******************************************************************************/ |
kenjiArai | 1:e162361e197f | 320 | uint8_t SetSysClock_PLL_HSI(void) |
kenjiArai | 1:e162361e197f | 321 | { |
kenjiArai | 1:e162361e197f | 322 | RCC_ClkInitTypeDef RCC_ClkInitStruct; |
kenjiArai | 1:e162361e197f | 323 | RCC_OscInitTypeDef RCC_OscInitStruct; |
kenjiArai | 1:e162361e197f | 324 | |
kenjiArai | 1:e162361e197f | 325 | /* Enable HSI oscillator and activate PLL with HSI as source */ |
kenjiArai | 1:e162361e197f | 326 | RCC_OscInitStruct.OscillatorType = |
kenjiArai | 1:e162361e197f | 327 | RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE; |
kenjiArai | 1:e162361e197f | 328 | RCC_OscInitStruct.HSIState = RCC_HSI_ON; |
kenjiArai | 1:e162361e197f | 329 | RCC_OscInitStruct.HSEState = RCC_HSE_OFF; |
kenjiArai | 1:e162361e197f | 330 | RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; |
kenjiArai | 1:e162361e197f | 331 | RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; |
kenjiArai | 1:e162361e197f | 332 | RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; |
kenjiArai | 1:e162361e197f | 333 | RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL16; // 64 MHz(8MHz/2*16) |
kenjiArai | 1:e162361e197f | 334 | if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { |
kenjiArai | 1:e162361e197f | 335 | return 0; // FAIL |
kenjiArai | 1:e162361e197f | 336 | } |
kenjiArai | 1:e162361e197f | 337 | |
kenjiArai | 1:e162361e197f | 338 | /* Select PLL as system clock source and |
kenjiArai | 1:e162361e197f | 339 | configure the HCLK, PCLK1 and PCLK2 clocks dividers */ |
kenjiArai | 1:e162361e197f | 340 | RCC_ClkInitStruct.ClockType = |
kenjiArai | 1:e162361e197f | 341 | (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK |
kenjiArai | 1:e162361e197f | 342 | | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); |
kenjiArai | 1:e162361e197f | 343 | RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; // 64 MHz |
kenjiArai | 1:e162361e197f | 344 | RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 64 MHz |
kenjiArai | 1:e162361e197f | 345 | RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; // 32 MHz |
kenjiArai | 1:e162361e197f | 346 | RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; // 64 MHz |
kenjiArai | 1:e162361e197f | 347 | if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) { |
kenjiArai | 1:e162361e197f | 348 | return 0; // FAIL |
kenjiArai | 1:e162361e197f | 349 | } |
kenjiArai | 1:e162361e197f | 350 | return 1; // OK |
kenjiArai | 1:e162361e197f | 351 | } |
kenjiArai | 1:e162361e197f | 352 | |
kenjiArai | 1:e162361e197f | 353 | //*************************************************************************************************************************************************************** |
kenjiArai | 1:e162361e197f | 354 | // Following source codes are in mbed-os latest version as of 2017-09-30 |
kenjiArai | 1:e162361e197f | 355 | //*************************************************************************************************************************************************************** |
kenjiArai | 1:e162361e197f | 356 | //------------------------------------------------------------------------------ |
kenjiArai | 1:e162361e197f | 357 | // Original source file -> stm32f3xx_hal_rcc.c |
kenjiArai | 1:e162361e197f | 358 | // \targets\TARGET_STM\TARGET_STM32F3\device\ |
kenjiArai | 1:e162361e197f | 359 | #if 0 |
kenjiArai | 1:e162361e197f | 360 | #if 0 |
kenjiArai | 1:e162361e197f | 361 | HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) |
kenjiArai | 1:e162361e197f | 362 | { |
kenjiArai | 1:e162361e197f | 363 | uint32_t tickstart = 0U; |
kenjiArai | 1:e162361e197f | 364 | |
kenjiArai | 1:e162361e197f | 365 | /* Check the parameters */ |
kenjiArai | 1:e162361e197f | 366 | assert_param(RCC_OscInitStruct != NULL); |
kenjiArai | 1:e162361e197f | 367 | assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); |
kenjiArai | 1:e162361e197f | 368 | |
kenjiArai | 1:e162361e197f | 369 | /*------------------------------- HSE Configuration ------------------------*/ |
kenjiArai | 1:e162361e197f | 370 | if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) |
kenjiArai | 1:e162361e197f | 371 | { |
kenjiArai | 1:e162361e197f | 372 | /* Check the parameters */ |
kenjiArai | 1:e162361e197f | 373 | assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); |
kenjiArai | 1:e162361e197f | 374 | |
kenjiArai | 1:e162361e197f | 375 | /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */ |
kenjiArai | 1:e162361e197f | 376 | if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) |
kenjiArai | 1:e162361e197f | 377 | || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE))) |
kenjiArai | 1:e162361e197f | 378 | { |
kenjiArai | 1:e162361e197f | 379 | if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) |
kenjiArai | 1:e162361e197f | 380 | { |
kenjiArai | 1:e162361e197f | 381 | return HAL_ERROR; |
kenjiArai | 1:e162361e197f | 382 | } |
kenjiArai | 1:e162361e197f | 383 | } |
kenjiArai | 1:e162361e197f | 384 | else |
kenjiArai | 1:e162361e197f | 385 | { |
kenjiArai | 1:e162361e197f | 386 | /* Set the new HSE configuration ---------------------------------------*/ |
kenjiArai | 1:e162361e197f | 387 | __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); |
kenjiArai | 1:e162361e197f | 388 | |
kenjiArai | 1:e162361e197f | 389 | #if defined(RCC_CFGR_PLLSRC_HSI_DIV2) |
kenjiArai | 1:e162361e197f | 390 | /* Configure the HSE predivision factor --------------------------------*/ |
kenjiArai | 1:e162361e197f | 391 | __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue); |
kenjiArai | 1:e162361e197f | 392 | #endif /* RCC_CFGR_PLLSRC_HSI_DIV2 */ |
kenjiArai | 1:e162361e197f | 393 | |
kenjiArai | 1:e162361e197f | 394 | /* Check the HSE State */ |
kenjiArai | 1:e162361e197f | 395 | if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF) |
kenjiArai | 1:e162361e197f | 396 | { |
kenjiArai | 1:e162361e197f | 397 | /* Get Start Tick */ |
kenjiArai | 1:e162361e197f | 398 | tickstart = HAL_GetTick(); |
kenjiArai | 1:e162361e197f | 399 | |
kenjiArai | 1:e162361e197f | 400 | /* Wait till HSE is ready */ |
kenjiArai | 1:e162361e197f | 401 | while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) |
kenjiArai | 1:e162361e197f | 402 | { |
kenjiArai | 1:e162361e197f | 403 | if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) |
kenjiArai | 1:e162361e197f | 404 | { |
kenjiArai | 1:e162361e197f | 405 | return HAL_TIMEOUT; |
kenjiArai | 1:e162361e197f | 406 | } |
kenjiArai | 1:e162361e197f | 407 | } |
kenjiArai | 1:e162361e197f | 408 | } |
kenjiArai | 1:e162361e197f | 409 | else |
kenjiArai | 1:e162361e197f | 410 | { |
kenjiArai | 1:e162361e197f | 411 | /* Get Start Tick */ |
kenjiArai | 1:e162361e197f | 412 | tickstart = HAL_GetTick(); |
kenjiArai | 1:e162361e197f | 413 | |
kenjiArai | 1:e162361e197f | 414 | /* Wait till HSE is disabled */ |
kenjiArai | 1:e162361e197f | 415 | while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) |
kenjiArai | 1:e162361e197f | 416 | { |
kenjiArai | 1:e162361e197f | 417 | if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) |
kenjiArai | 1:e162361e197f | 418 | { |
kenjiArai | 1:e162361e197f | 419 | return HAL_TIMEOUT; |
kenjiArai | 1:e162361e197f | 420 | } |
kenjiArai | 1:e162361e197f | 421 | } |
kenjiArai | 1:e162361e197f | 422 | } |
kenjiArai | 1:e162361e197f | 423 | } |
kenjiArai | 1:e162361e197f | 424 | } |
kenjiArai | 1:e162361e197f | 425 | /*----------------------------- HSI Configuration --------------------------*/ |
kenjiArai | 1:e162361e197f | 426 | if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) |
kenjiArai | 1:e162361e197f | 427 | { |
kenjiArai | 1:e162361e197f | 428 | /* Check the parameters */ |
kenjiArai | 1:e162361e197f | 429 | assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); |
kenjiArai | 1:e162361e197f | 430 | assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); |
kenjiArai | 1:e162361e197f | 431 | |
kenjiArai | 1:e162361e197f | 432 | /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */ |
kenjiArai | 1:e162361e197f | 433 | if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) |
kenjiArai | 1:e162361e197f | 434 | || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI))) |
kenjiArai | 1:e162361e197f | 435 | { |
kenjiArai | 1:e162361e197f | 436 | /* When HSI is used as system clock it will not disabled */ |
kenjiArai | 1:e162361e197f | 437 | if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) |
kenjiArai | 1:e162361e197f | 438 | { |
kenjiArai | 1:e162361e197f | 439 | return HAL_ERROR; |
kenjiArai | 1:e162361e197f | 440 | } |
kenjiArai | 1:e162361e197f | 441 | /* Otherwise, just the calibration is allowed */ |
kenjiArai | 1:e162361e197f | 442 | else |
kenjiArai | 1:e162361e197f | 443 | { |
kenjiArai | 1:e162361e197f | 444 | /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ |
kenjiArai | 1:e162361e197f | 445 | __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); |
kenjiArai | 1:e162361e197f | 446 | } |
kenjiArai | 1:e162361e197f | 447 | } |
kenjiArai | 1:e162361e197f | 448 | else |
kenjiArai | 1:e162361e197f | 449 | { |
kenjiArai | 1:e162361e197f | 450 | /* Check the HSI State */ |
kenjiArai | 1:e162361e197f | 451 | if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF) |
kenjiArai | 1:e162361e197f | 452 | { |
kenjiArai | 1:e162361e197f | 453 | /* Enable the Internal High Speed oscillator (HSI). */ |
kenjiArai | 1:e162361e197f | 454 | __HAL_RCC_HSI_ENABLE(); |
kenjiArai | 1:e162361e197f | 455 | |
kenjiArai | 1:e162361e197f | 456 | /* Get Start Tick */ |
kenjiArai | 1:e162361e197f | 457 | tickstart = HAL_GetTick(); |
kenjiArai | 1:e162361e197f | 458 | |
kenjiArai | 1:e162361e197f | 459 | /* Wait till HSI is ready */ |
kenjiArai | 1:e162361e197f | 460 | while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) |
kenjiArai | 1:e162361e197f | 461 | { |
kenjiArai | 1:e162361e197f | 462 | if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) |
kenjiArai | 1:e162361e197f | 463 | { |
kenjiArai | 1:e162361e197f | 464 | return HAL_TIMEOUT; |
kenjiArai | 1:e162361e197f | 465 | } |
kenjiArai | 1:e162361e197f | 466 | } |
kenjiArai | 1:e162361e197f | 467 | |
kenjiArai | 1:e162361e197f | 468 | /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ |
kenjiArai | 1:e162361e197f | 469 | __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); |
kenjiArai | 1:e162361e197f | 470 | } |
kenjiArai | 1:e162361e197f | 471 | else |
kenjiArai | 1:e162361e197f | 472 | { |
kenjiArai | 1:e162361e197f | 473 | /* Disable the Internal High Speed oscillator (HSI). */ |
kenjiArai | 1:e162361e197f | 474 | __HAL_RCC_HSI_DISABLE(); |
kenjiArai | 1:e162361e197f | 475 | |
kenjiArai | 1:e162361e197f | 476 | /* Get Start Tick */ |
kenjiArai | 1:e162361e197f | 477 | tickstart = HAL_GetTick(); |
kenjiArai | 1:e162361e197f | 478 | |
kenjiArai | 1:e162361e197f | 479 | /* Wait till HSI is disabled */ |
kenjiArai | 1:e162361e197f | 480 | while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) |
kenjiArai | 1:e162361e197f | 481 | { |
kenjiArai | 1:e162361e197f | 482 | if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) |
kenjiArai | 1:e162361e197f | 483 | { |
kenjiArai | 1:e162361e197f | 484 | return HAL_TIMEOUT; |
kenjiArai | 1:e162361e197f | 485 | } |
kenjiArai | 1:e162361e197f | 486 | } |
kenjiArai | 1:e162361e197f | 487 | } |
kenjiArai | 1:e162361e197f | 488 | } |
kenjiArai | 1:e162361e197f | 489 | } |
kenjiArai | 1:e162361e197f | 490 | /*------------------------------ LSI Configuration -------------------------*/ |
kenjiArai | 1:e162361e197f | 491 | if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) |
kenjiArai | 1:e162361e197f | 492 | { |
kenjiArai | 1:e162361e197f | 493 | /* Check the parameters */ |
kenjiArai | 1:e162361e197f | 494 | assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); |
kenjiArai | 1:e162361e197f | 495 | |
kenjiArai | 1:e162361e197f | 496 | /* Check the LSI State */ |
kenjiArai | 1:e162361e197f | 497 | if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF) |
kenjiArai | 1:e162361e197f | 498 | { |
kenjiArai | 1:e162361e197f | 499 | /* Enable the Internal Low Speed oscillator (LSI). */ |
kenjiArai | 1:e162361e197f | 500 | __HAL_RCC_LSI_ENABLE(); |
kenjiArai | 1:e162361e197f | 501 | |
kenjiArai | 1:e162361e197f | 502 | /* Get Start Tick */ |
kenjiArai | 1:e162361e197f | 503 | tickstart = HAL_GetTick(); |
kenjiArai | 1:e162361e197f | 504 | |
kenjiArai | 1:e162361e197f | 505 | /* Wait till LSI is ready */ |
kenjiArai | 1:e162361e197f | 506 | while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) |
kenjiArai | 1:e162361e197f | 507 | { |
kenjiArai | 1:e162361e197f | 508 | if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) |
kenjiArai | 1:e162361e197f | 509 | { |
kenjiArai | 1:e162361e197f | 510 | return HAL_TIMEOUT; |
kenjiArai | 1:e162361e197f | 511 | } |
kenjiArai | 1:e162361e197f | 512 | } |
kenjiArai | 1:e162361e197f | 513 | } |
kenjiArai | 1:e162361e197f | 514 | else |
kenjiArai | 1:e162361e197f | 515 | { |
kenjiArai | 1:e162361e197f | 516 | /* Disable the Internal Low Speed oscillator (LSI). */ |
kenjiArai | 1:e162361e197f | 517 | __HAL_RCC_LSI_DISABLE(); |
kenjiArai | 1:e162361e197f | 518 | |
kenjiArai | 1:e162361e197f | 519 | /* Get Start Tick */ |
kenjiArai | 1:e162361e197f | 520 | tickstart = HAL_GetTick(); |
kenjiArai | 1:e162361e197f | 521 | |
kenjiArai | 1:e162361e197f | 522 | /* Wait till LSI is disabled */ |
kenjiArai | 1:e162361e197f | 523 | while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) |
kenjiArai | 1:e162361e197f | 524 | { |
kenjiArai | 1:e162361e197f | 525 | if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) |
kenjiArai | 1:e162361e197f | 526 | { |
kenjiArai | 1:e162361e197f | 527 | return HAL_TIMEOUT; |
kenjiArai | 1:e162361e197f | 528 | } |
kenjiArai | 1:e162361e197f | 529 | } |
kenjiArai | 1:e162361e197f | 530 | } |
kenjiArai | 1:e162361e197f | 531 | } |
kenjiArai | 1:e162361e197f | 532 | /*------------------------------ LSE Configuration -------------------------*/ |
kenjiArai | 1:e162361e197f | 533 | if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) |
kenjiArai | 1:e162361e197f | 534 | { |
kenjiArai | 1:e162361e197f | 535 | FlagStatus pwrclkchanged = RESET; |
kenjiArai | 1:e162361e197f | 536 | |
kenjiArai | 1:e162361e197f | 537 | /* Check the parameters */ |
kenjiArai | 1:e162361e197f | 538 | assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); |
kenjiArai | 1:e162361e197f | 539 | |
kenjiArai | 1:e162361e197f | 540 | /* Update LSE configuration in Backup Domain control register */ |
kenjiArai | 1:e162361e197f | 541 | /* Requires to enable write access to Backup Domain of necessary */ |
kenjiArai | 1:e162361e197f | 542 | if(__HAL_RCC_PWR_IS_CLK_DISABLED()) |
kenjiArai | 1:e162361e197f | 543 | { |
kenjiArai | 1:e162361e197f | 544 | __HAL_RCC_PWR_CLK_ENABLE(); |
kenjiArai | 1:e162361e197f | 545 | pwrclkchanged = SET; |
kenjiArai | 1:e162361e197f | 546 | } |
kenjiArai | 1:e162361e197f | 547 | |
kenjiArai | 1:e162361e197f | 548 | if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) |
kenjiArai | 1:e162361e197f | 549 | { |
kenjiArai | 1:e162361e197f | 550 | /* Enable write access to Backup domain */ |
kenjiArai | 1:e162361e197f | 551 | SET_BIT(PWR->CR, PWR_CR_DBP); |
kenjiArai | 1:e162361e197f | 552 | |
kenjiArai | 1:e162361e197f | 553 | /* Wait for Backup domain Write protection disable */ |
kenjiArai | 1:e162361e197f | 554 | tickstart = HAL_GetTick(); |
kenjiArai | 1:e162361e197f | 555 | |
kenjiArai | 1:e162361e197f | 556 | while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) |
kenjiArai | 1:e162361e197f | 557 | { |
kenjiArai | 1:e162361e197f | 558 | if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) |
kenjiArai | 1:e162361e197f | 559 | { |
kenjiArai | 1:e162361e197f | 560 | return HAL_TIMEOUT; |
kenjiArai | 1:e162361e197f | 561 | } |
kenjiArai | 1:e162361e197f | 562 | } |
kenjiArai | 1:e162361e197f | 563 | } |
kenjiArai | 1:e162361e197f | 564 | |
kenjiArai | 1:e162361e197f | 565 | /* Set the new LSE configuration -----------------------------------------*/ |
kenjiArai | 1:e162361e197f | 566 | __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); |
kenjiArai | 1:e162361e197f | 567 | /* Check the LSE State */ |
kenjiArai | 1:e162361e197f | 568 | if(RCC_OscInitStruct->LSEState != RCC_LSE_OFF) |
kenjiArai | 1:e162361e197f | 569 | { |
kenjiArai | 1:e162361e197f | 570 | /* Get Start Tick */ |
kenjiArai | 1:e162361e197f | 571 | tickstart = HAL_GetTick(); |
kenjiArai | 1:e162361e197f | 572 | |
kenjiArai | 1:e162361e197f | 573 | /* Wait till LSE is ready */ |
kenjiArai | 1:e162361e197f | 574 | while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) |
kenjiArai | 1:e162361e197f | 575 | { |
kenjiArai | 1:e162361e197f | 576 | if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) |
kenjiArai | 1:e162361e197f | 577 | { |
kenjiArai | 1:e162361e197f | 578 | return HAL_TIMEOUT; |
kenjiArai | 1:e162361e197f | 579 | } |
kenjiArai | 1:e162361e197f | 580 | } |
kenjiArai | 1:e162361e197f | 581 | } |
kenjiArai | 1:e162361e197f | 582 | else |
kenjiArai | 1:e162361e197f | 583 | { |
kenjiArai | 1:e162361e197f | 584 | /* Get Start Tick */ |
kenjiArai | 1:e162361e197f | 585 | tickstart = HAL_GetTick(); |
kenjiArai | 1:e162361e197f | 586 | |
kenjiArai | 1:e162361e197f | 587 | /* Wait till LSE is disabled */ |
kenjiArai | 1:e162361e197f | 588 | while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) |
kenjiArai | 1:e162361e197f | 589 | { |
kenjiArai | 1:e162361e197f | 590 | if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) |
kenjiArai | 1:e162361e197f | 591 | { |
kenjiArai | 1:e162361e197f | 592 | return HAL_TIMEOUT; |
kenjiArai | 1:e162361e197f | 593 | } |
kenjiArai | 1:e162361e197f | 594 | } |
kenjiArai | 1:e162361e197f | 595 | } |
kenjiArai | 1:e162361e197f | 596 | |
kenjiArai | 1:e162361e197f | 597 | /* Require to disable power clock if necessary */ |
kenjiArai | 1:e162361e197f | 598 | if(pwrclkchanged == SET) |
kenjiArai | 1:e162361e197f | 599 | { |
kenjiArai | 1:e162361e197f | 600 | __HAL_RCC_PWR_CLK_DISABLE(); |
kenjiArai | 1:e162361e197f | 601 | } |
kenjiArai | 1:e162361e197f | 602 | } |
kenjiArai | 1:e162361e197f | 603 | |
kenjiArai | 1:e162361e197f | 604 | /*-------------------------------- PLL Configuration -----------------------*/ |
kenjiArai | 1:e162361e197f | 605 | /* Check the parameters */ |
kenjiArai | 1:e162361e197f | 606 | assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); |
kenjiArai | 1:e162361e197f | 607 | if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) |
kenjiArai | 1:e162361e197f | 608 | { |
kenjiArai | 1:e162361e197f | 609 | /* Check if the PLL is used as system clock or not */ |
kenjiArai | 1:e162361e197f | 610 | if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) |
kenjiArai | 1:e162361e197f | 611 | { |
kenjiArai | 1:e162361e197f | 612 | if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) |
kenjiArai | 1:e162361e197f | 613 | { |
kenjiArai | 1:e162361e197f | 614 | /* Check the parameters */ |
kenjiArai | 1:e162361e197f | 615 | assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource)); |
kenjiArai | 1:e162361e197f | 616 | assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL)); |
kenjiArai | 1:e162361e197f | 617 | #if defined(RCC_CFGR_PLLSRC_HSI_PREDIV) |
kenjiArai | 1:e162361e197f | 618 | assert_param(IS_RCC_PREDIV(RCC_OscInitStruct->PLL.PREDIV)); |
kenjiArai | 1:e162361e197f | 619 | #endif |
kenjiArai | 1:e162361e197f | 620 | |
kenjiArai | 1:e162361e197f | 621 | /* Disable the main PLL. */ |
kenjiArai | 1:e162361e197f | 622 | __HAL_RCC_PLL_DISABLE(); |
kenjiArai | 1:e162361e197f | 623 | |
kenjiArai | 1:e162361e197f | 624 | /* Get Start Tick */ |
kenjiArai | 1:e162361e197f | 625 | tickstart = HAL_GetTick(); |
kenjiArai | 1:e162361e197f | 626 | |
kenjiArai | 1:e162361e197f | 627 | /* Wait till PLL is disabled */ |
kenjiArai | 1:e162361e197f | 628 | while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) |
kenjiArai | 1:e162361e197f | 629 | { |
kenjiArai | 1:e162361e197f | 630 | if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) |
kenjiArai | 1:e162361e197f | 631 | { |
kenjiArai | 1:e162361e197f | 632 | return HAL_TIMEOUT; |
kenjiArai | 1:e162361e197f | 633 | } |
kenjiArai | 1:e162361e197f | 634 | } |
kenjiArai | 1:e162361e197f | 635 | |
kenjiArai | 1:e162361e197f | 636 | #if defined(RCC_CFGR_PLLSRC_HSI_PREDIV) |
kenjiArai | 1:e162361e197f | 637 | /* Configure the main PLL clock source, predivider and multiplication factor. */ |
kenjiArai | 1:e162361e197f | 638 | __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, |
kenjiArai | 1:e162361e197f | 639 | RCC_OscInitStruct->PLL.PREDIV, |
kenjiArai | 1:e162361e197f | 640 | RCC_OscInitStruct->PLL.PLLMUL); |
kenjiArai | 1:e162361e197f | 641 | #else |
kenjiArai | 1:e162361e197f | 642 | /* Configure the main PLL clock source and multiplication factor. */ |
kenjiArai | 1:e162361e197f | 643 | __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, |
kenjiArai | 1:e162361e197f | 644 | RCC_OscInitStruct->PLL.PLLMUL); |
kenjiArai | 1:e162361e197f | 645 | #endif /* RCC_CFGR_PLLSRC_HSI_PREDIV */ |
kenjiArai | 1:e162361e197f | 646 | /* Enable the main PLL. */ |
kenjiArai | 1:e162361e197f | 647 | __HAL_RCC_PLL_ENABLE(); |
kenjiArai | 1:e162361e197f | 648 | |
kenjiArai | 1:e162361e197f | 649 | /* Get Start Tick */ |
kenjiArai | 1:e162361e197f | 650 | tickstart = HAL_GetTick(); |
kenjiArai | 1:e162361e197f | 651 | |
kenjiArai | 1:e162361e197f | 652 | /* Wait till PLL is ready */ |
kenjiArai | 1:e162361e197f | 653 | while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) |
kenjiArai | 1:e162361e197f | 654 | { |
kenjiArai | 1:e162361e197f | 655 | if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) |
kenjiArai | 1:e162361e197f | 656 | { |
kenjiArai | 1:e162361e197f | 657 | return HAL_TIMEOUT; |
kenjiArai | 1:e162361e197f | 658 | } |
kenjiArai | 1:e162361e197f | 659 | } |
kenjiArai | 1:e162361e197f | 660 | } |
kenjiArai | 1:e162361e197f | 661 | else |
kenjiArai | 1:e162361e197f | 662 | { |
kenjiArai | 1:e162361e197f | 663 | /* Disable the main PLL. */ |
kenjiArai | 1:e162361e197f | 664 | __HAL_RCC_PLL_DISABLE(); |
kenjiArai | 1:e162361e197f | 665 | |
kenjiArai | 1:e162361e197f | 666 | /* Get Start Tick */ |
kenjiArai | 1:e162361e197f | 667 | tickstart = HAL_GetTick(); |
kenjiArai | 1:e162361e197f | 668 | |
kenjiArai | 1:e162361e197f | 669 | /* Wait till PLL is disabled */ |
kenjiArai | 1:e162361e197f | 670 | while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) |
kenjiArai | 1:e162361e197f | 671 | { |
kenjiArai | 1:e162361e197f | 672 | if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) |
kenjiArai | 1:e162361e197f | 673 | { |
kenjiArai | 1:e162361e197f | 674 | return HAL_TIMEOUT; |
kenjiArai | 1:e162361e197f | 675 | } |
kenjiArai | 1:e162361e197f | 676 | } |
kenjiArai | 1:e162361e197f | 677 | } |
kenjiArai | 1:e162361e197f | 678 | } |
kenjiArai | 1:e162361e197f | 679 | else |
kenjiArai | 1:e162361e197f | 680 | { |
kenjiArai | 1:e162361e197f | 681 | return HAL_ERROR; |
kenjiArai | 1:e162361e197f | 682 | } |
kenjiArai | 1:e162361e197f | 683 | } |
kenjiArai | 1:e162361e197f | 684 | |
kenjiArai | 1:e162361e197f | 685 | return HAL_OK; |
kenjiArai | 1:e162361e197f | 686 | } |
kenjiArai | 1:e162361e197f | 687 | |
kenjiArai | 1:e162361e197f | 688 | #endif |
kenjiArai | 1:e162361e197f | 689 | |
kenjiArai | 1:e162361e197f | 690 | // Original source file -> system_clock.c |
kenjiArai | 1:e162361e197f | 691 | // \targets\TARGET_STM\TARGET_STM32F3\TARGET_STM32F303x8\TARGET_NUCLEO_F303K8 |
kenjiArai | 1:e162361e197f | 692 | #if 0 |
kenjiArai | 1:e162361e197f | 693 | /* mbed Microcontroller Library |
kenjiArai | 1:e162361e197f | 694 | * Copyright (c) 2006-2017 ARM Limited |
kenjiArai | 1:e162361e197f | 695 | * |
kenjiArai | 1:e162361e197f | 696 | * Licensed under the Apache License, Version 2.0 (the "License"); |
kenjiArai | 1:e162361e197f | 697 | * you may not use this file except in compliance with the License. |
kenjiArai | 1:e162361e197f | 698 | * You may obtain a copy of the License at |
kenjiArai | 1:e162361e197f | 699 | * |
kenjiArai | 1:e162361e197f | 700 | * http://www.apache.org/licenses/LICENSE-2.0 |
kenjiArai | 1:e162361e197f | 701 | * |
kenjiArai | 1:e162361e197f | 702 | * Unless required by applicable law or agreed to in writing, software |
kenjiArai | 1:e162361e197f | 703 | * distributed under the License is distributed on an "AS IS" BASIS, |
kenjiArai | 1:e162361e197f | 704 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
kenjiArai | 1:e162361e197f | 705 | * See the License for the specific language governing permissions and |
kenjiArai | 1:e162361e197f | 706 | * limitations under the License. |
kenjiArai | 1:e162361e197f | 707 | */ |
kenjiArai | 1:e162361e197f | 708 | |
kenjiArai | 1:e162361e197f | 709 | /** |
kenjiArai | 1:e162361e197f | 710 | * This file configures the system clock as follows: |
kenjiArai | 1:e162361e197f | 711 | *----------------------------------------------------------------------------- |
kenjiArai | 1:e162361e197f | 712 | * System clock source | 1- USE_PLL_HSE_EXTC | 3- USE_PLL_HSI |
kenjiArai | 1:e162361e197f | 713 | * | (external 8 MHz clock) | (internal 8 MHz) |
kenjiArai | 1:e162361e197f | 714 | * | 2- USE_PLL_HSE_XTAL | |
kenjiArai | 1:e162361e197f | 715 | * | (external 8 MHz xtal) | |
kenjiArai | 1:e162361e197f | 716 | *----------------------------------------------------------------------------- |
kenjiArai | 1:e162361e197f | 717 | * SYSCLK(MHz) | 72 | 64 |
kenjiArai | 1:e162361e197f | 718 | *----------------------------------------------------------------------------- |
kenjiArai | 1:e162361e197f | 719 | * AHBCLK (MHz) | 72 | 64 |
kenjiArai | 1:e162361e197f | 720 | *----------------------------------------------------------------------------- |
kenjiArai | 1:e162361e197f | 721 | * APB1CLK (MHz) | 36 | 32 |
kenjiArai | 1:e162361e197f | 722 | *----------------------------------------------------------------------------- |
kenjiArai | 1:e162361e197f | 723 | * APB2CLK (MHz) | 72 | 64 |
kenjiArai | 1:e162361e197f | 724 | *----------------------------------------------------------------------------- |
kenjiArai | 1:e162361e197f | 725 | * USB capable | NO | NO |
kenjiArai | 1:e162361e197f | 726 | *----------------------------------------------------------------------------- |
kenjiArai | 1:e162361e197f | 727 | */ |
kenjiArai | 1:e162361e197f | 728 | |
kenjiArai | 1:e162361e197f | 729 | |
kenjiArai | 1:e162361e197f | 730 | #include "stm32f3xx.h" |
kenjiArai | 1:e162361e197f | 731 | #include "mbed_assert.h" |
kenjiArai | 1:e162361e197f | 732 | |
kenjiArai | 1:e162361e197f | 733 | /*!< Uncomment the following line if you need to relocate your vector Table in |
kenjiArai | 1:e162361e197f | 734 | Internal SRAM. */ |
kenjiArai | 1:e162361e197f | 735 | /* #define VECT_TAB_SRAM */ |
kenjiArai | 1:e162361e197f | 736 | #define VECT_TAB_OFFSET 0x0 /*!< Vector Table base offset field. |
kenjiArai | 1:e162361e197f | 737 | This value must be a multiple of 0x200. */ |
kenjiArai | 1:e162361e197f | 738 | |
kenjiArai | 1:e162361e197f | 739 | // clock source is selected with CLOCK_SOURCE in json config |
kenjiArai | 1:e162361e197f | 740 | #define USE_PLL_HSE_EXTC 0x8 // Use external clock (ST Link MCO) |
kenjiArai | 1:e162361e197f | 741 | #define USE_PLL_HSE_XTAL 0x4 // Use external xtal (X3 on board - not provided by default) |
kenjiArai | 1:e162361e197f | 742 | #define USE_PLL_HSI 0x2 // Use HSI internal clock |
kenjiArai | 1:e162361e197f | 743 | |
kenjiArai | 1:e162361e197f | 744 | #if ( ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) ) |
kenjiArai | 1:e162361e197f | 745 | uint8_t SetSysClock_PLL_HSE(uint8_t bypass); |
kenjiArai | 1:e162361e197f | 746 | #endif /* ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) */ |
kenjiArai | 1:e162361e197f | 747 | |
kenjiArai | 1:e162361e197f | 748 | #if ((CLOCK_SOURCE) & USE_PLL_HSI) |
kenjiArai | 1:e162361e197f | 749 | uint8_t SetSysClock_PLL_HSI(void); |
kenjiArai | 1:e162361e197f | 750 | #endif /* ((CLOCK_SOURCE) & USE_PLL_HSI) */ |
kenjiArai | 1:e162361e197f | 751 | |
kenjiArai | 1:e162361e197f | 752 | /** |
kenjiArai | 1:e162361e197f | 753 | * @brief Setup the microcontroller system |
kenjiArai | 1:e162361e197f | 754 | * Initialize the FPU setting, vector table location and the PLL configuration is reset. |
kenjiArai | 1:e162361e197f | 755 | * @param None |
kenjiArai | 1:e162361e197f | 756 | * @retval None |
kenjiArai | 1:e162361e197f | 757 | */ |
kenjiArai | 1:e162361e197f | 758 | void SystemInit(void) |
kenjiArai | 1:e162361e197f | 759 | { |
kenjiArai | 1:e162361e197f | 760 | /* FPU settings ------------------------------------------------------------*/ |
kenjiArai | 1:e162361e197f | 761 | #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) |
kenjiArai | 1:e162361e197f | 762 | SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */ |
kenjiArai | 1:e162361e197f | 763 | #endif |
kenjiArai | 1:e162361e197f | 764 | |
kenjiArai | 1:e162361e197f | 765 | /* Reset the RCC clock configuration to the default reset state ------------*/ |
kenjiArai | 1:e162361e197f | 766 | /* Set HSION bit */ |
kenjiArai | 1:e162361e197f | 767 | RCC->CR |= 0x00000001U; |
kenjiArai | 1:e162361e197f | 768 | |
kenjiArai | 1:e162361e197f | 769 | /* Reset CFGR register */ |
kenjiArai | 1:e162361e197f | 770 | RCC->CFGR &= 0xF87FC00CU; |
kenjiArai | 1:e162361e197f | 771 | |
kenjiArai | 1:e162361e197f | 772 | /* Reset HSEON, CSSON and PLLON bits */ |
kenjiArai | 1:e162361e197f | 773 | RCC->CR &= 0xFEF6FFFFU; |
kenjiArai | 1:e162361e197f | 774 | |
kenjiArai | 1:e162361e197f | 775 | /* Reset HSEBYP bit */ |
kenjiArai | 1:e162361e197f | 776 | RCC->CR &= 0xFFFBFFFFU; |
kenjiArai | 1:e162361e197f | 777 | |
kenjiArai | 1:e162361e197f | 778 | /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE bits */ |
kenjiArai | 1:e162361e197f | 779 | RCC->CFGR &= 0xFF80FFFFU; |
kenjiArai | 1:e162361e197f | 780 | |
kenjiArai | 1:e162361e197f | 781 | /* Reset PREDIV1[3:0] bits */ |
kenjiArai | 1:e162361e197f | 782 | RCC->CFGR2 &= 0xFFFFFFF0U; |
kenjiArai | 1:e162361e197f | 783 | |
kenjiArai | 1:e162361e197f | 784 | /* Reset USARTSW[1:0], I2CSW and TIMs bits */ |
kenjiArai | 1:e162361e197f | 785 | RCC->CFGR3 &= 0xFF00FCCCU; |
kenjiArai | 1:e162361e197f | 786 | |
kenjiArai | 1:e162361e197f | 787 | /* Disable all interrupts */ |
kenjiArai | 1:e162361e197f | 788 | RCC->CIR = 0x00000000U; |
kenjiArai | 1:e162361e197f | 789 | |
kenjiArai | 1:e162361e197f | 790 | #ifdef VECT_TAB_SRAM |
kenjiArai | 1:e162361e197f | 791 | SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ |
kenjiArai | 1:e162361e197f | 792 | #else |
kenjiArai | 1:e162361e197f | 793 | SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ |
kenjiArai | 1:e162361e197f | 794 | #endif |
kenjiArai | 1:e162361e197f | 795 | |
kenjiArai | 1:e162361e197f | 796 | } |
kenjiArai | 1:e162361e197f | 797 | |
kenjiArai | 1:e162361e197f | 798 | |
kenjiArai | 1:e162361e197f | 799 | /** |
kenjiArai | 1:e162361e197f | 800 | * @brief Configures the System clock source, PLL Multiplier and Divider factors, |
kenjiArai | 1:e162361e197f | 801 | * AHB/APBx prescalers and Flash settings |
kenjiArai | 1:e162361e197f | 802 | * @note This function should be called only once the RCC clock configuration |
kenjiArai | 1:e162361e197f | 803 | * is reset to the default reset state (done in SystemInit() function). |
kenjiArai | 1:e162361e197f | 804 | * @param None |
kenjiArai | 1:e162361e197f | 805 | * @retval None |
kenjiArai | 1:e162361e197f | 806 | */ |
kenjiArai | 1:e162361e197f | 807 | |
kenjiArai | 1:e162361e197f | 808 | void SetSysClock(void) |
kenjiArai | 1:e162361e197f | 809 | { |
kenjiArai | 1:e162361e197f | 810 | #if ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) |
kenjiArai | 1:e162361e197f | 811 | /* 1- Try to start with HSE and external clock */ |
kenjiArai | 1:e162361e197f | 812 | if (SetSysClock_PLL_HSE(1) == 0) |
kenjiArai | 1:e162361e197f | 813 | #endif |
kenjiArai | 1:e162361e197f | 814 | { |
kenjiArai | 1:e162361e197f | 815 | #if ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) |
kenjiArai | 1:e162361e197f | 816 | /* 2- If fail try to start with HSE and external xtal */ |
kenjiArai | 1:e162361e197f | 817 | if (SetSysClock_PLL_HSE(0) == 0) |
kenjiArai | 1:e162361e197f | 818 | #endif |
kenjiArai | 1:e162361e197f | 819 | { |
kenjiArai | 1:e162361e197f | 820 | #if ((CLOCK_SOURCE) & USE_PLL_HSI) |
kenjiArai | 1:e162361e197f | 821 | /* 3- If fail start with HSI clock */ |
kenjiArai | 1:e162361e197f | 822 | if (SetSysClock_PLL_HSI() == 0) |
kenjiArai | 1:e162361e197f | 823 | #endif |
kenjiArai | 1:e162361e197f | 824 | { |
kenjiArai | 1:e162361e197f | 825 | while(1) { |
kenjiArai | 1:e162361e197f | 826 | MBED_ASSERT(1); |
kenjiArai | 1:e162361e197f | 827 | } |
kenjiArai | 1:e162361e197f | 828 | } |
kenjiArai | 1:e162361e197f | 829 | } |
kenjiArai | 1:e162361e197f | 830 | } |
kenjiArai | 1:e162361e197f | 831 | |
kenjiArai | 1:e162361e197f | 832 | /* Output clock on MCO1 pin(PA8) for debugging purpose */ |
kenjiArai | 1:e162361e197f | 833 | //HAL_RCC_MCOConfig(RCC_MCO, RCC_MCOSOURCE_SYSCLK, RCC_MCO_DIV1); // 72 MHz or 64 MHz |
kenjiArai | 1:e162361e197f | 834 | } |
kenjiArai | 1:e162361e197f | 835 | |
kenjiArai | 1:e162361e197f | 836 | #if ( ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) ) |
kenjiArai | 1:e162361e197f | 837 | /******************************************************************************/ |
kenjiArai | 1:e162361e197f | 838 | /* PLL (clocked by HSE) used as System clock source */ |
kenjiArai | 1:e162361e197f | 839 | /******************************************************************************/ |
kenjiArai | 1:e162361e197f | 840 | uint8_t SetSysClock_PLL_HSE(uint8_t bypass) |
kenjiArai | 1:e162361e197f | 841 | { |
kenjiArai | 1:e162361e197f | 842 | RCC_ClkInitTypeDef RCC_ClkInitStruct; |
kenjiArai | 1:e162361e197f | 843 | RCC_OscInitTypeDef RCC_OscInitStruct; |
kenjiArai | 1:e162361e197f | 844 | |
kenjiArai | 1:e162361e197f | 845 | /* Enable HSE oscillator and activate PLL with HSE as source */ |
kenjiArai | 1:e162361e197f | 846 | RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; |
kenjiArai | 1:e162361e197f | 847 | if (bypass == 0) { |
kenjiArai | 1:e162361e197f | 848 | RCC_OscInitStruct.HSEState = RCC_HSE_ON; /* External 8 MHz xtal on OSC_IN/OSC_OUT */ |
kenjiArai | 1:e162361e197f | 849 | } else { |
kenjiArai | 1:e162361e197f | 850 | RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; /* External 8 MHz clock on OSC_IN */ |
kenjiArai | 1:e162361e197f | 851 | } |
kenjiArai | 1:e162361e197f | 852 | RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; |
kenjiArai | 1:e162361e197f | 853 | RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; |
kenjiArai | 1:e162361e197f | 854 | RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; |
kenjiArai | 1:e162361e197f | 855 | RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9; // 72 MHz (8 MHz * 9) |
kenjiArai | 1:e162361e197f | 856 | if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { |
kenjiArai | 1:e162361e197f | 857 | return 0; // FAIL |
kenjiArai | 1:e162361e197f | 858 | } |
kenjiArai | 1:e162361e197f | 859 | |
kenjiArai | 1:e162361e197f | 860 | /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */ |
kenjiArai | 1:e162361e197f | 861 | RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); |
kenjiArai | 1:e162361e197f | 862 | RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; // 72 MHz |
kenjiArai | 1:e162361e197f | 863 | RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 72 MHz |
kenjiArai | 1:e162361e197f | 864 | RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; // 36 MHz |
kenjiArai | 1:e162361e197f | 865 | RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; // 72 MHz |
kenjiArai | 1:e162361e197f | 866 | if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) { |
kenjiArai | 1:e162361e197f | 867 | return 0; // FAIL |
kenjiArai | 1:e162361e197f | 868 | } |
kenjiArai | 1:e162361e197f | 869 | |
kenjiArai | 1:e162361e197f | 870 | /* Output clock on MCO1 pin(PA8) for debugging purpose */ |
kenjiArai | 1:e162361e197f | 871 | //if (bypass == 0) |
kenjiArai | 1:e162361e197f | 872 | // HAL_RCC_MCOConfig(RCC_MCO, RCC_MCOSOURCE_HSE, RCC_MCO_DIV2); // 4 MHz with xtal |
kenjiArai | 1:e162361e197f | 873 | //else |
kenjiArai | 1:e162361e197f | 874 | // HAL_RCC_MCOConfig(RCC_MCO, RCC_MCOSOURCE_HSE, RCC_MCO_DIV1); // 8 MHz with ext clock |
kenjiArai | 1:e162361e197f | 875 | |
kenjiArai | 1:e162361e197f | 876 | return 1; // OK |
kenjiArai | 1:e162361e197f | 877 | } |
kenjiArai | 1:e162361e197f | 878 | #endif /* ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) */ |
kenjiArai | 1:e162361e197f | 879 | |
kenjiArai | 1:e162361e197f | 880 | #if ((CLOCK_SOURCE) & USE_PLL_HSI) |
kenjiArai | 1:e162361e197f | 881 | /******************************************************************************/ |
kenjiArai | 1:e162361e197f | 882 | /* PLL (clocked by HSI) used as System clock source */ |
kenjiArai | 1:e162361e197f | 883 | /******************************************************************************/ |
kenjiArai | 1:e162361e197f | 884 | uint8_t SetSysClock_PLL_HSI(void) |
kenjiArai | 1:e162361e197f | 885 | { |
kenjiArai | 1:e162361e197f | 886 | RCC_ClkInitTypeDef RCC_ClkInitStruct; |
kenjiArai | 1:e162361e197f | 887 | RCC_OscInitTypeDef RCC_OscInitStruct; |
kenjiArai | 1:e162361e197f | 888 | |
kenjiArai | 1:e162361e197f | 889 | /* Enable HSI oscillator and activate PLL with HSI as source */ |
kenjiArai | 1:e162361e197f | 890 | RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE; |
kenjiArai | 1:e162361e197f | 891 | RCC_OscInitStruct.HSIState = RCC_HSI_ON; |
kenjiArai | 1:e162361e197f | 892 | RCC_OscInitStruct.HSEState = RCC_HSE_OFF; |
kenjiArai | 1:e162361e197f | 893 | RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; |
kenjiArai | 1:e162361e197f | 894 | RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; |
kenjiArai | 1:e162361e197f | 895 | RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; |
kenjiArai | 1:e162361e197f | 896 | RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL16; // 64 MHz (8 MHz/2 * 16) |
kenjiArai | 1:e162361e197f | 897 | if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { |
kenjiArai | 1:e162361e197f | 898 | return 0; // FAIL |
kenjiArai | 1:e162361e197f | 899 | } |
kenjiArai | 1:e162361e197f | 900 | |
kenjiArai | 1:e162361e197f | 901 | /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */ |
kenjiArai | 1:e162361e197f | 902 | RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); |
kenjiArai | 1:e162361e197f | 903 | RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; // 64 MHz |
kenjiArai | 1:e162361e197f | 904 | RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 64 MHz |
kenjiArai | 1:e162361e197f | 905 | RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; // 32 MHz |
kenjiArai | 1:e162361e197f | 906 | RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; // 64 MHz |
kenjiArai | 1:e162361e197f | 907 | if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) { |
kenjiArai | 1:e162361e197f | 908 | return 0; // FAIL |
kenjiArai | 1:e162361e197f | 909 | } |
kenjiArai | 1:e162361e197f | 910 | |
kenjiArai | 1:e162361e197f | 911 | /* Output clock on MCO1 pin(PA8) for debugging purpose */ |
kenjiArai | 1:e162361e197f | 912 | //HAL_RCC_MCOConfig(RCC_MCO, RCC_MCOSOURCE_HSI, RCC_MCO_DIV1); // 8 MHz |
kenjiArai | 1:e162361e197f | 913 | |
kenjiArai | 1:e162361e197f | 914 | return 1; // OK |
kenjiArai | 1:e162361e197f | 915 | } |
kenjiArai | 1:e162361e197f | 916 | #endif /* ((CLOCK_SOURCE) & USE_PLL_HSI) */ |
kenjiArai | 1:e162361e197f | 917 | |
kenjiArai | 1:e162361e197f | 918 | #endif |