Diff: si5351a.cpp

Revision:

2:8fe745836ea6

Parent:

1:a2309757c450

Child:

3:af2d99cfb3f0

--- a/si5351a.cpp	Thu Jan 05 12:28:27 2017 +0000
+++ b/si5351a.cpp	Fri Jan 06 14:06:42 2017 +0000
@@ -24,7 +24,7 @@
  *      http://mbed.org/users/kenjiArai/
  *
  *      Started:  December 24th, 2016
- *      Revised:  January   5th, 2017
+ *      Revised:  January   6th, 2017
  *
  */
 
@@ -264,6 +264,12 @@
     }
 }
 
+void SI5351A::f_compensation(uint32_t target_f, uint32_t measured_f)
+{
+    compensation = (double)target_f / (double)measured_f;
+    pll_freq = (uint32_t)((double)pll_freq / compensation);
+}
+
 static const uint8_t reg_table[] = {
  15, 16, 17, 18, 19, 20, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35,
  36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55,
@@ -321,6 +327,7 @@
     clk0_state = CLK_OUT_NOT_USED;
     clk1_state = CLK_OUT_NOT_USED;
     clk2_state = CLK_OUT_NOT_USED;
+    compensation = 1.0f;
     si5351_reset_pll();
     si5351_write(SI5351_REG_3_OUTPUT_ENABLE_CONTROL, 0xff);
     // Total load capacitance less than or equal to 12 pF (See AN551)
@@ -803,6 +810,8 @@
             break;
     }
     printf("[pF]\r\n");
+    printf("--> compensation=%f\r\n", compensation);
+    printf("--> pll_freq=XTAL*PLL_N=%u\r\n", pll_freq);
     //Step2
     printf("[PLLn]       --> ");
     buf[0] = 15;