This is a RTC additional function. This is only for Nucleo F401RE & F411RE mbed(Added L152RE, F334R8, L476RG & F746xx). If you connected battery backup circuit for internal RTC, you can make a power-off and reset condition. RTC still has proper time and date.

Dependents:   Nucleo_rtos_sample PB_Emma_Ethernet

Please refer following NOTE information.
/users/kenjiArai/notebook/nucleo-series-rtc-control-under-power-onoff-and-re/

Committer:
kenjiArai
Date:
Sat Jul 02 03:00:33 2016 +0000
Revision:
14:78e453d7bb85
Parent:
13:44e5327acb05
Added F746xx and modified main.c

Who changed what in which revision?

UserRevisionLine numberNew contents of line
kenjiArai 0:e4c20fd769f1 1 /*
kenjiArai 0:e4c20fd769f1 2 * mbed Library program
kenjiArai 0:e4c20fd769f1 3 * Check & set RTC function and set proper clock if we can set
kenjiArai 0:e4c20fd769f1 4 * ONLY FOR "Nucleo Board"
kenjiArai 0:e4c20fd769f1 5 *
kenjiArai 13:44e5327acb05 6 * Copyright (c) 2014,'15,'16 Kenji Arai / JH1PJL
kenjiArai 0:e4c20fd769f1 7 * http://www.page.sannet.ne.jp/kenjia/index.html
kenjiArai 0:e4c20fd769f1 8 * http://mbed.org/users/kenjiArai/
kenjiArai 13:44e5327acb05 9 * Created: October 24th, 2014
kenjiArai 14:78e453d7bb85 10 * Revised: July 2nd, 2016
kenjiArai 0:e4c20fd769f1 11 *
kenjiArai 0:e4c20fd769f1 12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED,
kenjiArai 0:e4c20fd769f1 13 * INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
kenjiArai 0:e4c20fd769f1 14 * AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
kenjiArai 0:e4c20fd769f1 15 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
kenjiArai 0:e4c20fd769f1 16 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
kenjiArai 0:e4c20fd769f1 17 */
kenjiArai 0:e4c20fd769f1 18
kenjiArai 13:44e5327acb05 19 #if (defined(TARGET_STM32F401RE) || defined(TARGET_STM32F411RE) \
kenjiArai 13:44e5327acb05 20 || defined(TARGET_STM32L152RE) || defined(TARGET_STM32F334R8) \
kenjiArai 14:78e453d7bb85 21 || defined(TARGET_STM32L476RG) \
kenjiArai 14:78e453d7bb85 22 || defined(TARGET_STM32F746NG) || defined(TARGET_STM32F746ZG) )
kenjiArai 0:e4c20fd769f1 23
kenjiArai 0:e4c20fd769f1 24 //#define DEBUG // use Communication with PC(UART)
kenjiArai 0:e4c20fd769f1 25
kenjiArai 0:e4c20fd769f1 26 // Include ---------------------------------------------------------------------------------------
kenjiArai 0:e4c20fd769f1 27 #include "mbed.h"
kenjiArai 0:e4c20fd769f1 28 #include "SetRTC.h"
kenjiArai 14:78e453d7bb85 29 #if (defined(TARGET_STM32F746NG) || defined(TARGET_STM32F746ZG) )
kenjiArai 14:78e453d7bb85 30 #include "stm32f7xx_hal.h"
kenjiArai 14:78e453d7bb85 31 #endif
kenjiArai 0:e4c20fd769f1 32
kenjiArai 0:e4c20fd769f1 33 // Definition ------------------------------------------------------------------------------------
kenjiArai 0:e4c20fd769f1 34 #ifdef DEBUG
kenjiArai 0:e4c20fd769f1 35 #define BAUD(x) pcr.baud(x)
kenjiArai 0:e4c20fd769f1 36 #define GETC(x) pcr.getc(x)
kenjiArai 0:e4c20fd769f1 37 #define PUTC(x) pcr.putc(x)
kenjiArai 0:e4c20fd769f1 38 #define PRINTF(...) pcr.printf(__VA_ARGS__)
kenjiArai 0:e4c20fd769f1 39 #define READABLE(x) pcr.readable(x)
kenjiArai 0:e4c20fd769f1 40 #else
kenjiArai 0:e4c20fd769f1 41 #define BAUD(x) {;}
kenjiArai 0:e4c20fd769f1 42 #define GETC(x) {;}
kenjiArai 0:e4c20fd769f1 43 #define PUTC(x) {;}
kenjiArai 0:e4c20fd769f1 44 #define PRINTF(...) {;}
kenjiArai 0:e4c20fd769f1 45 #define READABLE(x) {;}
kenjiArai 0:e4c20fd769f1 46 #endif
kenjiArai 0:e4c20fd769f1 47
kenjiArai 0:e4c20fd769f1 48 // Object ----------------------------------------------------------------------------------------
kenjiArai 0:e4c20fd769f1 49 Serial pcr(USBTX, USBRX);
kenjiArai 0:e4c20fd769f1 50
kenjiArai 0:e4c20fd769f1 51 // RAM -------------------------------------------------------------------------------------------
kenjiArai 0:e4c20fd769f1 52
kenjiArai 0:e4c20fd769f1 53 // ROM / Constant data ---------------------------------------------------------------------------
kenjiArai 0:e4c20fd769f1 54
kenjiArai 0:e4c20fd769f1 55 // Function prototypes ---------------------------------------------------------------------------
kenjiArai 0:e4c20fd769f1 56 static int32_t set_RTC_LSI(void);
kenjiArai 0:e4c20fd769f1 57 static int32_t set_RTC_LSE(void);
kenjiArai 0:e4c20fd769f1 58 static int32_t rtc_external_osc_init(void);
kenjiArai 0:e4c20fd769f1 59 static uint32_t read_RTC_reg(uint32_t RTC_BKP_DR);
kenjiArai 0:e4c20fd769f1 60 static uint32_t check_RTC_backup_reg( void );
kenjiArai 0:e4c20fd769f1 61 static int xatoi (char **str, unsigned long *res);
kenjiArai 0:e4c20fd769f1 62 static void get_line (char *buff, int len);
kenjiArai 7:fa32602e23ec 63 static void set_5v_drop_detect(uint8_t function_use);
kenjiArai 0:e4c20fd769f1 64
kenjiArai 0:e4c20fd769f1 65 //-------------------------------------------------------------------------------------------------
kenjiArai 0:e4c20fd769f1 66 // Control Program
kenjiArai 0:e4c20fd769f1 67 //-------------------------------------------------------------------------------------------------
kenjiArai 7:fa32602e23ec 68 int32_t SetRTC(uint8_t use_comparator)
kenjiArai 0:e4c20fd769f1 69 {
kenjiArai 6:ef7d2c83034d 70 if (rtc_external_osc_init() == 1) {
kenjiArai 7:fa32602e23ec 71 set_5v_drop_detect(use_comparator);
kenjiArai 6:ef7d2c83034d 72 return 1;
kenjiArai 0:e4c20fd769f1 73 } else {
kenjiArai 6:ef7d2c83034d 74 return 0;
kenjiArai 0:e4c20fd769f1 75 }
kenjiArai 0:e4c20fd769f1 76 }
kenjiArai 0:e4c20fd769f1 77
kenjiArai 0:e4c20fd769f1 78 int32_t set_RTC_LSE(void)
kenjiArai 0:e4c20fd769f1 79 {
kenjiArai 0:e4c20fd769f1 80 uint32_t timeout = 0;
kenjiArai 0:e4c20fd769f1 81
kenjiArai 0:e4c20fd769f1 82 //---------------------------- LSE Configuration -------------------------
kenjiArai 0:e4c20fd769f1 83 // Enable Power Clock
kenjiArai 0:e4c20fd769f1 84 __PWR_CLK_ENABLE();
kenjiArai 0:e4c20fd769f1 85 // Enable write access to Backup domain
kenjiArai 14:78e453d7bb85 86 #if (defined(TARGET_STM32L476RG) || defined(TARGET_STM32F746NG) || defined(TARGET_STM32F746ZG))
kenjiArai 13:44e5327acb05 87 PWR->CR1 |= PWR_CR1_DBP;
kenjiArai 13:44e5327acb05 88 #else
kenjiArai 0:e4c20fd769f1 89 PWR->CR |= PWR_CR_DBP;
kenjiArai 13:44e5327acb05 90 #endif
kenjiArai 0:e4c20fd769f1 91 // Wait for Backup domain Write protection disable
kenjiArai 0:e4c20fd769f1 92 timeout = HAL_GetTick() + DBP_TIMEOUT_VALUE;
kenjiArai 6:ef7d2c83034d 93 PRINTF("Time-Out %d\r\n", timeout);
kenjiArai 14:78e453d7bb85 94 #if (defined(TARGET_STM32L476RG) || defined(TARGET_STM32F746NG) || defined(TARGET_STM32F746ZG))
kenjiArai 13:44e5327acb05 95 while((PWR->CR1 & PWR_CR1_DBP) == RESET) {
kenjiArai 13:44e5327acb05 96 #else
kenjiArai 0:e4c20fd769f1 97 while((PWR->CR & PWR_CR_DBP) == RESET) {
kenjiArai 13:44e5327acb05 98 #endif
kenjiArai 0:e4c20fd769f1 99 if(HAL_GetTick() >= timeout) {
kenjiArai 0:e4c20fd769f1 100 PRINTF("Time-Out 1\r\n");
kenjiArai 6:ef7d2c83034d 101 return 0;
kenjiArai 6:ef7d2c83034d 102 } else {
kenjiArai 6:ef7d2c83034d 103 PRINTF("GetTick: %d\r\n",HAL_GetTick());
kenjiArai 0:e4c20fd769f1 104 }
kenjiArai 0:e4c20fd769f1 105 }
kenjiArai 0:e4c20fd769f1 106 // Reset LSEON and LSEBYP bits before configuring the LSE ----------------
kenjiArai 0:e4c20fd769f1 107 __HAL_RCC_LSE_CONFIG(RCC_LSE_OFF);
kenjiArai 0:e4c20fd769f1 108 // Get timeout
kenjiArai 0:e4c20fd769f1 109 timeout = HAL_GetTick() + TIMEOUT;
kenjiArai 6:ef7d2c83034d 110 PRINTF("Time-Out %d\r\n", timeout);
kenjiArai 0:e4c20fd769f1 111 // Wait till LSE is ready
kenjiArai 0:e4c20fd769f1 112 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) {
kenjiArai 0:e4c20fd769f1 113 if(HAL_GetTick() >= timeout) {
kenjiArai 0:e4c20fd769f1 114 PRINTF("Time-Out 2\r\n");
kenjiArai 6:ef7d2c83034d 115 return 0;
kenjiArai 6:ef7d2c83034d 116 } else {
kenjiArai 6:ef7d2c83034d 117 PRINTF("GetTick: %d\r\n",HAL_GetTick());
kenjiArai 0:e4c20fd769f1 118 }
kenjiArai 0:e4c20fd769f1 119 }
kenjiArai 0:e4c20fd769f1 120 // Set the new LSE configuration -----------------------------------------
kenjiArai 0:e4c20fd769f1 121 __HAL_RCC_LSE_CONFIG(RCC_LSE_ON);
kenjiArai 0:e4c20fd769f1 122 // Get timeout
kenjiArai 0:e4c20fd769f1 123 timeout = HAL_GetTick() + TIMEOUT;
kenjiArai 6:ef7d2c83034d 124 PRINTF("Time-Out %d\r\n", timeout);
kenjiArai 0:e4c20fd769f1 125 // Wait till LSE is ready
kenjiArai 13:44e5327acb05 126 #if (defined(TARGET_STM32F401RE) || defined(TARGET_STM32F411RE) \
kenjiArai 14:78e453d7bb85 127 || defined(TARGET_STM32F334R8) || defined(TARGET_STM32L476RG) \
kenjiArai 14:78e453d7bb85 128 || defined(TARGET_STM32F746NG) || defined(TARGET_STM32F746ZG) )
kenjiArai 6:ef7d2c83034d 129 while((RCC->BDCR & 0x02) != 2){
kenjiArai 13:44e5327acb05 130 #elif defined(TARGET_STM32L152RE)
kenjiArai 0:e4c20fd769f1 131 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) {
kenjiArai 6:ef7d2c83034d 132 #endif
kenjiArai 0:e4c20fd769f1 133 if(HAL_GetTick() >= timeout) {
kenjiArai 0:e4c20fd769f1 134 PRINTF("Time-Out 3\r\n");
kenjiArai 6:ef7d2c83034d 135 return 0;
kenjiArai 6:ef7d2c83034d 136 } else {
kenjiArai 6:ef7d2c83034d 137 PRINTF("GetTick: %d\r\n",HAL_GetTick());
kenjiArai 0:e4c20fd769f1 138 }
kenjiArai 0:e4c20fd769f1 139 }
kenjiArai 6:ef7d2c83034d 140 PRINTF("OK\r\n");
kenjiArai 6:ef7d2c83034d 141 return 1;
kenjiArai 0:e4c20fd769f1 142 }
kenjiArai 0:e4c20fd769f1 143
kenjiArai 0:e4c20fd769f1 144 int32_t set_RTC_LSI(void)
kenjiArai 0:e4c20fd769f1 145 {
kenjiArai 0:e4c20fd769f1 146 uint32_t timeout = 0;
kenjiArai 0:e4c20fd769f1 147
kenjiArai 0:e4c20fd769f1 148 // Enable Power clock
kenjiArai 0:e4c20fd769f1 149 __PWR_CLK_ENABLE();
kenjiArai 0:e4c20fd769f1 150 // Enable access to Backup domain
kenjiArai 0:e4c20fd769f1 151 HAL_PWR_EnableBkUpAccess();
kenjiArai 0:e4c20fd769f1 152 // Reset Backup domain
kenjiArai 0:e4c20fd769f1 153 __HAL_RCC_BACKUPRESET_FORCE();
kenjiArai 0:e4c20fd769f1 154 __HAL_RCC_BACKUPRESET_RELEASE();
kenjiArai 0:e4c20fd769f1 155 // Enable Power Clock
kenjiArai 0:e4c20fd769f1 156 __PWR_CLK_ENABLE();
kenjiArai 0:e4c20fd769f1 157 // Enable write access to Backup domain
kenjiArai 14:78e453d7bb85 158 #if (defined(TARGET_STM32L476RG) || defined(TARGET_STM32F746NG) || defined(TARGET_STM32F746ZG))
kenjiArai 13:44e5327acb05 159 PWR->CR1 |= PWR_CR1_DBP;
kenjiArai 13:44e5327acb05 160 #else
kenjiArai 0:e4c20fd769f1 161 PWR->CR |= PWR_CR_DBP;
kenjiArai 13:44e5327acb05 162 #endif
kenjiArai 0:e4c20fd769f1 163 // Wait for Backup domain Write protection disable
kenjiArai 0:e4c20fd769f1 164 timeout = HAL_GetTick() + DBP_TIMEOUT_VALUE;
kenjiArai 14:78e453d7bb85 165 #if (defined(TARGET_STM32L476RG) || defined(TARGET_STM32F746NG) || defined(TARGET_STM32F746ZG))
kenjiArai 13:44e5327acb05 166 while((PWR->CR1 & PWR_CR1_DBP) == RESET) {
kenjiArai 13:44e5327acb05 167 #else
kenjiArai 0:e4c20fd769f1 168 while((PWR->CR & PWR_CR_DBP) == RESET) {
kenjiArai 13:44e5327acb05 169 #endif
kenjiArai 0:e4c20fd769f1 170 if(HAL_GetTick() >= timeout) {
kenjiArai 6:ef7d2c83034d 171 return 0;
kenjiArai 0:e4c20fd769f1 172 }
kenjiArai 0:e4c20fd769f1 173 }
kenjiArai 0:e4c20fd769f1 174 __HAL_RCC_LSE_CONFIG(RCC_LSE_OFF);
kenjiArai 0:e4c20fd769f1 175 // Enable LSI
kenjiArai 0:e4c20fd769f1 176 __HAL_RCC_LSI_ENABLE();
kenjiArai 0:e4c20fd769f1 177 timeout = HAL_GetTick() + TIMEOUT;
kenjiArai 0:e4c20fd769f1 178 // Wait till LSI is ready
kenjiArai 0:e4c20fd769f1 179 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) {
kenjiArai 0:e4c20fd769f1 180 if(HAL_GetTick() >= timeout) {
kenjiArai 6:ef7d2c83034d 181 return 0;
kenjiArai 0:e4c20fd769f1 182 }
kenjiArai 0:e4c20fd769f1 183 }
kenjiArai 0:e4c20fd769f1 184 // Connect LSI to RTC
kenjiArai 14:78e453d7bb85 185 #if !(defined(TARGET_STM32F334R8) || defined(TARGET_STM32L476RG) \
kenjiArai 14:78e453d7bb85 186 || defined(TARGET_STM32F746NG) || defined(TARGET_STM32F746ZG) )
kenjiArai 0:e4c20fd769f1 187 __HAL_RCC_RTC_CLKPRESCALER(RCC_RTCCLKSOURCE_LSI);
kenjiArai 9:1af4e107ca7b 188 #endif
kenjiArai 0:e4c20fd769f1 189 __HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSI);
kenjiArai 6:ef7d2c83034d 190 return 1;
kenjiArai 0:e4c20fd769f1 191 }
kenjiArai 0:e4c20fd769f1 192
kenjiArai 0:e4c20fd769f1 193 int32_t rtc_external_osc_init(void)
kenjiArai 0:e4c20fd769f1 194 {
kenjiArai 6:ef7d2c83034d 195 uint32_t timeout = 0;
kenjiArai 6:ef7d2c83034d 196 time_t seconds;
kenjiArai 6:ef7d2c83034d 197 uint8_t external_ok = 1;
kenjiArai 6:ef7d2c83034d 198
kenjiArai 0:e4c20fd769f1 199 // Enable Power clock
kenjiArai 0:e4c20fd769f1 200 __PWR_CLK_ENABLE();
kenjiArai 0:e4c20fd769f1 201 // Enable access to Backup domain
kenjiArai 0:e4c20fd769f1 202 HAL_PWR_EnableBkUpAccess();
kenjiArai 0:e4c20fd769f1 203 // Check backup condition
kenjiArai 0:e4c20fd769f1 204 if ( check_RTC_backup_reg() ) {
kenjiArai 13:44e5327acb05 205 #if (defined(TARGET_STM32F401RE) || defined(TARGET_STM32F411RE) \
kenjiArai 14:78e453d7bb85 206 || defined(TARGET_STM32F334R8) || defined(TARGET_STM32L476RG) \
kenjiArai 14:78e453d7bb85 207 || defined(TARGET_STM32F746NG) || defined(TARGET_STM32F746ZG) )
kenjiArai 6:ef7d2c83034d 208 if ((RCC->BDCR & 0x8307) == 0x8103){
kenjiArai 6:ef7d2c83034d 209 #else
kenjiArai 6:ef7d2c83034d 210 if ((RCC->CSR & 0x430703) == 0x410300) {
kenjiArai 6:ef7d2c83034d 211 #endif
kenjiArai 6:ef7d2c83034d 212 //if (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) {
kenjiArai 6:ef7d2c83034d 213 timeout = HAL_GetTick() + TIMEOUT / 5;
kenjiArai 6:ef7d2c83034d 214 seconds = time(NULL);
kenjiArai 6:ef7d2c83034d 215 while (seconds == time(NULL)){
kenjiArai 6:ef7d2c83034d 216 if(HAL_GetTick() >= timeout) {
kenjiArai 6:ef7d2c83034d 217 PRINTF("Not available External Xtal\r\n");
kenjiArai 6:ef7d2c83034d 218 external_ok = 0;
kenjiArai 6:ef7d2c83034d 219 break;
kenjiArai 6:ef7d2c83034d 220 }
kenjiArai 6:ef7d2c83034d 221 }
kenjiArai 6:ef7d2c83034d 222 if (external_ok){
kenjiArai 6:ef7d2c83034d 223 PRINTF("OK everything\r\n");
kenjiArai 6:ef7d2c83034d 224 return 1;
kenjiArai 6:ef7d2c83034d 225 }
kenjiArai 6:ef7d2c83034d 226 }
kenjiArai 6:ef7d2c83034d 227 }
kenjiArai 6:ef7d2c83034d 228 PRINTF("Reset RTC LSE config.\r\n");
kenjiArai 6:ef7d2c83034d 229 // Reset Backup domain
kenjiArai 6:ef7d2c83034d 230 __HAL_RCC_BACKUPRESET_FORCE();
kenjiArai 6:ef7d2c83034d 231 __HAL_RCC_BACKUPRESET_RELEASE();
kenjiArai 6:ef7d2c83034d 232 // Enable LSE Oscillator
kenjiArai 6:ef7d2c83034d 233 if (set_RTC_LSE() == 1) {
kenjiArai 6:ef7d2c83034d 234 // Connect LSE to RTC
kenjiArai 14:78e453d7bb85 235 #if !(defined(TARGET_STM32F334R8) || defined(TARGET_STM32L476RG) \
kenjiArai 14:78e453d7bb85 236 || defined(TARGET_STM32F746NG) || defined(TARGET_STM32F746ZG) \
kenjiArai 14:78e453d7bb85 237 || defined(TARGET_STM32F746NG) || defined(TARGET_STM32F746ZG) )
kenjiArai 6:ef7d2c83034d 238 __HAL_RCC_RTC_CLKPRESCALER(RCC_RTCCLKSOURCE_LSE);
kenjiArai 9:1af4e107ca7b 239 #endif
kenjiArai 6:ef7d2c83034d 240 __HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSE);
kenjiArai 6:ef7d2c83034d 241 PRINTF("Set LSE/External\r\n");
kenjiArai 6:ef7d2c83034d 242 return 1;
kenjiArai 0:e4c20fd769f1 243 } else {
kenjiArai 6:ef7d2c83034d 244 set_RTC_LSI();
kenjiArai 6:ef7d2c83034d 245 PRINTF("Set LSI/Internal\r\n");
kenjiArai 6:ef7d2c83034d 246 return 0;
kenjiArai 0:e4c20fd769f1 247 }
kenjiArai 0:e4c20fd769f1 248 }
kenjiArai 0:e4c20fd769f1 249
kenjiArai 0:e4c20fd769f1 250 uint32_t read_RTC_reg(uint32_t RTC_BKP_DR)
kenjiArai 0:e4c20fd769f1 251 {
kenjiArai 0:e4c20fd769f1 252 __IO uint32_t tmp = 0;
kenjiArai 0:e4c20fd769f1 253
kenjiArai 0:e4c20fd769f1 254 // Check the parameters
kenjiArai 0:e4c20fd769f1 255 assert_param(IS_RTC_BKP(RTC_BKP_DR));
kenjiArai 0:e4c20fd769f1 256 tmp = RTC_BASE + 0x50;
kenjiArai 0:e4c20fd769f1 257 tmp += (RTC_BKP_DR * 4);
kenjiArai 0:e4c20fd769f1 258 // Read the specified register
kenjiArai 0:e4c20fd769f1 259 return (*(__IO uint32_t *)tmp);
kenjiArai 0:e4c20fd769f1 260 }
kenjiArai 0:e4c20fd769f1 261
kenjiArai 0:e4c20fd769f1 262 // Check RTC Backup registers contents
kenjiArai 0:e4c20fd769f1 263 uint32_t check_RTC_backup_reg( void )
kenjiArai 0:e4c20fd769f1 264 {
kenjiArai 0:e4c20fd769f1 265 if ( read_RTC_reg( RTC_BKP_DR0 ) == RTC_DAT0 ) {
kenjiArai 0:e4c20fd769f1 266 if ( read_RTC_reg( RTC_BKP_DR1 ) == RTC_DAT1 ) {
kenjiArai 0:e4c20fd769f1 267 return 1;
kenjiArai 0:e4c20fd769f1 268 }
kenjiArai 0:e4c20fd769f1 269 }
kenjiArai 0:e4c20fd769f1 270 return 0;
kenjiArai 0:e4c20fd769f1 271 }
kenjiArai 0:e4c20fd769f1 272
kenjiArai 0:e4c20fd769f1 273 void show_RTC_reg( void )
kenjiArai 0:e4c20fd769f1 274 {
kenjiArai 0:e4c20fd769f1 275 // Show registers
kenjiArai 6:ef7d2c83034d 276 pcr.printf( "\r\nShow RTC registers\r\n" );
kenjiArai 0:e4c20fd769f1 277 pcr.printf( " Reg0 =0x%08x, Reg1 =0x%08x\r\n",
kenjiArai 0:e4c20fd769f1 278 read_RTC_reg( RTC_BKP_DR0 ),
kenjiArai 0:e4c20fd769f1 279 read_RTC_reg( RTC_BKP_DR1 )
kenjiArai 0:e4c20fd769f1 280 );
kenjiArai 0:e4c20fd769f1 281 pcr.printf( " TR =0x..%06x, DR =0x..%06x, CR =0x..%06x\r\n",
kenjiArai 0:e4c20fd769f1 282 RTC->TR, RTC->DR, RTC->CR
kenjiArai 0:e4c20fd769f1 283 );
kenjiArai 0:e4c20fd769f1 284 pcr.printf( " ISR =0x...%05x, PRER =0x..%06x, WUTR =0x....%04x\r\n",
kenjiArai 0:e4c20fd769f1 285 RTC->ISR, RTC->PRER, RTC->WUTR
kenjiArai 0:e4c20fd769f1 286 );
kenjiArai 13:44e5327acb05 287 #if (defined(TARGET_STM32F401RE) || defined(TARGET_STM32F411RE) \
kenjiArai 13:44e5327acb05 288 || defined(TARGET_STM32L152RE) )
kenjiArai 0:e4c20fd769f1 289 pcr.printf( " CALIBR=0x....%04x, ALRMAR=0x%08x, ALRMBR=0x%08x\r\n",
kenjiArai 0:e4c20fd769f1 290 RTC->CALIBR, RTC->ALRMAR, RTC->ALRMBR
kenjiArai 0:e4c20fd769f1 291 );
kenjiArai 9:1af4e107ca7b 292 #endif
kenjiArai 0:e4c20fd769f1 293 pcr.printf(
kenjiArai 0:e4c20fd769f1 294 " WPR =0x......%02x, SSR =0x....%04x, SHIFTR=0x....%04x\r\n",
kenjiArai 0:e4c20fd769f1 295 RTC->WPR, RTC->SSR, RTC->SHIFTR
kenjiArai 0:e4c20fd769f1 296 );
kenjiArai 0:e4c20fd769f1 297 pcr.printf(
kenjiArai 6:ef7d2c83034d 298 " TSTR =0x..%06x, TSDR =0x....%04x, TSSSR =0x....%04x\r\n",
kenjiArai 0:e4c20fd769f1 299 RTC->TSTR, RTC->TSDR, RTC->TSSSR
kenjiArai 0:e4c20fd769f1 300 );
kenjiArai 6:ef7d2c83034d 301 pcr.printf( "Show RCC registers (only RTC Related reg.)\r\n" );
kenjiArai 13:44e5327acb05 302 #if (defined(TARGET_STM32F401RE) || defined(TARGET_STM32F411RE) \
kenjiArai 14:78e453d7bb85 303 || defined(TARGET_STM32F334R8) || defined(TARGET_STM32L476RG) \
kenjiArai 14:78e453d7bb85 304 || defined(TARGET_STM32F746NG) || defined(TARGET_STM32F746ZG) )
kenjiArai 6:ef7d2c83034d 305 pcr.printf( " RCC_BDCR=0x...%05x\r\n", RCC->BDCR);
kenjiArai 6:ef7d2c83034d 306 #else
kenjiArai 6:ef7d2c83034d 307 pcr.printf( " RCC_CSR =0x%08x\r\n", RCC->CSR);
kenjiArai 6:ef7d2c83034d 308 #endif
kenjiArai 6:ef7d2c83034d 309 pcr.printf( "\r\n");
kenjiArai 0:e4c20fd769f1 310 }
kenjiArai 0:e4c20fd769f1 311
kenjiArai 0:e4c20fd769f1 312 // Change string -> integer
kenjiArai 0:e4c20fd769f1 313 int xatoi (char **str, unsigned long *res)
kenjiArai 0:e4c20fd769f1 314 {
kenjiArai 0:e4c20fd769f1 315 unsigned long val;
kenjiArai 0:e4c20fd769f1 316 unsigned char c, radix, s = 0;
kenjiArai 0:e4c20fd769f1 317
kenjiArai 0:e4c20fd769f1 318 while ((c = **str) == ' ') (*str)++;
kenjiArai 0:e4c20fd769f1 319 if (c == '-') {
kenjiArai 0:e4c20fd769f1 320 s = 1;
kenjiArai 0:e4c20fd769f1 321 c = *(++(*str));
kenjiArai 0:e4c20fd769f1 322 }
kenjiArai 0:e4c20fd769f1 323 if (c == '0') {
kenjiArai 0:e4c20fd769f1 324 c = *(++(*str));
kenjiArai 0:e4c20fd769f1 325 if (c <= ' ') {
kenjiArai 0:e4c20fd769f1 326 *res = 0;
kenjiArai 0:e4c20fd769f1 327 return 1;
kenjiArai 0:e4c20fd769f1 328 }
kenjiArai 0:e4c20fd769f1 329 if (c == 'x') {
kenjiArai 0:e4c20fd769f1 330 radix = 16;
kenjiArai 0:e4c20fd769f1 331 c = *(++(*str));
kenjiArai 0:e4c20fd769f1 332 } else {
kenjiArai 0:e4c20fd769f1 333 if (c == 'b') {
kenjiArai 0:e4c20fd769f1 334 radix = 2;
kenjiArai 0:e4c20fd769f1 335 c = *(++(*str));
kenjiArai 0:e4c20fd769f1 336 } else {
kenjiArai 0:e4c20fd769f1 337 if ((c >= '0')&&(c <= '9')) {
kenjiArai 0:e4c20fd769f1 338 radix = 8;
kenjiArai 0:e4c20fd769f1 339 } else {
kenjiArai 0:e4c20fd769f1 340 return 0;
kenjiArai 0:e4c20fd769f1 341 }
kenjiArai 0:e4c20fd769f1 342 }
kenjiArai 0:e4c20fd769f1 343 }
kenjiArai 0:e4c20fd769f1 344 } else {
kenjiArai 0:e4c20fd769f1 345 if ((c < '1')||(c > '9')) {
kenjiArai 0:e4c20fd769f1 346 return 0;
kenjiArai 0:e4c20fd769f1 347 }
kenjiArai 0:e4c20fd769f1 348 radix = 10;
kenjiArai 0:e4c20fd769f1 349 }
kenjiArai 0:e4c20fd769f1 350 val = 0;
kenjiArai 0:e4c20fd769f1 351 while (c > ' ') {
kenjiArai 0:e4c20fd769f1 352 if (c >= 'a') c -= 0x20;
kenjiArai 0:e4c20fd769f1 353 c -= '0';
kenjiArai 0:e4c20fd769f1 354 if (c >= 17) {
kenjiArai 0:e4c20fd769f1 355 c -= 7;
kenjiArai 0:e4c20fd769f1 356 if (c <= 9) return 0;
kenjiArai 0:e4c20fd769f1 357 }
kenjiArai 0:e4c20fd769f1 358 if (c >= radix) return 0;
kenjiArai 0:e4c20fd769f1 359 val = val * radix + c;
kenjiArai 0:e4c20fd769f1 360 c = *(++(*str));
kenjiArai 0:e4c20fd769f1 361 }
kenjiArai 0:e4c20fd769f1 362 if (s) val = -val;
kenjiArai 0:e4c20fd769f1 363 *res = val;
kenjiArai 0:e4c20fd769f1 364 return 1;
kenjiArai 0:e4c20fd769f1 365 }
kenjiArai 0:e4c20fd769f1 366
kenjiArai 0:e4c20fd769f1 367 // Get key input data
kenjiArai 0:e4c20fd769f1 368 void get_line (char *buff, int len)
kenjiArai 0:e4c20fd769f1 369 {
kenjiArai 0:e4c20fd769f1 370 char c;
kenjiArai 0:e4c20fd769f1 371 int idx = 0;
kenjiArai 0:e4c20fd769f1 372
kenjiArai 0:e4c20fd769f1 373 for (;;) {
kenjiArai 0:e4c20fd769f1 374 c = pcr.getc();
kenjiArai 0:e4c20fd769f1 375 if (c == '\r') {
kenjiArai 0:e4c20fd769f1 376 buff[idx++] = c;
kenjiArai 0:e4c20fd769f1 377 break;
kenjiArai 0:e4c20fd769f1 378 }
kenjiArai 0:e4c20fd769f1 379 if ((c == '\b') && idx) {
kenjiArai 0:e4c20fd769f1 380 idx--;
kenjiArai 0:e4c20fd769f1 381 pcr.putc(c);
kenjiArai 0:e4c20fd769f1 382 pcr.putc(' ');
kenjiArai 0:e4c20fd769f1 383 pcr.putc(c);
kenjiArai 0:e4c20fd769f1 384 }
kenjiArai 0:e4c20fd769f1 385 if (((uint8_t)c >= ' ') && (idx < len - 1)) {
kenjiArai 0:e4c20fd769f1 386 buff[idx++] = c;
kenjiArai 0:e4c20fd769f1 387 pcr.putc(c);
kenjiArai 0:e4c20fd769f1 388 }
kenjiArai 0:e4c20fd769f1 389 }
kenjiArai 0:e4c20fd769f1 390 buff[idx] = 0;
kenjiArai 0:e4c20fd769f1 391 pcr.putc('\n');
kenjiArai 0:e4c20fd769f1 392 }
kenjiArai 0:e4c20fd769f1 393
kenjiArai 0:e4c20fd769f1 394 // RTC related subroutines
kenjiArai 0:e4c20fd769f1 395 void chk_and_set_time(char *ptr)
kenjiArai 0:e4c20fd769f1 396 {
kenjiArai 0:e4c20fd769f1 397 unsigned long p1;
kenjiArai 0:e4c20fd769f1 398 struct tm t;
kenjiArai 0:e4c20fd769f1 399 time_t seconds;
kenjiArai 0:e4c20fd769f1 400
kenjiArai 0:e4c20fd769f1 401 if (xatoi(&ptr, &p1)) {
kenjiArai 0:e4c20fd769f1 402 t.tm_year = (uint8_t)p1 + 100;
kenjiArai 0:e4c20fd769f1 403 PRINTF("Year:%d ",p1);
kenjiArai 0:e4c20fd769f1 404 xatoi( &ptr, &p1 );
kenjiArai 0:e4c20fd769f1 405 t.tm_mon = (uint8_t)p1 - 1;
kenjiArai 0:e4c20fd769f1 406 PRINTF("Month:%d ",p1);
kenjiArai 0:e4c20fd769f1 407 xatoi( &ptr, &p1 );
kenjiArai 0:e4c20fd769f1 408 t.tm_mday = (uint8_t)p1;
kenjiArai 0:e4c20fd769f1 409 PRINTF("Day:%d ",p1);
kenjiArai 0:e4c20fd769f1 410 xatoi( &ptr, &p1 );
kenjiArai 0:e4c20fd769f1 411 t.tm_hour = (uint8_t)p1;
kenjiArai 0:e4c20fd769f1 412 PRINTF("Hour:%d ",p1);
kenjiArai 0:e4c20fd769f1 413 xatoi( &ptr, &p1 );
kenjiArai 0:e4c20fd769f1 414 t.tm_min = (uint8_t)p1;
kenjiArai 0:e4c20fd769f1 415 PRINTF("Min:%d ",p1);
kenjiArai 0:e4c20fd769f1 416 xatoi( &ptr, &p1 );
kenjiArai 0:e4c20fd769f1 417 t.tm_sec = (uint8_t)p1;
kenjiArai 0:e4c20fd769f1 418 PRINTF("Sec: %d \r\n",p1);
kenjiArai 0:e4c20fd769f1 419 } else {
kenjiArai 0:e4c20fd769f1 420 return;
kenjiArai 0:e4c20fd769f1 421 }
kenjiArai 0:e4c20fd769f1 422 seconds = mktime(&t);
kenjiArai 0:e4c20fd769f1 423 set_time(seconds);
kenjiArai 0:e4c20fd769f1 424 // Show Time with several example
kenjiArai 0:e4c20fd769f1 425 // ex.1
kenjiArai 13:44e5327acb05 426 pcr.printf(
kenjiArai 13:44e5327acb05 427 "Date: %04d/%02d/%02d, %02d:%02d:%02d\r\n",
kenjiArai 13:44e5327acb05 428 t.tm_year + 1900, t.tm_mon + 1, t.tm_mday, t.tm_hour, t.tm_min, t.tm_sec
kenjiArai 13:44e5327acb05 429 );
kenjiArai 0:e4c20fd769f1 430 #if 0
kenjiArai 0:e4c20fd769f1 431 time_t seconds;
kenjiArai 0:e4c20fd769f1 432 char buf[40];
kenjiArai 0:e4c20fd769f1 433
kenjiArai 0:e4c20fd769f1 434 seconds = mktime(&t);
kenjiArai 0:e4c20fd769f1 435 // ex.2
kenjiArai 0:e4c20fd769f1 436 strftime(buf, 40, "%x %X", localtime(&seconds));
kenjiArai 0:e4c20fd769f1 437 pcr.printf("Date: %s\r\n", buf);
kenjiArai 0:e4c20fd769f1 438 // ex.3
kenjiArai 0:e4c20fd769f1 439 strftime(buf, 40, "%I:%M:%S %p (%Y/%m/%d)", localtime(&seconds));
kenjiArai 0:e4c20fd769f1 440 pcr.printf("Date: %s\r\n", buf);
kenjiArai 0:e4c20fd769f1 441 // ex.4
kenjiArai 0:e4c20fd769f1 442 strftime(buf, 40, "%B %d,'%y, %H:%M:%S", localtime(&seconds));
kenjiArai 0:e4c20fd769f1 443 pcr.printf("Date: %s\r\n", buf);
kenjiArai 0:e4c20fd769f1 444 #endif
kenjiArai 0:e4c20fd769f1 445 }
kenjiArai 0:e4c20fd769f1 446
kenjiArai 0:e4c20fd769f1 447 void time_enter_mode(void)
kenjiArai 0:e4c20fd769f1 448 {
kenjiArai 0:e4c20fd769f1 449 char *ptr;
kenjiArai 0:e4c20fd769f1 450 char linebuf[64];
kenjiArai 0:e4c20fd769f1 451
kenjiArai 0:e4c20fd769f1 452 pcr.printf("\r\nSet time into RTC\r\n");
kenjiArai 13:44e5327acb05 453 pcr.printf(" e.g. >16 5 28 10 11 12 -> May 28th, '16, 10:11:12\r\n");
kenjiArai 0:e4c20fd769f1 454 pcr.printf(" If time is fine, just hit enter\r\n");
kenjiArai 0:e4c20fd769f1 455 pcr.putc('>');
kenjiArai 0:e4c20fd769f1 456 ptr = linebuf;
kenjiArai 0:e4c20fd769f1 457 get_line(ptr, sizeof(linebuf));
kenjiArai 0:e4c20fd769f1 458 pcr.printf("\r");
kenjiArai 0:e4c20fd769f1 459 chk_and_set_time(ptr);
kenjiArai 0:e4c20fd769f1 460 }
kenjiArai 0:e4c20fd769f1 461
kenjiArai 13:44e5327acb05 462 #if defined(TARGET_STM32L152RE)
kenjiArai 5:1a8e7aed053d 463 void goto_standby(void)
kenjiArai 2:765470eab2a6 464 {
kenjiArai 5:1a8e7aed053d 465 RCC->AHBENR |= (RCC_AHBENR_GPIOAEN | RCC_AHBENR_GPIOBEN | RCC_AHBENR_GPIOCEN |
kenjiArai 5:1a8e7aed053d 466 RCC_AHBENR_GPIODEN | RCC_AHBENR_GPIOHEN);
kenjiArai 5:1a8e7aed053d 467 #if 0
kenjiArai 2:765470eab2a6 468 GPIO_InitTypeDef GPIO_InitStruct;
kenjiArai 2:765470eab2a6 469 // All other ports are analog input mode
kenjiArai 2:765470eab2a6 470 GPIO_InitStruct.Pin = GPIO_PIN_All;
kenjiArai 2:765470eab2a6 471 GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
kenjiArai 2:765470eab2a6 472 GPIO_InitStruct.Pull = GPIO_NOPULL;
kenjiArai 2:765470eab2a6 473 GPIO_InitStruct.Speed = GPIO_SPEED_LOW;
kenjiArai 2:765470eab2a6 474 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
kenjiArai 2:765470eab2a6 475 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
kenjiArai 2:765470eab2a6 476 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
kenjiArai 2:765470eab2a6 477 HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
kenjiArai 2:765470eab2a6 478 HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
kenjiArai 2:765470eab2a6 479 HAL_GPIO_Init(GPIOH, &GPIO_InitStruct);
kenjiArai 5:1a8e7aed053d 480 #else
kenjiArai 5:1a8e7aed053d 481 GPIOA->MODER = 0xffffffff;
kenjiArai 5:1a8e7aed053d 482 GPIOB->MODER = 0xffffffff;
kenjiArai 5:1a8e7aed053d 483 GPIOC->MODER = 0xffffffff;
kenjiArai 5:1a8e7aed053d 484 GPIOD->MODER = 0xffffffff;
kenjiArai 5:1a8e7aed053d 485 GPIOE->MODER = 0xffffffff;
kenjiArai 5:1a8e7aed053d 486 GPIOH->MODER = 0xffffffff;
kenjiArai 5:1a8e7aed053d 487 #endif
kenjiArai 5:1a8e7aed053d 488 RCC->AHBENR &= ~(RCC_AHBENR_GPIOAEN | RCC_AHBENR_GPIOBEN |RCC_AHBENR_GPIOCEN |
kenjiArai 5:1a8e7aed053d 489 RCC_AHBENR_GPIODEN | RCC_AHBENR_GPIOHEN);
kenjiArai 2:765470eab2a6 490 while(1) {
kenjiArai 5:1a8e7aed053d 491 #if 0
kenjiArai 5:1a8e7aed053d 492 // Stop mode
kenjiArai 2:765470eab2a6 493 HAL_PWR_EnterSTOPMode(PWR_LOWPOWERREGULATOR_ON, PWR_STOPENTRY_WFI);
kenjiArai 5:1a8e7aed053d 494 #else
kenjiArai 5:1a8e7aed053d 495 // Standby mode
kenjiArai 5:1a8e7aed053d 496 HAL_PWR_EnterSTANDBYMode();
kenjiArai 5:1a8e7aed053d 497 #endif
kenjiArai 2:765470eab2a6 498 }
kenjiArai 2:765470eab2a6 499 }
kenjiArai 13:44e5327acb05 500 #else // defined(TARGET_STM32L152RE)
kenjiArai 5:1a8e7aed053d 501 void goto_standby(void)
kenjiArai 2:765470eab2a6 502 {
kenjiArai 5:1a8e7aed053d 503 deepsleep(); // Not Standby Mode but Deep Sleep Mode
kenjiArai 2:765470eab2a6 504 }
kenjiArai 13:44e5327acb05 505 #endif // defined(TARGET_STM32L152RE)
kenjiArai 2:765470eab2a6 506
kenjiArai 13:44e5327acb05 507 #if defined(TARGET_STM32L152RE)
kenjiArai 2:765470eab2a6 508 #if defined(USE_IRQ_FOR_RTC_BKUP)
kenjiArai 2:765470eab2a6 509 // COMP2 Interrupt routine
kenjiArai 2:765470eab2a6 510 void irq_comp2_handler(void)
kenjiArai 2:765470eab2a6 511 {
kenjiArai 2:765470eab2a6 512 __disable_irq();
kenjiArai 5:1a8e7aed053d 513 goto_standby();
kenjiArai 2:765470eab2a6 514 }
kenjiArai 2:765470eab2a6 515
kenjiArai 2:765470eab2a6 516 COMP_HandleTypeDef COMP_HandleStruct;
kenjiArai 2:765470eab2a6 517 GPIO_InitTypeDef GPIO_InitStruct;
kenjiArai 2:765470eab2a6 518
kenjiArai 5:1a8e7aed053d 519 // Set BOR level3 (2.54 to 2.74V)
kenjiArai 5:1a8e7aed053d 520 void set_BOR_level3(void)
kenjiArai 2:765470eab2a6 521 {
kenjiArai 2:765470eab2a6 522 FLASH_OBProgramInitTypeDef my_flash;
kenjiArai 2:765470eab2a6 523
kenjiArai 2:765470eab2a6 524 HAL_FLASHEx_OBGetConfig(&my_flash); // read current configuration
kenjiArai 5:1a8e7aed053d 525 if (my_flash.BORLevel != OB_BOR_LEVEL3) {
kenjiArai 5:1a8e7aed053d 526 my_flash.BORLevel = OB_BOR_LEVEL3;
kenjiArai 2:765470eab2a6 527 HAL_FLASHEx_OBProgram(&my_flash);
kenjiArai 2:765470eab2a6 528 }
kenjiArai 2:765470eab2a6 529 }
kenjiArai 2:765470eab2a6 530
kenjiArai 7:fa32602e23ec 531 void set_5v_drop_detect(uint8_t function_use)
kenjiArai 2:765470eab2a6 532 {
kenjiArai 7:fa32602e23ec 533 if (function_use == 0){ return;}
kenjiArai 5:1a8e7aed053d 534 set_BOR_level3();
kenjiArai 2:765470eab2a6 535 // Set Analog voltage input (PB5 or PB6)
kenjiArai 2:765470eab2a6 536 #if defined(USE_PB5_FOR_COMP)
kenjiArai 2:765470eab2a6 537 GPIO_InitStruct.Pin = GPIO_PIN_5; // PB5 comp input
kenjiArai 2:765470eab2a6 538 #elif defined(USE_PB6_FOR_COMP)
kenjiArai 2:765470eab2a6 539 GPIO_InitStruct.Pin = GPIO_PIN_6; // PB6 comp input
kenjiArai 2:765470eab2a6 540 #else
kenjiArai 2:765470eab2a6 541 #error "Please define USE_PB5_FOR_COMP or USE_PB6_FOR_COMP in SetRTC.h"
kenjiArai 2:765470eab2a6 542 #endif
kenjiArai 2:765470eab2a6 543 GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
kenjiArai 2:765470eab2a6 544 GPIO_InitStruct.Pull = GPIO_NOPULL;
kenjiArai 2:765470eab2a6 545 GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
kenjiArai 2:765470eab2a6 546 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
kenjiArai 2:765470eab2a6 547 // COMP2 sets for low volatage detection
kenjiArai 2:765470eab2a6 548 __COMP_CLK_ENABLE();
kenjiArai 2:765470eab2a6 549 COMP_HandleStruct.Instance = COMP2;
kenjiArai 2:765470eab2a6 550 COMP_HandleStruct.Init.InvertingInput = COMP_INVERTINGINPUT_VREFINT;
kenjiArai 2:765470eab2a6 551 #if defined(USE_PB5_FOR_COMP)
kenjiArai 2:765470eab2a6 552 COMP_HandleStruct.Init.NonInvertingInput = COMP_NONINVERTINGINPUT_PB5;
kenjiArai 2:765470eab2a6 553 #elif defined(USE_PB6_FOR_COMP)
kenjiArai 2:765470eab2a6 554 COMP_HandleStruct.Init.NonInvertingInput = COMP_NONINVERTINGINPUT_PB6;
kenjiArai 2:765470eab2a6 555 #endif
kenjiArai 2:765470eab2a6 556 COMP_HandleStruct.Init.Output = COMP_OUTPUT_NONE;
kenjiArai 2:765470eab2a6 557 COMP_HandleStruct.Init.Mode = COMP_MODE_HIGHSPEED;
kenjiArai 2:765470eab2a6 558 COMP_HandleStruct.Init.WindowMode = COMP_WINDOWMODE_DISABLED;
kenjiArai 2:765470eab2a6 559 COMP_HandleStruct.Init.TriggerMode = COMP_TRIGGERMODE_IT_FALLING;
kenjiArai 2:765470eab2a6 560 HAL_COMP_Init(&COMP_HandleStruct);
kenjiArai 2:765470eab2a6 561 // Interrupt configuration
kenjiArai 2:765470eab2a6 562 NVIC_SetVector(COMP_IRQn, (uint32_t)irq_comp2_handler);
kenjiArai 2:765470eab2a6 563 HAL_NVIC_SetPriority(COMP_IRQn, 0, 0);
kenjiArai 2:765470eab2a6 564 HAL_NVIC_ClearPendingIRQ(COMP_IRQn);
kenjiArai 2:765470eab2a6 565 HAL_COMP_Start_IT(&COMP_HandleStruct);
kenjiArai 2:765470eab2a6 566 HAL_NVIC_EnableIRQ(COMP_IRQn);
kenjiArai 2:765470eab2a6 567 }
kenjiArai 2:765470eab2a6 568 #else // defined(USE_IRQ_FOR_RTC_BKUP)
kenjiArai 7:fa32602e23ec 569 void set_5v_drop_detect(uint8_t function_use)
kenjiArai 2:765470eab2a6 570 {
kenjiArai 2:765470eab2a6 571 ; // No implementation
kenjiArai 2:765470eab2a6 572 }
kenjiArai 2:765470eab2a6 573 #endif // defined(USE_IRQ_FOR_RTC_BKUP)
kenjiArai 2:765470eab2a6 574
kenjiArai 13:44e5327acb05 575 #else // defined(TARGET_STM32L152RE)
kenjiArai 7:fa32602e23ec 576 void set_5v_drop_detect(uint8_t function_use)
kenjiArai 2:765470eab2a6 577 {
kenjiArai 2:765470eab2a6 578 ; // No implementation
kenjiArai 2:765470eab2a6 579 }
kenjiArai 13:44e5327acb05 580 #endif // defined(TARGET_STM32L152RE)
kenjiArai 14:78e453d7bb85 581 #else // defined(TARGET_STM32F401RE,_F411RE,_L152RE,_F334R8,_L476RG, _F746xx)
kenjiArai 14:78e453d7bb85 582 #error "No suport this mbed, only for Nucleo mbed"
kenjiArai 14:78e453d7bb85 583 #endif // defined(TARGET_STM32F401RE,_F411RE,_L152RE,_F334R8,_L476RG, _F746xx)
kenjiArai 2:765470eab2a6 584