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Fork of mbed by mbed official

Committer:
<>
Date:
Tue Nov 08 17:28:34 2016 +0000
Revision:
129:0ab6a29f35bf
Child:
131:faff56e089b2
Release 129 of the mbed library

Ports for Upcoming Targets

3011: Add u-blox Sara-N target. https://github.com/ARMmbed/mbed-os/pull/3011
3099: MAX32625 https://github.com/ARMmbed/mbed-os/pull/3099
3151: Add support for FRDM-K82F https://github.com/ARMmbed/mbed-os/pull/3151
3177: New mcu k22512 fixing pr 3136 https://github.com/ARMmbed/mbed-os/pull/3177

Fixes and Changes

3008: NUCLEO_F072RB: Fix wrong timer channel number on pwm PB_5 pin https://github.com/ARMmbed/mbed-os/pull/3008
3013: STM32xx - Change how the ADC internal pins are checked before pinmap_ https://github.com/ARMmbed/mbed-os/pull/3013
3041: [nRF5] - added implementation of API of serial port flow control configuration. https://github.com/ARMmbed/mbed-os/pull/3041
3084: [nrf5] fix in Digital I/O : a gpioe pin was uninitialized badly https://github.com/ARMmbed/mbed-os/pull/3084
3009: TRNG enabled. TRNG APIs implemented. REV A/B/C/D flags removed. Warnings removed https://github.com/ARMmbed/mbed-os/pull/3009
3074: Target stm init gcc alignement https://github.com/ARMmbed/mbed-os/pull/3074
2988: Update of can_api.c fixing #2987 https://github.com/ARMmbed/mbed-os/pull/2988
3173: [Exporters] Add a device_name to microbit entry in targets.json https://github.com/ARMmbed/mbed-os/pull/3173
2969: [nRF52] - switch irq priorities of driver handlers to the lowest level https://github.com/ARMmbed/mbed-os/pull/2969
3184: #3183 Compiler warning in trng_api.c with K64F https://github.com/ARMmbed/mbed-os/pull/3184
3104: [NuMaker] Support CAN and fix PWM CLK error https://github.com/ARMmbed/mbed-os/pull/3104
3186: MultiTech mDot - add back SPI3 pins https://github.com/ARMmbed/mbed-os/pull/3186
3075: nsapi - Add standardized return types for size and errors https://github.com/ARMmbed/mbed-os/pull/3075
3221: u-blox odin w2 drivers update https://github.com/ARMmbed/mbed-os/pull/3221

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 129:0ab6a29f35bf 1 /*
<> 129:0ab6a29f35bf 2 ** ###################################################################
<> 129:0ab6a29f35bf 3 ** Processors: MK82FN256CAx15
<> 129:0ab6a29f35bf 4 ** MK82FN256VDC15
<> 129:0ab6a29f35bf 5 ** MK82FN256VLL15
<> 129:0ab6a29f35bf 6 ** MK82FN256VLQ15
<> 129:0ab6a29f35bf 7 **
<> 129:0ab6a29f35bf 8 ** Compiler: IAR ANSI C/C++ Compiler for ARM
<> 129:0ab6a29f35bf 9 ** Reference manual: K82P121M150SF5RM, Rev. 0, May 2015
<> 129:0ab6a29f35bf 10 ** Version: rev. 1.2, 2015-07-29
<> 129:0ab6a29f35bf 11 ** Build: b160406
<> 129:0ab6a29f35bf 12 **
<> 129:0ab6a29f35bf 13 ** Abstract:
<> 129:0ab6a29f35bf 14 ** Linker file for the IAR ANSI C/C++ Compiler for ARM
<> 129:0ab6a29f35bf 15 **
<> 129:0ab6a29f35bf 16 ** Copyright (c) 2016 Freescale Semiconductor, Inc.
<> 129:0ab6a29f35bf 17 ** All rights reserved.
<> 129:0ab6a29f35bf 18 **
<> 129:0ab6a29f35bf 19 ** Redistribution and use in source and binary forms, with or without modification,
<> 129:0ab6a29f35bf 20 ** are permitted provided that the following conditions are met:
<> 129:0ab6a29f35bf 21 **
<> 129:0ab6a29f35bf 22 ** o Redistributions of source code must retain the above copyright notice, this list
<> 129:0ab6a29f35bf 23 ** of conditions and the following disclaimer.
<> 129:0ab6a29f35bf 24 **
<> 129:0ab6a29f35bf 25 ** o Redistributions in binary form must reproduce the above copyright notice, this
<> 129:0ab6a29f35bf 26 ** list of conditions and the following disclaimer in the documentation and/or
<> 129:0ab6a29f35bf 27 ** other materials provided with the distribution.
<> 129:0ab6a29f35bf 28 **
<> 129:0ab6a29f35bf 29 ** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
<> 129:0ab6a29f35bf 30 ** contributors may be used to endorse or promote products derived from this
<> 129:0ab6a29f35bf 31 ** software without specific prior written permission.
<> 129:0ab6a29f35bf 32 **
<> 129:0ab6a29f35bf 33 ** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
<> 129:0ab6a29f35bf 34 ** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
<> 129:0ab6a29f35bf 35 ** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 129:0ab6a29f35bf 36 ** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
<> 129:0ab6a29f35bf 37 ** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
<> 129:0ab6a29f35bf 38 ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
<> 129:0ab6a29f35bf 39 ** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
<> 129:0ab6a29f35bf 40 ** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
<> 129:0ab6a29f35bf 41 ** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
<> 129:0ab6a29f35bf 42 ** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 129:0ab6a29f35bf 43 **
<> 129:0ab6a29f35bf 44 ** http: www.freescale.com
<> 129:0ab6a29f35bf 45 ** mail: support@freescale.com
<> 129:0ab6a29f35bf 46 **
<> 129:0ab6a29f35bf 47 ** ###################################################################
<> 129:0ab6a29f35bf 48 */
<> 129:0ab6a29f35bf 49
<> 129:0ab6a29f35bf 50 define symbol __ram_vector_table__ = 1;
<> 129:0ab6a29f35bf 51
<> 129:0ab6a29f35bf 52 /* Heap 1/4 of ram and stack 1/8 */
<> 129:0ab6a29f35bf 53 define symbol __stack_size__=0x8000;
<> 129:0ab6a29f35bf 54 define symbol __heap_size__=0x10000;
<> 129:0ab6a29f35bf 55
<> 129:0ab6a29f35bf 56 define symbol __ram_vector_table_size__ = isdefinedsymbol(__ram_vector_table__) ? 0x000003C0 : 0;
<> 129:0ab6a29f35bf 57 define symbol __ram_vector_table_offset__ = isdefinedsymbol(__ram_vector_table__) ? 0x000003BF : 0;
<> 129:0ab6a29f35bf 58
<> 129:0ab6a29f35bf 59 define symbol m_interrupts_start = 0x00000000;
<> 129:0ab6a29f35bf 60 define symbol m_interrupts_end = 0x000003BF;
<> 129:0ab6a29f35bf 61
<> 129:0ab6a29f35bf 62 define symbol m_bootloader_config_start = 0x000003C0;
<> 129:0ab6a29f35bf 63 define symbol m_bootloader_config_end = 0x000003FF;
<> 129:0ab6a29f35bf 64
<> 129:0ab6a29f35bf 65 define symbol m_flash_config_start = 0x00000400;
<> 129:0ab6a29f35bf 66 define symbol m_flash_config_end = 0x0000040F;
<> 129:0ab6a29f35bf 67
<> 129:0ab6a29f35bf 68 define symbol m_text_start = 0x00000410;
<> 129:0ab6a29f35bf 69 define symbol m_text_end = 0x0003FFFF;
<> 129:0ab6a29f35bf 70
<> 129:0ab6a29f35bf 71 define symbol m_interrupts_ram_start = 0x1FFF0000;
<> 129:0ab6a29f35bf 72 define symbol m_interrupts_ram_end = 0x1FFF0000 + __ram_vector_table_offset__;
<> 129:0ab6a29f35bf 73
<> 129:0ab6a29f35bf 74 define symbol m_data_start = m_interrupts_ram_start + __ram_vector_table_size__;
<> 129:0ab6a29f35bf 75 define symbol m_data_end = 0x1FFFFFFF;
<> 129:0ab6a29f35bf 76
<> 129:0ab6a29f35bf 77 define symbol m_data_2_start = 0x20000000;
<> 129:0ab6a29f35bf 78 define symbol m_data_2_end = 0x2002FFFF;
<> 129:0ab6a29f35bf 79
<> 129:0ab6a29f35bf 80 /* Sizes */
<> 129:0ab6a29f35bf 81 if (isdefinedsymbol(__stack_size__)) {
<> 129:0ab6a29f35bf 82 define symbol __size_cstack__ = __stack_size__;
<> 129:0ab6a29f35bf 83 } else {
<> 129:0ab6a29f35bf 84 define symbol __size_cstack__ = 0x0400;
<> 129:0ab6a29f35bf 85 }
<> 129:0ab6a29f35bf 86
<> 129:0ab6a29f35bf 87 if (isdefinedsymbol(__heap_size__)) {
<> 129:0ab6a29f35bf 88 define symbol __size_heap__ = __heap_size__;
<> 129:0ab6a29f35bf 89 } else {
<> 129:0ab6a29f35bf 90 define symbol __size_heap__ = 0x0400;
<> 129:0ab6a29f35bf 91 }
<> 129:0ab6a29f35bf 92
<> 129:0ab6a29f35bf 93 define exported symbol __VECTOR_TABLE = m_interrupts_start;
<> 129:0ab6a29f35bf 94 define exported symbol __VECTOR_RAM = isdefinedsymbol(__ram_vector_table__) ? m_interrupts_ram_start : m_interrupts_start;
<> 129:0ab6a29f35bf 95 define exported symbol __RAM_VECTOR_TABLE_SIZE = __ram_vector_table_size__;
<> 129:0ab6a29f35bf 96
<> 129:0ab6a29f35bf 97 define memory mem with size = 4G;
<> 129:0ab6a29f35bf 98 define region m_bootloader_config_region = mem:[from m_bootloader_config_start to m_bootloader_config_end];
<> 129:0ab6a29f35bf 99 define region m_flash_config_region = mem:[from m_flash_config_start to m_flash_config_end];
<> 129:0ab6a29f35bf 100 define region TEXT_region = mem:[from m_interrupts_start to m_interrupts_end]
<> 129:0ab6a29f35bf 101 | mem:[from m_text_start to m_text_end];
<> 129:0ab6a29f35bf 102 define region DATA_region = mem:[from m_data_start to m_data_end]
<> 129:0ab6a29f35bf 103 | mem:[from m_data_2_start to m_data_2_end-__size_cstack__];
<> 129:0ab6a29f35bf 104 define region CSTACK_region = mem:[from m_data_2_end-__size_cstack__+1 to m_data_2_end];
<> 129:0ab6a29f35bf 105 define region m_interrupts_ram_region = mem:[from m_interrupts_ram_start to m_interrupts_ram_end];
<> 129:0ab6a29f35bf 106
<> 129:0ab6a29f35bf 107 define block CSTACK with alignment = 8, size = __size_cstack__ { };
<> 129:0ab6a29f35bf 108 define block HEAP with alignment = 8, size = __size_heap__ { };
<> 129:0ab6a29f35bf 109 define block RW { readwrite };
<> 129:0ab6a29f35bf 110 define block ZI { zi };
<> 129:0ab6a29f35bf 111
<> 129:0ab6a29f35bf 112 initialize by copy { readwrite, section .textrw };
<> 129:0ab6a29f35bf 113 do not initialize { section .noinit };
<> 129:0ab6a29f35bf 114
<> 129:0ab6a29f35bf 115 place at address mem: m_interrupts_start { readonly section .intvec };
<> 129:0ab6a29f35bf 116 place in m_bootloader_config_region { section BootloaderConfig };
<> 129:0ab6a29f35bf 117 place in m_flash_config_region { section FlashConfig };
<> 129:0ab6a29f35bf 118 place in TEXT_region { readonly };
<> 129:0ab6a29f35bf 119 place in DATA_region { block RW };
<> 129:0ab6a29f35bf 120 place in DATA_region { block ZI };
<> 129:0ab6a29f35bf 121 place in DATA_region { last block HEAP };
<> 129:0ab6a29f35bf 122 place in CSTACK_region { block CSTACK };
<> 129:0ab6a29f35bf 123 place in m_interrupts_ram_region { section m_interrupts_ram };
<> 129:0ab6a29f35bf 124