NXP Touch Cursor example for LPCXpresso54608, modified for use with Mbed OS.
The tutorial for this example can be found here: https://os.mbed.com/blog/entry/How-to-LPCXpresso54608-touch-panel/
board/board.h@0:c107a6f8c368, 2018-04-11 (annotated)
- Committer:
- jplunkett
- Date:
- Wed Apr 11 20:46:55 2018 +0000
- Revision:
- 0:c107a6f8c368
Init
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| jplunkett | 0:c107a6f8c368 | 1 | /* |
| jplunkett | 0:c107a6f8c368 | 2 | * The Clear BSD License |
| jplunkett | 0:c107a6f8c368 | 3 | * Copyright (c) 2016, Freescale Semiconductor, Inc. |
| jplunkett | 0:c107a6f8c368 | 4 | * Copyright 2016-2017 NXP |
| jplunkett | 0:c107a6f8c368 | 5 | * All rights reserved. |
| jplunkett | 0:c107a6f8c368 | 6 | * |
| jplunkett | 0:c107a6f8c368 | 7 | * |
| jplunkett | 0:c107a6f8c368 | 8 | * Redistribution and use in source and binary forms, with or without modification, |
| jplunkett | 0:c107a6f8c368 | 9 | * are permitted (subject to the limitations in the disclaimer below) provided |
| jplunkett | 0:c107a6f8c368 | 10 | * that the following conditions are met: |
| jplunkett | 0:c107a6f8c368 | 11 | * |
| jplunkett | 0:c107a6f8c368 | 12 | * o Redistributions of source code must retain the above copyright notice, this list |
| jplunkett | 0:c107a6f8c368 | 13 | * of conditions and the following disclaimer. |
| jplunkett | 0:c107a6f8c368 | 14 | * |
| jplunkett | 0:c107a6f8c368 | 15 | * o Redistributions in binary form must reproduce the above copyright notice, this |
| jplunkett | 0:c107a6f8c368 | 16 | * list of conditions and the following disclaimer in the documentation and/or |
| jplunkett | 0:c107a6f8c368 | 17 | * other materials provided with the distribution. |
| jplunkett | 0:c107a6f8c368 | 18 | * |
| jplunkett | 0:c107a6f8c368 | 19 | * o Neither the name of the copyright holder nor the names of its |
| jplunkett | 0:c107a6f8c368 | 20 | * contributors may be used to endorse or promote products derived from this |
| jplunkett | 0:c107a6f8c368 | 21 | * software without specific prior written permission. |
| jplunkett | 0:c107a6f8c368 | 22 | * |
| jplunkett | 0:c107a6f8c368 | 23 | * NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE. |
| jplunkett | 0:c107a6f8c368 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
| jplunkett | 0:c107a6f8c368 | 25 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
| jplunkett | 0:c107a6f8c368 | 26 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| jplunkett | 0:c107a6f8c368 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR |
| jplunkett | 0:c107a6f8c368 | 28 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
| jplunkett | 0:c107a6f8c368 | 29 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
| jplunkett | 0:c107a6f8c368 | 30 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
| jplunkett | 0:c107a6f8c368 | 31 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| jplunkett | 0:c107a6f8c368 | 32 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
| jplunkett | 0:c107a6f8c368 | 33 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| jplunkett | 0:c107a6f8c368 | 34 | */ |
| jplunkett | 0:c107a6f8c368 | 35 | |
| jplunkett | 0:c107a6f8c368 | 36 | #ifndef _BOARD_H_ |
| jplunkett | 0:c107a6f8c368 | 37 | #define _BOARD_H_ |
| jplunkett | 0:c107a6f8c368 | 38 | |
| jplunkett | 0:c107a6f8c368 | 39 | #include "clock_config.h" |
| jplunkett | 0:c107a6f8c368 | 40 | #include "fsl_common.h" |
| jplunkett | 0:c107a6f8c368 | 41 | #include "fsl_gpio.h" |
| jplunkett | 0:c107a6f8c368 | 42 | |
| jplunkett | 0:c107a6f8c368 | 43 | /******************************************************************************* |
| jplunkett | 0:c107a6f8c368 | 44 | * Definitions |
| jplunkett | 0:c107a6f8c368 | 45 | ******************************************************************************/ |
| jplunkett | 0:c107a6f8c368 | 46 | /*! @brief The board name */ |
| jplunkett | 0:c107a6f8c368 | 47 | #define BOARD_NAME "LPCXPRESSO54608" |
| jplunkett | 0:c107a6f8c368 | 48 | |
| jplunkett | 0:c107a6f8c368 | 49 | #define BOARD_EXTCLKINRATE (0) |
| jplunkett | 0:c107a6f8c368 | 50 | |
| jplunkett | 0:c107a6f8c368 | 51 | /*! @brief The UART to use for debug messages. */ |
| jplunkett | 0:c107a6f8c368 | 52 | /* TODO: rename UART to USART */ |
| jplunkett | 0:c107a6f8c368 | 53 | #define BOARD_DEBUG_UART_TYPE DEBUG_CONSOLE_DEVICE_TYPE_FLEXCOMM |
| jplunkett | 0:c107a6f8c368 | 54 | #define BOARD_DEBUG_UART_BASEADDR (uint32_t) USART0 |
| jplunkett | 0:c107a6f8c368 | 55 | #define BOARD_DEBUG_UART_INSTANCE 0U |
| jplunkett | 0:c107a6f8c368 | 56 | #define BOARD_DEBUG_UART_CLK_FREQ CLOCK_GetFreq(kCLOCK_Flexcomm0) |
| jplunkett | 0:c107a6f8c368 | 57 | #define BOARD_DEBUG_UART_CLK_ATTACH kFRO12M_to_FLEXCOMM0 |
| jplunkett | 0:c107a6f8c368 | 58 | #define BOARD_DEBUG_UART_RST kFC0_RST_SHIFT_RSTn |
| jplunkett | 0:c107a6f8c368 | 59 | #define BOARD_DEBUG_UART_CLKSRC kCLOCK_Flexcomm0 |
| jplunkett | 0:c107a6f8c368 | 60 | #define BOARD_UART_IRQ_HANDLER FLEXCOMM0_IRQHandler |
| jplunkett | 0:c107a6f8c368 | 61 | #define BOARD_UART_IRQ FLEXCOMM0_IRQn |
| jplunkett | 0:c107a6f8c368 | 62 | /* TODO: obsolete */ |
| jplunkett | 0:c107a6f8c368 | 63 | #define BOARD_DEBUG_SPI_CLK_FREQ 12000000 |
| jplunkett | 0:c107a6f8c368 | 64 | |
| jplunkett | 0:c107a6f8c368 | 65 | #ifndef BOARD_DEBUG_UART_BAUDRATE |
| jplunkett | 0:c107a6f8c368 | 66 | #define BOARD_DEBUG_UART_BAUDRATE 115200 |
| jplunkett | 0:c107a6f8c368 | 67 | #endif /* BOARD_DEBUG_UART_BAUDRATE */ |
| jplunkett | 0:c107a6f8c368 | 68 | |
| jplunkett | 0:c107a6f8c368 | 69 | /*! @brief The ENET PHY address. */ |
| jplunkett | 0:c107a6f8c368 | 70 | #define BOARD_ENET0_PHY_ADDRESS (0x00U) /* Phy address of enet port 0. */ |
| jplunkett | 0:c107a6f8c368 | 71 | |
| jplunkett | 0:c107a6f8c368 | 72 | #ifndef BOARD_LED1_GPIO |
| jplunkett | 0:c107a6f8c368 | 73 | #define BOARD_LED1_GPIO GPIO |
| jplunkett | 0:c107a6f8c368 | 74 | #endif |
| jplunkett | 0:c107a6f8c368 | 75 | #define BOARD_LED1_GPIO_PORT 3U |
| jplunkett | 0:c107a6f8c368 | 76 | #ifndef BOARD_LED1_GPIO_PIN |
| jplunkett | 0:c107a6f8c368 | 77 | #define BOARD_LED1_GPIO_PIN 14U |
| jplunkett | 0:c107a6f8c368 | 78 | #endif |
| jplunkett | 0:c107a6f8c368 | 79 | #ifndef BOARD_LED2_GPIO |
| jplunkett | 0:c107a6f8c368 | 80 | #define BOARD_LED2_GPIO GPIO |
| jplunkett | 0:c107a6f8c368 | 81 | #endif |
| jplunkett | 0:c107a6f8c368 | 82 | #define BOARD_LED2_GPIO_PORT 3U |
| jplunkett | 0:c107a6f8c368 | 83 | #ifndef BOARD_LED2_GPIO_PIN |
| jplunkett | 0:c107a6f8c368 | 84 | #define BOARD_LED2_GPIO_PIN 3U |
| jplunkett | 0:c107a6f8c368 | 85 | #endif |
| jplunkett | 0:c107a6f8c368 | 86 | #ifndef BOARD_LED3_GPIO |
| jplunkett | 0:c107a6f8c368 | 87 | #define BOARD_LED3_GPIO GPIO |
| jplunkett | 0:c107a6f8c368 | 88 | #endif |
| jplunkett | 0:c107a6f8c368 | 89 | #define BOARD_LED3_GPIO_PORT 2U |
| jplunkett | 0:c107a6f8c368 | 90 | #ifndef BOARD_LED3_GPIO_PIN |
| jplunkett | 0:c107a6f8c368 | 91 | #define BOARD_LED3_GPIO_PIN 2U |
| jplunkett | 0:c107a6f8c368 | 92 | #endif |
| jplunkett | 0:c107a6f8c368 | 93 | |
| jplunkett | 0:c107a6f8c368 | 94 | #ifndef BOARD_SW1_GPIO |
| jplunkett | 0:c107a6f8c368 | 95 | #define BOARD_SW1_GPIO GPIO |
| jplunkett | 0:c107a6f8c368 | 96 | #endif |
| jplunkett | 0:c107a6f8c368 | 97 | #define BOARD_SW1_GPIO_PORT 0U |
| jplunkett | 0:c107a6f8c368 | 98 | #ifndef BOARD_SW1_GPIO_PIN |
| jplunkett | 0:c107a6f8c368 | 99 | #define BOARD_SW1_GPIO_PIN 4U |
| jplunkett | 0:c107a6f8c368 | 100 | #endif |
| jplunkett | 0:c107a6f8c368 | 101 | #define BOARD_SW1_NAME "SW1" |
| jplunkett | 0:c107a6f8c368 | 102 | #define BOARD_SW3_IRQ PIN_INT0_IRQn |
| jplunkett | 0:c107a6f8c368 | 103 | #define BOARD_SW3_IRQ_HANDLER PIN_INT0_IRQHandler |
| jplunkett | 0:c107a6f8c368 | 104 | |
| jplunkett | 0:c107a6f8c368 | 105 | #ifndef BOARD_SW2_GPIO |
| jplunkett | 0:c107a6f8c368 | 106 | #define BOARD_SW2_GPIO GPIO |
| jplunkett | 0:c107a6f8c368 | 107 | #endif |
| jplunkett | 0:c107a6f8c368 | 108 | #define BOARD_SW2_GPIO_PORT 0U |
| jplunkett | 0:c107a6f8c368 | 109 | #ifndef BOARD_SW2_GPIO_PIN |
| jplunkett | 0:c107a6f8c368 | 110 | #define BOARD_SW2_GPIO_PIN 6U |
| jplunkett | 0:c107a6f8c368 | 111 | #endif |
| jplunkett | 0:c107a6f8c368 | 112 | #define BOARD_SW2_NAME "SW2" |
| jplunkett | 0:c107a6f8c368 | 113 | #define BOARD_SW2_IRQ PIN_INT0_IRQn |
| jplunkett | 0:c107a6f8c368 | 114 | #define BOARD_SW2_IRQ_HANDLER PIN_INT0_IRQHandler |
| jplunkett | 0:c107a6f8c368 | 115 | |
| jplunkett | 0:c107a6f8c368 | 116 | #ifndef BOARD_SW3_GPIO |
| jplunkett | 0:c107a6f8c368 | 117 | #define BOARD_SW3_GPIO GPIO |
| jplunkett | 0:c107a6f8c368 | 118 | #endif |
| jplunkett | 0:c107a6f8c368 | 119 | #define BOARD_SW3_GPIO_PORT 0U |
| jplunkett | 0:c107a6f8c368 | 120 | #ifndef BOARD_SW3_GPIO_PIN |
| jplunkett | 0:c107a6f8c368 | 121 | #define BOARD_SW3_GPIO_PIN 5U |
| jplunkett | 0:c107a6f8c368 | 122 | #endif |
| jplunkett | 0:c107a6f8c368 | 123 | #define BOARD_SW3_NAME "SW3" |
| jplunkett | 0:c107a6f8c368 | 124 | #define BOARD_SW3_IRQ PIN_INT0_IRQn |
| jplunkett | 0:c107a6f8c368 | 125 | #define BOARD_SW3_IRQ_HANDLER PIN_INT0_IRQHandler |
| jplunkett | 0:c107a6f8c368 | 126 | #define BOARD_SW3_GPIO_PININT_INDEX 0 |
| jplunkett | 0:c107a6f8c368 | 127 | |
| jplunkett | 0:c107a6f8c368 | 128 | #ifndef BOARD_SW4_GPIO |
| jplunkett | 0:c107a6f8c368 | 129 | #define BOARD_SW4_GPIO GPIO |
| jplunkett | 0:c107a6f8c368 | 130 | #endif |
| jplunkett | 0:c107a6f8c368 | 131 | #ifndef BOARD_SW4_GPIO_PORT |
| jplunkett | 0:c107a6f8c368 | 132 | #define BOARD_SW4_GPIO_PORT 0U |
| jplunkett | 0:c107a6f8c368 | 133 | #endif |
| jplunkett | 0:c107a6f8c368 | 134 | #ifndef BOARD_SW4_GPIO_PIN |
| jplunkett | 0:c107a6f8c368 | 135 | #define BOARD_SW4_GPIO_PIN 4U |
| jplunkett | 0:c107a6f8c368 | 136 | #endif |
| jplunkett | 0:c107a6f8c368 | 137 | #define BOARD_SW4_NAME "SW4" |
| jplunkett | 0:c107a6f8c368 | 138 | #define BOARD_SW4_IRQ PIN_INT0_IRQn |
| jplunkett | 0:c107a6f8c368 | 139 | #define BOARD_SW4_IRQ_HANDLER PIN_INT0_IRQHandler |
| jplunkett | 0:c107a6f8c368 | 140 | #define BOARD_SW4_GPIO_PININT_INDEX 0 |
| jplunkett | 0:c107a6f8c368 | 141 | |
| jplunkett | 0:c107a6f8c368 | 142 | #ifndef BOARD_SW5_GPIO |
| jplunkett | 0:c107a6f8c368 | 143 | #define BOARD_SW5_GPIO GPIO |
| jplunkett | 0:c107a6f8c368 | 144 | #endif |
| jplunkett | 0:c107a6f8c368 | 145 | #ifndef BOARD_SW5_GPIO_PORT |
| jplunkett | 0:c107a6f8c368 | 146 | #define BOARD_SW5_GPIO_PORT 1U |
| jplunkett | 0:c107a6f8c368 | 147 | #endif |
| jplunkett | 0:c107a6f8c368 | 148 | #ifndef BOARD_SW5_GPIO_PIN |
| jplunkett | 0:c107a6f8c368 | 149 | #define BOARD_SW5_GPIO_PIN 1U |
| jplunkett | 0:c107a6f8c368 | 150 | #endif |
| jplunkett | 0:c107a6f8c368 | 151 | #define BOARD_SW5_NAME "SW5" |
| jplunkett | 0:c107a6f8c368 | 152 | #define BOARD_SW5_IRQ PIN_INT1_IRQn |
| jplunkett | 0:c107a6f8c368 | 153 | #define BOARD_SW5_IRQ_HANDLER PIN_INT1_IRQHandler |
| jplunkett | 0:c107a6f8c368 | 154 | #define BOARD_SW5_GPIO_PININT_INDEX 0 |
| jplunkett | 0:c107a6f8c368 | 155 | |
| jplunkett | 0:c107a6f8c368 | 156 | #define BOARD_SDIF_BASEADDR SDIF |
| jplunkett | 0:c107a6f8c368 | 157 | #define BOARD_SDIF_CLKSRC kCLOCK_SDio |
| jplunkett | 0:c107a6f8c368 | 158 | #define BOARD_SDIF_CLK_FREQ CLOCK_GetFreq(kCLOCK_SDio) |
| jplunkett | 0:c107a6f8c368 | 159 | #define BOARD_SDIF_CLK_ATTACH kMCLK_to_SDIO_CLK |
| jplunkett | 0:c107a6f8c368 | 160 | #define BOARD_SDIF_IRQ SDIO_IRQn |
| jplunkett | 0:c107a6f8c368 | 161 | #define BOARD_MMC_VCC_SUPPLY kMMC_VoltageWindows270to360 |
| jplunkett | 0:c107a6f8c368 | 162 | #define BOARD_SD_CARD_DETECT_PIN 10 |
| jplunkett | 0:c107a6f8c368 | 163 | #define BOARD_SD_CARD_DETECT_PORT 2 |
| jplunkett | 0:c107a6f8c368 | 164 | #define BOARD_SD_CARD_DETECT_GPIO GPIO |
| jplunkett | 0:c107a6f8c368 | 165 | #define BOARD_SD_DETECT_TYPE kSDMMCHOST_DetectCardByHostCD |
| jplunkett | 0:c107a6f8c368 | 166 | |
| jplunkett | 0:c107a6f8c368 | 167 | #define BOARD_SDIF_CD_GPIO_INIT() \ |
| jplunkett | 0:c107a6f8c368 | 168 | { \ |
| jplunkett | 0:c107a6f8c368 | 169 | CLOCK_EnableClock(kCLOCK_Gpio2); \ |
| jplunkett | 0:c107a6f8c368 | 170 | GPIO_PinInit(BOARD_SD_CARD_DETECT_GPIO, BOARD_SD_CARD_DETECT_PORT, BOARD_SD_CARD_DETECT_PIN, \ |
| jplunkett | 0:c107a6f8c368 | 171 | &(gpio_pin_config_t){kGPIO_DigitalInput, 0U}); \ |
| jplunkett | 0:c107a6f8c368 | 172 | } |
| jplunkett | 0:c107a6f8c368 | 173 | #define BOARD_SDIF_CD_STATUS() \ |
| jplunkett | 0:c107a6f8c368 | 174 | GPIO_ReadPinInput(BOARD_SD_CARD_DETECT_GPIO, BOARD_SD_CARD_DETECT_PORT, BOARD_SD_CARD_DETECT_PIN) |
| jplunkett | 0:c107a6f8c368 | 175 | |
| jplunkett | 0:c107a6f8c368 | 176 | #define BOARD_ARDUINO_INT_IRQ (GINT0_IRQn) |
| jplunkett | 0:c107a6f8c368 | 177 | #define BOARD_ARDUINO_I2C_IRQ (FLEXCOMM2_IRQn) |
| jplunkett | 0:c107a6f8c368 | 178 | #define BOARD_ARDUINO_I2C_INDEX (2) |
| jplunkett | 0:c107a6f8c368 | 179 | |
| jplunkett | 0:c107a6f8c368 | 180 | /* Board led color mapping */ |
| jplunkett | 0:c107a6f8c368 | 181 | #define LOGIC_LED_ON 0U |
| jplunkett | 0:c107a6f8c368 | 182 | #define LOGIC_LED_OFF 1U |
| jplunkett | 0:c107a6f8c368 | 183 | |
| jplunkett | 0:c107a6f8c368 | 184 | #define LED1_INIT(output) \ |
| jplunkett | 0:c107a6f8c368 | 185 | GPIO_PinInit(BOARD_LED1_GPIO, BOARD_LED1_GPIO_PORT, BOARD_LED1_GPIO_PIN, \ |
| jplunkett | 0:c107a6f8c368 | 186 | &(gpio_pin_config_t){kGPIO_DigitalOutput, (output)}) /*!< Enable target LED1 */ |
| jplunkett | 0:c107a6f8c368 | 187 | #define LED1_ON() \ |
| jplunkett | 0:c107a6f8c368 | 188 | GPIO_PortClear(BOARD_LED1_GPIO, BOARD_LED1_GPIO_PORT, 1U << BOARD_LED1_GPIO_PIN) /*!< Turn on target LED1 */ |
| jplunkett | 0:c107a6f8c368 | 189 | #define LED1_OFF() \ |
| jplunkett | 0:c107a6f8c368 | 190 | GPIO_PortSet(BOARD_LED1_GPIO, BOARD_LED1_GPIO_PORT, 1U << BOARD_LED1_GPIO_PIN) /*!< Turn off target LED1 */ |
| jplunkett | 0:c107a6f8c368 | 191 | #define LED1_TOGGLE() \ |
| jplunkett | 0:c107a6f8c368 | 192 | GPIO_PortToggle(BOARD_LED1_GPIO, BOARD_LED1_GPIO_PORT, \ |
| jplunkett | 0:c107a6f8c368 | 193 | 1U << BOARD_LED1_GPIO_PIN) /*!< Toggle on target LED1 */ |
| jplunkett | 0:c107a6f8c368 | 194 | #define LED2_INIT(output) \ |
| jplunkett | 0:c107a6f8c368 | 195 | GPIO_PinInit(BOARD_LED2_GPIO, BOARD_LED2_GPIO_PORT, BOARD_LED2_GPIO_PIN, \ |
| jplunkett | 0:c107a6f8c368 | 196 | &(gpio_pin_config_t){kGPIO_DigitalOutput, (output)}) /*!< Enable target LED2 */ |
| jplunkett | 0:c107a6f8c368 | 197 | #define LED2_ON() \ |
| jplunkett | 0:c107a6f8c368 | 198 | GPIO_PortClear(BOARD_LED2_GPIO, BOARD_LED2_GPIO_PORT, 1U << BOARD_LED2_GPIO_PIN) /*!< Turn on target LED2 */ |
| jplunkett | 0:c107a6f8c368 | 199 | #define LED2_OFF() \ |
| jplunkett | 0:c107a6f8c368 | 200 | GPIO_PortSet(BOARD_LED2_GPIO, BOARD_LED2_GPIO_PORT, 1U << BOARD_LED2_GPIO_PIN) /*!< Turn off target LED2 */ |
| jplunkett | 0:c107a6f8c368 | 201 | #define LED2_TOGGLE() \ |
| jplunkett | 0:c107a6f8c368 | 202 | GPIO_PortToggle(BOARD_LED2_GPIO, BOARD_LED2_GPIO_PORT, \ |
| jplunkett | 0:c107a6f8c368 | 203 | 1U << BOARD_LED2_GPIO_PIN) /*!< Toggle on target LED2 */ |
| jplunkett | 0:c107a6f8c368 | 204 | |
| jplunkett | 0:c107a6f8c368 | 205 | #define LED3_INIT(output) \ |
| jplunkett | 0:c107a6f8c368 | 206 | GPIO_PinInit(BOARD_LED3_GPIO, BOARD_LED3_GPIO_PORT, BOARD_LED3_GPIO_PIN, \ |
| jplunkett | 0:c107a6f8c368 | 207 | &(gpio_pin_config_t){kGPIO_DigitalOutput, (output)}) /*!< Enable target LED3 */ |
| jplunkett | 0:c107a6f8c368 | 208 | #define LED3_ON() \ |
| jplunkett | 0:c107a6f8c368 | 209 | GPIO_PortClear(BOARD_LED3_GPIO, BOARD_LED3_GPIO_PORT, 1U << BOARD_LED3_GPIO_PIN) /*!< Turn on target LED3 */ |
| jplunkett | 0:c107a6f8c368 | 210 | #define LED3_OFF() \ |
| jplunkett | 0:c107a6f8c368 | 211 | GPIO_PortSet(BOARD_LED3_GPIO, BOARD_LED3_GPIO_PORT, 1U << BOARD_LED3_GPIO_PIN) /*!< Turn off target LED3 */ |
| jplunkett | 0:c107a6f8c368 | 212 | #define LED3_TOGGLE() \ |
| jplunkett | 0:c107a6f8c368 | 213 | GPIO_PortToggle(BOARD_LED3_GPIO, BOARD_LED3_GPIO_PORT, \ |
| jplunkett | 0:c107a6f8c368 | 214 | 1U << BOARD_LED3_GPIO_PIN) /*!< Toggle on target LED3 */ |
| jplunkett | 0:c107a6f8c368 | 215 | |
| jplunkett | 0:c107a6f8c368 | 216 | #if defined(__cplusplus) |
| jplunkett | 0:c107a6f8c368 | 217 | extern "C" { |
| jplunkett | 0:c107a6f8c368 | 218 | #endif /* __cplusplus */ |
| jplunkett | 0:c107a6f8c368 | 219 | |
| jplunkett | 0:c107a6f8c368 | 220 | /******************************************************************************* |
| jplunkett | 0:c107a6f8c368 | 221 | * API |
| jplunkett | 0:c107a6f8c368 | 222 | ******************************************************************************/ |
| jplunkett | 0:c107a6f8c368 | 223 | |
| jplunkett | 0:c107a6f8c368 | 224 | status_t BOARD_InitDebugConsole(void); |
| jplunkett | 0:c107a6f8c368 | 225 | void BOARD_InitSDRAM(void); |
| jplunkett | 0:c107a6f8c368 | 226 | |
| jplunkett | 0:c107a6f8c368 | 227 | #if defined(__cplusplus) |
| jplunkett | 0:c107a6f8c368 | 228 | } |
| jplunkett | 0:c107a6f8c368 | 229 | #endif /* __cplusplus */ |
| jplunkett | 0:c107a6f8c368 | 230 | |
| jplunkett | 0:c107a6f8c368 | 231 | #endif /* _BOARD_H_ */ |
Jenny Plunkett