John Mitchell
Loads bitmaps into QSPI memory for GC500_2_5inch to use.
Dependencies: DMBasicGUI DMSupport
easyGUIFixed/GuiDisplay.c@0:a5c253316af6, 2017-07-31 (annotated)
- Committer:
- jmitc91516
- Date:
- Mon Jul 31 15:44:39 2017 +0000
- Revision:
- 0:a5c253316af6
Background and scroll arrow bitmaps added to QSPI memory.
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| jmitc91516 | 0:a5c253316af6 | 1 | /* ************************************************************************ */ |
| jmitc91516 | 0:a5c253316af6 | 2 | /* */ |
| jmitc91516 | 0:a5c253316af6 | 3 | /* (C)2004-2014 IBIS Solutions ApS */ |
| jmitc91516 | 0:a5c253316af6 | 4 | /* sales@easyGUI.com */ |
| jmitc91516 | 0:a5c253316af6 | 5 | /* www.easyGUI.com */ |
| jmitc91516 | 0:a5c253316af6 | 6 | /* */ |
| jmitc91516 | 0:a5c253316af6 | 7 | /* easyGUI display driver unit */ |
| jmitc91516 | 0:a5c253316af6 | 8 | /* v6.0.23.002 */ |
| jmitc91516 | 0:a5c253316af6 | 9 | /* */ |
| jmitc91516 | 0:a5c253316af6 | 10 | /* ************************************************************************ */ |
| jmitc91516 | 0:a5c253316af6 | 11 | |
| jmitc91516 | 0:a5c253316af6 | 12 | #include "GuiConst.h" |
| jmitc91516 | 0:a5c253316af6 | 13 | #include "GuiDisplay.h" |
| jmitc91516 | 0:a5c253316af6 | 14 | #include "GuiLib.h" |
| jmitc91516 | 0:a5c253316af6 | 15 | #include <stdlib.h> |
| jmitc91516 | 0:a5c253316af6 | 16 | |
| jmitc91516 | 0:a5c253316af6 | 17 | #define WANT_DOUBLE_BUFFERING // Also in GuiGraph16.h, GuiLib.c - *** all three must match *** |
| jmitc91516 | 0:a5c253316af6 | 18 | |
| jmitc91516 | 0:a5c253316af6 | 19 | #define USE_WAIT_MS |
| jmitc91516 | 0:a5c253316af6 | 20 | #ifdef USE_WAIT_MS |
| jmitc91516 | 0:a5c253316af6 | 21 | extern void EasyGUIWaitMs(GuiConst_INT32U msec); // in main.cpp |
| jmitc91516 | 0:a5c253316af6 | 22 | #endif |
| jmitc91516 | 0:a5c253316af6 | 23 | |
| jmitc91516 | 0:a5c253316af6 | 24 | extern void SetupQSPIBitmapArray(int stageNumber); // In main.cpp |
| jmitc91516 | 0:a5c253316af6 | 25 | |
| jmitc91516 | 0:a5c253316af6 | 26 | // Make FRAME_ADDRESS able to be set at runtime, not hardcoded |
| jmitc91516 | 0:a5c253316af6 | 27 | static unsigned long frameAddress = 0L; |
| jmitc91516 | 0:a5c253316af6 | 28 | // Global function (actually called from the main function, in main.cpp) |
| jmitc91516 | 0:a5c253316af6 | 29 | // to set the frame address at startup |
| jmitc91516 | 0:a5c253316af6 | 30 | void GuiDisplay_SetFrameAddress(void *newFrameAddress) |
| jmitc91516 | 0:a5c253316af6 | 31 | { |
| jmitc91516 | 0:a5c253316af6 | 32 | // C/C++ is not happy copying a pointer value direct to an unsigned long |
| jmitc91516 | 0:a5c253316af6 | 33 | union { |
| jmitc91516 | 0:a5c253316af6 | 34 | void *ptrValue; |
| jmitc91516 | 0:a5c253316af6 | 35 | unsigned long ulValue; |
| jmitc91516 | 0:a5c253316af6 | 36 | } frameAddressUnion; |
| jmitc91516 | 0:a5c253316af6 | 37 | |
| jmitc91516 | 0:a5c253316af6 | 38 | frameAddressUnion.ptrValue = newFrameAddress; |
| jmitc91516 | 0:a5c253316af6 | 39 | |
| jmitc91516 | 0:a5c253316af6 | 40 | frameAddress = frameAddressUnion.ulValue; |
| jmitc91516 | 0:a5c253316af6 | 41 | } |
| jmitc91516 | 0:a5c253316af6 | 42 | |
| jmitc91516 | 0:a5c253316af6 | 43 | // Select LCD controller type by removing double slashes |
| jmitc91516 | 0:a5c253316af6 | 44 | // |
| jmitc91516 | 0:a5c253316af6 | 45 | // Many of the drivers listed here supports more than one display controller. |
| jmitc91516 | 0:a5c253316af6 | 46 | // To find your driver simply make a text search in this file. Omit eventual |
| jmitc91516 | 0:a5c253316af6 | 47 | // letters after the display controller type number. Example: For an NJU6450A |
| jmitc91516 | 0:a5c253316af6 | 48 | // display controller make a search for "NJU6450" - make sure it is a plain |
| jmitc91516 | 0:a5c253316af6 | 49 | // text search, not a word search. |
| jmitc91516 | 0:a5c253316af6 | 50 | // |
| jmitc91516 | 0:a5c253316af6 | 51 | // If your display controller is not found you can contact support at |
| jmitc91516 | 0:a5c253316af6 | 52 | // sales@ibissolutions.com. We will then quickly supply a driver for it. |
| jmitc91516 | 0:a5c253316af6 | 53 | // |
| jmitc91516 | 0:a5c253316af6 | 54 | // You only need to use the relevant display driver, all others may be deleted. |
| jmitc91516 | 0:a5c253316af6 | 55 | // Make a copy of this file before modifying it. |
| jmitc91516 | 0:a5c253316af6 | 56 | // |
| jmitc91516 | 0:a5c253316af6 | 57 | // ----------------------------------------------------------------------------- |
| jmitc91516 | 0:a5c253316af6 | 58 | // #define LCD_CONTROLLER_TYPE_AT32AP7000 |
| jmitc91516 | 0:a5c253316af6 | 59 | // #define LCD_CONTROLLER_TYPE_AT91RM9200_ST7565 |
| jmitc91516 | 0:a5c253316af6 | 60 | // #define LCD_CONTROLLER_TYPE_AT91SAM9263 |
| jmitc91516 | 0:a5c253316af6 | 61 | // #define LCD_CONTROLLER_TYPE_BVGP |
| jmitc91516 | 0:a5c253316af6 | 62 | // #define LCD_CONTROLLER_TYPE_D51E5TA7601 |
| jmitc91516 | 0:a5c253316af6 | 63 | // #define LCD_CONTROLLER_TYPE_F5529 |
| jmitc91516 | 0:a5c253316af6 | 64 | // #define LCD_CONTROLLER_TYPE_FLEVIPER |
| jmitc91516 | 0:a5c253316af6 | 65 | // #define LCD_CONTROLLER_TYPE_FSA506 |
| jmitc91516 | 0:a5c253316af6 | 66 | // #define LCD_CONTROLLER_TYPE_H8S2378 |
| jmitc91516 | 0:a5c253316af6 | 67 | // #define LCD_CONTROLLER_TYPE_HD61202_2H |
| jmitc91516 | 0:a5c253316af6 | 68 | // #define LCD_CONTROLLER_TYPE_HD61202_4H |
| jmitc91516 | 0:a5c253316af6 | 69 | // #define LCD_CONTROLLER_TYPE_HD61202_2H2V |
| jmitc91516 | 0:a5c253316af6 | 70 | // #define LCD_CONTROLLER_TYPE_HX8238_AT32AP7000 |
| jmitc91516 | 0:a5c253316af6 | 71 | // #define LCD_CONTROLLER_TYPE_HX8238_TMP92CH21 |
| jmitc91516 | 0:a5c253316af6 | 72 | // #define LCD_CONTROLLER_TYPE_HX8312 |
| jmitc91516 | 0:a5c253316af6 | 73 | // #define LCD_CONTROLLER_TYPE_HX8345 |
| jmitc91516 | 0:a5c253316af6 | 74 | // #define LCD_CONTROLLER_TYPE_HX8346 |
| jmitc91516 | 0:a5c253316af6 | 75 | // #define LCD_CONTROLLER_TYPE_HX8347 |
| jmitc91516 | 0:a5c253316af6 | 76 | // #define LCD_CONTROLLER_TYPE_HX8347G |
| jmitc91516 | 0:a5c253316af6 | 77 | // #define LCD_CONTROLLER_TYPE_HX8352A |
| jmitc91516 | 0:a5c253316af6 | 78 | // #define LCD_CONTROLLER_TYPE_ILI9341 |
| jmitc91516 | 0:a5c253316af6 | 79 | // #define LCD_CONTROLLER_TYPE_K70 |
| jmitc91516 | 0:a5c253316af6 | 80 | // #define LCD_CONTROLLER_TYPE_LC7981 |
| jmitc91516 | 0:a5c253316af6 | 81 | // #define LCD_CONTROLLER_TYPE_LS027 |
| jmitc91516 | 0:a5c253316af6 | 82 | // #define LCD_CONTROLLER_TYPE_LS044 |
| jmitc91516 | 0:a5c253316af6 | 83 | // #define LCD_CONTROLLER_TYPE_LH155BA |
| jmitc91516 | 0:a5c253316af6 | 84 | // #define LCD_CONTROLLER_TYPE_LH75401 |
| jmitc91516 | 0:a5c253316af6 | 85 | // #define LCD_CONTROLLER_TYPE_LH7A400 |
| jmitc91516 | 0:a5c253316af6 | 86 | // #define LCD_CONTROLLER_TYPE_LPC1788 |
| jmitc91516 | 0:a5c253316af6 | 87 | // #define LCD_CONTROLLER_TYPE_LPC1850 |
| jmitc91516 | 0:a5c253316af6 | 88 | // #define LCD_CONTROLLER_TYPE_LPC2478 |
| jmitc91516 | 0:a5c253316af6 | 89 | // #define LCD_CONTROLLER_TYPE_LPC3230 |
| jmitc91516 | 0:a5c253316af6 | 90 | #define LCD_CONTROLLER_TYPE_LPC408X |
| jmitc91516 | 0:a5c253316af6 | 91 | // #define LCD_CONTROLLER_TYPE_MPC5606S |
| jmitc91516 | 0:a5c253316af6 | 92 | // #define LCD_CONTROLLER_TYPE_MX257 |
| jmitc91516 | 0:a5c253316af6 | 93 | // #define LCD_CONTROLLER_TYPE_NJU6450A |
| jmitc91516 | 0:a5c253316af6 | 94 | // #define LCD_CONTROLLER_TYPE_NT39016D |
| jmitc91516 | 0:a5c253316af6 | 95 | // #define LCD_CONTROLLER_TYPE_NT75451 |
| jmitc91516 | 0:a5c253316af6 | 96 | // #define LCD_CONTROLLER_TYPE_OTM2201A |
| jmitc91516 | 0:a5c253316af6 | 97 | // #define LCD_CONTROLLER_TYPE_PCF8548 |
| jmitc91516 | 0:a5c253316af6 | 98 | // #define LCD_CONTROLLER_TYPE_PCF8813 |
| jmitc91516 | 0:a5c253316af6 | 99 | // #define LCD_CONTROLLER_TYPE_PIC24FJ256 |
| jmitc91516 | 0:a5c253316af6 | 100 | // #define LCD_CONTROLLER_TYPE_PXA320 |
| jmitc91516 | 0:a5c253316af6 | 101 | // #define LCD_CONTROLLER_TYPE_R61509 |
| jmitc91516 | 0:a5c253316af6 | 102 | // #define LCD_CONTROLLER_TYPE_R61526 |
| jmitc91516 | 0:a5c253316af6 | 103 | // #define LCD_CONTROLLER_TYPE_R61580 |
| jmitc91516 | 0:a5c253316af6 | 104 | // #define LCD_CONTROLLER_TYPE_RA8822 |
| jmitc91516 | 0:a5c253316af6 | 105 | // #define LCD_CONTROLLER_TYPE_RA8875 |
| jmitc91516 | 0:a5c253316af6 | 106 | // #define LCD_CONTROLLER_TYPE_S1D13505 |
| jmitc91516 | 0:a5c253316af6 | 107 | // #define LCD_CONTROLLER_TYPE_S1D13506 |
| jmitc91516 | 0:a5c253316af6 | 108 | // #define LCD_CONTROLLER_TYPE_S1D13700 |
| jmitc91516 | 0:a5c253316af6 | 109 | // #define LCD_CONTROLLER_TYPE_S1D13705 |
| jmitc91516 | 0:a5c253316af6 | 110 | // #define LCD_CONTROLLER_TYPE_S1D13706 |
| jmitc91516 | 0:a5c253316af6 | 111 | // #define LCD_CONTROLLER_TYPE_S1D13715 |
| jmitc91516 | 0:a5c253316af6 | 112 | // #define LCD_CONTROLLER_TYPE_S1D13743 |
| jmitc91516 | 0:a5c253316af6 | 113 | // #define LCD_CONTROLLER_TYPE_S1D13748 |
| jmitc91516 | 0:a5c253316af6 | 114 | // #define LCD_CONTROLLER_TYPE_S1D13781 |
| jmitc91516 | 0:a5c253316af6 | 115 | // #define LCD_CONTROLLER_TYPE_S1D13781_DIRECT |
| jmitc91516 | 0:a5c253316af6 | 116 | // #define LCD_CONTROLLER_TYPE_S1D13A04 |
| jmitc91516 | 0:a5c253316af6 | 117 | // #define LCD_CONTROLLER_TYPE_S1D13A05 |
| jmitc91516 | 0:a5c253316af6 | 118 | // #define LCD_CONTROLLER_TYPE_S1D15721 |
| jmitc91516 | 0:a5c253316af6 | 119 | // #define LCD_CONTROLLER_TYPE_S6B0741 |
| jmitc91516 | 0:a5c253316af6 | 120 | // #define LCD_CONTROLLER_TYPE_S6B33BL |
| jmitc91516 | 0:a5c253316af6 | 121 | // #define LCD_CONTROLLER_TYPE_S6D0139 |
| jmitc91516 | 0:a5c253316af6 | 122 | // #define LCD_CONTROLLER_TYPE_S6E63D6 |
| jmitc91516 | 0:a5c253316af6 | 123 | // #define LCD_CONTROLLER_TYPE_SBN1661_2H_SBN0080 |
| jmitc91516 | 0:a5c253316af6 | 124 | // #define LCD_CONTROLLER_TYPE_SED1335 |
| jmitc91516 | 0:a5c253316af6 | 125 | // #define LCD_CONTROLLER_TYPE_SEPS525 |
| jmitc91516 | 0:a5c253316af6 | 126 | // #define LCD_CONTROLLER_TYPE_SH1101A |
| jmitc91516 | 0:a5c253316af6 | 127 | // #define LCD_CONTROLLER_TYPE_SH1123 |
| jmitc91516 | 0:a5c253316af6 | 128 | // #define LCD_CONTROLLER_TYPE_SPFD5408 |
| jmitc91516 | 0:a5c253316af6 | 129 | // #define LCD_CONTROLLER_TYPE_SPLC502 |
| jmitc91516 | 0:a5c253316af6 | 130 | // #define LCD_CONTROLLER_TYPE_SSD0323 |
| jmitc91516 | 0:a5c253316af6 | 131 | // #define LCD_CONTROLLER_TYPE_SSD1289 |
| jmitc91516 | 0:a5c253316af6 | 132 | // #define LCD_CONTROLLER_TYPE_SSD1305 |
| jmitc91516 | 0:a5c253316af6 | 133 | // #define LCD_CONTROLLER_TYPE_SSD1322 |
| jmitc91516 | 0:a5c253316af6 | 134 | // #define LCD_CONTROLLER_TYPE_SSD1339 |
| jmitc91516 | 0:a5c253316af6 | 135 | // #define LCD_CONTROLLER_TYPE_SSD1815 |
| jmitc91516 | 0:a5c253316af6 | 136 | // #define LCD_CONTROLLER_TYPE_SSD1815_2H |
| jmitc91516 | 0:a5c253316af6 | 137 | // #define LCD_CONTROLLER_TYPE_SSD1848 |
| jmitc91516 | 0:a5c253316af6 | 138 | // #define LCD_CONTROLLER_TYPE_SSD1858 |
| jmitc91516 | 0:a5c253316af6 | 139 | // #define LCD_CONTROLLER_TYPE_SSD1926 |
| jmitc91516 | 0:a5c253316af6 | 140 | // #define LCD_CONTROLLER_TYPE_SSD1963 |
| jmitc91516 | 0:a5c253316af6 | 141 | // #define LCD_CONTROLLER_TYPE_SSD2119 |
| jmitc91516 | 0:a5c253316af6 | 142 | // #define LCD_CONTROLLER_TYPE_ST7529 |
| jmitc91516 | 0:a5c253316af6 | 143 | // #define LCD_CONTROLLER_TYPE_ST7541 |
| jmitc91516 | 0:a5c253316af6 | 144 | // #define LCD_CONTROLLER_TYPE_ST7561 |
| jmitc91516 | 0:a5c253316af6 | 145 | // #define LCD_CONTROLLER_TYPE_ST7565 |
| jmitc91516 | 0:a5c253316af6 | 146 | // #define LCD_CONTROLLER_TYPE_ST7586 |
| jmitc91516 | 0:a5c253316af6 | 147 | // #define LCD_CONTROLLER_TYPE_ST7637 |
| jmitc91516 | 0:a5c253316af6 | 148 | // #define LCD_CONTROLLER_TYPE_ST7715 |
| jmitc91516 | 0:a5c253316af6 | 149 | // #define LCD_CONTROLLER_TYPE_ST7920 |
| jmitc91516 | 0:a5c253316af6 | 150 | // #define LCD_CONTROLLER_TYPE_STM32F429 |
| jmitc91516 | 0:a5c253316af6 | 151 | // #define LCD_CONTROLLER_TYPE_T6963 |
| jmitc91516 | 0:a5c253316af6 | 152 | // #define LCD_CONTROLLER_TYPE_TLS8201 |
| jmitc91516 | 0:a5c253316af6 | 153 | // #define LCD_CONTROLLER_TYPE_TMPA900 |
| jmitc91516 | 0:a5c253316af6 | 154 | // #define LCD_CONTROLLER_TYPE_TS7390 |
| jmitc91516 | 0:a5c253316af6 | 155 | // #define LCD_CONTROLLER_TYPE_UC1608 |
| jmitc91516 | 0:a5c253316af6 | 156 | // #define LCD_CONTROLLER_TYPE_UC1610 |
| jmitc91516 | 0:a5c253316af6 | 157 | // #define LCD_CONTROLLER_TYPE_UC1611 |
| jmitc91516 | 0:a5c253316af6 | 158 | // #define LCD_CONTROLLER_TYPE_UC1617 |
| jmitc91516 | 0:a5c253316af6 | 159 | // #define LCD_CONTROLLER_TYPE_UC1698 |
| jmitc91516 | 0:a5c253316af6 | 160 | // #define LCD_CONTROLLER_TYPE_UPD161607 |
| jmitc91516 | 0:a5c253316af6 | 161 | // #define LCD_CONTROLLER_TYPE_UC1701 |
| jmitc91516 | 0:a5c253316af6 | 162 | |
| jmitc91516 | 0:a5c253316af6 | 163 | // ============================================================================ |
| jmitc91516 | 0:a5c253316af6 | 164 | // |
| jmitc91516 | 0:a5c253316af6 | 165 | // COMMON PART - NOT DEPENDENT ON DISPLAY CONTROLLER TYPE |
| jmitc91516 | 0:a5c253316af6 | 166 | // |
| jmitc91516 | 0:a5c253316af6 | 167 | // Do not delete this part of the GuiDisplay.c file. |
| jmitc91516 | 0:a5c253316af6 | 168 | // |
| jmitc91516 | 0:a5c253316af6 | 169 | // If your operating system uses pre-emptive execution, i.e. it interrupts tasks |
| jmitc91516 | 0:a5c253316af6 | 170 | // at random instances, and transfers control to other tasks, display writing |
| jmitc91516 | 0:a5c253316af6 | 171 | // must be protected from this, by writing code for the two protection |
| jmitc91516 | 0:a5c253316af6 | 172 | // functions: |
| jmitc91516 | 0:a5c253316af6 | 173 | // |
| jmitc91516 | 0:a5c253316af6 | 174 | // o GuiDisplay_Lock Prevent the OS from switching tasks |
| jmitc91516 | 0:a5c253316af6 | 175 | // o GuiDisplay_Unlock Open up normal task execution again |
| jmitc91516 | 0:a5c253316af6 | 176 | // |
| jmitc91516 | 0:a5c253316af6 | 177 | // If your operating system does not use pre-emptive execution, i.e. if you |
| jmitc91516 | 0:a5c253316af6 | 178 | // must specifically release control in one tasks in order for other tasks to |
| jmitc91516 | 0:a5c253316af6 | 179 | // be serviced, or if you don't employ an operating system at all, you can just |
| jmitc91516 | 0:a5c253316af6 | 180 | // leave the two protection functions empty. Failing to write proper code for |
| jmitc91516 | 0:a5c253316af6 | 181 | // the protection functions will result in a system with unpredictable |
| jmitc91516 | 0:a5c253316af6 | 182 | // behavior. |
| jmitc91516 | 0:a5c253316af6 | 183 | // |
| jmitc91516 | 0:a5c253316af6 | 184 | // ============================================================================ |
| jmitc91516 | 0:a5c253316af6 | 185 | |
| jmitc91516 | 0:a5c253316af6 | 186 | void GuiDisplay_Lock (void) |
| jmitc91516 | 0:a5c253316af6 | 187 | { |
| jmitc91516 | 0:a5c253316af6 | 188 | } |
| jmitc91516 | 0:a5c253316af6 | 189 | |
| jmitc91516 | 0:a5c253316af6 | 190 | void GuiDisplay_Unlock (void) |
| jmitc91516 | 0:a5c253316af6 | 191 | { |
| jmitc91516 | 0:a5c253316af6 | 192 | } |
| jmitc91516 | 0:a5c253316af6 | 193 | |
| jmitc91516 | 0:a5c253316af6 | 194 | // ============================================================================ |
| jmitc91516 | 0:a5c253316af6 | 195 | // |
| jmitc91516 | 0:a5c253316af6 | 196 | // DISPLAY DRIVER PART |
| jmitc91516 | 0:a5c253316af6 | 197 | // |
| jmitc91516 | 0:a5c253316af6 | 198 | // You only need to use the relevant display driver, all others may be deleted. |
| jmitc91516 | 0:a5c253316af6 | 199 | // Modify the driver so that it fits your specific hardware. |
| jmitc91516 | 0:a5c253316af6 | 200 | // Make a copy of this file before modifying it. |
| jmitc91516 | 0:a5c253316af6 | 201 | // |
| jmitc91516 | 0:a5c253316af6 | 202 | // ============================================================================ |
| jmitc91516 | 0:a5c253316af6 | 203 | |
| jmitc91516 | 0:a5c253316af6 | 204 | #ifdef LCD_CONTROLLER_TYPE_LPC408X |
| jmitc91516 | 0:a5c253316af6 | 205 | |
| jmitc91516 | 0:a5c253316af6 | 206 | // ============================================================================ |
| jmitc91516 | 0:a5c253316af6 | 207 | // |
| jmitc91516 | 0:a5c253316af6 | 208 | // LPC408x MICROCONTROLLER WITH BUILT-IN DISPLAY CONTROLLER |
| jmitc91516 | 0:a5c253316af6 | 209 | // |
| jmitc91516 | 0:a5c253316af6 | 210 | // This driver uses internal LCD controller of LPC408x microcontroller. |
| jmitc91516 | 0:a5c253316af6 | 211 | // LCD driver of LPC408x in 24 bit RGB parallel interface for TFT type |
| jmitc91516 | 0:a5c253316af6 | 212 | // display or 4bit parallel interface for STN type display. |
| jmitc91516 | 0:a5c253316af6 | 213 | // Graphic modes up to 1024x768 pixels. |
| jmitc91516 | 0:a5c253316af6 | 214 | // |
| jmitc91516 | 0:a5c253316af6 | 215 | // Compatible display controllers: |
| jmitc91516 | 0:a5c253316af6 | 216 | // None |
| jmitc91516 | 0:a5c253316af6 | 217 | // |
| jmitc91516 | 0:a5c253316af6 | 218 | // easyGUI setup should be (Parameters window, Display controller tab page): |
| jmitc91516 | 0:a5c253316af6 | 219 | // Horizontal bytes |
| jmitc91516 | 0:a5c253316af6 | 220 | // Bit 0 at right |
| jmitc91516 | 0:a5c253316af6 | 221 | // Number of color planes: 1 |
| jmitc91516 | 0:a5c253316af6 | 222 | // Color mode: Grayscale, palette or RGB |
| jmitc91516 | 0:a5c253316af6 | 223 | // Color depth: 1 bit (B/W), 8 bits, 16 bits, 24 bits |
| jmitc91516 | 0:a5c253316af6 | 224 | // Display orientation: Normal, Upside down, 90 degrees left, 90 degrees right |
| jmitc91516 | 0:a5c253316af6 | 225 | // Display words with reversed bytes: Off |
| jmitc91516 | 0:a5c253316af6 | 226 | // Number of display controllers, horizontally: 1 |
| jmitc91516 | 0:a5c253316af6 | 227 | // Number of display controllers, vertically: 1 |
| jmitc91516 | 0:a5c253316af6 | 228 | // |
| jmitc91516 | 0:a5c253316af6 | 229 | // Port addresses (Px.x) must be altered to correspond to your microcontroller |
| jmitc91516 | 0:a5c253316af6 | 230 | // hardware and compiler syntax. |
| jmitc91516 | 0:a5c253316af6 | 231 | // |
| jmitc91516 | 0:a5c253316af6 | 232 | // ============================================================================ |
| jmitc91516 | 0:a5c253316af6 | 233 | |
| jmitc91516 | 0:a5c253316af6 | 234 | // Hardware connection for TFT display |
| jmitc91516 | 0:a5c253316af6 | 235 | // LPC408x generic TFT display |
| jmitc91516 | 0:a5c253316af6 | 236 | // LCD_FP - VSYNC |
| jmitc91516 | 0:a5c253316af6 | 237 | // LCD_LP - HSYNC |
| jmitc91516 | 0:a5c253316af6 | 238 | // LCD_LE - Line End |
| jmitc91516 | 0:a5c253316af6 | 239 | // LCD_DCLK - Pixel CLK |
| jmitc91516 | 0:a5c253316af6 | 240 | // LCD_ENAB_M - DATA_ENABLE |
| jmitc91516 | 0:a5c253316af6 | 241 | // LCD_VD[0-7] - R0-R7 (for 16bit RGB mode connect R0,R1,R2 to 0) |
| jmitc91516 | 0:a5c253316af6 | 242 | // LCD_VD[8-15] - G0-G7 (for 16bit RGB mode connect G0,G1 to 0) |
| jmitc91516 | 0:a5c253316af6 | 243 | // LCD_VD[16-23] - B0-B7 (for 16bit RGB mode connect B0,B1,B2 to 0) |
| jmitc91516 | 0:a5c253316af6 | 244 | |
| jmitc91516 | 0:a5c253316af6 | 245 | // Hardware connection for STN display |
| jmitc91516 | 0:a5c253316af6 | 246 | // LCD_PWR - DISP |
| jmitc91516 | 0:a5c253316af6 | 247 | // LCD_DCLK - CL2 |
| jmitc91516 | 0:a5c253316af6 | 248 | // LCD_FP - Frame Pulse |
| jmitc91516 | 0:a5c253316af6 | 249 | // LCD_LP - Line Sync Pulse |
| jmitc91516 | 0:a5c253316af6 | 250 | // LCD_LE - Line End |
| jmitc91516 | 0:a5c253316af6 | 251 | // LCD_VD[3:0] - UD[3:0] |
| jmitc91516 | 0:a5c253316af6 | 252 | |
| jmitc91516 | 0:a5c253316af6 | 253 | // Power Control registers |
| jmitc91516 | 0:a5c253316af6 | 254 | #define PCONP (*(volatile unsigned long *)0x400FC0C4) |
| jmitc91516 | 0:a5c253316af6 | 255 | // LCD controller power control bit |
| jmitc91516 | 0:a5c253316af6 | 256 | #define PCLCD 0 |
| jmitc91516 | 0:a5c253316af6 | 257 | |
| jmitc91516 | 0:a5c253316af6 | 258 | // Pin setup registers (IOCON) |
| jmitc91516 | 0:a5c253316af6 | 259 | #define IOCON_P0_4 (*(volatile unsigned long *)0x4002C010) |
| jmitc91516 | 0:a5c253316af6 | 260 | #define IOCON_P0_5 (*(volatile unsigned long *)0x4002C014) |
| jmitc91516 | 0:a5c253316af6 | 261 | #define IOCON_P0_6 (*(volatile unsigned long *)0x4002C018) |
| jmitc91516 | 0:a5c253316af6 | 262 | #define IOCON_P0_7 (*(volatile unsigned long *)0x4002C01C) |
| jmitc91516 | 0:a5c253316af6 | 263 | #define IOCON_P0_8 (*(volatile unsigned long *)0x4002C020) |
| jmitc91516 | 0:a5c253316af6 | 264 | #define IOCON_P0_9 (*(volatile unsigned long *)0x4002C024) |
| jmitc91516 | 0:a5c253316af6 | 265 | #define IOCON_P1_20 (*(volatile unsigned long *)0x4002C0D0) |
| jmitc91516 | 0:a5c253316af6 | 266 | #define IOCON_P1_21 (*(volatile unsigned long *)0x4002C0D4) |
| jmitc91516 | 0:a5c253316af6 | 267 | #define IOCON_P1_22 (*(volatile unsigned long *)0x4002C0D8) |
| jmitc91516 | 0:a5c253316af6 | 268 | #define IOCON_P1_23 (*(volatile unsigned long *)0x4002C0DC) |
| jmitc91516 | 0:a5c253316af6 | 269 | #define IOCON_P1_24 (*(volatile unsigned long *)0x4002C0E0) |
| jmitc91516 | 0:a5c253316af6 | 270 | #define IOCON_P1_25 (*(volatile unsigned long *)0x4002C0E4) |
| jmitc91516 | 0:a5c253316af6 | 271 | #define IOCON_P1_26 (*(volatile unsigned long *)0x4002C0E8) |
| jmitc91516 | 0:a5c253316af6 | 272 | #define IOCON_P1_27 (*(volatile unsigned long *)0x4002C0EC) |
| jmitc91516 | 0:a5c253316af6 | 273 | #define IOCON_P1_28 (*(volatile unsigned long *)0x4002C0F0) |
| jmitc91516 | 0:a5c253316af6 | 274 | #define IOCON_P1_29 (*(volatile unsigned long *)0x4002C0F4) |
| jmitc91516 | 0:a5c253316af6 | 275 | #define IOCON_P2_0 (*(volatile unsigned long *)0x4002C100) |
| jmitc91516 | 0:a5c253316af6 | 276 | #define IOCON_P2_1 (*(volatile unsigned long *)0x4002C104) |
| jmitc91516 | 0:a5c253316af6 | 277 | #define IOCON_P2_2 (*(volatile unsigned long *)0x4002C108) |
| jmitc91516 | 0:a5c253316af6 | 278 | #define IOCON_P2_3 (*(volatile unsigned long *)0x4002C10C) |
| jmitc91516 | 0:a5c253316af6 | 279 | #define IOCON_P2_4 (*(volatile unsigned long *)0x4002C110) |
| jmitc91516 | 0:a5c253316af6 | 280 | #define IOCON_P2_5 (*(volatile unsigned long *)0x4002C114) |
| jmitc91516 | 0:a5c253316af6 | 281 | #define IOCON_P2_6 (*(volatile unsigned long *)0x4002C118) |
| jmitc91516 | 0:a5c253316af6 | 282 | #define IOCON_P2_7 (*(volatile unsigned long *)0x4002C11C) |
| jmitc91516 | 0:a5c253316af6 | 283 | #define IOCON_P2_8 (*(volatile unsigned long *)0x4002C120) |
| jmitc91516 | 0:a5c253316af6 | 284 | #define IOCON_P2_9 (*(volatile unsigned long *)0x4002C124) |
| jmitc91516 | 0:a5c253316af6 | 285 | #define IOCON_P2_11 (*(volatile unsigned long *)0x4002C12C) |
| jmitc91516 | 0:a5c253316af6 | 286 | #define IOCON_P2_12 (*(volatile unsigned long *)0x4002C130) |
| jmitc91516 | 0:a5c253316af6 | 287 | #define IOCON_P2_13 (*(volatile unsigned long *)0x4002C134) |
| jmitc91516 | 0:a5c253316af6 | 288 | #define IOCON_P4_28 (*(volatile unsigned long *)0x4002C270) |
| jmitc91516 | 0:a5c253316af6 | 289 | #define IOCON_P4_29 (*(volatile unsigned long *)0x4002C274) |
| jmitc91516 | 0:a5c253316af6 | 290 | |
| jmitc91516 | 0:a5c253316af6 | 291 | // LCD Port Enable |
| jmitc91516 | 0:a5c253316af6 | 292 | #define LCDPE 1 |
| jmitc91516 | 0:a5c253316af6 | 293 | |
| jmitc91516 | 0:a5c253316af6 | 294 | // LCD controller registers |
| jmitc91516 | 0:a5c253316af6 | 295 | // LCD configuration register |
| jmitc91516 | 0:a5c253316af6 | 296 | #define LCD_CFG (*(volatile unsigned long *)0x400FC1B8) |
| jmitc91516 | 0:a5c253316af6 | 297 | |
| jmitc91516 | 0:a5c253316af6 | 298 | // LCD Controller Base Address |
| jmitc91516 | 0:a5c253316af6 | 299 | #define LCD_BASE 0x20088000 |
| jmitc91516 | 0:a5c253316af6 | 300 | |
| jmitc91516 | 0:a5c253316af6 | 301 | // Horizontal Timing Control |
| jmitc91516 | 0:a5c253316af6 | 302 | #define LCD_TIMH (*(volatile unsigned long *)(LCD_BASE+0x000)) |
| jmitc91516 | 0:a5c253316af6 | 303 | // Vertical Timing Control |
| jmitc91516 | 0:a5c253316af6 | 304 | #define LCD_TIMV (*(volatile unsigned long *)(LCD_BASE+0x004)) |
| jmitc91516 | 0:a5c253316af6 | 305 | // Clock and Signal Polarity Control register |
| jmitc91516 | 0:a5c253316af6 | 306 | #define LCD_POL (*(volatile unsigned long *)(LCD_BASE+0x008)) |
| jmitc91516 | 0:a5c253316af6 | 307 | // Line End Control register |
| jmitc91516 | 0:a5c253316af6 | 308 | #define LCD_LE (*(volatile unsigned long *)(LCD_BASE+0x00C)) |
| jmitc91516 | 0:a5c253316af6 | 309 | // Upper Panel Frame Base Address register |
| jmitc91516 | 0:a5c253316af6 | 310 | #define LCD_UPBASE (*(volatile unsigned long *)(LCD_BASE+0x010)) |
| jmitc91516 | 0:a5c253316af6 | 311 | // Lower Panel Frame Base Address register |
| jmitc91516 | 0:a5c253316af6 | 312 | #define LCD_LPBASE (*(volatile unsigned long *)(LCD_BASE+0x014)) |
| jmitc91516 | 0:a5c253316af6 | 313 | // LCD Control register |
| jmitc91516 | 0:a5c253316af6 | 314 | #define LCD_CTRL (*(volatile unsigned long *)(LCD_BASE+0x018)) |
| jmitc91516 | 0:a5c253316af6 | 315 | // Interrupt Mask register |
| jmitc91516 | 0:a5c253316af6 | 316 | #define LCD_INTMSK (*(volatile unsigned long *)(LCD_BASE+0x01C)) |
| jmitc91516 | 0:a5c253316af6 | 317 | // Raw Interrupt Status register |
| jmitc91516 | 0:a5c253316af6 | 318 | #define LCD_INTRAW (*(volatile unsigned long *)(LCD_BASE+0x020)) |
| jmitc91516 | 0:a5c253316af6 | 319 | // Masked Interrupt Status register |
| jmitc91516 | 0:a5c253316af6 | 320 | #define LCD_INTSTAT (*(volatile unsigned long *)(LCD_BASE+0x024)) |
| jmitc91516 | 0:a5c253316af6 | 321 | // Interrupt Clear register |
| jmitc91516 | 0:a5c253316af6 | 322 | #define LCD_INTCLR (*(volatile unsigned long *)(LCD_BASE+0x028)) |
| jmitc91516 | 0:a5c253316af6 | 323 | // Upper Panel Current Address Value register |
| jmitc91516 | 0:a5c253316af6 | 324 | #define LCD_UPCURR (*(volatile unsigned long *)(LCD_BASE+0x02C)) |
| jmitc91516 | 0:a5c253316af6 | 325 | // Lower Panel Current Address Value register |
| jmitc91516 | 0:a5c253316af6 | 326 | #define LCD_LPCURR (*(volatile unsigned long *)(LCD_BASE+0x030)) |
| jmitc91516 | 0:a5c253316af6 | 327 | // 256x16-bit Color Palette registers |
| jmitc91516 | 0:a5c253316af6 | 328 | #define LCD_PAL (*(volatile unsigned long *)(LCD_BASE+0x200)) |
| jmitc91516 | 0:a5c253316af6 | 329 | // Cursor Image registers |
| jmitc91516 | 0:a5c253316af6 | 330 | #define CRSR_IMG (*(volatile unsigned long *)(LCD_BASE+0x800)) |
| jmitc91516 | 0:a5c253316af6 | 331 | // Cursor Control register |
| jmitc91516 | 0:a5c253316af6 | 332 | #define CRSR_CTRL (*(volatile unsigned long *)(LCD_BASE+0xC00)) |
| jmitc91516 | 0:a5c253316af6 | 333 | |
| jmitc91516 | 0:a5c253316af6 | 334 | // LCD controller enable bit |
| jmitc91516 | 0:a5c253316af6 | 335 | #define LCDEN 0 |
| jmitc91516 | 0:a5c253316af6 | 336 | // LCD controller power bit |
| jmitc91516 | 0:a5c253316af6 | 337 | #define LCDPWR 11 |
| jmitc91516 | 0:a5c253316af6 | 338 | // Bypass pixel clock divider - for TFT display must be 1 |
| jmitc91516 | 0:a5c253316af6 | 339 | #ifdef GuiConst_COLOR_DEPTH_1 |
| jmitc91516 | 0:a5c253316af6 | 340 | #define BCD 0 |
| jmitc91516 | 0:a5c253316af6 | 341 | #else |
| jmitc91516 | 0:a5c253316af6 | 342 | #define BCD 1 |
| jmitc91516 | 0:a5c253316af6 | 343 | #endif |
| jmitc91516 | 0:a5c253316af6 | 344 | // Adjust these values according your display |
| jmitc91516 | 0:a5c253316af6 | 345 | // PLL clock prescaler selection - only odd numbers 0,1,3,5,..255 |
| jmitc91516 | 0:a5c253316af6 | 346 | // 0 - PLL/1, 1 - PLL/2, 3 - PLL/4 |
| jmitc91516 | 0:a5c253316af6 | 347 | #define PLLDIV 0 |
| jmitc91516 | 0:a5c253316af6 | 348 | // LCD panel clock prescaler selection, range 0 - 31 |
| jmitc91516 | 0:a5c253316af6 | 349 | // LCD freq = MCU freq /(CLKDIV+1) |
| jmitc91516 | 0:a5c253316af6 | 350 | #define CLKDIV 7 |
| jmitc91516 | 0:a5c253316af6 | 351 | // Horizontal back porch in pixels, range 3 - 256 |
| jmitc91516 | 0:a5c253316af6 | 352 | #ifdef GuiConst_COLOR_DEPTH_1 |
| jmitc91516 | 0:a5c253316af6 | 353 | #define HBP 5 |
| jmitc91516 | 0:a5c253316af6 | 354 | #else |
| jmitc91516 | 0:a5c253316af6 | 355 | #define HBP 40 |
| jmitc91516 | 0:a5c253316af6 | 356 | #endif |
| jmitc91516 | 0:a5c253316af6 | 357 | // Horizontal front porch in pixels, range 3 - 256 |
| jmitc91516 | 0:a5c253316af6 | 358 | #ifdef GuiConst_COLOR_DEPTH_1 |
| jmitc91516 | 0:a5c253316af6 | 359 | #define HFP 5 |
| jmitc91516 | 0:a5c253316af6 | 360 | #else |
| jmitc91516 | 0:a5c253316af6 | 361 | #define HFP 79 |
| jmitc91516 | 0:a5c253316af6 | 362 | #endif |
| jmitc91516 | 0:a5c253316af6 | 363 | // Horizontal synchronization pulse width in pixels, range 3 - 256 |
| jmitc91516 | 0:a5c253316af6 | 364 | #ifdef GuiConst_COLOR_DEPTH_1 |
| jmitc91516 | 0:a5c253316af6 | 365 | #define HSW 3 |
| jmitc91516 | 0:a5c253316af6 | 366 | #else |
| jmitc91516 | 0:a5c253316af6 | 367 | #define HSW 48 |
| jmitc91516 | 0:a5c253316af6 | 368 | #endif |
| jmitc91516 | 0:a5c253316af6 | 369 | // Pixels-per-line in pixels, must be multiple of 16 |
| jmitc91516 | 0:a5c253316af6 | 370 | #define PPL GuiConst_DISPLAY_WIDTH_HW |
| jmitc91516 | 0:a5c253316af6 | 371 | // Vertical back porch in lines, range 1 - 256 |
| jmitc91516 | 0:a5c253316af6 | 372 | #ifdef GuiConst_COLOR_DEPTH_1 |
| jmitc91516 | 0:a5c253316af6 | 373 | #define VBP 2 |
| jmitc91516 | 0:a5c253316af6 | 374 | #else |
| jmitc91516 | 0:a5c253316af6 | 375 | #define VBP 29 |
| jmitc91516 | 0:a5c253316af6 | 376 | #endif |
| jmitc91516 | 0:a5c253316af6 | 377 | // Vertical front porch in lines, range 1 - 256 |
| jmitc91516 | 0:a5c253316af6 | 378 | #ifdef GuiConst_COLOR_DEPTH_1 |
| jmitc91516 | 0:a5c253316af6 | 379 | #define VFP 2 |
| jmitc91516 | 0:a5c253316af6 | 380 | #else |
| jmitc91516 | 0:a5c253316af6 | 381 | #define VFP 40 |
| jmitc91516 | 0:a5c253316af6 | 382 | #endif |
| jmitc91516 | 0:a5c253316af6 | 383 | // Vertical synchronization pulse width in lines, range 1 - 31 |
| jmitc91516 | 0:a5c253316af6 | 384 | #ifdef GuiConst_COLOR_DEPTH_1 |
| jmitc91516 | 0:a5c253316af6 | 385 | #define VSW 1 |
| jmitc91516 | 0:a5c253316af6 | 386 | #else |
| jmitc91516 | 0:a5c253316af6 | 387 | #define VSW 3 |
| jmitc91516 | 0:a5c253316af6 | 388 | #endif |
| jmitc91516 | 0:a5c253316af6 | 389 | // Lines per panel |
| jmitc91516 | 0:a5c253316af6 | 390 | #define LPP GuiConst_BYTE_LINES |
| jmitc91516 | 0:a5c253316af6 | 391 | // Clocks per line |
| jmitc91516 | 0:a5c253316af6 | 392 | #ifdef GuiConst_COLOR_DEPTH_1 |
| jmitc91516 | 0:a5c253316af6 | 393 | #define CPL GuiConst_DISPLAY_WIDTH_HW/4 |
| jmitc91516 | 0:a5c253316af6 | 394 | #else |
| jmitc91516 | 0:a5c253316af6 | 395 | #define CPL GuiConst_DISPLAY_WIDTH_HW |
| jmitc91516 | 0:a5c253316af6 | 396 | #endif |
| jmitc91516 | 0:a5c253316af6 | 397 | // Invert output enable |
| jmitc91516 | 0:a5c253316af6 | 398 | // 0 = LCDENAB output pin is active HIGH in TFT mode |
| jmitc91516 | 0:a5c253316af6 | 399 | // 1 = LCDENAB output pin is active LOW in TFT mode |
| jmitc91516 | 0:a5c253316af6 | 400 | #define IOE 0 |
| jmitc91516 | 0:a5c253316af6 | 401 | // Invert panel clock |
| jmitc91516 | 0:a5c253316af6 | 402 | // 0 = Data is driven on the LCD data lines on the rising edge of LCDDCLK |
| jmitc91516 | 0:a5c253316af6 | 403 | // 1 = Data is driven on the LCD data lines on the falling edge of LCDDCLK |
| jmitc91516 | 0:a5c253316af6 | 404 | #define IPC 0 |
| jmitc91516 | 0:a5c253316af6 | 405 | // Invert horizontal synchronization |
| jmitc91516 | 0:a5c253316af6 | 406 | // 0 = LCDLP pin is active HIGH and inactive LOW |
| jmitc91516 | 0:a5c253316af6 | 407 | // 1 = LCDLP pin is active LOW and inactive HIGH |
| jmitc91516 | 0:a5c253316af6 | 408 | #ifdef GuiConst_COLOR_DEPTH_1 |
| jmitc91516 | 0:a5c253316af6 | 409 | #define IHS 0 |
| jmitc91516 | 0:a5c253316af6 | 410 | #else |
| jmitc91516 | 0:a5c253316af6 | 411 | #define IHS 1 |
| jmitc91516 | 0:a5c253316af6 | 412 | #endif |
| jmitc91516 | 0:a5c253316af6 | 413 | // IVS Invert vertical synchronization |
| jmitc91516 | 0:a5c253316af6 | 414 | // 0 = LCDFP pin is active HIGH and inactive LOW |
| jmitc91516 | 0:a5c253316af6 | 415 | // 1 = LCDFP pin is active LOW and inactive HIGH |
| jmitc91516 | 0:a5c253316af6 | 416 | #ifdef GuiConst_COLOR_DEPTH_1 |
| jmitc91516 | 0:a5c253316af6 | 417 | #define IVS 0 |
| jmitc91516 | 0:a5c253316af6 | 418 | #else |
| jmitc91516 | 0:a5c253316af6 | 419 | #define IVS 1 |
| jmitc91516 | 0:a5c253316af6 | 420 | #endif |
| jmitc91516 | 0:a5c253316af6 | 421 | // Lower five bits of panel clock divisor |
| jmitc91516 | 0:a5c253316af6 | 422 | #define PCD_LO 2 |
| jmitc91516 | 0:a5c253316af6 | 423 | // CLKSEL Clock Select |
| jmitc91516 | 0:a5c253316af6 | 424 | // 0 = the clock source for the LCD block is CCLK |
| jmitc91516 | 0:a5c253316af6 | 425 | // 1 = the clock source for the LCD block is LCD_DCLK |
| jmitc91516 | 0:a5c253316af6 | 426 | #define CLKSEL 0 |
| jmitc91516 | 0:a5c253316af6 | 427 | |
| jmitc91516 | 0:a5c253316af6 | 428 | /****************************************************************************/ |
| jmitc91516 | 0:a5c253316af6 | 429 | /* IMPORTANT!!! */ |
| jmitc91516 | 0:a5c253316af6 | 430 | /****************************************************************************/ |
| jmitc91516 | 0:a5c253316af6 | 431 | // Set start address of frame buffer in RAM memory |
| jmitc91516 | 0:a5c253316af6 | 432 | // 0x4000 0000 - 0x4000 FFFF RAM (64 kB) |
| jmitc91516 | 0:a5c253316af6 | 433 | // 0x8000 0000 - 0x80FF FFFF Static memory bank 0 (16 MB) |
| jmitc91516 | 0:a5c253316af6 | 434 | // 0x8100 0000 - 0x81FF FFFF Static memory bank 1 (16 MB) |
| jmitc91516 | 0:a5c253316af6 | 435 | // 0xA000 0000 - 0xAFFF FFFF Dynamic memory bank 0 (256 MB) |
| jmitc91516 | 0:a5c253316af6 | 436 | // 0xB000 0000 - 0xBFFF FFFF Dynamic memory bank 1 (256 MB) |
| jmitc91516 | 0:a5c253316af6 | 437 | //#define FRAME_ADDRESS 0xA0000008 |
| jmitc91516 | 0:a5c253316af6 | 438 | //#define FRAME_ADDRESS 0xA00017D8 // As of 26 Oct 2016 |
| jmitc91516 | 0:a5c253316af6 | 439 | #define FRAME_ADDRESS (frameAddress) // Use the static variable set at the top of this file |
| jmitc91516 | 0:a5c253316af6 | 440 | /****************************************************************************/ |
| jmitc91516 | 0:a5c253316af6 | 441 | |
| jmitc91516 | 0:a5c253316af6 | 442 | // Address of pallete registers |
| jmitc91516 | 0:a5c253316af6 | 443 | #define PALETTE_RAM_ADDR LCD_PAL |
| jmitc91516 | 0:a5c253316af6 | 444 | |
| jmitc91516 | 0:a5c253316af6 | 445 | // Delay routine |
| jmitc91516 | 0:a5c253316af6 | 446 | // This constant must be adjusted according to speed of microcontroller |
| jmitc91516 | 0:a5c253316af6 | 447 | #define ONE_MS 100 |
| jmitc91516 | 0:a5c253316af6 | 448 | // Param msec is delay in miliseconds |
| jmitc91516 | 0:a5c253316af6 | 449 | void millisecond_delay(GuiConst_INT32U msec) |
| jmitc91516 | 0:a5c253316af6 | 450 | { |
| jmitc91516 | 0:a5c253316af6 | 451 | #ifdef USE_WAIT_MS |
| jmitc91516 | 0:a5c253316af6 | 452 | EasyGUIWaitMs(msec); |
| jmitc91516 | 0:a5c253316af6 | 453 | #else |
| jmitc91516 | 0:a5c253316af6 | 454 | GuiConst_INT32U j; |
| jmitc91516 | 0:a5c253316af6 | 455 | |
| jmitc91516 | 0:a5c253316af6 | 456 | for (j = 0; j < (ONE_MS * msec) ; j++); |
| jmitc91516 | 0:a5c253316af6 | 457 | #endif |
| jmitc91516 | 0:a5c253316af6 | 458 | } |
| jmitc91516 | 0:a5c253316af6 | 459 | |
| jmitc91516 | 0:a5c253316af6 | 460 | // Initialises the module and the display |
| jmitc91516 | 0:a5c253316af6 | 461 | void GuiDisplay_Init (void) |
| jmitc91516 | 0:a5c253316af6 | 462 | { |
| jmitc91516 | 0:a5c253316af6 | 463 | // return; // Test - do we need any display initialisation here? Let the BIOS do it? |
| jmitc91516 | 0:a5c253316af6 | 464 | // No flickering - but red and blue reversed (again) |
| jmitc91516 | 0:a5c253316af6 | 465 | // So - can we reinstate some of the code in this function, and get the red and blue |
| jmitc91516 | 0:a5c253316af6 | 466 | // the correct way round without flickering? |
| jmitc91516 | 0:a5c253316af6 | 467 | //#define ALLOW_LPC4088_INIT |
| jmitc91516 | 0:a5c253316af6 | 468 | // Now allowing initialisation of the LCD control register even with ALLOW_LPC4088_INIT not #defined. |
| jmitc91516 | 0:a5c253316af6 | 469 | // This appears to have eliminated the flickering while keeping the red and blue components |
| jmitc91516 | 0:a5c253316af6 | 470 | // the correct way round. |
| jmitc91516 | 0:a5c253316af6 | 471 | |
| jmitc91516 | 0:a5c253316af6 | 472 | GuiConst_INT32U i; |
| jmitc91516 | 0:a5c253316af6 | 473 | #ifdef GuiConst_COLOR_DEPTH_24 |
| jmitc91516 | 0:a5c253316af6 | 474 | GuiConst_INT32U *framePtr; |
| jmitc91516 | 0:a5c253316af6 | 475 | #else |
| jmitc91516 | 0:a5c253316af6 | 476 | #ifdef GuiConst_COLOR_DEPTH_16 |
| jmitc91516 | 0:a5c253316af6 | 477 | GuiConst_INT16U *framePtr; |
| jmitc91516 | 0:a5c253316af6 | 478 | #else |
| jmitc91516 | 0:a5c253316af6 | 479 | GuiConst_INT32U PaletteData; |
| jmitc91516 | 0:a5c253316af6 | 480 | GuiConst_INT8U *framePtr; |
| jmitc91516 | 0:a5c253316af6 | 481 | GuiConst_INT32U * pDst; |
| jmitc91516 | 0:a5c253316af6 | 482 | #endif |
| jmitc91516 | 0:a5c253316af6 | 483 | #endif |
| jmitc91516 | 0:a5c253316af6 | 484 | |
| jmitc91516 | 0:a5c253316af6 | 485 | // SetupQSPIBitmapArray(1); |
| jmitc91516 | 0:a5c253316af6 | 486 | |
| jmitc91516 | 0:a5c253316af6 | 487 | /**************************************************/ |
| jmitc91516 | 0:a5c253316af6 | 488 | /* Carefully adjust the IO pins for your system */ |
| jmitc91516 | 0:a5c253316af6 | 489 | /* Following settings for TFT panel 16/24 bit */ |
| jmitc91516 | 0:a5c253316af6 | 490 | /**************************************************/ |
| jmitc91516 | 0:a5c253316af6 | 491 | |
| jmitc91516 | 0:a5c253316af6 | 492 | /* *** DEBUG *** COMMENT OUT THIS BLOCK OF CODE - WHAT HAPPENS? |
| jmitc91516 | 0:a5c253316af6 | 493 | // PI SETTING RGB888 RGB565 |
| jmitc91516 | 0:a5c253316af6 | 494 | IOCON_P1_29 |= 7; // BLUE7 BLUE4 |
| jmitc91516 | 0:a5c253316af6 | 495 | IOCON_P1_28 |= 7; // BLUE6 BLUE3 |
| jmitc91516 | 0:a5c253316af6 | 496 | IOCON_P1_27 |= 7; // BLUE5 BLUE2 |
| jmitc91516 | 0:a5c253316af6 | 497 | IOCON_P1_26 |= 7; // BLUE4 BLUE1 |
| jmitc91516 | 0:a5c253316af6 | 498 | IOCON_P2_13 |= 7; // BLUE3 BLUE0 |
| jmitc91516 | 0:a5c253316af6 | 499 | //IOCON_P2_12 |= 7; // BLUE2 - !! Comment out for RGB565 |
| jmitc91516 | 0:a5c253316af6 | 500 | //IOCON_P0_9 |= 7; // BLUE1 - !! Comment out for RGB565 |
| jmitc91516 | 0:a5c253316af6 | 501 | //IOCON_P0_8 |= 7; // BLUE0 - !! Comment out for RGB565 |
| jmitc91516 | 0:a5c253316af6 | 502 | IOCON_P1_25 |= 7; // GREEN7 GREEN5 |
| jmitc91516 | 0:a5c253316af6 | 503 | IOCON_P1_24 |= 7; // GREEN6 GREEN4 |
| jmitc91516 | 0:a5c253316af6 | 504 | IOCON_P1_23 |= 7; // GREEN5 GREEN3 |
| jmitc91516 | 0:a5c253316af6 | 505 | IOCON_P1_22 |= 7; // GREEN4 GREEN2 |
| jmitc91516 | 0:a5c253316af6 | 506 | IOCON_P1_21 |= 7; // GREEN3 GREEN1 |
| jmitc91516 | 0:a5c253316af6 | 507 | IOCON_P1_20 |= 7; // GREEN2 GREEN0 |
| jmitc91516 | 0:a5c253316af6 | 508 | //IOCON_P0_7 |= 7; // GREEN1 - !! Comment out for RGB565 |
| jmitc91516 | 0:a5c253316af6 | 509 | //IOCON_P0_6 |= 7; // GREEN0 - !! Comment out for RGB565 |
| jmitc91516 | 0:a5c253316af6 | 510 | IOCON_P2_9 |= 7; // RED7 RED4 |
| jmitc91516 | 0:a5c253316af6 | 511 | IOCON_P2_8 |= 7; // RED6 RED3 |
| jmitc91516 | 0:a5c253316af6 | 512 | IOCON_P2_7 |= 7; // RED5 RED2 |
| jmitc91516 | 0:a5c253316af6 | 513 | IOCON_P2_6 |= 7; // RED4 RED1 |
| jmitc91516 | 0:a5c253316af6 | 514 | //IOCON_P4_29 |= 7; // RED3 - !! Comment out for RGB565 |
| jmitc91516 | 0:a5c253316af6 | 515 | IOCON_P2_12 |= 5; // - RED0 !! Comment out for RGB888 !! |
| jmitc91516 | 0:a5c253316af6 | 516 | //IOCON_P4_28 |= 7; // RED2 - !! Comment out for RGB565 |
| jmitc91516 | 0:a5c253316af6 | 517 | //IOCON_P0_5 |= 7; // RED1 - !! Comment out for RGB565 |
| jmitc91516 | 0:a5c253316af6 | 518 | //IOCON_P0_4 |= 7; // RED0 - !! Comment out for RGB565 |
| jmitc91516 | 0:a5c253316af6 | 519 | IOCON_P2_5 |= 7; // LCD_LP LCD_LP |
| jmitc91516 | 0:a5c253316af6 | 520 | IOCON_P2_4 |= 7; // LCD_ENAB_M LCD_ENAB_M |
| jmitc91516 | 0:a5c253316af6 | 521 | IOCON_P2_3 |= 7; // LCD_FP LCD_FP |
| jmitc91516 | 0:a5c253316af6 | 522 | IOCON_P2_2 |= 7; // LCD_DCLK LCD_DCLK |
| jmitc91516 | 0:a5c253316af6 | 523 | IOCON_P2_1 |= 7; // LCD_LE LCD_LE |
| jmitc91516 | 0:a5c253316af6 | 524 | IOCON_P2_0 |= 7; // LCD_PWR LCD_PWR |
| jmitc91516 | 0:a5c253316af6 | 525 | IOCON_P2_11 |= 7; // LCD_CLKIN LCD_CLKIN |
| jmitc91516 | 0:a5c253316af6 | 526 | */ // DEBUG - ANSWER - *** EVERYTHING STILL APPEARS TO WORK *** |
| jmitc91516 | 0:a5c253316af6 | 527 | |
| jmitc91516 | 0:a5c253316af6 | 528 | /**************************************************/ |
| jmitc91516 | 0:a5c253316af6 | 529 | |
| jmitc91516 | 0:a5c253316af6 | 530 | // SetupQSPIBitmapArray(2); |
| jmitc91516 | 0:a5c253316af6 | 531 | |
| jmitc91516 | 0:a5c253316af6 | 532 | #ifdef ALLOW_LPC4088_INIT |
| jmitc91516 | 0:a5c253316af6 | 533 | // Disable power |
| jmitc91516 | 0:a5c253316af6 | 534 | LCD_CTRL &= ~(1 << LCDEN); |
| jmitc91516 | 0:a5c253316af6 | 535 | millisecond_delay(100); |
| jmitc91516 | 0:a5c253316af6 | 536 | LCD_CTRL &= ~(1 << LCDPWR); |
| jmitc91516 | 0:a5c253316af6 | 537 | |
| jmitc91516 | 0:a5c253316af6 | 538 | // ==================================== |
| jmitc91516 | 0:a5c253316af6 | 539 | // Initialize Clock(PLL),EMC and SDRAM! |
| jmitc91516 | 0:a5c253316af6 | 540 | // ==================================== |
| jmitc91516 | 0:a5c253316af6 | 541 | |
| jmitc91516 | 0:a5c253316af6 | 542 | // Enable LCD controller |
| jmitc91516 | 0:a5c253316af6 | 543 | PCONP |= 1<<PCLCD; |
| jmitc91516 | 0:a5c253316af6 | 544 | |
| jmitc91516 | 0:a5c253316af6 | 545 | // LCD Configuration init pixel clock |
| jmitc91516 | 0:a5c253316af6 | 546 | LCD_CFG |= (CLKDIV); |
| jmitc91516 | 0:a5c253316af6 | 547 | |
| jmitc91516 | 0:a5c253316af6 | 548 | // Horizontal Timing register |
| jmitc91516 | 0:a5c253316af6 | 549 | LCD_TIMH |= ((HBP-1) << 24)|((HFP-1) << 16)|((HSW-1) << 8)|((PPL/16-1) << 2); |
| jmitc91516 | 0:a5c253316af6 | 550 | |
| jmitc91516 | 0:a5c253316af6 | 551 | // Vertical Timing register |
| jmitc91516 | 0:a5c253316af6 | 552 | LCD_TIMV |= (VBP << 24)|(VFP << 16)|((VSW-1) << 10)|(LPP-1); |
| jmitc91516 | 0:a5c253316af6 | 553 | |
| jmitc91516 | 0:a5c253316af6 | 554 | // Clock and Signal Polarity register |
| jmitc91516 | 0:a5c253316af6 | 555 | LCD_POL |= (BCD << 26)|((CPL-1) << 16)|(IOE << 14)|(IPC << 13)| |
| jmitc91516 | 0:a5c253316af6 | 556 | (IHS << 12)|(IVS << 11)|(CLKSEL << 5)| PCD_LO; |
| jmitc91516 | 0:a5c253316af6 | 557 | |
| jmitc91516 | 0:a5c253316af6 | 558 | LCD_LE = 0; |
| jmitc91516 | 0:a5c253316af6 | 559 | LCD_INTMSK = 0; |
| jmitc91516 | 0:a5c253316af6 | 560 | |
| jmitc91516 | 0:a5c253316af6 | 561 | #endif // ALLOW_LPC4088_INIT |
| jmitc91516 | 0:a5c253316af6 | 562 | // If we include the initialisation of the LCD control register, |
| jmitc91516 | 0:a5c253316af6 | 563 | // does this get red and blue the correct way round without flickering? |
| jmitc91516 | 0:a5c253316af6 | 564 | |
| jmitc91516 | 0:a5c253316af6 | 565 | // LCD Control register |
| jmitc91516 | 0:a5c253316af6 | 566 | #ifdef GuiConst_COLOR_DEPTH_24 |
| jmitc91516 | 0:a5c253316af6 | 567 | // TFT single panel,24bit, normal output |
| jmitc91516 | 0:a5c253316af6 | 568 | LCD_CTRL = 0x0000002A; |
| jmitc91516 | 0:a5c253316af6 | 569 | #else |
| jmitc91516 | 0:a5c253316af6 | 570 | #ifdef GuiConst_COLOR_DEPTH_16 |
| jmitc91516 | 0:a5c253316af6 | 571 | // TFT single panel,16bit, normal output (BGR) |
| jmitc91516 | 0:a5c253316af6 | 572 | LCD_CTRL = 0x0000102C; |
| jmitc91516 | 0:a5c253316af6 | 573 | #else |
| jmitc91516 | 0:a5c253316af6 | 574 | #ifdef GuiConst_COLOR_DEPTH_8 |
| jmitc91516 | 0:a5c253316af6 | 575 | // TFT single panel,8bit, normal output |
| jmitc91516 | 0:a5c253316af6 | 576 | LCD_CTRL = 0x00000026; |
| jmitc91516 | 0:a5c253316af6 | 577 | #else |
| jmitc91516 | 0:a5c253316af6 | 578 | // STN single panel, monochrome, 4bit bus, normal output |
| jmitc91516 | 0:a5c253316af6 | 579 | LCD_CTRL = 0x00000010; |
| jmitc91516 | 0:a5c253316af6 | 580 | #endif |
| jmitc91516 | 0:a5c253316af6 | 581 | #endif |
| jmitc91516 | 0:a5c253316af6 | 582 | #endif |
| jmitc91516 | 0:a5c253316af6 | 583 | |
| jmitc91516 | 0:a5c253316af6 | 584 | |
| jmitc91516 | 0:a5c253316af6 | 585 | #ifdef GuiConst_COLOR_DEPTH_24 |
| jmitc91516 | 0:a5c253316af6 | 586 | framePtr = (GuiConst_INT32U *)FRAME_ADDRESS; |
| jmitc91516 | 0:a5c253316af6 | 587 | #else |
| jmitc91516 | 0:a5c253316af6 | 588 | #ifdef GuiConst_COLOR_DEPTH_16 |
| jmitc91516 | 0:a5c253316af6 | 589 | framePtr = (GuiConst_INT16U *)FRAME_ADDRESS; |
| jmitc91516 | 0:a5c253316af6 | 590 | #else |
| jmitc91516 | 0:a5c253316af6 | 591 | framePtr = (GuiConst_INT8U *)FRAME_ADDRESS; |
| jmitc91516 | 0:a5c253316af6 | 592 | pDst = (GuiConst_INT32U *)PALETTE_RAM_ADDR; |
| jmitc91516 | 0:a5c253316af6 | 593 | for (i = 0; i < 128; i++) |
| jmitc91516 | 0:a5c253316af6 | 594 | { |
| jmitc91516 | 0:a5c253316af6 | 595 | #ifdef GuiConst_COLOR_DEPTH_1 |
| jmitc91516 | 0:a5c253316af6 | 596 | PaletteData = 0xFFFF0000; |
| jmitc91516 | 0:a5c253316af6 | 597 | #else |
| jmitc91516 | 0:a5c253316af6 | 598 | PaletteData = GuiStruct_Palette[2*i][0]; |
| jmitc91516 | 0:a5c253316af6 | 599 | PaletteData |= (GuiConst_INT32U)GuiStruct_Palette[2*i][1]<<8; |
| jmitc91516 | 0:a5c253316af6 | 600 | PaletteData |= (GuiConst_INT32U)GuiStruct_Palette[2*i+1][0]<<16; |
| jmitc91516 | 0:a5c253316af6 | 601 | PaletteData |= (GuiConst_INT32U)GuiStruct_Palette[2*i+1][1]<<24; |
| jmitc91516 | 0:a5c253316af6 | 602 | #endif |
| jmitc91516 | 0:a5c253316af6 | 603 | *pDst++ = PaletteData; |
| jmitc91516 | 0:a5c253316af6 | 604 | } |
| jmitc91516 | 0:a5c253316af6 | 605 | #endif |
| jmitc91516 | 0:a5c253316af6 | 606 | #endif |
| jmitc91516 | 0:a5c253316af6 | 607 | |
| jmitc91516 | 0:a5c253316af6 | 608 | // Clear frame buffer by copying the data into frame buffer |
| jmitc91516 | 0:a5c253316af6 | 609 | #ifdef GuiConst_COLOR_DEPTH_24 |
| jmitc91516 | 0:a5c253316af6 | 610 | for (i = 0; i < GuiConst_DISPLAY_BYTES/3; i++) |
| jmitc91516 | 0:a5c253316af6 | 611 | *framePtr++ = 0x00000000; // Color |
| jmitc91516 | 0:a5c253316af6 | 612 | #else |
| jmitc91516 | 0:a5c253316af6 | 613 | #ifdef GuiConst_COLOR_DEPTH_16 |
| jmitc91516 | 0:a5c253316af6 | 614 | for (i = 0; i < GuiConst_DISPLAY_BYTES/2; i++) |
| jmitc91516 | 0:a5c253316af6 | 615 | *framePtr++ = 0x0000; // Color |
| jmitc91516 | 0:a5c253316af6 | 616 | #else |
| jmitc91516 | 0:a5c253316af6 | 617 | for (i = 0; i < GuiConst_DISPLAY_BYTES; i++) |
| jmitc91516 | 0:a5c253316af6 | 618 | *framePtr++ = 0x00; // Color |
| jmitc91516 | 0:a5c253316af6 | 619 | #endif |
| jmitc91516 | 0:a5c253316af6 | 620 | #endif |
| jmitc91516 | 0:a5c253316af6 | 621 | |
| jmitc91516 | 0:a5c253316af6 | 622 | // LCD_CFG = 0; |
| jmitc91516 | 0:a5c253316af6 | 623 | |
| jmitc91516 | 0:a5c253316af6 | 624 | millisecond_delay(100); |
| jmitc91516 | 0:a5c253316af6 | 625 | // Power-up sequence |
| jmitc91516 | 0:a5c253316af6 | 626 | LCD_CTRL |= 1<<LCDEN; |
| jmitc91516 | 0:a5c253316af6 | 627 | // Apply contrast voltage to LCD panel |
| jmitc91516 | 0:a5c253316af6 | 628 | // (not controlled or supplied by the LCD controller) |
| jmitc91516 | 0:a5c253316af6 | 629 | millisecond_delay(100); |
| jmitc91516 | 0:a5c253316af6 | 630 | LCD_CTRL |= 1<<LCDPWR; |
| jmitc91516 | 0:a5c253316af6 | 631 | |
| jmitc91516 | 0:a5c253316af6 | 632 | // Set start address of frame buffer in RAM memory |
| jmitc91516 | 0:a5c253316af6 | 633 | LCD_LPBASE = FRAME_ADDRESS; |
| jmitc91516 | 0:a5c253316af6 | 634 | LCD_UPBASE = FRAME_ADDRESS; |
| jmitc91516 | 0:a5c253316af6 | 635 | } |
| jmitc91516 | 0:a5c253316af6 | 636 | |
| jmitc91516 | 0:a5c253316af6 | 637 | #ifdef WANT_DOUBLE_BUFFERING |
| jmitc91516 | 0:a5c253316af6 | 638 | // *** Need complete GuiDisplay_Refresh *** |
| jmitc91516 | 0:a5c253316af6 | 639 | |
| jmitc91516 | 0:a5c253316af6 | 640 | // Refreshes display buffer to display |
| jmitc91516 | 0:a5c253316af6 | 641 | void GuiDisplay_Refresh (void) |
| jmitc91516 | 0:a5c253316af6 | 642 | { |
| jmitc91516 | 0:a5c253316af6 | 643 | GuiConst_INT32U Pixel, X, Y, LastByte; |
| jmitc91516 | 0:a5c253316af6 | 644 | #ifdef GuiConst_COLOR_DEPTH_24 |
| jmitc91516 | 0:a5c253316af6 | 645 | GuiConst_INT32U *framePtr; |
| jmitc91516 | 0:a5c253316af6 | 646 | #else |
| jmitc91516 | 0:a5c253316af6 | 647 | #ifdef GuiConst_COLOR_DEPTH_16 |
| jmitc91516 | 0:a5c253316af6 | 648 | GuiConst_INT16U *framePtr; |
| jmitc91516 | 0:a5c253316af6 | 649 | #else |
| jmitc91516 | 0:a5c253316af6 | 650 | // Valid also for monochrome STN display |
| jmitc91516 | 0:a5c253316af6 | 651 | GuiConst_INT8U *framePtr; |
| jmitc91516 | 0:a5c253316af6 | 652 | #endif |
| jmitc91516 | 0:a5c253316af6 | 653 | #endif |
| jmitc91516 | 0:a5c253316af6 | 654 | |
| jmitc91516 | 0:a5c253316af6 | 655 | GuiDisplay_Lock (); |
| jmitc91516 | 0:a5c253316af6 | 656 | |
| jmitc91516 | 0:a5c253316af6 | 657 | // Walk through all lines |
| jmitc91516 | 0:a5c253316af6 | 658 | for (Y = 0; Y < GuiConst_BYTE_LINES; Y++) |
| jmitc91516 | 0:a5c253316af6 | 659 | { |
| jmitc91516 | 0:a5c253316af6 | 660 | if (GuiLib_DisplayRepaint[Y].ByteEnd >= 0) |
| jmitc91516 | 0:a5c253316af6 | 661 | // Something to redraw in this line |
| jmitc91516 | 0:a5c253316af6 | 662 | { |
| jmitc91516 | 0:a5c253316af6 | 663 | #ifdef GuiConst_COLOR_DEPTH_24 |
| jmitc91516 | 0:a5c253316af6 | 664 | // Set video ram base address |
| jmitc91516 | 0:a5c253316af6 | 665 | framePtr = (GuiConst_INT32U *)FRAME_ADDRESS; |
| jmitc91516 | 0:a5c253316af6 | 666 | // Pointer offset calculation |
| jmitc91516 | 0:a5c253316af6 | 667 | framePtr += Y * GuiConst_BYTES_PR_LINE/3 + |
| jmitc91516 | 0:a5c253316af6 | 668 | GuiLib_DisplayRepaint[Y].ByteBegin; |
| jmitc91516 | 0:a5c253316af6 | 669 | // Set amount of data to be changed |
| jmitc91516 | 0:a5c253316af6 | 670 | LastByte = GuiConst_BYTES_PR_LINE/3 - 1; |
| jmitc91516 | 0:a5c253316af6 | 671 | #else |
| jmitc91516 | 0:a5c253316af6 | 672 | #ifdef GuiConst_COLOR_DEPTH_16 |
| jmitc91516 | 0:a5c253316af6 | 673 | // Set video ram base address |
| jmitc91516 | 0:a5c253316af6 | 674 | framePtr = (GuiConst_INT16U *)FRAME_ADDRESS; |
| jmitc91516 | 0:a5c253316af6 | 675 | // Pointer offset calculation |
| jmitc91516 | 0:a5c253316af6 | 676 | framePtr += Y * GuiConst_BYTES_PR_LINE/2 + |
| jmitc91516 | 0:a5c253316af6 | 677 | GuiLib_DisplayRepaint[Y].ByteBegin; |
| jmitc91516 | 0:a5c253316af6 | 678 | // Set amount of data to be changed |
| jmitc91516 | 0:a5c253316af6 | 679 | LastByte = GuiConst_BYTES_PR_LINE/2 - 1; |
| jmitc91516 | 0:a5c253316af6 | 680 | #else |
| jmitc91516 | 0:a5c253316af6 | 681 | // Valid also for monochrome STN display |
| jmitc91516 | 0:a5c253316af6 | 682 | // Set video ram base address |
| jmitc91516 | 0:a5c253316af6 | 683 | framePtr = (GuiConst_INT8U *)FRAME_ADDRESS; |
| jmitc91516 | 0:a5c253316af6 | 684 | // Pointer offset calculation |
| jmitc91516 | 0:a5c253316af6 | 685 | framePtr += Y * GuiConst_BYTES_PR_LINE + |
| jmitc91516 | 0:a5c253316af6 | 686 | GuiLib_DisplayRepaint[Y].ByteBegin; |
| jmitc91516 | 0:a5c253316af6 | 687 | // Set amount of data to be changed |
| jmitc91516 | 0:a5c253316af6 | 688 | LastByte = GuiConst_BYTES_PR_LINE - 1; |
| jmitc91516 | 0:a5c253316af6 | 689 | #endif |
| jmitc91516 | 0:a5c253316af6 | 690 | #endif |
| jmitc91516 | 0:a5c253316af6 | 691 | if (GuiLib_DisplayRepaint[Y].ByteEnd < LastByte) |
| jmitc91516 | 0:a5c253316af6 | 692 | LastByte = GuiLib_DisplayRepaint[Y].ByteEnd; |
| jmitc91516 | 0:a5c253316af6 | 693 | |
| jmitc91516 | 0:a5c253316af6 | 694 | // Write data for one line to framebuffer from GuiLib_DisplayBuf |
| jmitc91516 | 0:a5c253316af6 | 695 | #ifdef GuiConst_COLOR_DEPTH_24 |
| jmitc91516 | 0:a5c253316af6 | 696 | for (X = GuiLib_DisplayRepaint[Y].ByteBegin * 3; |
| jmitc91516 | 0:a5c253316af6 | 697 | X <= (LastByte * 3 + 2); |
| jmitc91516 | 0:a5c253316af6 | 698 | X = X + 3) |
| jmitc91516 | 0:a5c253316af6 | 699 | { |
| jmitc91516 | 0:a5c253316af6 | 700 | Pixel = GuiLib_DisplayBuf[Y][X]; |
| jmitc91516 | 0:a5c253316af6 | 701 | Pixel |= (GuiConst_INT32U)GuiLib_DisplayBuf[Y][X+1]<<8; |
| jmitc91516 | 0:a5c253316af6 | 702 | Pixel |= (GuiConst_INT32U)GuiLib_DisplayBuf[Y][X+2]<<16; |
| jmitc91516 | 0:a5c253316af6 | 703 | *framePtr++ = Pixel; |
| jmitc91516 | 0:a5c253316af6 | 704 | } |
| jmitc91516 | 0:a5c253316af6 | 705 | #else |
| jmitc91516 | 0:a5c253316af6 | 706 | #ifdef GuiConst_COLOR_DEPTH_16 |
| jmitc91516 | 0:a5c253316af6 | 707 | for (X = GuiLib_DisplayRepaint[Y].ByteBegin; X <= LastByte; X++) |
| jmitc91516 | 0:a5c253316af6 | 708 | { |
| jmitc91516 | 0:a5c253316af6 | 709 | *framePtr++ = GuiLib_DisplayBuf.Words[Y][X]; |
| jmitc91516 | 0:a5c253316af6 | 710 | } |
| jmitc91516 | 0:a5c253316af6 | 711 | #else |
| jmitc91516 | 0:a5c253316af6 | 712 | // Valid also for monochrome STN display |
| jmitc91516 | 0:a5c253316af6 | 713 | for (X = GuiLib_DisplayRepaint[Y].ByteBegin; X <= LastByte; X++) |
| jmitc91516 | 0:a5c253316af6 | 714 | *framePtr++ = GuiLib_DisplayBuf[Y][X]; |
| jmitc91516 | 0:a5c253316af6 | 715 | #endif |
| jmitc91516 | 0:a5c253316af6 | 716 | #endif |
| jmitc91516 | 0:a5c253316af6 | 717 | // Reset repaint parameters |
| jmitc91516 | 0:a5c253316af6 | 718 | GuiLib_DisplayRepaint[Y].ByteEnd = -1; |
| jmitc91516 | 0:a5c253316af6 | 719 | } |
| jmitc91516 | 0:a5c253316af6 | 720 | } |
| jmitc91516 | 0:a5c253316af6 | 721 | GuiDisplay_Unlock (); |
| jmitc91516 | 0:a5c253316af6 | 722 | } |
| jmitc91516 | 0:a5c253316af6 | 723 | |
| jmitc91516 | 0:a5c253316af6 | 724 | #else // WANT_DOUBLE_BUFFERING |
| jmitc91516 | 0:a5c253316af6 | 725 | |
| jmitc91516 | 0:a5c253316af6 | 726 | // We are already writing direct to the display - |
| jmitc91516 | 0:a5c253316af6 | 727 | // GuiDisplay_Refresh does not need to do anything |
| jmitc91516 | 0:a5c253316af6 | 728 | // (but other code still expects it to exist) |
| jmitc91516 | 0:a5c253316af6 | 729 | void GuiDisplay_Refresh (void) |
| jmitc91516 | 0:a5c253316af6 | 730 | { |
| jmitc91516 | 0:a5c253316af6 | 731 | } |
| jmitc91516 | 0:a5c253316af6 | 732 | |
| jmitc91516 | 0:a5c253316af6 | 733 | #endif // WANT_DOUBLE_BUFFERING |
| jmitc91516 | 0:a5c253316af6 | 734 | |
| jmitc91516 | 0:a5c253316af6 | 735 | #endif // LCD_CONTROLLER_TYPE_LPC408X |
| jmitc91516 | 0:a5c253316af6 | 736 | |
| jmitc91516 | 0:a5c253316af6 | 737 | // ============================================================================ |
| jmitc91516 | 0:a5c253316af6 | 738 | // |
| jmitc91516 | 0:a5c253316af6 | 739 | // DISPLAY DRIVER PART ENDS |
| jmitc91516 | 0:a5c253316af6 | 740 | // |
| jmitc91516 | 0:a5c253316af6 | 741 | // ============================================================================ |
| jmitc91516 | 0:a5c253316af6 | 742 |