Comms between MAX 10 FPGA and ST uP
Revision 26:1837bc6df8ef, committed 2020-07-07
- Comitter:
- jimherd
- Date:
- Tue Jul 07 11:03:34 2020 +0000
- Parent:
- 25:9cdeb5267a47
- Child:
- 27:fe3dddcd448c
- Commit message:
- Computed PWM, QE, and RC base register addresses made public
Changed in this revision
| FPGA_bus.h | Show annotated file Show diff for this revision Revisions of this file |
--- a/FPGA_bus.h Sun Jun 28 14:27:00 2020 +0000
+++ b/FPGA_bus.h Tue Jul 07 11:03:34 2020 +0000
@@ -191,6 +191,7 @@
// data
//
int32_t global_FPGA_unit_error_flag;
+ uint32_t PWM_base, QE_base, RC_base;
//
// persistant system data
//
@@ -212,8 +213,6 @@
uint32_t _nos_QE_units;
uint32_t _nos_servo_units;
- uint32_t PWM_base, QE_base, RC_base;
-
uint32_t data, status, tmp_config;
received_packet_t in_pkt;
//