LIS2DH.h

00001 /*******************************************************************************
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00003  *
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00005  * copy of this software and associated documentation files (the "Software"),
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00010  *
00011  * The above copyright notice and this permission notice shall be included
00012  * in all copies or substantial portions of the Software.
00013  *
00014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
00015  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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00021  *
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00024  * Products, Inc. Branding Policy.
00025  *
00026  * The mere transfer of this software does not imply any licenses
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00033 
00034 #ifndef LIS2DH_H_
00035 #define LIS2DH_H_
00036 
00037 #include "mbed.h"
00038 
00039 /**
00040  * Driver for the LIS2DH on the HSP Platform
00041  *
00042  */
00043 
00044 void LIS2DHIntHandler(void);
00045 
00046 
00047 #define LIS2DH_DATARATE_1HZ    0x1
00048 #define LIS2DH_DATARATE_10HZ   0x2
00049 #define LIS2DH_DATARATE_25HZ   0x3
00050 #define LIS2DH_DATARATE_50HZ   0x4
00051 #define LIS2DH_DATARATE_100HZ  0x5
00052 #define LIS2DH_DATARATE_200HZ  0x6
00053 #define LIS2DH_DATARATE_400HZ  0x7
00054 
00055 #define LIS2DH_FIFOMODE_BYPASS  0x00
00056 #define LIS2DH_FIFOMODE_FIFO    0x01
00057 #define LIS2DH_FIFOMODE_STREAM  0x02
00058 #define LIS2DH_FIFOMODE_TRIGGER 0x03
00059 
00060 #define LIS2DH_ID 0x33
00061 #define LIS2DH_FIFO_SIZE 32
00062 
00063 #define LISD2DH_FIFO_MODE_BYPASS  0
00064 #define LISD2DH_FIFO_MODE_FIFO    1
00065 #define LISD2DH_FIFO_MODE_STREAM  2
00066 #define LISD2DH_FIFO_MODE_TRIGGER 3
00067 
00068 #define LIS2DH_NUMBER_OF_AXIS  3
00069 #define LIS2DH_MAX_DATA_SIZE   (LIS2DH_NUMBER_OF_AXIS * LIS2DH_FIFO_SIZE)
00070 
00071 class LIS2DH {
00072 public:
00073 
00074   typedef enum {  ///< LIS2DH registers
00075   
00076     LIS2DH_READID          = 0x33,      
00077     LIS2DH_STATUS_REG_AUX  = 0x07,
00078     LIS2DH_OUT_TEMP_L      = 0x0C,
00079     LIS2DH_OUT_TEMP_H      = 0x0D,
00080     LIS2DH_INT_COUNTER_REG = 0x0E,
00081     LIS2DH_WHO_AM_I        = 0x0F,
00082     LIS2DH_TEMP_CFG_REG    = 0x1F,
00083     LIS2DH_CTRL_REG1       = 0x20,
00084     LIS2DH_CTRL_REG2       = 0x21,
00085     LIS2DH_CTRL_REG3       = 0x22,
00086     LIS2DH_CTRL_REG4       = 0x23,
00087     LIS2DH_CTRL_REG5       = 0x24,
00088     LIS2DH_CTRL_REG6       = 0x25,
00089     LIS2DH_REFERENCE       = 0x26,
00090     LIS2DH_STATUS_REG2     = 0x27,
00091     LIS2DH_OUT_X_L         = 0x28,
00092     LIS2DH_OUT_X_H         = 0x29,
00093     LIS2DH_OUT_Y_L         = 0x2A,
00094     LIS2DH_OUT_Y_H         = 0x2B,
00095     LIS2DH_OUT_Z_L         = 0x2C,
00096     LIS2DH_OUT_Z_H         = 0x2D,
00097     LIS2DH_FIFO_CTRL_REG   = 0x2E,
00098     LIS2DH_FIFO_SRC_REG    = 0x2F,
00099     LIS2DH_INT1_CFG        = 0x30,
00100     LIS2DH_INT1_SRC        = 0x31,
00101     LIS2DH_INT1_THS        = 0x32,
00102     LIS2DH_INT1_DURATION   = 0x33,
00103     LIS2DH_INT2_CFG        = 0x34,
00104     LIS2DH_INT2_SRC        = 0x35,
00105     LIS2DH_INT2_THS        = 0x36,
00106     LIS2DH_INT2_DURATION   = 0x37,
00107     LIS2DH_CLICK_CFG       = 0x38,
00108     LIS2DH_CLICK_SRC       = 0x39,
00109     LIS2DH_CLICK_THS       = 0x3A,
00110     LIS2DH_TIME_LIMIT      = 0x3B,
00111     LIS2DH_TIME_LATENCY    = 0x3C,
00112     LIS2DH_TIME_WINDOW     = 0x3D,
00113     LIS2DH_Act_THS         = 0x3E,
00114     LIS2DH_Act_DUR         = 0x3F,
00115     
00116     }LIS2DH_REG_map_t;
00117 
00118 
00119   ///< @brief STATUS_AUX (07h)
00120   typedef union lis2dh_status_aux_reg {
00121     char all;
00122     struct {
00123       char reserved3 : 2;
00124       char TDA       : 1;
00125       char reserved2 : 3;
00126       char TOR       : 1;
00127       char reserved1 : 1;
00128     } bit;
00129   } lis2dh_status_aux_t;
00130 
00131   ///< @brief TEMP_CFG_REG (1Fh)
00132   typedef union lis2dh_temp_cfg_reg {
00133     char all;
00134     struct {
00135       char reserved1 : 6;
00136       char TEMP_EN0  : 1;
00137       char TEMP_EN1  : 1;
00138     } bit;
00139   } lis2dh_temp_cfg_t;
00140 
00141   ///< @brief CTRL_REG1 (20h)
00142   typedef union lis2dh_ctrl_reg1_reg {
00143     char all;
00144     struct {
00145       char Xen  : 1;
00146       char Yen  : 1;
00147       char Zen  : 1;
00148       char LPen : 1;
00149       char ODR  : 4;
00150     } bit;
00151   } lis2dh_ctrl_reg1_t;
00152 
00153   ///< @brief CTRL_REG1 (21h)
00154   typedef union lis2dh_ctrl_reg2_reg {
00155     char all;
00156     struct {
00157       char HPIS    : 3;
00158       char HPCLICK : 1;
00159       char FDS     : 1;
00160       char HPCF    : 2;
00161       char HPM     : 2;
00162     } bit;
00163   } lis2dh_ctrl_reg2_t;
00164 
00165   ///< @brief CTRL_REG3 (22h)
00166   typedef union lis2dh_ctrl_reg3_reg {
00167     char all;
00168     struct {
00169       char reserved   : 1;
00170       char I1_OVERRUN : 1;
00171       char I1_WTM     : 1;
00172       char I1_DRDY    : 2;
00173       char I1_AOI     : 1;
00174       char I1_CLICK   : 1;
00175     } bit;
00176   } lis2dh_ctrl_reg3_t;
00177 
00178   ///< @brief CTRL_REG4 (23h)
00179   typedef union lis2dh_ctrl_reg4_reg {
00180     char all;
00181     struct {
00182       char SIM : 1;
00183       char ST  : 2;
00184       char HR  : 1;
00185       char FS  : 2;
00186       char BLE : 1;
00187       char BDU : 1;
00188     } bit;
00189   } lis2dh_ctrl_reg4_t;
00190 
00191   ///< @brief CTRL_REG5 (24h)
00192   typedef union lis2dh_ctrl_reg5_reg {
00193     char all;
00194     struct {
00195       char D4D_INT2 : 1;
00196       char LIR_INT2 : 1;
00197       char D4D_INT1 : 1;
00198       char LIR_INT1 : 1;
00199       char reserved : 2;
00200       char FIFO_EN  : 1;
00201       char BOOT     : 1;
00202     } bit;
00203   } lis2dh_ctrl_reg5_t;
00204 
00205   ///< @brief CTRL_REG6 (25h)
00206   typedef union lis2dh_ctrl_reg6_reg {
00207     char all;
00208     struct {
00209       char reserved1 : 1;
00210       char H_LACTIVE : 1;
00211       char reserved2 : 1;
00212       char P2_ACT    : 1;
00213       char BOOT_I2   : 1;
00214       char I2_INT2   : 2;
00215       char I2_INT1   : 1;
00216       char I2_CLICKen: 1;
00217     } bit;
00218   } lis2dh_ctrl_reg6_t;
00219 
00220   ///< @brief REFERENCE (26h)
00221   typedef union lis2dh_reference_reg {
00222     char all;
00223   } lis2dh_reference;
00224 
00225   ///< @brief STATUS_REG (27h)
00226   typedef union lis2dh_status_reg_ {
00227     char all;
00228     struct {
00229       char XDA   : 1;
00230       char YDA   : 1;
00231       char ZDA   : 1;
00232       char ZYXDA : 1;
00233       char XOR   : 1;
00234       char YOR   : 1;
00235       char ZOR   : 1;
00236       char ZYXOR : 1;
00237     } bit;
00238   } lis2dh_status_reg_t;
00239 
00240 
00241   ///< @brief FIFO_CTRL_REG (2Eh)
00242   typedef union lis2dh_fifo_ctrl_reg_ {
00243     char all;
00244     struct {
00245       char FTH : 5;
00246       char TR  : 1;
00247       char FM  : 2;
00248     } bit;
00249   } lis2dh_fifo_ctrl_reg_t;
00250 
00251   ///< @brief FIFO_CTRL_REG (2Fh)
00252   typedef union lis2dh_fifo_src_reg_ {
00253     char all;
00254     struct {
00255       char FSS       : 5;
00256       char EMPTY     : 1;
00257       char OVRN_FIFO : 1;
00258       char WTM       : 1;
00259     } bit;
00260   } lis2dh_fifo_src_reg_t;
00261 
00262   ///< @brief INT1_CFG (30h)
00263   typedef union lis2dh_int1_cfg_reg_ {
00264     char all;
00265     struct {
00266       char XLIE_XDOWNE : 1;
00267       char XHIE_XUPE   : 1;
00268       char YLIE_YDOWNE : 1;
00269       char YHIE_YUPE   : 1;
00270       char ZLIE_ZDOWNE : 1;
00271       char ZHIE_ZUPE   : 1;
00272       char SIXD        : 1;
00273       char AOI         : 1;
00274     } bit;
00275   } lis2dh_int1_cfg_t;
00276 
00277   ///< @brief INT1_SRC (31h)
00278   typedef union lis2dh_int1_src_reg_ {
00279     char all;
00280     struct {
00281       char XL : 1;
00282       char XH : 1;
00283       char YL : 1;
00284       char YH : 1;
00285       char ZL : 1;
00286       char ZH : 1;
00287       char IA : 1;
00288       char reserved : 1;
00289     } bit;
00290   } lis2dh_int1_src_t;
00291 
00292 
00293   ///< @brief INT2_CFG (34h)
00294   typedef union lis2dh_int2_cfg_reg_ {
00295     char all;
00296     struct {
00297       char XLIE : 1;
00298       char XHIE : 1;
00299       char YLIE : 1;
00300       char YHIE : 1;
00301       char ZLIE : 1;
00302       char ZHIE : 1;
00303       char SIX6 : 1;
00304       char AOI  : 1;
00305     } bit;
00306   } lis2dh_int2_cfg_t;
00307 
00308   ///< @brief INT2_SRC (35h)
00309   typedef union lis2dh_int2_src_reg_ {
00310     char all;
00311     struct {
00312       char XL       : 1;
00313       char XH       : 1;
00314       char YL       : 1;
00315       char YH       : 1;
00316       char ZL       : 1;
00317       char ZH       : 1;
00318       char IA       : 1;
00319       char reserved : 1;
00320     } bit;
00321   } lis2dh_int2_src_t;
00322 
00323 
00324 
00325   LIS2DH(PinName sda, PinName scl, int slaveAddress);
00326   LIS2DH(I2C *i2c, int slaveAddress);
00327   ~LIS2DH(void);
00328 
00329   /** 
00330    * @brief Initialize the device
00331    */
00332   void init(void);
00333   /** 
00334    * @brief Interrupt handler
00335    */
00336   void int_handler(void);
00337   /** 
00338    * @brief Get motion data from the device fifo
00339    */
00340   int get_motion_fifo(short *valueX, short *valueY, short *valueZ);
00341   /** 
00342    * @brief Get the last cached motion values (cached from a previous interrupt
00343    * event)
00344    */
00345   int get_motion_cached(int16_t *valueX, int16_t *valueY, int16_t *valueZ);
00346   /** 
00347    * @brief Star Interrupts
00348    */
00349   int initStart(int dataRate, int fifoThreshold);
00350   /** 
00351    * @brief Stop interrupts
00352    */
00353   void stop(void);
00354   /** 
00355    * @brief Read device register
00356    */
00357   int readReg(LIS2DH_REG_map_t reg, char *value);
00358   /** 
00359    * @brief Write device regsiter
00360    */
00361   int writeReg(LIS2DH_REG_map_t reg, char value);
00362   /** 
00363    * @brief Detect if device exists
00364    */
00365   int detect(char *detected);
00366   /** 
00367    * @brief Read the device ID
00368    */
00369   char readId(void);
00370 
00371   static LIS2DH *instance;
00372 
00373 private:
00374   /** @brief
00375   */
00376   void configure_interrupt(void);
00377   ///< I2C pointer
00378   I2C *i2c;
00379   ///< Is this object the owner of the I2C object
00380   bool isOwner;
00381   ///< Device slave address
00382   int slaveAddress;
00383 };
00384 
00385 #endif /* LIS2DH_H_ */