NXP's driver library for LPC17xx, ported to mbed's online compiler. Not tested! I had to fix a lot of warings and found a couple of pretty obvious bugs, so the chances are there are more. Original: http://ics.nxp.com/support/documents/microcontrollers/zip/lpc17xx.cmsis.driver.library.zip
source/lpc17xx_pwm.c@0:1063a091a062, 2010-02-17 (annotated)
- Committer:
- igorsk
- Date:
- Wed Feb 17 16:22:39 2010 +0000
- Revision:
- 0:1063a091a062
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
igorsk | 0:1063a091a062 | 1 | /** |
igorsk | 0:1063a091a062 | 2 | * @file : lpc17xx_pwm.c |
igorsk | 0:1063a091a062 | 3 | * @brief : Contains all functions support for PWM firmware library on LPC17xx |
igorsk | 0:1063a091a062 | 4 | * @version : 1.0 |
igorsk | 0:1063a091a062 | 5 | * @date : 22. Apr. 2009 |
igorsk | 0:1063a091a062 | 6 | * @author : HieuNguyen |
igorsk | 0:1063a091a062 | 7 | ************************************************************************** |
igorsk | 0:1063a091a062 | 8 | * Software that is described herein is for illustrative purposes only |
igorsk | 0:1063a091a062 | 9 | * which provides customers with programming information regarding the |
igorsk | 0:1063a091a062 | 10 | * products. This software is supplied "AS IS" without any warranties. |
igorsk | 0:1063a091a062 | 11 | * NXP Semiconductors assumes no responsibility or liability for the |
igorsk | 0:1063a091a062 | 12 | * use of the software, conveys no license or title under any patent, |
igorsk | 0:1063a091a062 | 13 | * copyright, or mask work right to the product. NXP Semiconductors |
igorsk | 0:1063a091a062 | 14 | * reserves the right to make changes in the software without |
igorsk | 0:1063a091a062 | 15 | * notification. NXP Semiconductors also make no representation or |
igorsk | 0:1063a091a062 | 16 | * warranty that such application will be suitable for the specified |
igorsk | 0:1063a091a062 | 17 | * use without further testing or modification. |
igorsk | 0:1063a091a062 | 18 | **********************************************************************/ |
igorsk | 0:1063a091a062 | 19 | |
igorsk | 0:1063a091a062 | 20 | /* Peripheral group ----------------------------------------------------------- */ |
igorsk | 0:1063a091a062 | 21 | /** @addtogroup PWM |
igorsk | 0:1063a091a062 | 22 | * @{ |
igorsk | 0:1063a091a062 | 23 | */ |
igorsk | 0:1063a091a062 | 24 | |
igorsk | 0:1063a091a062 | 25 | /* Includes ------------------------------------------------------------------- */ |
igorsk | 0:1063a091a062 | 26 | #include "lpc17xx_pwm.h" |
igorsk | 0:1063a091a062 | 27 | #include "lpc17xx_clkpwr.h" |
igorsk | 0:1063a091a062 | 28 | |
igorsk | 0:1063a091a062 | 29 | /* If this source file built with example, the LPC17xx FW library configuration |
igorsk | 0:1063a091a062 | 30 | * file in each example directory ("lpc17xx_libcfg.h") must be included, |
igorsk | 0:1063a091a062 | 31 | * otherwise the default FW library configuration file must be included instead |
igorsk | 0:1063a091a062 | 32 | */ |
igorsk | 0:1063a091a062 | 33 | #ifdef __BUILD_WITH_EXAMPLE__ |
igorsk | 0:1063a091a062 | 34 | #include "lpc17xx_libcfg.h" |
igorsk | 0:1063a091a062 | 35 | #else |
igorsk | 0:1063a091a062 | 36 | #include "lpc17xx_libcfg_default.h" |
igorsk | 0:1063a091a062 | 37 | #endif /* __BUILD_WITH_EXAMPLE__ */ |
igorsk | 0:1063a091a062 | 38 | |
igorsk | 0:1063a091a062 | 39 | |
igorsk | 0:1063a091a062 | 40 | #ifdef _PWM |
igorsk | 0:1063a091a062 | 41 | |
igorsk | 0:1063a091a062 | 42 | |
igorsk | 0:1063a091a062 | 43 | /* Public Functions ----------------------------------------------------------- */ |
igorsk | 0:1063a091a062 | 44 | /** @addtogroup PWM_Public_Functions |
igorsk | 0:1063a091a062 | 45 | * @{ |
igorsk | 0:1063a091a062 | 46 | */ |
igorsk | 0:1063a091a062 | 47 | |
igorsk | 0:1063a091a062 | 48 | |
igorsk | 0:1063a091a062 | 49 | /*********************************************************************//** |
igorsk | 0:1063a091a062 | 50 | * @brief Check whether specified interrupt flag in PWM is set or not |
igorsk | 0:1063a091a062 | 51 | * @param[in] PWMx: PWM peripheral, should be PWM1 |
igorsk | 0:1063a091a062 | 52 | * @param[in] IntFlag: PWM interrupt flag, should be: |
igorsk | 0:1063a091a062 | 53 | * - PWM_INTSTAT_MR0: Interrupt flag for PWM match channel 0 |
igorsk | 0:1063a091a062 | 54 | * - PWM_INTSTAT_MR1: Interrupt flag for PWM match channel 1 |
igorsk | 0:1063a091a062 | 55 | * - PWM_INTSTAT_MR2: Interrupt flag for PWM match channel 2 |
igorsk | 0:1063a091a062 | 56 | * - PWM_INTSTAT_MR3: Interrupt flag for PWM match channel 3 |
igorsk | 0:1063a091a062 | 57 | * - PWM_INTSTAT_MR4: Interrupt flag for PWM match channel 4 |
igorsk | 0:1063a091a062 | 58 | * - PWM_INTSTAT_MR5: Interrupt flag for PWM match channel 5 |
igorsk | 0:1063a091a062 | 59 | * - PWM_INTSTAT_MR6: Interrupt flag for PWM match channel 6 |
igorsk | 0:1063a091a062 | 60 | * - PWM_INTSTAT_CAP0: Interrupt flag for capture input 0 |
igorsk | 0:1063a091a062 | 61 | * - PWM_INTSTAT_CAP1: Interrupt flag for capture input 1 |
igorsk | 0:1063a091a062 | 62 | * @return New State of PWM interrupt flag (SET or RESET) |
igorsk | 0:1063a091a062 | 63 | **********************************************************************/ |
igorsk | 0:1063a091a062 | 64 | IntStatus PWM_GetIntStatus(LPC_PWM_TypeDef *PWMx, uint32_t IntFlag) |
igorsk | 0:1063a091a062 | 65 | { |
igorsk | 0:1063a091a062 | 66 | CHECK_PARAM(PARAM_PWMx(PWMx)); |
igorsk | 0:1063a091a062 | 67 | CHECK_PARAM(PARAM_PWM_INTSTAT(IntFlag)); |
igorsk | 0:1063a091a062 | 68 | |
igorsk | 0:1063a091a062 | 69 | return ((PWMx->IR & IntFlag) ? SET : RESET); |
igorsk | 0:1063a091a062 | 70 | } |
igorsk | 0:1063a091a062 | 71 | |
igorsk | 0:1063a091a062 | 72 | |
igorsk | 0:1063a091a062 | 73 | |
igorsk | 0:1063a091a062 | 74 | /*********************************************************************//** |
igorsk | 0:1063a091a062 | 75 | * @brief Clear specified PWM Interrupt pending |
igorsk | 0:1063a091a062 | 76 | * @param[in] PWMx: PWM peripheral, should be PWM1 |
igorsk | 0:1063a091a062 | 77 | * @param[in] IntFlag: PWM interrupt flag, should be: |
igorsk | 0:1063a091a062 | 78 | * - PWM_INTSTAT_MR0: Interrupt flag for PWM match channel 0 |
igorsk | 0:1063a091a062 | 79 | * - PWM_INTSTAT_MR1: Interrupt flag for PWM match channel 1 |
igorsk | 0:1063a091a062 | 80 | * - PWM_INTSTAT_MR2: Interrupt flag for PWM match channel 2 |
igorsk | 0:1063a091a062 | 81 | * - PWM_INTSTAT_MR3: Interrupt flag for PWM match channel 3 |
igorsk | 0:1063a091a062 | 82 | * - PWM_INTSTAT_MR4: Interrupt flag for PWM match channel 4 |
igorsk | 0:1063a091a062 | 83 | * - PWM_INTSTAT_MR5: Interrupt flag for PWM match channel 5 |
igorsk | 0:1063a091a062 | 84 | * - PWM_INTSTAT_MR6: Interrupt flag for PWM match channel 6 |
igorsk | 0:1063a091a062 | 85 | * - PWM_INTSTAT_CAP0: Interrupt flag for capture input 0 |
igorsk | 0:1063a091a062 | 86 | * - PWM_INTSTAT_CAP1: Interrupt flag for capture input 1 |
igorsk | 0:1063a091a062 | 87 | * @return None |
igorsk | 0:1063a091a062 | 88 | **********************************************************************/ |
igorsk | 0:1063a091a062 | 89 | void PWM_ClearIntPending(LPC_PWM_TypeDef *PWMx, uint32_t IntFlag) |
igorsk | 0:1063a091a062 | 90 | { |
igorsk | 0:1063a091a062 | 91 | CHECK_PARAM(PARAM_PWMx(PWMx)); |
igorsk | 0:1063a091a062 | 92 | CHECK_PARAM(PARAM_PWM_INTSTAT(IntFlag)); |
igorsk | 0:1063a091a062 | 93 | PWMx->IR = IntFlag; |
igorsk | 0:1063a091a062 | 94 | } |
igorsk | 0:1063a091a062 | 95 | |
igorsk | 0:1063a091a062 | 96 | |
igorsk | 0:1063a091a062 | 97 | |
igorsk | 0:1063a091a062 | 98 | /*****************************************************************************//** |
igorsk | 0:1063a091a062 | 99 | * @brief Fills each PWM_InitStruct member with its default value: |
igorsk | 0:1063a091a062 | 100 | * - If PWMCounterMode = PWM_MODE_TIMER: |
igorsk | 0:1063a091a062 | 101 | * + PrescaleOption = PWM_TIMER_PRESCALE_USVAL |
igorsk | 0:1063a091a062 | 102 | * + PrescaleValue = 1 |
igorsk | 0:1063a091a062 | 103 | * - If PWMCounterMode = PWM_MODE_COUNTER: |
igorsk | 0:1063a091a062 | 104 | * + CountInputSelect = PWM_COUNTER_PCAP1_0 |
igorsk | 0:1063a091a062 | 105 | * + CounterOption = PWM_COUNTER_RISING |
igorsk | 0:1063a091a062 | 106 | * @param[in] PWMTimerCounterMode Timer or Counter mode, should be: |
igorsk | 0:1063a091a062 | 107 | * - PWM_MODE_TIMER: Counter of PWM peripheral is in Timer mode |
igorsk | 0:1063a091a062 | 108 | * - PWM_MODE_COUNTER: Counter of PWM peripheral is in Counter mode |
igorsk | 0:1063a091a062 | 109 | * @param[in] PWM_InitStruct Pointer to structure (PWM_TIMERCFG_Type or |
igorsk | 0:1063a091a062 | 110 | * PWM_COUNTERCFG_Type) which will be initialized. |
igorsk | 0:1063a091a062 | 111 | * @return None |
igorsk | 0:1063a091a062 | 112 | * Note: PWM_InitStruct pointer will be assigned to corresponding structure |
igorsk | 0:1063a091a062 | 113 | * (PWM_TIMERCFG_Type or PWM_COUNTERCFG_Type) due to PWMTimerCounterMode. |
igorsk | 0:1063a091a062 | 114 | *******************************************************************************/ |
igorsk | 0:1063a091a062 | 115 | void PWM_ConfigStructInit(uint8_t PWMTimerCounterMode, void *PWM_InitStruct) |
igorsk | 0:1063a091a062 | 116 | { |
igorsk | 0:1063a091a062 | 117 | CHECK_PARAM(PARAM_PWM_TC_MODE(PWMTimerCounterMode)); |
igorsk | 0:1063a091a062 | 118 | |
igorsk | 0:1063a091a062 | 119 | PWM_TIMERCFG_Type *pTimeCfg = (PWM_TIMERCFG_Type *) PWM_InitStruct; |
igorsk | 0:1063a091a062 | 120 | PWM_COUNTERCFG_Type *pCounterCfg = (PWM_COUNTERCFG_Type *) PWM_InitStruct; |
igorsk | 0:1063a091a062 | 121 | |
igorsk | 0:1063a091a062 | 122 | if (PWMTimerCounterMode == PWM_MODE_TIMER ) |
igorsk | 0:1063a091a062 | 123 | { |
igorsk | 0:1063a091a062 | 124 | pTimeCfg->PrescaleOption = PWM_TIMER_PRESCALE_USVAL; |
igorsk | 0:1063a091a062 | 125 | pTimeCfg->PrescaleValue = 1; |
igorsk | 0:1063a091a062 | 126 | } |
igorsk | 0:1063a091a062 | 127 | else if (PWMTimerCounterMode == PWM_MODE_COUNTER) |
igorsk | 0:1063a091a062 | 128 | { |
igorsk | 0:1063a091a062 | 129 | pCounterCfg->CountInputSelect = PWM_COUNTER_PCAP1_0; |
igorsk | 0:1063a091a062 | 130 | pCounterCfg->CounterOption = PWM_COUNTER_RISING; |
igorsk | 0:1063a091a062 | 131 | } |
igorsk | 0:1063a091a062 | 132 | } |
igorsk | 0:1063a091a062 | 133 | |
igorsk | 0:1063a091a062 | 134 | |
igorsk | 0:1063a091a062 | 135 | /*********************************************************************//** |
igorsk | 0:1063a091a062 | 136 | * @brief Initializes the PWMx peripheral corresponding to the specified |
igorsk | 0:1063a091a062 | 137 | * parameters in the PWM_ConfigStruct. |
igorsk | 0:1063a091a062 | 138 | * @param[in] PWMx PWM peripheral, should be PWM1 |
igorsk | 0:1063a091a062 | 139 | * @param[in] PWMTimerCounterMode Timer or Counter mode, should be: |
igorsk | 0:1063a091a062 | 140 | * - PWM_MODE_TIMER: Counter of PWM peripheral is in Timer mode |
igorsk | 0:1063a091a062 | 141 | * - PWM_MODE_COUNTER: Counter of PWM peripheral is in Counter mode |
igorsk | 0:1063a091a062 | 142 | * @param[in] PWM_ConfigStruct Pointer to structure (PWM_TIMERCFG_Type or |
igorsk | 0:1063a091a062 | 143 | * PWM_COUNTERCFG_Type) which will be initialized. |
igorsk | 0:1063a091a062 | 144 | * @return None |
igorsk | 0:1063a091a062 | 145 | * Note: PWM_ConfigStruct pointer will be assigned to corresponding structure |
igorsk | 0:1063a091a062 | 146 | * (PWM_TIMERCFG_Type or PWM_COUNTERCFG_Type) due to PWMTimerCounterMode. |
igorsk | 0:1063a091a062 | 147 | **********************************************************************/ |
igorsk | 0:1063a091a062 | 148 | void PWM_Init(LPC_PWM_TypeDef *PWMx, uint32_t PWMTimerCounterMode, void *PWM_ConfigStruct) |
igorsk | 0:1063a091a062 | 149 | { |
igorsk | 0:1063a091a062 | 150 | CHECK_PARAM(PARAM_PWMx(PWMx)); |
igorsk | 0:1063a091a062 | 151 | CHECK_PARAM(PARAM_PWM_TC_MODE(PWMTimerCounterMode)); |
igorsk | 0:1063a091a062 | 152 | |
igorsk | 0:1063a091a062 | 153 | PWM_TIMERCFG_Type *pTimeCfg = (PWM_TIMERCFG_Type *)PWM_ConfigStruct; |
igorsk | 0:1063a091a062 | 154 | PWM_COUNTERCFG_Type *pCounterCfg = (PWM_COUNTERCFG_Type *)PWM_ConfigStruct; |
igorsk | 0:1063a091a062 | 155 | uint64_t clkdlycnt=0; |
igorsk | 0:1063a091a062 | 156 | |
igorsk | 0:1063a091a062 | 157 | if (PWMx == LPC_PWM1) |
igorsk | 0:1063a091a062 | 158 | { |
igorsk | 0:1063a091a062 | 159 | CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCPWM1, ENABLE); |
igorsk | 0:1063a091a062 | 160 | CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_PWM1, CLKPWR_PCLKSEL_CCLK_DIV_4); |
igorsk | 0:1063a091a062 | 161 | // Get peripheral clock of PWM1 |
igorsk | 0:1063a091a062 | 162 | clkdlycnt = (uint64_t) CLKPWR_GetPCLK (CLKPWR_PCLKSEL_PWM1); |
igorsk | 0:1063a091a062 | 163 | } |
igorsk | 0:1063a091a062 | 164 | |
igorsk | 0:1063a091a062 | 165 | // Clear all interrupts pending |
igorsk | 0:1063a091a062 | 166 | PWMx->IR = 0xFF & PWM_IR_BITMASK; |
igorsk | 0:1063a091a062 | 167 | PWMx->TCR = 0x00; |
igorsk | 0:1063a091a062 | 168 | PWMx->CTCR = 0x00; |
igorsk | 0:1063a091a062 | 169 | PWMx->MCR = 0x00; |
igorsk | 0:1063a091a062 | 170 | PWMx->CCR = 0x00; |
igorsk | 0:1063a091a062 | 171 | PWMx->PCR = 0x00; |
igorsk | 0:1063a091a062 | 172 | PWMx->LER = 0x00; |
igorsk | 0:1063a091a062 | 173 | |
igorsk | 0:1063a091a062 | 174 | if (PWMTimerCounterMode == PWM_MODE_TIMER) |
igorsk | 0:1063a091a062 | 175 | { |
igorsk | 0:1063a091a062 | 176 | CHECK_PARAM(PARAM_PWM_TIMER_PRESCALE(pTimeCfg->PrescaleOption)); |
igorsk | 0:1063a091a062 | 177 | |
igorsk | 0:1063a091a062 | 178 | /* Absolute prescale value */ |
igorsk | 0:1063a091a062 | 179 | if (pTimeCfg->PrescaleOption == PWM_TIMER_PRESCALE_TICKVAL) |
igorsk | 0:1063a091a062 | 180 | { |
igorsk | 0:1063a091a062 | 181 | PWMx->PR = pTimeCfg->PrescaleValue - 1; |
igorsk | 0:1063a091a062 | 182 | } |
igorsk | 0:1063a091a062 | 183 | /* uSecond prescale value */ |
igorsk | 0:1063a091a062 | 184 | else |
igorsk | 0:1063a091a062 | 185 | { |
igorsk | 0:1063a091a062 | 186 | clkdlycnt = (clkdlycnt * pTimeCfg->PrescaleValue) / 1000000; |
igorsk | 0:1063a091a062 | 187 | PWMx->PR = ((uint32_t) clkdlycnt) - 1; |
igorsk | 0:1063a091a062 | 188 | } |
igorsk | 0:1063a091a062 | 189 | |
igorsk | 0:1063a091a062 | 190 | } |
igorsk | 0:1063a091a062 | 191 | else if (PWMTimerCounterMode == PWM_MODE_COUNTER) |
igorsk | 0:1063a091a062 | 192 | { |
igorsk | 0:1063a091a062 | 193 | CHECK_PARAM(PARAM_PWM_COUNTER_INPUTSEL(pCounterCfg->CountInputSelect)); |
igorsk | 0:1063a091a062 | 194 | CHECK_PARAM(PARAM_PWM_COUNTER_EDGE(pCounterCfg->CounterOption)); |
igorsk | 0:1063a091a062 | 195 | |
igorsk | 0:1063a091a062 | 196 | PWMx->CTCR |= (PWM_CTCR_MODE((uint32_t)pCounterCfg->CounterOption)) \ |
igorsk | 0:1063a091a062 | 197 | | (PWM_CTCR_SELECT_INPUT((uint32_t)pCounterCfg->CountInputSelect)); |
igorsk | 0:1063a091a062 | 198 | } |
igorsk | 0:1063a091a062 | 199 | } |
igorsk | 0:1063a091a062 | 200 | |
igorsk | 0:1063a091a062 | 201 | /*********************************************************************//** |
igorsk | 0:1063a091a062 | 202 | * @brief De-initializes the PWM peripheral registers to their |
igorsk | 0:1063a091a062 | 203 | * default reset values. |
igorsk | 0:1063a091a062 | 204 | * @param[in] PWMx PWM peripheral selected, should be PWM1 |
igorsk | 0:1063a091a062 | 205 | * @return None |
igorsk | 0:1063a091a062 | 206 | **********************************************************************/ |
igorsk | 0:1063a091a062 | 207 | void PWM_DeInit (LPC_PWM_TypeDef *PWMx) |
igorsk | 0:1063a091a062 | 208 | { |
igorsk | 0:1063a091a062 | 209 | CHECK_PARAM(PARAM_PWMx(PWMx)); |
igorsk | 0:1063a091a062 | 210 | |
igorsk | 0:1063a091a062 | 211 | // Disable PWM control (timer, counter and PWM) |
igorsk | 0:1063a091a062 | 212 | PWMx->TCR = 0x00; |
igorsk | 0:1063a091a062 | 213 | |
igorsk | 0:1063a091a062 | 214 | if (PWMx == LPC_PWM1) |
igorsk | 0:1063a091a062 | 215 | { |
igorsk | 0:1063a091a062 | 216 | CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCPWM1, DISABLE); |
igorsk | 0:1063a091a062 | 217 | } |
igorsk | 0:1063a091a062 | 218 | } |
igorsk | 0:1063a091a062 | 219 | |
igorsk | 0:1063a091a062 | 220 | |
igorsk | 0:1063a091a062 | 221 | /*********************************************************************//** |
igorsk | 0:1063a091a062 | 222 | * @brief Enable/Disable PWM peripheral |
igorsk | 0:1063a091a062 | 223 | * @param[in] PWMx PWM peripheral selected, should be PWM1 |
igorsk | 0:1063a091a062 | 224 | * @param[in] NewState New State of this function, should be: |
igorsk | 0:1063a091a062 | 225 | * - ENABLE: Enable PWM peripheral |
igorsk | 0:1063a091a062 | 226 | * - DISABLE: Disable PWM peripheral |
igorsk | 0:1063a091a062 | 227 | * @return None |
igorsk | 0:1063a091a062 | 228 | **********************************************************************/ |
igorsk | 0:1063a091a062 | 229 | void PWM_Cmd(LPC_PWM_TypeDef *PWMx, FunctionalState NewState) |
igorsk | 0:1063a091a062 | 230 | { |
igorsk | 0:1063a091a062 | 231 | CHECK_PARAM(PARAM_PWMx(PWMx)); |
igorsk | 0:1063a091a062 | 232 | CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState)); |
igorsk | 0:1063a091a062 | 233 | |
igorsk | 0:1063a091a062 | 234 | if (NewState == ENABLE) |
igorsk | 0:1063a091a062 | 235 | { |
igorsk | 0:1063a091a062 | 236 | PWMx->TCR |= PWM_TCR_PWM_ENABLE; |
igorsk | 0:1063a091a062 | 237 | } |
igorsk | 0:1063a091a062 | 238 | else |
igorsk | 0:1063a091a062 | 239 | { |
igorsk | 0:1063a091a062 | 240 | PWMx->TCR &= (~PWM_TCR_PWM_ENABLE) & PWM_TCR_BITMASK; |
igorsk | 0:1063a091a062 | 241 | } |
igorsk | 0:1063a091a062 | 242 | } |
igorsk | 0:1063a091a062 | 243 | |
igorsk | 0:1063a091a062 | 244 | |
igorsk | 0:1063a091a062 | 245 | /*********************************************************************//** |
igorsk | 0:1063a091a062 | 246 | * @brief Enable/Disable Counter in PWM peripheral |
igorsk | 0:1063a091a062 | 247 | * @param[in] PWMx PWM peripheral selected, should be PWM1 |
igorsk | 0:1063a091a062 | 248 | * @param[in] NewState New State of this function, should be: |
igorsk | 0:1063a091a062 | 249 | * - ENABLE: Enable Counter in PWM peripheral |
igorsk | 0:1063a091a062 | 250 | * - DISABLE: Disable Counter in PWM peripheral |
igorsk | 0:1063a091a062 | 251 | * @return None |
igorsk | 0:1063a091a062 | 252 | **********************************************************************/ |
igorsk | 0:1063a091a062 | 253 | void PWM_CounterCmd(LPC_PWM_TypeDef *PWMx, FunctionalState NewState) |
igorsk | 0:1063a091a062 | 254 | { |
igorsk | 0:1063a091a062 | 255 | CHECK_PARAM(PARAM_PWMx(PWMx)); |
igorsk | 0:1063a091a062 | 256 | CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState)); |
igorsk | 0:1063a091a062 | 257 | if (NewState == ENABLE) |
igorsk | 0:1063a091a062 | 258 | { |
igorsk | 0:1063a091a062 | 259 | PWMx->TCR |= PWM_TCR_COUNTER_ENABLE; |
igorsk | 0:1063a091a062 | 260 | } |
igorsk | 0:1063a091a062 | 261 | else |
igorsk | 0:1063a091a062 | 262 | { |
igorsk | 0:1063a091a062 | 263 | PWMx->TCR &= (~PWM_TCR_COUNTER_ENABLE) & PWM_TCR_BITMASK; |
igorsk | 0:1063a091a062 | 264 | } |
igorsk | 0:1063a091a062 | 265 | } |
igorsk | 0:1063a091a062 | 266 | |
igorsk | 0:1063a091a062 | 267 | |
igorsk | 0:1063a091a062 | 268 | /*********************************************************************//** |
igorsk | 0:1063a091a062 | 269 | * @brief Reset Counter in PWM peripheral |
igorsk | 0:1063a091a062 | 270 | * @param[in] PWMx PWM peripheral selected, should be PWM1 |
igorsk | 0:1063a091a062 | 271 | * @return None |
igorsk | 0:1063a091a062 | 272 | **********************************************************************/ |
igorsk | 0:1063a091a062 | 273 | void PWM_ResetCounter(LPC_PWM_TypeDef *PWMx) |
igorsk | 0:1063a091a062 | 274 | { |
igorsk | 0:1063a091a062 | 275 | CHECK_PARAM(PARAM_PWMx(PWMx)); |
igorsk | 0:1063a091a062 | 276 | PWMx->TCR |= PWM_TCR_COUNTER_RESET; |
igorsk | 0:1063a091a062 | 277 | PWMx->TCR &= (~PWM_TCR_COUNTER_RESET) & PWM_TCR_BITMASK; |
igorsk | 0:1063a091a062 | 278 | } |
igorsk | 0:1063a091a062 | 279 | |
igorsk | 0:1063a091a062 | 280 | |
igorsk | 0:1063a091a062 | 281 | /*********************************************************************//** |
igorsk | 0:1063a091a062 | 282 | * @brief Configures match for PWM peripheral |
igorsk | 0:1063a091a062 | 283 | * @param[in] PWMx PWM peripheral selected, should be PWM1 |
igorsk | 0:1063a091a062 | 284 | * @param[in] PWM_MatchConfigStruct Pointer to a PWM_MATCHCFG_Type structure |
igorsk | 0:1063a091a062 | 285 | * that contains the configuration information for the |
igorsk | 0:1063a091a062 | 286 | * specified PWM match function. |
igorsk | 0:1063a091a062 | 287 | * @return None |
igorsk | 0:1063a091a062 | 288 | **********************************************************************/ |
igorsk | 0:1063a091a062 | 289 | void PWM_ConfigMatch(LPC_PWM_TypeDef *PWMx, PWM_MATCHCFG_Type *PWM_MatchConfigStruct) |
igorsk | 0:1063a091a062 | 290 | { |
igorsk | 0:1063a091a062 | 291 | CHECK_PARAM(PARAM_PWMx(PWMx)); |
igorsk | 0:1063a091a062 | 292 | CHECK_PARAM(PARAM_PWM1_MATCH_CHANNEL(PWM_MatchConfigStruct->MatchChannel)); |
igorsk | 0:1063a091a062 | 293 | CHECK_PARAM(PARAM_FUNCTIONALSTATE(PWM_MatchConfigStruct->IntOnMatch)); |
igorsk | 0:1063a091a062 | 294 | CHECK_PARAM(PARAM_FUNCTIONALSTATE(PWM_MatchConfigStruct->ResetOnMatch)); |
igorsk | 0:1063a091a062 | 295 | CHECK_PARAM(PARAM_FUNCTIONALSTATE(PWM_MatchConfigStruct->StopOnMatch)); |
igorsk | 0:1063a091a062 | 296 | |
igorsk | 0:1063a091a062 | 297 | //interrupt on MRn |
igorsk | 0:1063a091a062 | 298 | if (PWM_MatchConfigStruct->IntOnMatch == ENABLE) |
igorsk | 0:1063a091a062 | 299 | { |
igorsk | 0:1063a091a062 | 300 | PWMx->MCR |= PWM_MCR_INT_ON_MATCH(PWM_MatchConfigStruct->MatchChannel); |
igorsk | 0:1063a091a062 | 301 | } |
igorsk | 0:1063a091a062 | 302 | else |
igorsk | 0:1063a091a062 | 303 | { |
igorsk | 0:1063a091a062 | 304 | PWMx->MCR &= (~PWM_MCR_INT_ON_MATCH(PWM_MatchConfigStruct->MatchChannel)) \ |
igorsk | 0:1063a091a062 | 305 | & PWM_MCR_BITMASK; |
igorsk | 0:1063a091a062 | 306 | } |
igorsk | 0:1063a091a062 | 307 | |
igorsk | 0:1063a091a062 | 308 | //reset on MRn |
igorsk | 0:1063a091a062 | 309 | if (PWM_MatchConfigStruct->ResetOnMatch == ENABLE) |
igorsk | 0:1063a091a062 | 310 | { |
igorsk | 0:1063a091a062 | 311 | PWMx->MCR |= PWM_MCR_RESET_ON_MATCH(PWM_MatchConfigStruct->MatchChannel); |
igorsk | 0:1063a091a062 | 312 | } |
igorsk | 0:1063a091a062 | 313 | else |
igorsk | 0:1063a091a062 | 314 | { |
igorsk | 0:1063a091a062 | 315 | PWMx->MCR &= (~PWM_MCR_RESET_ON_MATCH(PWM_MatchConfigStruct->MatchChannel)) \ |
igorsk | 0:1063a091a062 | 316 | & PWM_MCR_BITMASK; |
igorsk | 0:1063a091a062 | 317 | } |
igorsk | 0:1063a091a062 | 318 | |
igorsk | 0:1063a091a062 | 319 | //stop on MRn |
igorsk | 0:1063a091a062 | 320 | if (PWM_MatchConfigStruct->StopOnMatch == ENABLE) |
igorsk | 0:1063a091a062 | 321 | { |
igorsk | 0:1063a091a062 | 322 | PWMx->MCR |= PWM_MCR_STOP_ON_MATCH(PWM_MatchConfigStruct->MatchChannel); |
igorsk | 0:1063a091a062 | 323 | } |
igorsk | 0:1063a091a062 | 324 | else |
igorsk | 0:1063a091a062 | 325 | { |
igorsk | 0:1063a091a062 | 326 | PWMx->MCR &= (~PWM_MCR_STOP_ON_MATCH(PWM_MatchConfigStruct->MatchChannel)) \ |
igorsk | 0:1063a091a062 | 327 | & PWM_MCR_BITMASK; |
igorsk | 0:1063a091a062 | 328 | } |
igorsk | 0:1063a091a062 | 329 | } |
igorsk | 0:1063a091a062 | 330 | |
igorsk | 0:1063a091a062 | 331 | |
igorsk | 0:1063a091a062 | 332 | /*********************************************************************//** |
igorsk | 0:1063a091a062 | 333 | * @brief Configures capture input for PWM peripheral |
igorsk | 0:1063a091a062 | 334 | * @param[in] PWMx PWM peripheral selected, should be PWM1 |
igorsk | 0:1063a091a062 | 335 | * @param[in] PWM_CaptureConfigStruct Pointer to a PWM_CAPTURECFG_Type structure |
igorsk | 0:1063a091a062 | 336 | * that contains the configuration information for the |
igorsk | 0:1063a091a062 | 337 | * specified PWM capture input function. |
igorsk | 0:1063a091a062 | 338 | * @return None |
igorsk | 0:1063a091a062 | 339 | **********************************************************************/ |
igorsk | 0:1063a091a062 | 340 | void PWM_ConfigCapture(LPC_PWM_TypeDef *PWMx, PWM_CAPTURECFG_Type *PWM_CaptureConfigStruct) |
igorsk | 0:1063a091a062 | 341 | { |
igorsk | 0:1063a091a062 | 342 | CHECK_PARAM(PARAM_PWMx(PWMx)); |
igorsk | 0:1063a091a062 | 343 | CHECK_PARAM(PARAM_PWM1_CAPTURE_CHANNEL(PWM_CaptureConfigStruct->CaptureChannel)); |
igorsk | 0:1063a091a062 | 344 | CHECK_PARAM(PARAM_FUNCTIONALSTATE(PWM_CaptureConfigStruct->FallingEdge)); |
igorsk | 0:1063a091a062 | 345 | CHECK_PARAM(PARAM_FUNCTIONALSTATE(PWM_CaptureConfigStruct->IntOnCaption)); |
igorsk | 0:1063a091a062 | 346 | CHECK_PARAM(PARAM_FUNCTIONALSTATE(PWM_CaptureConfigStruct->RisingEdge)); |
igorsk | 0:1063a091a062 | 347 | |
igorsk | 0:1063a091a062 | 348 | if (PWM_CaptureConfigStruct->RisingEdge == ENABLE) |
igorsk | 0:1063a091a062 | 349 | { |
igorsk | 0:1063a091a062 | 350 | PWMx->CCR |= PWM_CCR_CAP_RISING(PWM_CaptureConfigStruct->CaptureChannel); |
igorsk | 0:1063a091a062 | 351 | } |
igorsk | 0:1063a091a062 | 352 | else |
igorsk | 0:1063a091a062 | 353 | { |
igorsk | 0:1063a091a062 | 354 | PWMx->CCR &= (~PWM_CCR_CAP_RISING(PWM_CaptureConfigStruct->CaptureChannel)) \ |
igorsk | 0:1063a091a062 | 355 | & PWM_CCR_BITMASK; |
igorsk | 0:1063a091a062 | 356 | } |
igorsk | 0:1063a091a062 | 357 | |
igorsk | 0:1063a091a062 | 358 | if (PWM_CaptureConfigStruct->FallingEdge == ENABLE) |
igorsk | 0:1063a091a062 | 359 | { |
igorsk | 0:1063a091a062 | 360 | PWMx->CCR |= PWM_CCR_CAP_FALLING(PWM_CaptureConfigStruct->CaptureChannel); |
igorsk | 0:1063a091a062 | 361 | } |
igorsk | 0:1063a091a062 | 362 | else |
igorsk | 0:1063a091a062 | 363 | { |
igorsk | 0:1063a091a062 | 364 | PWMx->CCR &= (~PWM_CCR_CAP_FALLING(PWM_CaptureConfigStruct->CaptureChannel)) \ |
igorsk | 0:1063a091a062 | 365 | & PWM_CCR_BITMASK; |
igorsk | 0:1063a091a062 | 366 | } |
igorsk | 0:1063a091a062 | 367 | |
igorsk | 0:1063a091a062 | 368 | if (PWM_CaptureConfigStruct->IntOnCaption == ENABLE) |
igorsk | 0:1063a091a062 | 369 | { |
igorsk | 0:1063a091a062 | 370 | PWMx->CCR |= PWM_CCR_INT_ON_CAP(PWM_CaptureConfigStruct->CaptureChannel); |
igorsk | 0:1063a091a062 | 371 | } |
igorsk | 0:1063a091a062 | 372 | else |
igorsk | 0:1063a091a062 | 373 | { |
igorsk | 0:1063a091a062 | 374 | PWMx->CCR &= (~PWM_CCR_INT_ON_CAP(PWM_CaptureConfigStruct->CaptureChannel)) \ |
igorsk | 0:1063a091a062 | 375 | & PWM_CCR_BITMASK; |
igorsk | 0:1063a091a062 | 376 | } |
igorsk | 0:1063a091a062 | 377 | } |
igorsk | 0:1063a091a062 | 378 | |
igorsk | 0:1063a091a062 | 379 | |
igorsk | 0:1063a091a062 | 380 | /*********************************************************************//** |
igorsk | 0:1063a091a062 | 381 | * @brief Read value of capture register PWM peripheral |
igorsk | 0:1063a091a062 | 382 | * @param[in] PWMx PWM peripheral selected, should be PWM1 |
igorsk | 0:1063a091a062 | 383 | * @param[in] CaptureChannel: capture channel number, should be in |
igorsk | 0:1063a091a062 | 384 | * range 0 to 1 |
igorsk | 0:1063a091a062 | 385 | * @return Value of capture register |
igorsk | 0:1063a091a062 | 386 | **********************************************************************/ |
igorsk | 0:1063a091a062 | 387 | uint32_t PWM_GetCaptureValue(LPC_PWM_TypeDef *PWMx, uint8_t CaptureChannel) |
igorsk | 0:1063a091a062 | 388 | { |
igorsk | 0:1063a091a062 | 389 | CHECK_PARAM(PARAM_PWMx(PWMx)); |
igorsk | 0:1063a091a062 | 390 | CHECK_PARAM(PARAM_PWM1_CAPTURE_CHANNEL(CaptureChannel)); |
igorsk | 0:1063a091a062 | 391 | |
igorsk | 0:1063a091a062 | 392 | switch (CaptureChannel) |
igorsk | 0:1063a091a062 | 393 | { |
igorsk | 0:1063a091a062 | 394 | case 0: |
igorsk | 0:1063a091a062 | 395 | return PWMx->CR0; |
igorsk | 0:1063a091a062 | 396 | |
igorsk | 0:1063a091a062 | 397 | case 1: |
igorsk | 0:1063a091a062 | 398 | return PWMx->CR1; |
igorsk | 0:1063a091a062 | 399 | |
igorsk | 0:1063a091a062 | 400 | default: |
igorsk | 0:1063a091a062 | 401 | return (0); |
igorsk | 0:1063a091a062 | 402 | } |
igorsk | 0:1063a091a062 | 403 | } |
igorsk | 0:1063a091a062 | 404 | |
igorsk | 0:1063a091a062 | 405 | |
igorsk | 0:1063a091a062 | 406 | /********************************************************************//** |
igorsk | 0:1063a091a062 | 407 | * @brief Update value for each PWM channel with update type option |
igorsk | 0:1063a091a062 | 408 | * @param[in] PWMx PWM peripheral selected, should be PWM1 |
igorsk | 0:1063a091a062 | 409 | * @param[in] MatchChannel Match channel |
igorsk | 0:1063a091a062 | 410 | * @param[in] MatchValue Match value |
igorsk | 0:1063a091a062 | 411 | * @param[in] UpdateType Type of Update, should be: |
igorsk | 0:1063a091a062 | 412 | * - PWM_MATCH_UPDATE_NOW: The update value will be updated for |
igorsk | 0:1063a091a062 | 413 | * this channel immediately |
igorsk | 0:1063a091a062 | 414 | * - PWM_MATCH_UPDATE_NEXT_RST: The update value will be updated for |
igorsk | 0:1063a091a062 | 415 | * this channel on next reset by a PWM Match event. |
igorsk | 0:1063a091a062 | 416 | * @return None |
igorsk | 0:1063a091a062 | 417 | *********************************************************************/ |
igorsk | 0:1063a091a062 | 418 | void PWM_MatchUpdate(LPC_PWM_TypeDef *PWMx, uint8_t MatchChannel, \ |
igorsk | 0:1063a091a062 | 419 | uint32_t MatchValue, uint8_t UpdateType) |
igorsk | 0:1063a091a062 | 420 | { |
igorsk | 0:1063a091a062 | 421 | CHECK_PARAM(PARAM_PWMx(PWMx)); |
igorsk | 0:1063a091a062 | 422 | CHECK_PARAM(PARAM_PWM1_MATCH_CHANNEL(MatchChannel)); |
igorsk | 0:1063a091a062 | 423 | CHECK_PARAM(PARAM_PWM_MATCH_UPDATE(UpdateType)); |
igorsk | 0:1063a091a062 | 424 | |
igorsk | 0:1063a091a062 | 425 | switch (MatchChannel) |
igorsk | 0:1063a091a062 | 426 | { |
igorsk | 0:1063a091a062 | 427 | case 0: |
igorsk | 0:1063a091a062 | 428 | PWMx->MR0 = MatchValue; |
igorsk | 0:1063a091a062 | 429 | break; |
igorsk | 0:1063a091a062 | 430 | |
igorsk | 0:1063a091a062 | 431 | case 1: |
igorsk | 0:1063a091a062 | 432 | PWMx->MR1 = MatchValue; |
igorsk | 0:1063a091a062 | 433 | break; |
igorsk | 0:1063a091a062 | 434 | |
igorsk | 0:1063a091a062 | 435 | case 2: |
igorsk | 0:1063a091a062 | 436 | PWMx->MR2 = MatchValue; |
igorsk | 0:1063a091a062 | 437 | break; |
igorsk | 0:1063a091a062 | 438 | |
igorsk | 0:1063a091a062 | 439 | case 3: |
igorsk | 0:1063a091a062 | 440 | PWMx->MR3 = MatchValue; |
igorsk | 0:1063a091a062 | 441 | break; |
igorsk | 0:1063a091a062 | 442 | |
igorsk | 0:1063a091a062 | 443 | case 4: |
igorsk | 0:1063a091a062 | 444 | PWMx->MR4 = MatchValue; |
igorsk | 0:1063a091a062 | 445 | break; |
igorsk | 0:1063a091a062 | 446 | |
igorsk | 0:1063a091a062 | 447 | case 5: |
igorsk | 0:1063a091a062 | 448 | PWMx->MR5 = MatchValue; |
igorsk | 0:1063a091a062 | 449 | break; |
igorsk | 0:1063a091a062 | 450 | |
igorsk | 0:1063a091a062 | 451 | case 6: |
igorsk | 0:1063a091a062 | 452 | PWMx->MR6 = MatchValue; |
igorsk | 0:1063a091a062 | 453 | break; |
igorsk | 0:1063a091a062 | 454 | } |
igorsk | 0:1063a091a062 | 455 | |
igorsk | 0:1063a091a062 | 456 | // Write Latch register |
igorsk | 0:1063a091a062 | 457 | PWMx->LER |= PWM_LER_EN_MATCHn_LATCH(MatchChannel); |
igorsk | 0:1063a091a062 | 458 | |
igorsk | 0:1063a091a062 | 459 | // In case of update now |
igorsk | 0:1063a091a062 | 460 | if (UpdateType == PWM_MATCH_UPDATE_NOW) |
igorsk | 0:1063a091a062 | 461 | { |
igorsk | 0:1063a091a062 | 462 | PWMx->TCR |= PWM_TCR_COUNTER_RESET; |
igorsk | 0:1063a091a062 | 463 | PWMx->TCR &= (~PWM_TCR_COUNTER_RESET) & PWM_TCR_BITMASK; |
igorsk | 0:1063a091a062 | 464 | } |
igorsk | 0:1063a091a062 | 465 | } |
igorsk | 0:1063a091a062 | 466 | |
igorsk | 0:1063a091a062 | 467 | |
igorsk | 0:1063a091a062 | 468 | /********************************************************************//** |
igorsk | 0:1063a091a062 | 469 | * @brief Configure Edge mode for each PWM channel |
igorsk | 0:1063a091a062 | 470 | * @param[in] PWMx PWM peripheral selected, should be PWM1 |
igorsk | 0:1063a091a062 | 471 | * @param[in] PWMChannel PWM channel, should be in range from 2 to 6 |
igorsk | 0:1063a091a062 | 472 | * @param[in] ModeOption PWM mode option, should be: |
igorsk | 0:1063a091a062 | 473 | * - PWM_CHANNEL_SINGLE_EDGE: Single Edge mode |
igorsk | 0:1063a091a062 | 474 | * - PWM_CHANNEL_DUAL_EDGE: Dual Edge mode |
igorsk | 0:1063a091a062 | 475 | * @return None |
igorsk | 0:1063a091a062 | 476 | * Note: PWM Channel 1 can not be selected for mode option |
igorsk | 0:1063a091a062 | 477 | *********************************************************************/ |
igorsk | 0:1063a091a062 | 478 | void PWM_ChannelConfig(LPC_PWM_TypeDef *PWMx, uint8_t PWMChannel, uint8_t ModeOption) |
igorsk | 0:1063a091a062 | 479 | { |
igorsk | 0:1063a091a062 | 480 | CHECK_PARAM(PARAM_PWMx(PWMx)); |
igorsk | 0:1063a091a062 | 481 | CHECK_PARAM(PARAM_PWM1_EDGE_MODE_CHANNEL(PWMChannel)); |
igorsk | 0:1063a091a062 | 482 | CHECK_PARAM(PARAM_PWM_CHANNEL_EDGE(ModeOption)); |
igorsk | 0:1063a091a062 | 483 | |
igorsk | 0:1063a091a062 | 484 | // Single edge mode |
igorsk | 0:1063a091a062 | 485 | if (ModeOption == PWM_CHANNEL_SINGLE_EDGE) |
igorsk | 0:1063a091a062 | 486 | { |
igorsk | 0:1063a091a062 | 487 | PWMx->PCR &= (~PWM_PCR_PWMSELn(PWMChannel)) & PWM_PCR_BITMASK; |
igorsk | 0:1063a091a062 | 488 | } |
igorsk | 0:1063a091a062 | 489 | // Double edge mode |
igorsk | 0:1063a091a062 | 490 | else if (PWM_CHANNEL_DUAL_EDGE) |
igorsk | 0:1063a091a062 | 491 | { |
igorsk | 0:1063a091a062 | 492 | PWMx->PCR |= PWM_PCR_PWMSELn(PWMChannel); |
igorsk | 0:1063a091a062 | 493 | } |
igorsk | 0:1063a091a062 | 494 | } |
igorsk | 0:1063a091a062 | 495 | |
igorsk | 0:1063a091a062 | 496 | |
igorsk | 0:1063a091a062 | 497 | |
igorsk | 0:1063a091a062 | 498 | /********************************************************************//** |
igorsk | 0:1063a091a062 | 499 | * @brief Enable/Disable PWM channel output |
igorsk | 0:1063a091a062 | 500 | * @param[in] PWMx PWM peripheral selected, should be PWM1 |
igorsk | 0:1063a091a062 | 501 | * @param[in] PWMChannel PWM channel, should be in range from 1 to 6 |
igorsk | 0:1063a091a062 | 502 | * @param[in] NewState New State of this function, should be: |
igorsk | 0:1063a091a062 | 503 | * - ENABLE: Enable this PWM channel output |
igorsk | 0:1063a091a062 | 504 | * - DISABLE: Disable this PWM channel output |
igorsk | 0:1063a091a062 | 505 | * @return None |
igorsk | 0:1063a091a062 | 506 | *********************************************************************/ |
igorsk | 0:1063a091a062 | 507 | void PWM_ChannelCmd(LPC_PWM_TypeDef *PWMx, uint8_t PWMChannel, FunctionalState NewState) |
igorsk | 0:1063a091a062 | 508 | { |
igorsk | 0:1063a091a062 | 509 | CHECK_PARAM(PARAM_PWMx(PWMx)); |
igorsk | 0:1063a091a062 | 510 | CHECK_PARAM(PARAM_PWM1_CHANNEL(PWMChannel)); |
igorsk | 0:1063a091a062 | 511 | |
igorsk | 0:1063a091a062 | 512 | if (NewState == ENABLE) |
igorsk | 0:1063a091a062 | 513 | { |
igorsk | 0:1063a091a062 | 514 | PWMx->PCR |= PWM_PCR_PWMENAn(PWMChannel); |
igorsk | 0:1063a091a062 | 515 | } |
igorsk | 0:1063a091a062 | 516 | else |
igorsk | 0:1063a091a062 | 517 | { |
igorsk | 0:1063a091a062 | 518 | PWMx->PCR &= (~PWM_PCR_PWMENAn(PWMChannel)) & PWM_PCR_BITMASK; |
igorsk | 0:1063a091a062 | 519 | } |
igorsk | 0:1063a091a062 | 520 | } |
igorsk | 0:1063a091a062 | 521 | |
igorsk | 0:1063a091a062 | 522 | /** |
igorsk | 0:1063a091a062 | 523 | * @} |
igorsk | 0:1063a091a062 | 524 | */ |
igorsk | 0:1063a091a062 | 525 | |
igorsk | 0:1063a091a062 | 526 | #endif /* _PWM */ |
igorsk | 0:1063a091a062 | 527 | |
igorsk | 0:1063a091a062 | 528 | /** |
igorsk | 0:1063a091a062 | 529 | * @} |
igorsk | 0:1063a091a062 | 530 | */ |
igorsk | 0:1063a091a062 | 531 | |
igorsk | 0:1063a091a062 | 532 | /* --------------------------------- End Of File ------------------------------ */ |