Lukasz Uszko / SX1278

SX1278 RA-01, RA-02 LoRa library

  1. This code is deprecated. Use this: https://github.com/luk6xff/DevLibs/tree/master/LORA instead.

registers.h@0:4e8ef5758455, 2019-11-16 (annotated)

Committer:
igbt6
Date:
Sat Nov 16 16:34:57 2019 +0000
Revision:
0:4e8ef5758455
SX1278 - RA-01 Lora library

Who changed what in which revision?

UserRevisionLine numberNew contents of line
igbt6 0:4e8ef5758455 1 /**
igbt6 0:4e8ef5758455 2 * @brief: SX1278 LoRa and FSK modem registers and bits definitions
igbt6 0:4e8ef5758455 3 * @author: SEMTECH, modified by luk6xff
igbt6 0:4e8ef5758455 4 * @email: luszko@op.pl
igbt6 0:4e8ef5758455 5 * @date: 2019-11-15
igbt6 0:4e8ef5758455 6 */
igbt6 0:4e8ef5758455 7
igbt6 0:4e8ef5758455 8 #ifndef __REGISTERS_H__
igbt6 0:4e8ef5758455 9 #define __REGISTERS_H__
igbt6 0:4e8ef5758455 10
igbt6 0:4e8ef5758455 11 /*!
igbt6 0:4e8ef5758455 12 * ============================================================================
igbt6 0:4e8ef5758455 13 * SX1278 LoRa Internal registers Address
igbt6 0:4e8ef5758455 14 * ============================================================================
igbt6 0:4e8ef5758455 15 */
igbt6 0:4e8ef5758455 16 #define REG_LR_FIFO 0x00
igbt6 0:4e8ef5758455 17 // Common settings
igbt6 0:4e8ef5758455 18 #define REG_LR_OPMODE 0x01
igbt6 0:4e8ef5758455 19 #define REG_LR_FRFMSB 0x06
igbt6 0:4e8ef5758455 20 #define REG_LR_FRFMID 0x07
igbt6 0:4e8ef5758455 21 #define REG_LR_FRFLSB 0x08
igbt6 0:4e8ef5758455 22 // Tx settings
igbt6 0:4e8ef5758455 23 #define REG_LR_PACONFIG 0x09
igbt6 0:4e8ef5758455 24 #define REG_LR_PARAMP 0x0A
igbt6 0:4e8ef5758455 25 #define REG_LR_OCP 0x0B
igbt6 0:4e8ef5758455 26 // Rx settings
igbt6 0:4e8ef5758455 27 #define REG_LR_LNA 0x0C
igbt6 0:4e8ef5758455 28 // LoRa registers
igbt6 0:4e8ef5758455 29 #define REG_LR_FIFOADDRPTR 0x0D
igbt6 0:4e8ef5758455 30 #define REG_LR_FIFOTXBASEADDR 0x0E
igbt6 0:4e8ef5758455 31 #define REG_LR_FIFORXBASEADDR 0x0F
igbt6 0:4e8ef5758455 32 #define REG_LR_FIFORXCURRENTADDR 0x10
igbt6 0:4e8ef5758455 33 #define REG_LR_IRQFLAGSMASK 0x11
igbt6 0:4e8ef5758455 34 #define REG_LR_IRQFLAGS 0x12
igbt6 0:4e8ef5758455 35 #define REG_LR_RXNBBYTES 0x13
igbt6 0:4e8ef5758455 36 #define REG_LR_RXHEADERCNTVALUEMSB 0x14
igbt6 0:4e8ef5758455 37 #define REG_LR_RXHEADERCNTVALUELSB 0x15
igbt6 0:4e8ef5758455 38 #define REG_LR_RXPACKETCNTVALUEMSB 0x16
igbt6 0:4e8ef5758455 39 #define REG_LR_RXPACKETCNTVALUELSB 0x17
igbt6 0:4e8ef5758455 40 #define REG_LR_MODEMSTAT 0x18
igbt6 0:4e8ef5758455 41 #define REG_LR_PKTSNRVALUE 0x19
igbt6 0:4e8ef5758455 42 #define REG_LR_PKTRSSIVALUE 0x1A
igbt6 0:4e8ef5758455 43 #define REG_LR_RSSIVALUE 0x1B
igbt6 0:4e8ef5758455 44 #define REG_LR_HOPCHANNEL 0x1C
igbt6 0:4e8ef5758455 45 #define REG_LR_MODEMCONFIG1 0x1D
igbt6 0:4e8ef5758455 46 #define REG_LR_MODEMCONFIG2 0x1E
igbt6 0:4e8ef5758455 47 #define REG_LR_SYMBTIMEOUTLSB 0x1F
igbt6 0:4e8ef5758455 48 #define REG_LR_PREAMBLEMSB 0x20
igbt6 0:4e8ef5758455 49 #define REG_LR_PREAMBLELSB 0x21
igbt6 0:4e8ef5758455 50 #define REG_LR_PAYLOADLENGTH 0x22
igbt6 0:4e8ef5758455 51 #define REG_LR_PAYLOADMAXLENGTH 0x23
igbt6 0:4e8ef5758455 52 #define REG_LR_HOPPERIOD 0x24
igbt6 0:4e8ef5758455 53 #define REG_LR_FIFORXBYTEADDR 0x25
igbt6 0:4e8ef5758455 54 #define REG_LR_MODEMCONFIG3 0x26
igbt6 0:4e8ef5758455 55 #define REG_LR_FEIMSB 0x28
igbt6 0:4e8ef5758455 56 #define REG_LR_FEIMID 0x29
igbt6 0:4e8ef5758455 57 #define REG_LR_FEILSB 0x2A
igbt6 0:4e8ef5758455 58 #define REG_LR_RSSIWIDEBAND 0x2C
igbt6 0:4e8ef5758455 59 #define REG_LR_IFFREQ1 0x2F
igbt6 0:4e8ef5758455 60 #define REG_LR_IFFREQ2 0x30
igbt6 0:4e8ef5758455 61 #define REG_LR_DETECTOPTIMIZE 0x31
igbt6 0:4e8ef5758455 62 #define REG_LR_INVERTIQ 0x33
igbt6 0:4e8ef5758455 63 #define REG_LR_HIGHBWOPTIMIZE1 0x36
igbt6 0:4e8ef5758455 64 #define REG_LR_DETECTIONTHRESHOLD 0x37
igbt6 0:4e8ef5758455 65 #define REG_LR_SYNCWORD 0x39
igbt6 0:4e8ef5758455 66 #define REG_LR_HIGHBWOPTIMIZE2 0x3A
igbt6 0:4e8ef5758455 67 #define REG_LR_INVERTIQ2 0x3B
igbt6 0:4e8ef5758455 68
igbt6 0:4e8ef5758455 69 // end of documented register in datasheet
igbt6 0:4e8ef5758455 70 // I/O settings
igbt6 0:4e8ef5758455 71 #define REG_LR_DIOMAPPING1 0x40
igbt6 0:4e8ef5758455 72 #define REG_LR_DIOMAPPING2 0x41
igbt6 0:4e8ef5758455 73 // Version
igbt6 0:4e8ef5758455 74 #define REG_LR_VERSION 0x42
igbt6 0:4e8ef5758455 75 // Additional settings
igbt6 0:4e8ef5758455 76 #define REG_LR_PLLHOP 0x44
igbt6 0:4e8ef5758455 77 #define REG_LR_TCXO 0x4B
igbt6 0:4e8ef5758455 78 #define REG_LR_PADAC 0x4D
igbt6 0:4e8ef5758455 79 #define REG_LR_FORMERTEMP 0x5B
igbt6 0:4e8ef5758455 80 #define REG_LR_BITRATEFRAC 0x5D
igbt6 0:4e8ef5758455 81 #define REG_LR_AGCREF 0x61
igbt6 0:4e8ef5758455 82 #define REG_LR_AGCTHRESH1 0x62
igbt6 0:4e8ef5758455 83 #define REG_LR_AGCTHRESH2 0x63
igbt6 0:4e8ef5758455 84 #define REG_LR_AGCTHRESH3 0x64
igbt6 0:4e8ef5758455 85 #define REG_LR_PLL 0x70
igbt6 0:4e8ef5758455 86
igbt6 0:4e8ef5758455 87 /*!
igbt6 0:4e8ef5758455 88 * ============================================================================
igbt6 0:4e8ef5758455 89 * SX1276 LoRa bits control definition
igbt6 0:4e8ef5758455 90 * ============================================================================
igbt6 0:4e8ef5758455 91 */
igbt6 0:4e8ef5758455 92
igbt6 0:4e8ef5758455 93 /*!
igbt6 0:4e8ef5758455 94 * RegFifo
igbt6 0:4e8ef5758455 95 */
igbt6 0:4e8ef5758455 96
igbt6 0:4e8ef5758455 97 /*!
igbt6 0:4e8ef5758455 98 * RegOpMode
igbt6 0:4e8ef5758455 99 */
igbt6 0:4e8ef5758455 100 #define RFLR_OPMODE_LONGRANGEMODE_MASK 0x7F
igbt6 0:4e8ef5758455 101 #define RFLR_OPMODE_LONGRANGEMODE_OFF 0x00 // Default
igbt6 0:4e8ef5758455 102 #define RFLR_OPMODE_LONGRANGEMODE_ON 0x80
igbt6 0:4e8ef5758455 103
igbt6 0:4e8ef5758455 104 #define RFLR_OPMODE_ACCESSSHAREDREG_MASK 0xBF
igbt6 0:4e8ef5758455 105 #define RFLR_OPMODE_ACCESSSHAREDREG_ENABLE 0x40
igbt6 0:4e8ef5758455 106 #define RFLR_OPMODE_ACCESSSHAREDREG_DISABLE 0x00 // Default
igbt6 0:4e8ef5758455 107
igbt6 0:4e8ef5758455 108 #define RFLR_OPMODE_FREQMODE_ACCESS_MASK 0xF7
igbt6 0:4e8ef5758455 109 #define RFLR_OPMODE_FREQMODE_ACCESS_LF 0x08 // Default
igbt6 0:4e8ef5758455 110 #define RFLR_OPMODE_FREQMODE_ACCESS_HF 0x00
igbt6 0:4e8ef5758455 111
igbt6 0:4e8ef5758455 112 #define RFLR_OPMODE_MASK 0xF8
igbt6 0:4e8ef5758455 113 #define RFLR_OPMODE_SLEEP 0x00
igbt6 0:4e8ef5758455 114 #define RFLR_OPMODE_STANDBY 0x01 // Default
igbt6 0:4e8ef5758455 115 #define RFLR_OPMODE_SYNTHESIZER_TX 0x02
igbt6 0:4e8ef5758455 116 #define RFLR_OPMODE_TRANSMITTER 0x03
igbt6 0:4e8ef5758455 117 #define RFLR_OPMODE_SYNTHESIZER_RX 0x04
igbt6 0:4e8ef5758455 118 #define RFLR_OPMODE_RECEIVER 0x05
igbt6 0:4e8ef5758455 119 // LoRa specific modes
igbt6 0:4e8ef5758455 120 #define RFLR_OPMODE_RECEIVER_SINGLE 0x06
igbt6 0:4e8ef5758455 121 #define RFLR_OPMODE_CAD 0x07
igbt6 0:4e8ef5758455 122
igbt6 0:4e8ef5758455 123 /*!
igbt6 0:4e8ef5758455 124 * RegFrf (MHz)
igbt6 0:4e8ef5758455 125 */
igbt6 0:4e8ef5758455 126 #define RFLR_FRFMSB_434_MHZ 0x6C // Default
igbt6 0:4e8ef5758455 127 #define RFLR_FRFMID_434_MHZ 0x80 // Default
igbt6 0:4e8ef5758455 128 #define RFLR_FRFLSB_434_MHZ 0x00 // Default
igbt6 0:4e8ef5758455 129
igbt6 0:4e8ef5758455 130 /*!
igbt6 0:4e8ef5758455 131 * RegPaConfig
igbt6 0:4e8ef5758455 132 */
igbt6 0:4e8ef5758455 133 #define RFLR_PACONFIG_PASELECT_MASK 0x7F
igbt6 0:4e8ef5758455 134 #define RFLR_PACONFIG_PASELECT_PABOOST 0x80
igbt6 0:4e8ef5758455 135 #define RFLR_PACONFIG_PASELECT_RFO 0x00 // Default
igbt6 0:4e8ef5758455 136
igbt6 0:4e8ef5758455 137 #define RFLR_PACONFIG_MAX_POWER_MASK 0x8F
igbt6 0:4e8ef5758455 138
igbt6 0:4e8ef5758455 139 #define RFLR_PACONFIG_OUTPUTPOWER_MASK 0xF0
igbt6 0:4e8ef5758455 140
igbt6 0:4e8ef5758455 141 /*!
igbt6 0:4e8ef5758455 142 * RegPaRamp
igbt6 0:4e8ef5758455 143 */
igbt6 0:4e8ef5758455 144 #define RFLR_PARAMP_TXBANDFORCE_MASK 0xEF
igbt6 0:4e8ef5758455 145 #define RFLR_PARAMP_TXBANDFORCE_BAND_SEL 0x10
igbt6 0:4e8ef5758455 146 #define RFLR_PARAMP_TXBANDFORCE_AUTO 0x00 // Default
igbt6 0:4e8ef5758455 147
igbt6 0:4e8ef5758455 148 #define RFLR_PARAMP_MASK 0xF0
igbt6 0:4e8ef5758455 149 #define RFLR_PARAMP_3400_US 0x00
igbt6 0:4e8ef5758455 150 #define RFLR_PARAMP_2000_US 0x01
igbt6 0:4e8ef5758455 151 #define RFLR_PARAMP_1000_US 0x02
igbt6 0:4e8ef5758455 152 #define RFLR_PARAMP_0500_US 0x03
igbt6 0:4e8ef5758455 153 #define RFLR_PARAMP_0250_US 0x04
igbt6 0:4e8ef5758455 154 #define RFLR_PARAMP_0125_US 0x05
igbt6 0:4e8ef5758455 155 #define RFLR_PARAMP_0100_US 0x06
igbt6 0:4e8ef5758455 156 #define RFLR_PARAMP_0062_US 0x07
igbt6 0:4e8ef5758455 157 #define RFLR_PARAMP_0050_US 0x08
igbt6 0:4e8ef5758455 158 #define RFLR_PARAMP_0040_US 0x09 // Default
igbt6 0:4e8ef5758455 159 #define RFLR_PARAMP_0031_US 0x0A
igbt6 0:4e8ef5758455 160 #define RFLR_PARAMP_0025_US 0x0B
igbt6 0:4e8ef5758455 161 #define RFLR_PARAMP_0020_US 0x0C
igbt6 0:4e8ef5758455 162 #define RFLR_PARAMP_0015_US 0x0D
igbt6 0:4e8ef5758455 163 #define RFLR_PARAMP_0012_US 0x0E
igbt6 0:4e8ef5758455 164 #define RFLR_PARAMP_0010_US 0x0F
igbt6 0:4e8ef5758455 165
igbt6 0:4e8ef5758455 166 /*!
igbt6 0:4e8ef5758455 167 * RegOcp
igbt6 0:4e8ef5758455 168 */
igbt6 0:4e8ef5758455 169 #define RFLR_OCP_MASK 0xDF
igbt6 0:4e8ef5758455 170 #define RFLR_OCP_ON 0x20 // Default
igbt6 0:4e8ef5758455 171 #define RFLR_OCP_OFF 0x00
igbt6 0:4e8ef5758455 172
igbt6 0:4e8ef5758455 173 #define RFLR_OCP_TRIM_MASK 0xE0
igbt6 0:4e8ef5758455 174 #define RFLR_OCP_TRIM_045_MA 0x00
igbt6 0:4e8ef5758455 175 #define RFLR_OCP_TRIM_050_MA 0x01
igbt6 0:4e8ef5758455 176 #define RFLR_OCP_TRIM_055_MA 0x02
igbt6 0:4e8ef5758455 177 #define RFLR_OCP_TRIM_060_MA 0x03
igbt6 0:4e8ef5758455 178 #define RFLR_OCP_TRIM_065_MA 0x04
igbt6 0:4e8ef5758455 179 #define RFLR_OCP_TRIM_070_MA 0x05
igbt6 0:4e8ef5758455 180 #define RFLR_OCP_TRIM_075_MA 0x06
igbt6 0:4e8ef5758455 181 #define RFLR_OCP_TRIM_080_MA 0x07
igbt6 0:4e8ef5758455 182 #define RFLR_OCP_TRIM_085_MA 0x08
igbt6 0:4e8ef5758455 183 #define RFLR_OCP_TRIM_090_MA 0x09
igbt6 0:4e8ef5758455 184 #define RFLR_OCP_TRIM_095_MA 0x0A
igbt6 0:4e8ef5758455 185 #define RFLR_OCP_TRIM_100_MA 0x0B // Default
igbt6 0:4e8ef5758455 186 #define RFLR_OCP_TRIM_105_MA 0x0C
igbt6 0:4e8ef5758455 187 #define RFLR_OCP_TRIM_110_MA 0x0D
igbt6 0:4e8ef5758455 188 #define RFLR_OCP_TRIM_115_MA 0x0E
igbt6 0:4e8ef5758455 189 #define RFLR_OCP_TRIM_120_MA 0x0F
igbt6 0:4e8ef5758455 190 #define RFLR_OCP_TRIM_130_MA 0x10
igbt6 0:4e8ef5758455 191 #define RFLR_OCP_TRIM_140_MA 0x11
igbt6 0:4e8ef5758455 192 #define RFLR_OCP_TRIM_150_MA 0x12
igbt6 0:4e8ef5758455 193 #define RFLR_OCP_TRIM_160_MA 0x13
igbt6 0:4e8ef5758455 194 #define RFLR_OCP_TRIM_170_MA 0x14
igbt6 0:4e8ef5758455 195 #define RFLR_OCP_TRIM_180_MA 0x15
igbt6 0:4e8ef5758455 196 #define RFLR_OCP_TRIM_190_MA 0x16
igbt6 0:4e8ef5758455 197 #define RFLR_OCP_TRIM_200_MA 0x17
igbt6 0:4e8ef5758455 198 #define RFLR_OCP_TRIM_210_MA 0x18
igbt6 0:4e8ef5758455 199 #define RFLR_OCP_TRIM_220_MA 0x19
igbt6 0:4e8ef5758455 200 #define RFLR_OCP_TRIM_230_MA 0x1A
igbt6 0:4e8ef5758455 201 #define RFLR_OCP_TRIM_240_MA 0x1B
igbt6 0:4e8ef5758455 202
igbt6 0:4e8ef5758455 203 /*!
igbt6 0:4e8ef5758455 204 * RegLna
igbt6 0:4e8ef5758455 205 */
igbt6 0:4e8ef5758455 206 #define RFLR_LNA_GAIN_MASK 0x1F
igbt6 0:4e8ef5758455 207 #define RFLR_LNA_GAIN_G1 0x20 // Default
igbt6 0:4e8ef5758455 208 #define RFLR_LNA_GAIN_G2 0x40
igbt6 0:4e8ef5758455 209 #define RFLR_LNA_GAIN_G3 0x60
igbt6 0:4e8ef5758455 210 #define RFLR_LNA_GAIN_G4 0x80
igbt6 0:4e8ef5758455 211 #define RFLR_LNA_GAIN_G5 0xA0
igbt6 0:4e8ef5758455 212 #define RFLR_LNA_GAIN_G6 0xC0
igbt6 0:4e8ef5758455 213
igbt6 0:4e8ef5758455 214 #define RFLR_LNA_BOOST_LF_MASK 0xE7
igbt6 0:4e8ef5758455 215 #define RFLR_LNA_BOOST_LF_DEFAULT 0x00 // Default
igbt6 0:4e8ef5758455 216
igbt6 0:4e8ef5758455 217 #define RFLR_LNA_BOOST_HF_MASK 0xFC
igbt6 0:4e8ef5758455 218 #define RFLR_LNA_BOOST_HF_OFF 0x00 // Default
igbt6 0:4e8ef5758455 219 #define RFLR_LNA_BOOST_HF_ON 0x03
igbt6 0:4e8ef5758455 220
igbt6 0:4e8ef5758455 221 /*!
igbt6 0:4e8ef5758455 222 * RegFifoAddrPtr
igbt6 0:4e8ef5758455 223 */
igbt6 0:4e8ef5758455 224 #define RFLR_FIFOADDRPTR 0x00 // Default
igbt6 0:4e8ef5758455 225
igbt6 0:4e8ef5758455 226 /*!
igbt6 0:4e8ef5758455 227 * RegFifoTxBaseAddr
igbt6 0:4e8ef5758455 228 */
igbt6 0:4e8ef5758455 229 #define RFLR_FIFOTXBASEADDR 0x80 // Default
igbt6 0:4e8ef5758455 230
igbt6 0:4e8ef5758455 231 /*!
igbt6 0:4e8ef5758455 232 * RegFifoTxBaseAddr
igbt6 0:4e8ef5758455 233 */
igbt6 0:4e8ef5758455 234 #define RFLR_FIFORXBASEADDR 0x00 // Default
igbt6 0:4e8ef5758455 235
igbt6 0:4e8ef5758455 236 /*!
igbt6 0:4e8ef5758455 237 * RegFifoRxCurrentAddr (Read Only)
igbt6 0:4e8ef5758455 238 */
igbt6 0:4e8ef5758455 239
igbt6 0:4e8ef5758455 240 /*!
igbt6 0:4e8ef5758455 241 * RegIrqFlagsMask
igbt6 0:4e8ef5758455 242 */
igbt6 0:4e8ef5758455 243 #define RFLR_IRQFLAGS_RXTIMEOUT_MASK 0x80
igbt6 0:4e8ef5758455 244 #define RFLR_IRQFLAGS_RXDONE_MASK 0x40
igbt6 0:4e8ef5758455 245 #define RFLR_IRQFLAGS_PAYLOADCRCERROR_MASK 0x20
igbt6 0:4e8ef5758455 246 #define RFLR_IRQFLAGS_VALIDHEADER_MASK 0x10
igbt6 0:4e8ef5758455 247 #define RFLR_IRQFLAGS_TXDONE_MASK 0x08
igbt6 0:4e8ef5758455 248 #define RFLR_IRQFLAGS_CADDONE_MASK 0x04
igbt6 0:4e8ef5758455 249 #define RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL_MASK 0x02
igbt6 0:4e8ef5758455 250 #define RFLR_IRQFLAGS_CADDETECTED_MASK 0x01
igbt6 0:4e8ef5758455 251
igbt6 0:4e8ef5758455 252 /*!
igbt6 0:4e8ef5758455 253 * RegIrqFlags
igbt6 0:4e8ef5758455 254 */
igbt6 0:4e8ef5758455 255 #define RFLR_IRQFLAGS_RXTIMEOUT 0x80
igbt6 0:4e8ef5758455 256 #define RFLR_IRQFLAGS_RXDONE 0x40
igbt6 0:4e8ef5758455 257 #define RFLR_IRQFLAGS_PAYLOADCRCERROR 0x20
igbt6 0:4e8ef5758455 258 #define RFLR_IRQFLAGS_VALIDHEADER 0x10
igbt6 0:4e8ef5758455 259 #define RFLR_IRQFLAGS_TXDONE 0x08
igbt6 0:4e8ef5758455 260 #define RFLR_IRQFLAGS_CADDONE 0x04
igbt6 0:4e8ef5758455 261 #define RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL 0x02
igbt6 0:4e8ef5758455 262 #define RFLR_IRQFLAGS_CADDETECTED 0x01
igbt6 0:4e8ef5758455 263
igbt6 0:4e8ef5758455 264 /*!
igbt6 0:4e8ef5758455 265 * RegFifoRxNbBytes (Read Only)
igbt6 0:4e8ef5758455 266 */
igbt6 0:4e8ef5758455 267
igbt6 0:4e8ef5758455 268 /*!
igbt6 0:4e8ef5758455 269 * RegRxHeaderCntValueMsb (Read Only)
igbt6 0:4e8ef5758455 270 */
igbt6 0:4e8ef5758455 271
igbt6 0:4e8ef5758455 272 /*!
igbt6 0:4e8ef5758455 273 * RegRxHeaderCntValueLsb (Read Only)
igbt6 0:4e8ef5758455 274 */
igbt6 0:4e8ef5758455 275
igbt6 0:4e8ef5758455 276 /*!
igbt6 0:4e8ef5758455 277 * RegRxPacketCntValueMsb (Read Only)
igbt6 0:4e8ef5758455 278 */
igbt6 0:4e8ef5758455 279
igbt6 0:4e8ef5758455 280 /*!
igbt6 0:4e8ef5758455 281 * RegRxPacketCntValueLsb (Read Only)
igbt6 0:4e8ef5758455 282 */
igbt6 0:4e8ef5758455 283
igbt6 0:4e8ef5758455 284 /*!
igbt6 0:4e8ef5758455 285 * RegModemStat (Read Only)
igbt6 0:4e8ef5758455 286 */
igbt6 0:4e8ef5758455 287 #define RFLR_MODEMSTAT_RX_CR_MASK 0x1F
igbt6 0:4e8ef5758455 288 #define RFLR_MODEMSTAT_MODEM_STATUS_MASK 0xE0
igbt6 0:4e8ef5758455 289
igbt6 0:4e8ef5758455 290 /*!
igbt6 0:4e8ef5758455 291 * RegPktSnrValue (Read Only)
igbt6 0:4e8ef5758455 292 */
igbt6 0:4e8ef5758455 293
igbt6 0:4e8ef5758455 294 /*!
igbt6 0:4e8ef5758455 295 * RegPktRssiValue (Read Only)
igbt6 0:4e8ef5758455 296 */
igbt6 0:4e8ef5758455 297
igbt6 0:4e8ef5758455 298 /*!
igbt6 0:4e8ef5758455 299 * RegRssiValue (Read Only)
igbt6 0:4e8ef5758455 300 */
igbt6 0:4e8ef5758455 301
igbt6 0:4e8ef5758455 302 /*!
igbt6 0:4e8ef5758455 303 * RegHopChannel (Read Only)
igbt6 0:4e8ef5758455 304 */
igbt6 0:4e8ef5758455 305 #define RFLR_HOPCHANNEL_PLL_LOCK_TIMEOUT_MASK 0x7F
igbt6 0:4e8ef5758455 306 #define RFLR_HOPCHANNEL_PLL_LOCK_FAIL 0x80
igbt6 0:4e8ef5758455 307 #define RFLR_HOPCHANNEL_PLL_LOCK_SUCCEED 0x00 // Default
igbt6 0:4e8ef5758455 308
igbt6 0:4e8ef5758455 309 #define RFLR_HOPCHANNEL_CRCONPAYLOAD_MASK 0xBF
igbt6 0:4e8ef5758455 310 #define RFLR_HOPCHANNEL_CRCONPAYLOAD_ON 0x40
igbt6 0:4e8ef5758455 311 #define RFLR_HOPCHANNEL_CRCONPAYLOAD_OFF 0x00 // Default
igbt6 0:4e8ef5758455 312
igbt6 0:4e8ef5758455 313 #define RFLR_HOPCHANNEL_CHANNEL_MASK 0x3F
igbt6 0:4e8ef5758455 314
igbt6 0:4e8ef5758455 315 /*!
igbt6 0:4e8ef5758455 316 * RegModemConfig1
igbt6 0:4e8ef5758455 317 */
igbt6 0:4e8ef5758455 318 #define RFLR_MODEMCONFIG1_BW_MASK 0x0F
igbt6 0:4e8ef5758455 319 #define RFLR_MODEMCONFIG1_BW_7_81_KHZ 0x00
igbt6 0:4e8ef5758455 320 #define RFLR_MODEMCONFIG1_BW_10_41_KHZ 0x10
igbt6 0:4e8ef5758455 321 #define RFLR_MODEMCONFIG1_BW_15_62_KHZ 0x20
igbt6 0:4e8ef5758455 322 #define RFLR_MODEMCONFIG1_BW_20_83_KHZ 0x30
igbt6 0:4e8ef5758455 323 #define RFLR_MODEMCONFIG1_BW_31_25_KHZ 0x40
igbt6 0:4e8ef5758455 324 #define RFLR_MODEMCONFIG1_BW_41_66_KHZ 0x50
igbt6 0:4e8ef5758455 325 #define RFLR_MODEMCONFIG1_BW_62_50_KHZ 0x60
igbt6 0:4e8ef5758455 326 #define RFLR_MODEMCONFIG1_BW_125_KHZ 0x70 // Default
igbt6 0:4e8ef5758455 327 #define RFLR_MODEMCONFIG1_BW_250_KHZ 0x80
igbt6 0:4e8ef5758455 328 #define RFLR_MODEMCONFIG1_BW_500_KHZ 0x90
igbt6 0:4e8ef5758455 329
igbt6 0:4e8ef5758455 330 #define RFLR_MODEMCONFIG1_CODINGRATE_MASK 0xF1
igbt6 0:4e8ef5758455 331 #define RFLR_MODEMCONFIG1_CODINGRATE_4_5 0x02
igbt6 0:4e8ef5758455 332 #define RFLR_MODEMCONFIG1_CODINGRATE_4_6 0x04 // Default
igbt6 0:4e8ef5758455 333 #define RFLR_MODEMCONFIG1_CODINGRATE_4_7 0x06
igbt6 0:4e8ef5758455 334 #define RFLR_MODEMCONFIG1_CODINGRATE_4_8 0x08
igbt6 0:4e8ef5758455 335
igbt6 0:4e8ef5758455 336 #define RFLR_MODEMCONFIG1_IMPLICITHEADER_MASK 0xFE
igbt6 0:4e8ef5758455 337 #define RFLR_MODEMCONFIG1_IMPLICITHEADER_ON 0x01
igbt6 0:4e8ef5758455 338 #define RFLR_MODEMCONFIG1_IMPLICITHEADER_OFF 0x00 // Default
igbt6 0:4e8ef5758455 339
igbt6 0:4e8ef5758455 340 /*!
igbt6 0:4e8ef5758455 341 * RegModemConfig2
igbt6 0:4e8ef5758455 342 */
igbt6 0:4e8ef5758455 343 #define RFLR_MODEMCONFIG2_SF_MASK 0x0F
igbt6 0:4e8ef5758455 344 #define RFLR_MODEMCONFIG2_SF_6 0x60
igbt6 0:4e8ef5758455 345 #define RFLR_MODEMCONFIG2_SF_7 0x70 // Default
igbt6 0:4e8ef5758455 346 #define RFLR_MODEMCONFIG2_SF_8 0x80
igbt6 0:4e8ef5758455 347 #define RFLR_MODEMCONFIG2_SF_9 0x90
igbt6 0:4e8ef5758455 348 #define RFLR_MODEMCONFIG2_SF_10 0xA0
igbt6 0:4e8ef5758455 349 #define RFLR_MODEMCONFIG2_SF_11 0xB0
igbt6 0:4e8ef5758455 350 #define RFLR_MODEMCONFIG2_SF_12 0xC0
igbt6 0:4e8ef5758455 351
igbt6 0:4e8ef5758455 352 #define RFLR_MODEMCONFIG2_TXCONTINUOUSMODE_MASK 0xF7
igbt6 0:4e8ef5758455 353 #define RFLR_MODEMCONFIG2_TXCONTINUOUSMODE_ON 0x08
igbt6 0:4e8ef5758455 354 #define RFLR_MODEMCONFIG2_TXCONTINUOUSMODE_OFF 0x00
igbt6 0:4e8ef5758455 355
igbt6 0:4e8ef5758455 356 #define RFLR_MODEMCONFIG2_RXPAYLOADCRC_MASK 0xFB
igbt6 0:4e8ef5758455 357 #define RFLR_MODEMCONFIG2_RXPAYLOADCRC_ON 0x04
igbt6 0:4e8ef5758455 358 #define RFLR_MODEMCONFIG2_RXPAYLOADCRC_OFF 0x00 // Default
igbt6 0:4e8ef5758455 359
igbt6 0:4e8ef5758455 360 #define RFLR_MODEMCONFIG2_SYMBTIMEOUTMSB_MASK 0xFC
igbt6 0:4e8ef5758455 361 #define RFLR_MODEMCONFIG2_SYMBTIMEOUTMSB 0x00 // Default
igbt6 0:4e8ef5758455 362
igbt6 0:4e8ef5758455 363 /*!
igbt6 0:4e8ef5758455 364 * RegSymbTimeoutLsb
igbt6 0:4e8ef5758455 365 */
igbt6 0:4e8ef5758455 366 #define RFLR_SYMBTIMEOUTLSB_SYMBTIMEOUT 0x64 // Default
igbt6 0:4e8ef5758455 367
igbt6 0:4e8ef5758455 368 /*!
igbt6 0:4e8ef5758455 369 * RegPreambleLengthMsb
igbt6 0:4e8ef5758455 370 */
igbt6 0:4e8ef5758455 371 #define RFLR_PREAMBLELENGTHMSB 0x00 // Default
igbt6 0:4e8ef5758455 372
igbt6 0:4e8ef5758455 373 /*!
igbt6 0:4e8ef5758455 374 * RegPreambleLengthLsb
igbt6 0:4e8ef5758455 375 */
igbt6 0:4e8ef5758455 376 #define RFLR_PREAMBLELENGTHLSB 0x08 // Default
igbt6 0:4e8ef5758455 377
igbt6 0:4e8ef5758455 378 /*!
igbt6 0:4e8ef5758455 379 * RegPayloadLength
igbt6 0:4e8ef5758455 380 */
igbt6 0:4e8ef5758455 381 #define RFLR_PAYLOADLENGTH 0x0E // Default
igbt6 0:4e8ef5758455 382
igbt6 0:4e8ef5758455 383 /*!
igbt6 0:4e8ef5758455 384 * RegPayloadMaxLength
igbt6 0:4e8ef5758455 385 */
igbt6 0:4e8ef5758455 386 #define RFLR_PAYLOADMAXLENGTH 0xFF // Default
igbt6 0:4e8ef5758455 387
igbt6 0:4e8ef5758455 388 /*!
igbt6 0:4e8ef5758455 389 * RegHopPeriod
igbt6 0:4e8ef5758455 390 */
igbt6 0:4e8ef5758455 391 #define RFLR_HOPPERIOD_FREQFOPPINGPERIOD 0x00 // Default
igbt6 0:4e8ef5758455 392
igbt6 0:4e8ef5758455 393 /*!
igbt6 0:4e8ef5758455 394 * RegFifoRxByteAddr (Read Only)
igbt6 0:4e8ef5758455 395 */
igbt6 0:4e8ef5758455 396
igbt6 0:4e8ef5758455 397 /*!
igbt6 0:4e8ef5758455 398 * RegModemConfig3
igbt6 0:4e8ef5758455 399 */
igbt6 0:4e8ef5758455 400 #define RFLR_MODEMCONFIG3_LOWDATARATEOPTIMIZE_MASK 0xF7
igbt6 0:4e8ef5758455 401 #define RFLR_MODEMCONFIG3_LOWDATARATEOPTIMIZE_ON 0x08
igbt6 0:4e8ef5758455 402 #define RFLR_MODEMCONFIG3_LOWDATARATEOPTIMIZE_OFF 0x00 // Default
igbt6 0:4e8ef5758455 403
igbt6 0:4e8ef5758455 404 #define RFLR_MODEMCONFIG3_AGCAUTO_MASK 0xFB
igbt6 0:4e8ef5758455 405 #define RFLR_MODEMCONFIG3_AGCAUTO_ON 0x04 // Default
igbt6 0:4e8ef5758455 406 #define RFLR_MODEMCONFIG3_AGCAUTO_OFF 0x00
igbt6 0:4e8ef5758455 407
igbt6 0:4e8ef5758455 408 /*!
igbt6 0:4e8ef5758455 409 * RegFeiMsb (Read Only)
igbt6 0:4e8ef5758455 410 */
igbt6 0:4e8ef5758455 411
igbt6 0:4e8ef5758455 412 /*!
igbt6 0:4e8ef5758455 413 * RegFeiMid (Read Only)
igbt6 0:4e8ef5758455 414 */
igbt6 0:4e8ef5758455 415
igbt6 0:4e8ef5758455 416 /*!
igbt6 0:4e8ef5758455 417 * RegFeiLsb (Read Only)
igbt6 0:4e8ef5758455 418 */
igbt6 0:4e8ef5758455 419
igbt6 0:4e8ef5758455 420 /*!
igbt6 0:4e8ef5758455 421 * RegRssiWideband (Read Only)
igbt6 0:4e8ef5758455 422 */
igbt6 0:4e8ef5758455 423
igbt6 0:4e8ef5758455 424 /*!
igbt6 0:4e8ef5758455 425 * RegDetectOptimize
igbt6 0:4e8ef5758455 426 */
igbt6 0:4e8ef5758455 427 #define RFLR_DETECTIONOPTIMIZE_MASK 0xF8
igbt6 0:4e8ef5758455 428 #define RFLR_DETECTIONOPTIMIZE_SF7_TO_SF12 0x03 // Default
igbt6 0:4e8ef5758455 429 #define RFLR_DETECTIONOPTIMIZE_SF6 0x05
igbt6 0:4e8ef5758455 430
igbt6 0:4e8ef5758455 431 /*!
igbt6 0:4e8ef5758455 432 * RegInvertIQ
igbt6 0:4e8ef5758455 433 */
igbt6 0:4e8ef5758455 434 #define RFLR_INVERTIQ_RX_MASK 0xBF
igbt6 0:4e8ef5758455 435 #define RFLR_INVERTIQ_RX_OFF 0x00
igbt6 0:4e8ef5758455 436 #define RFLR_INVERTIQ_RX_ON 0x40
igbt6 0:4e8ef5758455 437 #define RFLR_INVERTIQ_TX_MASK 0xFE
igbt6 0:4e8ef5758455 438 #define RFLR_INVERTIQ_TX_OFF 0x01
igbt6 0:4e8ef5758455 439 #define RFLR_INVERTIQ_TX_ON 0x00
igbt6 0:4e8ef5758455 440
igbt6 0:4e8ef5758455 441 /*!
igbt6 0:4e8ef5758455 442 * RegDetectionThreshold
igbt6 0:4e8ef5758455 443 */
igbt6 0:4e8ef5758455 444 #define RFLR_DETECTIONTHRESH_SF7_TO_SF12 0x0A // Default
igbt6 0:4e8ef5758455 445 #define RFLR_DETECTIONTHRESH_SF6 0x0C
igbt6 0:4e8ef5758455 446
igbt6 0:4e8ef5758455 447 /*!
igbt6 0:4e8ef5758455 448 * RegInvertIQ2
igbt6 0:4e8ef5758455 449 */
igbt6 0:4e8ef5758455 450 #define RFLR_INVERTIQ2_ON 0x19
igbt6 0:4e8ef5758455 451 #define RFLR_INVERTIQ2_OFF 0x1D
igbt6 0:4e8ef5758455 452
igbt6 0:4e8ef5758455 453 /*!
igbt6 0:4e8ef5758455 454 * RegDioMapping1
igbt6 0:4e8ef5758455 455 */
igbt6 0:4e8ef5758455 456 #define RFLR_DIOMAPPING1_DIO0_MASK 0x3F
igbt6 0:4e8ef5758455 457 #define RFLR_DIOMAPPING1_DIO0_00 0x00 // Default
igbt6 0:4e8ef5758455 458 #define RFLR_DIOMAPPING1_DIO0_01 0x40
igbt6 0:4e8ef5758455 459 #define RFLR_DIOMAPPING1_DIO0_10 0x80
igbt6 0:4e8ef5758455 460 #define RFLR_DIOMAPPING1_DIO0_11 0xC0
igbt6 0:4e8ef5758455 461
igbt6 0:4e8ef5758455 462 #define RFLR_DIOMAPPING1_DIO1_MASK 0xCF
igbt6 0:4e8ef5758455 463 #define RFLR_DIOMAPPING1_DIO1_00 0x00 // Default
igbt6 0:4e8ef5758455 464 #define RFLR_DIOMAPPING1_DIO1_01 0x10
igbt6 0:4e8ef5758455 465 #define RFLR_DIOMAPPING1_DIO1_10 0x20
igbt6 0:4e8ef5758455 466 #define RFLR_DIOMAPPING1_DIO1_11 0x30
igbt6 0:4e8ef5758455 467
igbt6 0:4e8ef5758455 468 #define RFLR_DIOMAPPING1_DIO2_MASK 0xF3
igbt6 0:4e8ef5758455 469 #define RFLR_DIOMAPPING1_DIO2_00 0x00 // Default
igbt6 0:4e8ef5758455 470 #define RFLR_DIOMAPPING1_DIO2_01 0x04
igbt6 0:4e8ef5758455 471 #define RFLR_DIOMAPPING1_DIO2_10 0x08
igbt6 0:4e8ef5758455 472 #define RFLR_DIOMAPPING1_DIO2_11 0x0C
igbt6 0:4e8ef5758455 473
igbt6 0:4e8ef5758455 474 #define RFLR_DIOMAPPING1_DIO3_MASK 0xFC
igbt6 0:4e8ef5758455 475 #define RFLR_DIOMAPPING1_DIO3_00 0x00 // Default
igbt6 0:4e8ef5758455 476 #define RFLR_DIOMAPPING1_DIO3_01 0x01
igbt6 0:4e8ef5758455 477 #define RFLR_DIOMAPPING1_DIO3_10 0x02
igbt6 0:4e8ef5758455 478 #define RFLR_DIOMAPPING1_DIO3_11 0x03
igbt6 0:4e8ef5758455 479
igbt6 0:4e8ef5758455 480 /*!
igbt6 0:4e8ef5758455 481 * RegDioMapping2
igbt6 0:4e8ef5758455 482 */
igbt6 0:4e8ef5758455 483 #define RFLR_DIOMAPPING2_DIO4_MASK 0x3F
igbt6 0:4e8ef5758455 484 #define RFLR_DIOMAPPING2_DIO4_00 0x00 // Default
igbt6 0:4e8ef5758455 485 #define RFLR_DIOMAPPING2_DIO4_01 0x40
igbt6 0:4e8ef5758455 486 #define RFLR_DIOMAPPING2_DIO4_10 0x80
igbt6 0:4e8ef5758455 487 #define RFLR_DIOMAPPING2_DIO4_11 0xC0
igbt6 0:4e8ef5758455 488
igbt6 0:4e8ef5758455 489 #define RFLR_DIOMAPPING2_DIO5_MASK 0xCF
igbt6 0:4e8ef5758455 490 #define RFLR_DIOMAPPING2_DIO5_00 0x00 // Default
igbt6 0:4e8ef5758455 491 #define RFLR_DIOMAPPING2_DIO5_01 0x10
igbt6 0:4e8ef5758455 492 #define RFLR_DIOMAPPING2_DIO5_10 0x20
igbt6 0:4e8ef5758455 493 #define RFLR_DIOMAPPING2_DIO5_11 0x30
igbt6 0:4e8ef5758455 494
igbt6 0:4e8ef5758455 495 #define RFLR_DIOMAPPING2_MAP_MASK 0xFE
igbt6 0:4e8ef5758455 496 #define RFLR_DIOMAPPING2_MAP_PREAMBLEDETECT 0x01
igbt6 0:4e8ef5758455 497 #define RFLR_DIOMAPPING2_MAP_RSSI 0x00 // Default
igbt6 0:4e8ef5758455 498
igbt6 0:4e8ef5758455 499 /*!
igbt6 0:4e8ef5758455 500 * RegVersion (Read Only)
igbt6 0:4e8ef5758455 501 */
igbt6 0:4e8ef5758455 502
igbt6 0:4e8ef5758455 503 /*!
igbt6 0:4e8ef5758455 504 * RegPllHop
igbt6 0:4e8ef5758455 505 */
igbt6 0:4e8ef5758455 506 #define RFLR_PLLHOP_FASTHOP_MASK 0x7F
igbt6 0:4e8ef5758455 507 #define RFLR_PLLHOP_FASTHOP_ON 0x80
igbt6 0:4e8ef5758455 508 #define RFLR_PLLHOP_FASTHOP_OFF 0x00 // Default
igbt6 0:4e8ef5758455 509
igbt6 0:4e8ef5758455 510 /*!
igbt6 0:4e8ef5758455 511 * RegTcxo
igbt6 0:4e8ef5758455 512 */
igbt6 0:4e8ef5758455 513 #define RFLR_TCXO_TCXOINPUT_MASK 0xEF
igbt6 0:4e8ef5758455 514 #define RFLR_TCXO_TCXOINPUT_ON 0x10
igbt6 0:4e8ef5758455 515 #define RFLR_TCXO_TCXOINPUT_OFF 0x00 // Default
igbt6 0:4e8ef5758455 516
igbt6 0:4e8ef5758455 517 /*!
igbt6 0:4e8ef5758455 518 * RegPaDac
igbt6 0:4e8ef5758455 519 */
igbt6 0:4e8ef5758455 520 #define RFLR_PADAC_20DBM_MASK 0xF8
igbt6 0:4e8ef5758455 521 #define RFLR_PADAC_20DBM_ON 0x07
igbt6 0:4e8ef5758455 522 #define RFLR_PADAC_20DBM_OFF 0x04 // Default
igbt6 0:4e8ef5758455 523
igbt6 0:4e8ef5758455 524 /*!
igbt6 0:4e8ef5758455 525 * RegFormerTemp
igbt6 0:4e8ef5758455 526 */
igbt6 0:4e8ef5758455 527
igbt6 0:4e8ef5758455 528 /*!
igbt6 0:4e8ef5758455 529 * RegBitrateFrac
igbt6 0:4e8ef5758455 530 */
igbt6 0:4e8ef5758455 531 #define RF_BITRATEFRAC_MASK 0xF0
igbt6 0:4e8ef5758455 532
igbt6 0:4e8ef5758455 533 /*!
igbt6 0:4e8ef5758455 534 * RegAgcRef
igbt6 0:4e8ef5758455 535 */
igbt6 0:4e8ef5758455 536
igbt6 0:4e8ef5758455 537 /*!
igbt6 0:4e8ef5758455 538 * RegAgcThresh1
igbt6 0:4e8ef5758455 539 */
igbt6 0:4e8ef5758455 540
igbt6 0:4e8ef5758455 541 /*!
igbt6 0:4e8ef5758455 542 * RegAgcThresh2
igbt6 0:4e8ef5758455 543 */
igbt6 0:4e8ef5758455 544
igbt6 0:4e8ef5758455 545 /*!
igbt6 0:4e8ef5758455 546 * RegAgcThresh3
igbt6 0:4e8ef5758455 547 */
igbt6 0:4e8ef5758455 548
igbt6 0:4e8ef5758455 549 /*!
igbt6 0:4e8ef5758455 550 * RegPll
igbt6 0:4e8ef5758455 551 */
igbt6 0:4e8ef5758455 552 #define RF_PLL_BANDWIDTH_MASK 0x3F
igbt6 0:4e8ef5758455 553 #define RF_PLL_BANDWIDTH_75 0x00
igbt6 0:4e8ef5758455 554 #define RF_PLL_BANDWIDTH_150 0x40
igbt6 0:4e8ef5758455 555 #define RF_PLL_BANDWIDTH_225 0x80
igbt6 0:4e8ef5758455 556 #define RF_PLL_BANDWIDTH_300 0xC0 // Default
igbt6 0:4e8ef5758455 557
igbt6 0:4e8ef5758455 558
igbt6 0:4e8ef5758455 559
igbt6 0:4e8ef5758455 560 /*!
igbt6 0:4e8ef5758455 561 * ============================================================================
igbt6 0:4e8ef5758455 562 * SX1278 FSK Internal registers Address
igbt6 0:4e8ef5758455 563 * ============================================================================
igbt6 0:4e8ef5758455 564 */
igbt6 0:4e8ef5758455 565 #define REG_FIFO 0x00
igbt6 0:4e8ef5758455 566 // Common settings
igbt6 0:4e8ef5758455 567 #define REG_OPMODE 0x01
igbt6 0:4e8ef5758455 568 #define REG_BITRATEMSB 0x02
igbt6 0:4e8ef5758455 569 #define REG_BITRATELSB 0x03
igbt6 0:4e8ef5758455 570 #define REG_FDEVMSB 0x04
igbt6 0:4e8ef5758455 571 #define REG_FDEVLSB 0x05
igbt6 0:4e8ef5758455 572 #define REG_FRFMSB 0x06
igbt6 0:4e8ef5758455 573 #define REG_FRFMID 0x07
igbt6 0:4e8ef5758455 574 #define REG_FRFLSB 0x08
igbt6 0:4e8ef5758455 575 // Tx settings
igbt6 0:4e8ef5758455 576 #define REG_PACONFIG 0x09
igbt6 0:4e8ef5758455 577 #define REG_PARAMP 0x0A
igbt6 0:4e8ef5758455 578 #define REG_OCP 0x0B
igbt6 0:4e8ef5758455 579 // Rx settings
igbt6 0:4e8ef5758455 580 #define REG_LNA 0x0C
igbt6 0:4e8ef5758455 581 #define REG_RXCONFIG 0x0D
igbt6 0:4e8ef5758455 582 #define REG_RSSICONFIG 0x0E
igbt6 0:4e8ef5758455 583 #define REG_RSSICOLLISION 0x0F
igbt6 0:4e8ef5758455 584 #define REG_RSSITHRESH 0x10
igbt6 0:4e8ef5758455 585 #define REG_RSSIVALUE 0x11
igbt6 0:4e8ef5758455 586 #define REG_RXBW 0x12
igbt6 0:4e8ef5758455 587 #define REG_AFCBW 0x13
igbt6 0:4e8ef5758455 588 #define REG_OOKPEAK 0x14
igbt6 0:4e8ef5758455 589 #define REG_OOKFIX 0x15
igbt6 0:4e8ef5758455 590 #define REG_OOKAVG 0x16
igbt6 0:4e8ef5758455 591 #define REG_RES17 0x17
igbt6 0:4e8ef5758455 592 #define REG_RES18 0x18
igbt6 0:4e8ef5758455 593 #define REG_RES19 0x19
igbt6 0:4e8ef5758455 594 #define REG_AFCFEI 0x1A
igbt6 0:4e8ef5758455 595 #define REG_AFCMSB 0x1B
igbt6 0:4e8ef5758455 596 #define REG_AFCLSB 0x1C
igbt6 0:4e8ef5758455 597 #define REG_FEIMSB 0x1D
igbt6 0:4e8ef5758455 598 #define REG_FEILSB 0x1E
igbt6 0:4e8ef5758455 599 #define REG_PREAMBLEDETECT 0x1F
igbt6 0:4e8ef5758455 600 #define REG_RXTIMEOUT1 0x20
igbt6 0:4e8ef5758455 601 #define REG_RXTIMEOUT2 0x21
igbt6 0:4e8ef5758455 602 #define REG_RXTIMEOUT3 0x22
igbt6 0:4e8ef5758455 603 #define REG_RXDELAY 0x23
igbt6 0:4e8ef5758455 604 // Oscillator settings
igbt6 0:4e8ef5758455 605 #define REG_OSC 0x24
igbt6 0:4e8ef5758455 606 // Packet handler settings
igbt6 0:4e8ef5758455 607 #define REG_PREAMBLEMSB 0x25
igbt6 0:4e8ef5758455 608 #define REG_PREAMBLELSB 0x26
igbt6 0:4e8ef5758455 609 #define REG_SYNCCONFIG 0x27
igbt6 0:4e8ef5758455 610 #define REG_SYNCVALUE1 0x28
igbt6 0:4e8ef5758455 611 #define REG_SYNCVALUE2 0x29
igbt6 0:4e8ef5758455 612 #define REG_SYNCVALUE3 0x2A
igbt6 0:4e8ef5758455 613 #define REG_SYNCVALUE4 0x2B
igbt6 0:4e8ef5758455 614 #define REG_SYNCVALUE5 0x2C
igbt6 0:4e8ef5758455 615 #define REG_SYNCVALUE6 0x2D
igbt6 0:4e8ef5758455 616 #define REG_SYNCVALUE7 0x2E
igbt6 0:4e8ef5758455 617 #define REG_SYNCVALUE8 0x2F
igbt6 0:4e8ef5758455 618 #define REG_PACKETCONFIG1 0x30
igbt6 0:4e8ef5758455 619 #define REG_PACKETCONFIG2 0x31
igbt6 0:4e8ef5758455 620 #define REG_PAYLOADLENGTH 0x32
igbt6 0:4e8ef5758455 621 #define REG_NODEADRS 0x33
igbt6 0:4e8ef5758455 622 #define REG_BROADCASTADRS 0x34
igbt6 0:4e8ef5758455 623 #define REG_FIFOTHRESH 0x35
igbt6 0:4e8ef5758455 624 // SM settings
igbt6 0:4e8ef5758455 625 #define REG_SEQCONFIG1 0x36
igbt6 0:4e8ef5758455 626 #define REG_SEQCONFIG2 0x37
igbt6 0:4e8ef5758455 627 #define REG_TIMERRESOL 0x38
igbt6 0:4e8ef5758455 628 #define REG_TIMER1COEF 0x39
igbt6 0:4e8ef5758455 629 #define REG_TIMER2COEF 0x3A
igbt6 0:4e8ef5758455 630 // Service settings
igbt6 0:4e8ef5758455 631 #define REG_IMAGECAL 0x3B
igbt6 0:4e8ef5758455 632 #define REG_TEMP 0x3C
igbt6 0:4e8ef5758455 633 #define REG_LOWBAT 0x3D
igbt6 0:4e8ef5758455 634 // Status
igbt6 0:4e8ef5758455 635 #define REG_IRQFLAGS1 0x3E
igbt6 0:4e8ef5758455 636 #define REG_IRQFLAGS2 0x3F
igbt6 0:4e8ef5758455 637 // I/O settings
igbt6 0:4e8ef5758455 638 #define REG_DIOMAPPING1 0x40
igbt6 0:4e8ef5758455 639 #define REG_DIOMAPPING2 0x41
igbt6 0:4e8ef5758455 640 // Version
igbt6 0:4e8ef5758455 641 #define REG_VERSION 0x42
igbt6 0:4e8ef5758455 642 // Additional settings
igbt6 0:4e8ef5758455 643 #define REG_PLLHOP 0x44
igbt6 0:4e8ef5758455 644 #define REG_TCXO 0x4B
igbt6 0:4e8ef5758455 645 #define REG_PADAC 0x4D
igbt6 0:4e8ef5758455 646 #define REG_FORMERTEMP 0x5B
igbt6 0:4e8ef5758455 647 #define REG_BITRATEFRAC 0x5D
igbt6 0:4e8ef5758455 648 #define REG_AGCREF 0x61
igbt6 0:4e8ef5758455 649 #define REG_AGCTHRESH1 0x62
igbt6 0:4e8ef5758455 650 #define REG_AGCTHRESH2 0x63
igbt6 0:4e8ef5758455 651 #define REG_AGCTHRESH3 0x64
igbt6 0:4e8ef5758455 652 #define REG_PLL 0x70
igbt6 0:4e8ef5758455 653
igbt6 0:4e8ef5758455 654 /*!
igbt6 0:4e8ef5758455 655 * ============================================================================
igbt6 0:4e8ef5758455 656 * SX1276 FSK bits control definition
igbt6 0:4e8ef5758455 657 * ============================================================================
igbt6 0:4e8ef5758455 658 */
igbt6 0:4e8ef5758455 659
igbt6 0:4e8ef5758455 660 /*!
igbt6 0:4e8ef5758455 661 * RegFifo
igbt6 0:4e8ef5758455 662 */
igbt6 0:4e8ef5758455 663
igbt6 0:4e8ef5758455 664 /*!
igbt6 0:4e8ef5758455 665 * RegOpMode
igbt6 0:4e8ef5758455 666 */
igbt6 0:4e8ef5758455 667 #define RF_OPMODE_LONGRANGEMODE_MASK 0x7F
igbt6 0:4e8ef5758455 668 #define RF_OPMODE_LONGRANGEMODE_OFF 0x00
igbt6 0:4e8ef5758455 669 #define RF_OPMODE_LONGRANGEMODE_ON 0x80
igbt6 0:4e8ef5758455 670
igbt6 0:4e8ef5758455 671 #define RF_OPMODE_MODULATIONTYPE_MASK 0x9F
igbt6 0:4e8ef5758455 672 #define RF_OPMODE_MODULATIONTYPE_FSK 0x00 // Default
igbt6 0:4e8ef5758455 673 #define RF_OPMODE_MODULATIONTYPE_OOK 0x20
igbt6 0:4e8ef5758455 674
igbt6 0:4e8ef5758455 675 #define RF_OPMODE_MODULATIONSHAPING_MASK 0xE7
igbt6 0:4e8ef5758455 676 #define RF_OPMODE_MODULATIONSHAPING_00 0x00 // Default
igbt6 0:4e8ef5758455 677 #define RF_OPMODE_MODULATIONSHAPING_01 0x08
igbt6 0:4e8ef5758455 678 #define RF_OPMODE_MODULATIONSHAPING_10 0x10
igbt6 0:4e8ef5758455 679 #define RF_OPMODE_MODULATIONSHAPING_11 0x18
igbt6 0:4e8ef5758455 680
igbt6 0:4e8ef5758455 681 #define RF_OPMODE_MASK 0xF8
igbt6 0:4e8ef5758455 682 #define RF_OPMODE_SLEEP 0x00
igbt6 0:4e8ef5758455 683 #define RF_OPMODE_STANDBY 0x01 // Default
igbt6 0:4e8ef5758455 684 #define RF_OPMODE_SYNTHESIZER_TX 0x02
igbt6 0:4e8ef5758455 685 #define RF_OPMODE_TRANSMITTER 0x03
igbt6 0:4e8ef5758455 686 #define RF_OPMODE_SYNTHESIZER_RX 0x04
igbt6 0:4e8ef5758455 687 #define RF_OPMODE_RECEIVER 0x05
igbt6 0:4e8ef5758455 688
igbt6 0:4e8ef5758455 689 /*!
igbt6 0:4e8ef5758455 690 * RegBitRate (bits/sec)
igbt6 0:4e8ef5758455 691 */
igbt6 0:4e8ef5758455 692 #define RF_BITRATEMSB_1200_BPS 0x68
igbt6 0:4e8ef5758455 693 #define RF_BITRATELSB_1200_BPS 0x2B
igbt6 0:4e8ef5758455 694 #define RF_BITRATEMSB_2400_BPS 0x34
igbt6 0:4e8ef5758455 695 #define RF_BITRATELSB_2400_BPS 0x15
igbt6 0:4e8ef5758455 696 #define RF_BITRATEMSB_4800_BPS 0x1A // Default
igbt6 0:4e8ef5758455 697 #define RF_BITRATELSB_4800_BPS 0x0B // Default
igbt6 0:4e8ef5758455 698 #define RF_BITRATEMSB_9600_BPS 0x0D
igbt6 0:4e8ef5758455 699 #define RF_BITRATELSB_9600_BPS 0x05
igbt6 0:4e8ef5758455 700 #define RF_BITRATEMSB_15000_BPS 0x08
igbt6 0:4e8ef5758455 701 #define RF_BITRATELSB_15000_BPS 0x55
igbt6 0:4e8ef5758455 702 #define RF_BITRATEMSB_19200_BPS 0x06
igbt6 0:4e8ef5758455 703 #define RF_BITRATELSB_19200_BPS 0x83
igbt6 0:4e8ef5758455 704 #define RF_BITRATEMSB_38400_BPS 0x03
igbt6 0:4e8ef5758455 705 #define RF_BITRATELSB_38400_BPS 0x41
igbt6 0:4e8ef5758455 706 #define RF_BITRATEMSB_76800_BPS 0x01
igbt6 0:4e8ef5758455 707 #define RF_BITRATELSB_76800_BPS 0xA1
igbt6 0:4e8ef5758455 708 #define RF_BITRATEMSB_153600_BPS 0x00
igbt6 0:4e8ef5758455 709 #define RF_BITRATELSB_153600_BPS 0xD0
igbt6 0:4e8ef5758455 710 #define RF_BITRATEMSB_57600_BPS 0x02
igbt6 0:4e8ef5758455 711 #define RF_BITRATELSB_57600_BPS 0x2C
igbt6 0:4e8ef5758455 712 #define RF_BITRATEMSB_115200_BPS 0x01
igbt6 0:4e8ef5758455 713 #define RF_BITRATELSB_115200_BPS 0x16
igbt6 0:4e8ef5758455 714 #define RF_BITRATEMSB_12500_BPS 0x0A
igbt6 0:4e8ef5758455 715 #define RF_BITRATELSB_12500_BPS 0x00
igbt6 0:4e8ef5758455 716 #define RF_BITRATEMSB_25000_BPS 0x05
igbt6 0:4e8ef5758455 717 #define RF_BITRATELSB_25000_BPS 0x00
igbt6 0:4e8ef5758455 718 #define RF_BITRATEMSB_50000_BPS 0x02
igbt6 0:4e8ef5758455 719 #define RF_BITRATELSB_50000_BPS 0x80
igbt6 0:4e8ef5758455 720 #define RF_BITRATEMSB_100000_BPS 0x01
igbt6 0:4e8ef5758455 721 #define RF_BITRATELSB_100000_BPS 0x40
igbt6 0:4e8ef5758455 722 #define RF_BITRATEMSB_150000_BPS 0x00
igbt6 0:4e8ef5758455 723 #define RF_BITRATELSB_150000_BPS 0xD5
igbt6 0:4e8ef5758455 724 #define RF_BITRATEMSB_200000_BPS 0x00
igbt6 0:4e8ef5758455 725 #define RF_BITRATELSB_200000_BPS 0xA0
igbt6 0:4e8ef5758455 726 #define RF_BITRATEMSB_250000_BPS 0x00
igbt6 0:4e8ef5758455 727 #define RF_BITRATELSB_250000_BPS 0x80
igbt6 0:4e8ef5758455 728 #define RF_BITRATEMSB_32768_BPS 0x03
igbt6 0:4e8ef5758455 729 #define RF_BITRATELSB_32768_BPS 0xD1
igbt6 0:4e8ef5758455 730
igbt6 0:4e8ef5758455 731 /*!
igbt6 0:4e8ef5758455 732 * RegFdev (Hz)
igbt6 0:4e8ef5758455 733 */
igbt6 0:4e8ef5758455 734 #define RF_FDEVMSB_2000_HZ 0x00
igbt6 0:4e8ef5758455 735 #define RF_FDEVLSB_2000_HZ 0x21
igbt6 0:4e8ef5758455 736 #define RF_FDEVMSB_5000_HZ 0x00 // Default
igbt6 0:4e8ef5758455 737 #define RF_FDEVLSB_5000_HZ 0x52 // Default
igbt6 0:4e8ef5758455 738 #define RF_FDEVMSB_10000_HZ 0x00
igbt6 0:4e8ef5758455 739 #define RF_FDEVLSB_10000_HZ 0xA4
igbt6 0:4e8ef5758455 740 #define RF_FDEVMSB_15000_HZ 0x00
igbt6 0:4e8ef5758455 741 #define RF_FDEVLSB_15000_HZ 0xF6
igbt6 0:4e8ef5758455 742 #define RF_FDEVMSB_20000_HZ 0x01
igbt6 0:4e8ef5758455 743 #define RF_FDEVLSB_20000_HZ 0x48
igbt6 0:4e8ef5758455 744 #define RF_FDEVMSB_25000_HZ 0x01
igbt6 0:4e8ef5758455 745 #define RF_FDEVLSB_25000_HZ 0x9A
igbt6 0:4e8ef5758455 746 #define RF_FDEVMSB_30000_HZ 0x01
igbt6 0:4e8ef5758455 747 #define RF_FDEVLSB_30000_HZ 0xEC
igbt6 0:4e8ef5758455 748 #define RF_FDEVMSB_35000_HZ 0x02
igbt6 0:4e8ef5758455 749 #define RF_FDEVLSB_35000_HZ 0x3D
igbt6 0:4e8ef5758455 750 #define RF_FDEVMSB_40000_HZ 0x02
igbt6 0:4e8ef5758455 751 #define RF_FDEVLSB_40000_HZ 0x8F
igbt6 0:4e8ef5758455 752 #define RF_FDEVMSB_45000_HZ 0x02
igbt6 0:4e8ef5758455 753 #define RF_FDEVLSB_45000_HZ 0xE1
igbt6 0:4e8ef5758455 754 #define RF_FDEVMSB_50000_HZ 0x03
igbt6 0:4e8ef5758455 755 #define RF_FDEVLSB_50000_HZ 0x33
igbt6 0:4e8ef5758455 756 #define RF_FDEVMSB_55000_HZ 0x03
igbt6 0:4e8ef5758455 757 #define RF_FDEVLSB_55000_HZ 0x85
igbt6 0:4e8ef5758455 758 #define RF_FDEVMSB_60000_HZ 0x03
igbt6 0:4e8ef5758455 759 #define RF_FDEVLSB_60000_HZ 0xD7
igbt6 0:4e8ef5758455 760 #define RF_FDEVMSB_65000_HZ 0x04
igbt6 0:4e8ef5758455 761 #define RF_FDEVLSB_65000_HZ 0x29
igbt6 0:4e8ef5758455 762 #define RF_FDEVMSB_70000_HZ 0x04
igbt6 0:4e8ef5758455 763 #define RF_FDEVLSB_70000_HZ 0x7B
igbt6 0:4e8ef5758455 764 #define RF_FDEVMSB_75000_HZ 0x04
igbt6 0:4e8ef5758455 765 #define RF_FDEVLSB_75000_HZ 0xCD
igbt6 0:4e8ef5758455 766 #define RF_FDEVMSB_80000_HZ 0x05
igbt6 0:4e8ef5758455 767 #define RF_FDEVLSB_80000_HZ 0x1F
igbt6 0:4e8ef5758455 768 #define RF_FDEVMSB_85000_HZ 0x05
igbt6 0:4e8ef5758455 769 #define RF_FDEVLSB_85000_HZ 0x71
igbt6 0:4e8ef5758455 770 #define RF_FDEVMSB_90000_HZ 0x05
igbt6 0:4e8ef5758455 771 #define RF_FDEVLSB_90000_HZ 0xC3
igbt6 0:4e8ef5758455 772 #define RF_FDEVMSB_95000_HZ 0x06
igbt6 0:4e8ef5758455 773 #define RF_FDEVLSB_95000_HZ 0x14
igbt6 0:4e8ef5758455 774 #define RF_FDEVMSB_100000_HZ 0x06
igbt6 0:4e8ef5758455 775 #define RF_FDEVLSB_100000_HZ 0x66
igbt6 0:4e8ef5758455 776 #define RF_FDEVMSB_110000_HZ 0x07
igbt6 0:4e8ef5758455 777 #define RF_FDEVLSB_110000_HZ 0x0A
igbt6 0:4e8ef5758455 778 #define RF_FDEVMSB_120000_HZ 0x07
igbt6 0:4e8ef5758455 779 #define RF_FDEVLSB_120000_HZ 0xAE
igbt6 0:4e8ef5758455 780 #define RF_FDEVMSB_130000_HZ 0x08
igbt6 0:4e8ef5758455 781 #define RF_FDEVLSB_130000_HZ 0x52
igbt6 0:4e8ef5758455 782 #define RF_FDEVMSB_140000_HZ 0x08
igbt6 0:4e8ef5758455 783 #define RF_FDEVLSB_140000_HZ 0xF6
igbt6 0:4e8ef5758455 784 #define RF_FDEVMSB_150000_HZ 0x09
igbt6 0:4e8ef5758455 785 #define RF_FDEVLSB_150000_HZ 0x9A
igbt6 0:4e8ef5758455 786 #define RF_FDEVMSB_160000_HZ 0x0A
igbt6 0:4e8ef5758455 787 #define RF_FDEVLSB_160000_HZ 0x3D
igbt6 0:4e8ef5758455 788 #define RF_FDEVMSB_170000_HZ 0x0A
igbt6 0:4e8ef5758455 789 #define RF_FDEVLSB_170000_HZ 0xE1
igbt6 0:4e8ef5758455 790 #define RF_FDEVMSB_180000_HZ 0x0B
igbt6 0:4e8ef5758455 791 #define RF_FDEVLSB_180000_HZ 0x85
igbt6 0:4e8ef5758455 792 #define RF_FDEVMSB_190000_HZ 0x0C
igbt6 0:4e8ef5758455 793 #define RF_FDEVLSB_190000_HZ 0x29
igbt6 0:4e8ef5758455 794 #define RF_FDEVMSB_200000_HZ 0x0C
igbt6 0:4e8ef5758455 795 #define RF_FDEVLSB_200000_HZ 0xCD
igbt6 0:4e8ef5758455 796
igbt6 0:4e8ef5758455 797 /*!
igbt6 0:4e8ef5758455 798 * RegFrf (MHz)
igbt6 0:4e8ef5758455 799 */
igbt6 0:4e8ef5758455 800 #define RF_FRFMSB_863_MHZ 0xD7
igbt6 0:4e8ef5758455 801 #define RF_FRFMID_863_MHZ 0xC0
igbt6 0:4e8ef5758455 802 #define RF_FRFLSB_863_MHZ 0x00
igbt6 0:4e8ef5758455 803 #define RF_FRFMSB_864_MHZ 0xD8
igbt6 0:4e8ef5758455 804 #define RF_FRFMID_864_MHZ 0x00
igbt6 0:4e8ef5758455 805 #define RF_FRFLSB_864_MHZ 0x00
igbt6 0:4e8ef5758455 806 #define RF_FRFMSB_865_MHZ 0xD8
igbt6 0:4e8ef5758455 807 #define RF_FRFMID_865_MHZ 0x40
igbt6 0:4e8ef5758455 808 #define RF_FRFLSB_865_MHZ 0x00
igbt6 0:4e8ef5758455 809 #define RF_FRFMSB_866_MHZ 0xD8
igbt6 0:4e8ef5758455 810 #define RF_FRFMID_866_MHZ 0x80
igbt6 0:4e8ef5758455 811 #define RF_FRFLSB_866_MHZ 0x00
igbt6 0:4e8ef5758455 812 #define RF_FRFMSB_867_MHZ 0xD8
igbt6 0:4e8ef5758455 813 #define RF_FRFMID_867_MHZ 0xC0
igbt6 0:4e8ef5758455 814 #define RF_FRFLSB_867_MHZ 0x00
igbt6 0:4e8ef5758455 815 #define RF_FRFMSB_868_MHZ 0xD9
igbt6 0:4e8ef5758455 816 #define RF_FRFMID_868_MHZ 0x00
igbt6 0:4e8ef5758455 817 #define RF_FRFLSB_868_MHZ 0x00
igbt6 0:4e8ef5758455 818 #define RF_FRFMSB_869_MHZ 0xD9
igbt6 0:4e8ef5758455 819 #define RF_FRFMID_869_MHZ 0x40
igbt6 0:4e8ef5758455 820 #define RF_FRFLSB_869_MHZ 0x00
igbt6 0:4e8ef5758455 821 #define RF_FRFMSB_870_MHZ 0xD9
igbt6 0:4e8ef5758455 822 #define RF_FRFMID_870_MHZ 0x80
igbt6 0:4e8ef5758455 823 #define RF_FRFLSB_870_MHZ 0x00
igbt6 0:4e8ef5758455 824
igbt6 0:4e8ef5758455 825 #define RF_FRFMSB_902_MHZ 0xE1
igbt6 0:4e8ef5758455 826 #define RF_FRFMID_902_MHZ 0x80
igbt6 0:4e8ef5758455 827 #define RF_FRFLSB_902_MHZ 0x00
igbt6 0:4e8ef5758455 828 #define RF_FRFMSB_903_MHZ 0xE1
igbt6 0:4e8ef5758455 829 #define RF_FRFMID_903_MHZ 0xC0
igbt6 0:4e8ef5758455 830 #define RF_FRFLSB_903_MHZ 0x00
igbt6 0:4e8ef5758455 831 #define RF_FRFMSB_904_MHZ 0xE2
igbt6 0:4e8ef5758455 832 #define RF_FRFMID_904_MHZ 0x00
igbt6 0:4e8ef5758455 833 #define RF_FRFLSB_904_MHZ 0x00
igbt6 0:4e8ef5758455 834 #define RF_FRFMSB_905_MHZ 0xE2
igbt6 0:4e8ef5758455 835 #define RF_FRFMID_905_MHZ 0x40
igbt6 0:4e8ef5758455 836 #define RF_FRFLSB_905_MHZ 0x00
igbt6 0:4e8ef5758455 837 #define RF_FRFMSB_906_MHZ 0xE2
igbt6 0:4e8ef5758455 838 #define RF_FRFMID_906_MHZ 0x80
igbt6 0:4e8ef5758455 839 #define RF_FRFLSB_906_MHZ 0x00
igbt6 0:4e8ef5758455 840 #define RF_FRFMSB_907_MHZ 0xE2
igbt6 0:4e8ef5758455 841 #define RF_FRFMID_907_MHZ 0xC0
igbt6 0:4e8ef5758455 842 #define RF_FRFLSB_907_MHZ 0x00
igbt6 0:4e8ef5758455 843 #define RF_FRFMSB_908_MHZ 0xE3
igbt6 0:4e8ef5758455 844 #define RF_FRFMID_908_MHZ 0x00
igbt6 0:4e8ef5758455 845 #define RF_FRFLSB_908_MHZ 0x00
igbt6 0:4e8ef5758455 846 #define RF_FRFMSB_909_MHZ 0xE3
igbt6 0:4e8ef5758455 847 #define RF_FRFMID_909_MHZ 0x40
igbt6 0:4e8ef5758455 848 #define RF_FRFLSB_909_MHZ 0x00
igbt6 0:4e8ef5758455 849 #define RF_FRFMSB_910_MHZ 0xE3
igbt6 0:4e8ef5758455 850 #define RF_FRFMID_910_MHZ 0x80
igbt6 0:4e8ef5758455 851 #define RF_FRFLSB_910_MHZ 0x00
igbt6 0:4e8ef5758455 852 #define RF_FRFMSB_911_MHZ 0xE3
igbt6 0:4e8ef5758455 853 #define RF_FRFMID_911_MHZ 0xC0
igbt6 0:4e8ef5758455 854 #define RF_FRFLSB_911_MHZ 0x00
igbt6 0:4e8ef5758455 855 #define RF_FRFMSB_912_MHZ 0xE4
igbt6 0:4e8ef5758455 856 #define RF_FRFMID_912_MHZ 0x00
igbt6 0:4e8ef5758455 857 #define RF_FRFLSB_912_MHZ 0x00
igbt6 0:4e8ef5758455 858 #define RF_FRFMSB_913_MHZ 0xE4
igbt6 0:4e8ef5758455 859 #define RF_FRFMID_913_MHZ 0x40
igbt6 0:4e8ef5758455 860 #define RF_FRFLSB_913_MHZ 0x00
igbt6 0:4e8ef5758455 861 #define RF_FRFMSB_914_MHZ 0xE4
igbt6 0:4e8ef5758455 862 #define RF_FRFMID_914_MHZ 0x80
igbt6 0:4e8ef5758455 863 #define RF_FRFLSB_914_MHZ 0x00
igbt6 0:4e8ef5758455 864 #define RF_FRFMSB_915_MHZ 0xE4 // Default
igbt6 0:4e8ef5758455 865 #define RF_FRFMID_915_MHZ 0xC0 // Default
igbt6 0:4e8ef5758455 866 #define RF_FRFLSB_915_MHZ 0x00 // Default
igbt6 0:4e8ef5758455 867 #define RF_FRFMSB_916_MHZ 0xE5
igbt6 0:4e8ef5758455 868 #define RF_FRFMID_916_MHZ 0x00
igbt6 0:4e8ef5758455 869 #define RF_FRFLSB_916_MHZ 0x00
igbt6 0:4e8ef5758455 870 #define RF_FRFMSB_917_MHZ 0xE5
igbt6 0:4e8ef5758455 871 #define RF_FRFMID_917_MHZ 0x40
igbt6 0:4e8ef5758455 872 #define RF_FRFLSB_917_MHZ 0x00
igbt6 0:4e8ef5758455 873 #define RF_FRFMSB_918_MHZ 0xE5
igbt6 0:4e8ef5758455 874 #define RF_FRFMID_918_MHZ 0x80
igbt6 0:4e8ef5758455 875 #define RF_FRFLSB_918_MHZ 0x00
igbt6 0:4e8ef5758455 876 #define RF_FRFMSB_919_MHZ 0xE5
igbt6 0:4e8ef5758455 877 #define RF_FRFMID_919_MHZ 0xC0
igbt6 0:4e8ef5758455 878 #define RF_FRFLSB_919_MHZ 0x00
igbt6 0:4e8ef5758455 879 #define RF_FRFMSB_920_MHZ 0xE6
igbt6 0:4e8ef5758455 880 #define RF_FRFMID_920_MHZ 0x00
igbt6 0:4e8ef5758455 881 #define RF_FRFLSB_920_MHZ 0x00
igbt6 0:4e8ef5758455 882 #define RF_FRFMSB_921_MHZ 0xE6
igbt6 0:4e8ef5758455 883 #define RF_FRFMID_921_MHZ 0x40
igbt6 0:4e8ef5758455 884 #define RF_FRFLSB_921_MHZ 0x00
igbt6 0:4e8ef5758455 885 #define RF_FRFMSB_922_MHZ 0xE6
igbt6 0:4e8ef5758455 886 #define RF_FRFMID_922_MHZ 0x80
igbt6 0:4e8ef5758455 887 #define RF_FRFLSB_922_MHZ 0x00
igbt6 0:4e8ef5758455 888 #define RF_FRFMSB_923_MHZ 0xE6
igbt6 0:4e8ef5758455 889 #define RF_FRFMID_923_MHZ 0xC0
igbt6 0:4e8ef5758455 890 #define RF_FRFLSB_923_MHZ 0x00
igbt6 0:4e8ef5758455 891 #define RF_FRFMSB_924_MHZ 0xE7
igbt6 0:4e8ef5758455 892 #define RF_FRFMID_924_MHZ 0x00
igbt6 0:4e8ef5758455 893 #define RF_FRFLSB_924_MHZ 0x00
igbt6 0:4e8ef5758455 894 #define RF_FRFMSB_925_MHZ 0xE7
igbt6 0:4e8ef5758455 895 #define RF_FRFMID_925_MHZ 0x40
igbt6 0:4e8ef5758455 896 #define RF_FRFLSB_925_MHZ 0x00
igbt6 0:4e8ef5758455 897 #define RF_FRFMSB_926_MHZ 0xE7
igbt6 0:4e8ef5758455 898 #define RF_FRFMID_926_MHZ 0x80
igbt6 0:4e8ef5758455 899 #define RF_FRFLSB_926_MHZ 0x00
igbt6 0:4e8ef5758455 900 #define RF_FRFMSB_927_MHZ 0xE7
igbt6 0:4e8ef5758455 901 #define RF_FRFMID_927_MHZ 0xC0
igbt6 0:4e8ef5758455 902 #define RF_FRFLSB_927_MHZ 0x00
igbt6 0:4e8ef5758455 903 #define RF_FRFMSB_928_MHZ 0xE8
igbt6 0:4e8ef5758455 904 #define RF_FRFMID_928_MHZ 0x00
igbt6 0:4e8ef5758455 905 #define RF_FRFLSB_928_MHZ 0x00
igbt6 0:4e8ef5758455 906
igbt6 0:4e8ef5758455 907 /*!
igbt6 0:4e8ef5758455 908 * RegPaConfig
igbt6 0:4e8ef5758455 909 */
igbt6 0:4e8ef5758455 910 #define RF_PACONFIG_PASELECT_MASK 0x7F
igbt6 0:4e8ef5758455 911 #define RF_PACONFIG_PASELECT_PABOOST 0x80
igbt6 0:4e8ef5758455 912 #define RF_PACONFIG_PASELECT_RFO 0x00 // Default
igbt6 0:4e8ef5758455 913
igbt6 0:4e8ef5758455 914 #define RF_PACONFIG_MAX_POWER_MASK 0x8F
igbt6 0:4e8ef5758455 915
igbt6 0:4e8ef5758455 916 #define RF_PACONFIG_OUTPUTPOWER_MASK 0xF0
igbt6 0:4e8ef5758455 917
igbt6 0:4e8ef5758455 918 /*!
igbt6 0:4e8ef5758455 919 * RegPaRamp
igbt6 0:4e8ef5758455 920 */
igbt6 0:4e8ef5758455 921 #define RF_PARAMP_MODULATIONSHAPING_MASK 0x9F
igbt6 0:4e8ef5758455 922 #define RF_PARAMP_MODULATIONSHAPING_00 0x00 // Default
igbt6 0:4e8ef5758455 923 #define RF_PARAMP_MODULATIONSHAPING_01 0x20
igbt6 0:4e8ef5758455 924 #define RF_PARAMP_MODULATIONSHAPING_10 0x40
igbt6 0:4e8ef5758455 925 #define RF_PARAMP_MODULATIONSHAPING_11 0x60
igbt6 0:4e8ef5758455 926
igbt6 0:4e8ef5758455 927 #define RF_PARAMP_LOWPNTXPLL_MASK 0xEF
igbt6 0:4e8ef5758455 928 #define RF_PARAMP_LOWPNTXPLL_OFF 0x10
igbt6 0:4e8ef5758455 929 #define RF_PARAMP_LOWPNTXPLL_ON 0x00 // Default
igbt6 0:4e8ef5758455 930
igbt6 0:4e8ef5758455 931 #define RF_PARAMP_MASK 0xF0
igbt6 0:4e8ef5758455 932 #define RF_PARAMP_3400_US 0x00
igbt6 0:4e8ef5758455 933 #define RF_PARAMP_2000_US 0x01
igbt6 0:4e8ef5758455 934 #define RF_PARAMP_1000_US 0x02
igbt6 0:4e8ef5758455 935 #define RF_PARAMP_0500_US 0x03
igbt6 0:4e8ef5758455 936 #define RF_PARAMP_0250_US 0x04
igbt6 0:4e8ef5758455 937 #define RF_PARAMP_0125_US 0x05
igbt6 0:4e8ef5758455 938 #define RF_PARAMP_0100_US 0x06
igbt6 0:4e8ef5758455 939 #define RF_PARAMP_0062_US 0x07
igbt6 0:4e8ef5758455 940 #define RF_PARAMP_0050_US 0x08
igbt6 0:4e8ef5758455 941 #define RF_PARAMP_0040_US 0x09 // Default
igbt6 0:4e8ef5758455 942 #define RF_PARAMP_0031_US 0x0A
igbt6 0:4e8ef5758455 943 #define RF_PARAMP_0025_US 0x0B
igbt6 0:4e8ef5758455 944 #define RF_PARAMP_0020_US 0x0C
igbt6 0:4e8ef5758455 945 #define RF_PARAMP_0015_US 0x0D
igbt6 0:4e8ef5758455 946 #define RF_PARAMP_0012_US 0x0E
igbt6 0:4e8ef5758455 947 #define RF_PARAMP_0010_US 0x0F
igbt6 0:4e8ef5758455 948
igbt6 0:4e8ef5758455 949 /*!
igbt6 0:4e8ef5758455 950 * RegOcp
igbt6 0:4e8ef5758455 951 */
igbt6 0:4e8ef5758455 952 #define RF_OCP_MASK 0xDF
igbt6 0:4e8ef5758455 953 #define RF_OCP_ON 0x20 // Default
igbt6 0:4e8ef5758455 954 #define RF_OCP_OFF 0x00
igbt6 0:4e8ef5758455 955
igbt6 0:4e8ef5758455 956 #define RF_OCP_TRIM_MASK 0xE0
igbt6 0:4e8ef5758455 957 #define RF_OCP_TRIM_045_MA 0x00
igbt6 0:4e8ef5758455 958 #define RF_OCP_TRIM_050_MA 0x01
igbt6 0:4e8ef5758455 959 #define RF_OCP_TRIM_055_MA 0x02
igbt6 0:4e8ef5758455 960 #define RF_OCP_TRIM_060_MA 0x03
igbt6 0:4e8ef5758455 961 #define RF_OCP_TRIM_065_MA 0x04
igbt6 0:4e8ef5758455 962 #define RF_OCP_TRIM_070_MA 0x05
igbt6 0:4e8ef5758455 963 #define RF_OCP_TRIM_075_MA 0x06
igbt6 0:4e8ef5758455 964 #define RF_OCP_TRIM_080_MA 0x07
igbt6 0:4e8ef5758455 965 #define RF_OCP_TRIM_085_MA 0x08
igbt6 0:4e8ef5758455 966 #define RF_OCP_TRIM_090_MA 0x09
igbt6 0:4e8ef5758455 967 #define RF_OCP_TRIM_095_MA 0x0A
igbt6 0:4e8ef5758455 968 #define RF_OCP_TRIM_100_MA 0x0B // Default
igbt6 0:4e8ef5758455 969 #define RF_OCP_TRIM_105_MA 0x0C
igbt6 0:4e8ef5758455 970 #define RF_OCP_TRIM_110_MA 0x0D
igbt6 0:4e8ef5758455 971 #define RF_OCP_TRIM_115_MA 0x0E
igbt6 0:4e8ef5758455 972 #define RF_OCP_TRIM_120_MA 0x0F
igbt6 0:4e8ef5758455 973 #define RF_OCP_TRIM_130_MA 0x10
igbt6 0:4e8ef5758455 974 #define RF_OCP_TRIM_140_MA 0x11
igbt6 0:4e8ef5758455 975 #define RF_OCP_TRIM_150_MA 0x12
igbt6 0:4e8ef5758455 976 #define RF_OCP_TRIM_160_MA 0x13
igbt6 0:4e8ef5758455 977 #define RF_OCP_TRIM_170_MA 0x14
igbt6 0:4e8ef5758455 978 #define RF_OCP_TRIM_180_MA 0x15
igbt6 0:4e8ef5758455 979 #define RF_OCP_TRIM_190_MA 0x16
igbt6 0:4e8ef5758455 980 #define RF_OCP_TRIM_200_MA 0x17
igbt6 0:4e8ef5758455 981 #define RF_OCP_TRIM_210_MA 0x18
igbt6 0:4e8ef5758455 982 #define RF_OCP_TRIM_220_MA 0x19
igbt6 0:4e8ef5758455 983 #define RF_OCP_TRIM_230_MA 0x1A
igbt6 0:4e8ef5758455 984 #define RF_OCP_TRIM_240_MA 0x1B
igbt6 0:4e8ef5758455 985
igbt6 0:4e8ef5758455 986 /*!
igbt6 0:4e8ef5758455 987 * RegLna
igbt6 0:4e8ef5758455 988 */
igbt6 0:4e8ef5758455 989 #define RF_LNA_GAIN_MASK 0x1F
igbt6 0:4e8ef5758455 990 #define RF_LNA_GAIN_G1 0x20 // Default
igbt6 0:4e8ef5758455 991 #define RF_LNA_GAIN_G2 0x40
igbt6 0:4e8ef5758455 992 #define RF_LNA_GAIN_G3 0x60
igbt6 0:4e8ef5758455 993 #define RF_LNA_GAIN_G4 0x80
igbt6 0:4e8ef5758455 994 #define RF_LNA_GAIN_G5 0xA0
igbt6 0:4e8ef5758455 995 #define RF_LNA_GAIN_G6 0xC0
igbt6 0:4e8ef5758455 996
igbt6 0:4e8ef5758455 997 #define RF_LNA_BOOST_MASK 0xFC
igbt6 0:4e8ef5758455 998 #define RF_LNA_BOOST_OFF 0x00 // Default
igbt6 0:4e8ef5758455 999 #define RF_LNA_BOOST_ON 0x03
igbt6 0:4e8ef5758455 1000
igbt6 0:4e8ef5758455 1001 /*!
igbt6 0:4e8ef5758455 1002 * RegRxConfig
igbt6 0:4e8ef5758455 1003 */
igbt6 0:4e8ef5758455 1004 #define RF_RXCONFIG_RESTARTRXONCOLLISION_MASK 0x7F
igbt6 0:4e8ef5758455 1005 #define RF_RXCONFIG_RESTARTRXONCOLLISION_ON 0x80
igbt6 0:4e8ef5758455 1006 #define RF_RXCONFIG_RESTARTRXONCOLLISION_OFF 0x00 // Default
igbt6 0:4e8ef5758455 1007
igbt6 0:4e8ef5758455 1008 #define RF_RXCONFIG_RESTARTRXWITHOUTPLLLOCK 0x40 // Write only
igbt6 0:4e8ef5758455 1009
igbt6 0:4e8ef5758455 1010 #define RF_RXCONFIG_RESTARTRXWITHPLLLOCK 0x20 // Write only
igbt6 0:4e8ef5758455 1011
igbt6 0:4e8ef5758455 1012 #define RF_RXCONFIG_AFCAUTO_MASK 0xEF
igbt6 0:4e8ef5758455 1013 #define RF_RXCONFIG_AFCAUTO_ON 0x10
igbt6 0:4e8ef5758455 1014 #define RF_RXCONFIG_AFCAUTO_OFF 0x00 // Default
igbt6 0:4e8ef5758455 1015
igbt6 0:4e8ef5758455 1016 #define RF_RXCONFIG_AGCAUTO_MASK 0xF7
igbt6 0:4e8ef5758455 1017 #define RF_RXCONFIG_AGCAUTO_ON 0x08 // Default
igbt6 0:4e8ef5758455 1018 #define RF_RXCONFIG_AGCAUTO_OFF 0x00
igbt6 0:4e8ef5758455 1019
igbt6 0:4e8ef5758455 1020 #define RF_RXCONFIG_RXTRIGER_MASK 0xF8
igbt6 0:4e8ef5758455 1021 #define RF_RXCONFIG_RXTRIGER_OFF 0x00
igbt6 0:4e8ef5758455 1022 #define RF_RXCONFIG_RXTRIGER_RSSI 0x01
igbt6 0:4e8ef5758455 1023 #define RF_RXCONFIG_RXTRIGER_PREAMBLEDETECT 0x06 // Default
igbt6 0:4e8ef5758455 1024 #define RF_RXCONFIG_RXTRIGER_RSSI_PREAMBLEDETECT 0x07
igbt6 0:4e8ef5758455 1025
igbt6 0:4e8ef5758455 1026 /*!
igbt6 0:4e8ef5758455 1027 * RegRssiConfig
igbt6 0:4e8ef5758455 1028 */
igbt6 0:4e8ef5758455 1029 #define RF_RSSICONFIG_OFFSET_MASK 0x07
igbt6 0:4e8ef5758455 1030 #define RF_RSSICONFIG_OFFSET_P_00_DB 0x00 // Default
igbt6 0:4e8ef5758455 1031 #define RF_RSSICONFIG_OFFSET_P_01_DB 0x08
igbt6 0:4e8ef5758455 1032 #define RF_RSSICONFIG_OFFSET_P_02_DB 0x10
igbt6 0:4e8ef5758455 1033 #define RF_RSSICONFIG_OFFSET_P_03_DB 0x18
igbt6 0:4e8ef5758455 1034 #define RF_RSSICONFIG_OFFSET_P_04_DB 0x20
igbt6 0:4e8ef5758455 1035 #define RF_RSSICONFIG_OFFSET_P_05_DB 0x28
igbt6 0:4e8ef5758455 1036 #define RF_RSSICONFIG_OFFSET_P_06_DB 0x30
igbt6 0:4e8ef5758455 1037 #define RF_RSSICONFIG_OFFSET_P_07_DB 0x38
igbt6 0:4e8ef5758455 1038 #define RF_RSSICONFIG_OFFSET_P_08_DB 0x40
igbt6 0:4e8ef5758455 1039 #define RF_RSSICONFIG_OFFSET_P_09_DB 0x48
igbt6 0:4e8ef5758455 1040 #define RF_RSSICONFIG_OFFSET_P_10_DB 0x50
igbt6 0:4e8ef5758455 1041 #define RF_RSSICONFIG_OFFSET_P_11_DB 0x58
igbt6 0:4e8ef5758455 1042 #define RF_RSSICONFIG_OFFSET_P_12_DB 0x60
igbt6 0:4e8ef5758455 1043 #define RF_RSSICONFIG_OFFSET_P_13_DB 0x68
igbt6 0:4e8ef5758455 1044 #define RF_RSSICONFIG_OFFSET_P_14_DB 0x70
igbt6 0:4e8ef5758455 1045 #define RF_RSSICONFIG_OFFSET_P_15_DB 0x78
igbt6 0:4e8ef5758455 1046 #define RF_RSSICONFIG_OFFSET_M_16_DB 0x80
igbt6 0:4e8ef5758455 1047 #define RF_RSSICONFIG_OFFSET_M_15_DB 0x88
igbt6 0:4e8ef5758455 1048 #define RF_RSSICONFIG_OFFSET_M_14_DB 0x90
igbt6 0:4e8ef5758455 1049 #define RF_RSSICONFIG_OFFSET_M_13_DB 0x98
igbt6 0:4e8ef5758455 1050 #define RF_RSSICONFIG_OFFSET_M_12_DB 0xA0
igbt6 0:4e8ef5758455 1051 #define RF_RSSICONFIG_OFFSET_M_11_DB 0xA8
igbt6 0:4e8ef5758455 1052 #define RF_RSSICONFIG_OFFSET_M_10_DB 0xB0
igbt6 0:4e8ef5758455 1053 #define RF_RSSICONFIG_OFFSET_M_09_DB 0xB8
igbt6 0:4e8ef5758455 1054 #define RF_RSSICONFIG_OFFSET_M_08_DB 0xC0
igbt6 0:4e8ef5758455 1055 #define RF_RSSICONFIG_OFFSET_M_07_DB 0xC8
igbt6 0:4e8ef5758455 1056 #define RF_RSSICONFIG_OFFSET_M_06_DB 0xD0
igbt6 0:4e8ef5758455 1057 #define RF_RSSICONFIG_OFFSET_M_05_DB 0xD8
igbt6 0:4e8ef5758455 1058 #define RF_RSSICONFIG_OFFSET_M_04_DB 0xE0
igbt6 0:4e8ef5758455 1059 #define RF_RSSICONFIG_OFFSET_M_03_DB 0xE8
igbt6 0:4e8ef5758455 1060 #define RF_RSSICONFIG_OFFSET_M_02_DB 0xF0
igbt6 0:4e8ef5758455 1061 #define RF_RSSICONFIG_OFFSET_M_01_DB 0xF8
igbt6 0:4e8ef5758455 1062
igbt6 0:4e8ef5758455 1063 #define RF_RSSICONFIG_SMOOTHING_MASK 0xF8
igbt6 0:4e8ef5758455 1064 #define RF_RSSICONFIG_SMOOTHING_2 0x00
igbt6 0:4e8ef5758455 1065 #define RF_RSSICONFIG_SMOOTHING_4 0x01
igbt6 0:4e8ef5758455 1066 #define RF_RSSICONFIG_SMOOTHING_8 0x02 // Default
igbt6 0:4e8ef5758455 1067 #define RF_RSSICONFIG_SMOOTHING_16 0x03
igbt6 0:4e8ef5758455 1068 #define RF_RSSICONFIG_SMOOTHING_32 0x04
igbt6 0:4e8ef5758455 1069 #define RF_RSSICONFIG_SMOOTHING_64 0x05
igbt6 0:4e8ef5758455 1070 #define RF_RSSICONFIG_SMOOTHING_128 0x06
igbt6 0:4e8ef5758455 1071 #define RF_RSSICONFIG_SMOOTHING_256 0x07
igbt6 0:4e8ef5758455 1072
igbt6 0:4e8ef5758455 1073 /*!
igbt6 0:4e8ef5758455 1074 * RegRssiCollision
igbt6 0:4e8ef5758455 1075 */
igbt6 0:4e8ef5758455 1076 #define RF_RSSICOLISION_THRESHOLD 0x0A // Default
igbt6 0:4e8ef5758455 1077
igbt6 0:4e8ef5758455 1078 /*!
igbt6 0:4e8ef5758455 1079 * RegRssiThresh
igbt6 0:4e8ef5758455 1080 */
igbt6 0:4e8ef5758455 1081 #define RF_RSSITHRESH_THRESHOLD 0xFF // Default
igbt6 0:4e8ef5758455 1082
igbt6 0:4e8ef5758455 1083 /*!
igbt6 0:4e8ef5758455 1084 * RegRssiValue (Read Only)
igbt6 0:4e8ef5758455 1085 */
igbt6 0:4e8ef5758455 1086
igbt6 0:4e8ef5758455 1087 /*!
igbt6 0:4e8ef5758455 1088 * RegRxBw
igbt6 0:4e8ef5758455 1089 */
igbt6 0:4e8ef5758455 1090 #define RF_RXBW_MANT_MASK 0xE7
igbt6 0:4e8ef5758455 1091 #define RF_RXBW_MANT_16 0x00
igbt6 0:4e8ef5758455 1092 #define RF_RXBW_MANT_20 0x08
igbt6 0:4e8ef5758455 1093 #define RF_RXBW_MANT_24 0x10 // Default
igbt6 0:4e8ef5758455 1094
igbt6 0:4e8ef5758455 1095 #define RF_RXBW_EXP_MASK 0xF8
igbt6 0:4e8ef5758455 1096 #define RF_RXBW_EXP_0 0x00
igbt6 0:4e8ef5758455 1097 #define RF_RXBW_EXP_1 0x01
igbt6 0:4e8ef5758455 1098 #define RF_RXBW_EXP_2 0x02
igbt6 0:4e8ef5758455 1099 #define RF_RXBW_EXP_3 0x03
igbt6 0:4e8ef5758455 1100 #define RF_RXBW_EXP_4 0x04
igbt6 0:4e8ef5758455 1101 #define RF_RXBW_EXP_5 0x05 // Default
igbt6 0:4e8ef5758455 1102 #define RF_RXBW_EXP_6 0x06
igbt6 0:4e8ef5758455 1103 #define RF_RXBW_EXP_7 0x07
igbt6 0:4e8ef5758455 1104
igbt6 0:4e8ef5758455 1105 /*!
igbt6 0:4e8ef5758455 1106 * RegAfcBw
igbt6 0:4e8ef5758455 1107 */
igbt6 0:4e8ef5758455 1108 #define RF_AFCBW_MANTAFC_MASK 0xE7
igbt6 0:4e8ef5758455 1109 #define RF_AFCBW_MANTAFC_16 0x00
igbt6 0:4e8ef5758455 1110 #define RF_AFCBW_MANTAFC_20 0x08 // Default
igbt6 0:4e8ef5758455 1111 #define RF_AFCBW_MANTAFC_24 0x10
igbt6 0:4e8ef5758455 1112
igbt6 0:4e8ef5758455 1113 #define RF_AFCBW_EXPAFC_MASK 0xF8
igbt6 0:4e8ef5758455 1114 #define RF_AFCBW_EXPAFC_0 0x00
igbt6 0:4e8ef5758455 1115 #define RF_AFCBW_EXPAFC_1 0x01
igbt6 0:4e8ef5758455 1116 #define RF_AFCBW_EXPAFC_2 0x02
igbt6 0:4e8ef5758455 1117 #define RF_AFCBW_EXPAFC_3 0x03 // Default
igbt6 0:4e8ef5758455 1118 #define RF_AFCBW_EXPAFC_4 0x04
igbt6 0:4e8ef5758455 1119 #define RF_AFCBW_EXPAFC_5 0x05
igbt6 0:4e8ef5758455 1120 #define RF_AFCBW_EXPAFC_6 0x06
igbt6 0:4e8ef5758455 1121 #define RF_AFCBW_EXPAFC_7 0x07
igbt6 0:4e8ef5758455 1122
igbt6 0:4e8ef5758455 1123 /*!
igbt6 0:4e8ef5758455 1124 * RegOokPeak
igbt6 0:4e8ef5758455 1125 */
igbt6 0:4e8ef5758455 1126 #define RF_OOKPEAK_BITSYNC_MASK 0xDF // Default
igbt6 0:4e8ef5758455 1127 #define RF_OOKPEAK_BITSYNC_ON 0x20 // Default
igbt6 0:4e8ef5758455 1128 #define RF_OOKPEAK_BITSYNC_OFF 0x00
igbt6 0:4e8ef5758455 1129
igbt6 0:4e8ef5758455 1130 #define RF_OOKPEAK_OOKTHRESHTYPE_MASK 0xE7
igbt6 0:4e8ef5758455 1131 #define RF_OOKPEAK_OOKTHRESHTYPE_FIXED 0x00
igbt6 0:4e8ef5758455 1132 #define RF_OOKPEAK_OOKTHRESHTYPE_PEAK 0x08 // Default
igbt6 0:4e8ef5758455 1133 #define RF_OOKPEAK_OOKTHRESHTYPE_AVERAGE 0x10
igbt6 0:4e8ef5758455 1134
igbt6 0:4e8ef5758455 1135 #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_MASK 0xF8
igbt6 0:4e8ef5758455 1136 #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_0_5_DB 0x00 // Default
igbt6 0:4e8ef5758455 1137 #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_1_0_DB 0x01
igbt6 0:4e8ef5758455 1138 #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_1_5_DB 0x02
igbt6 0:4e8ef5758455 1139 #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_2_0_DB 0x03
igbt6 0:4e8ef5758455 1140 #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_3_0_DB 0x04
igbt6 0:4e8ef5758455 1141 #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_4_0_DB 0x05
igbt6 0:4e8ef5758455 1142 #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_5_0_DB 0x06
igbt6 0:4e8ef5758455 1143 #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_6_0_DB 0x07
igbt6 0:4e8ef5758455 1144
igbt6 0:4e8ef5758455 1145 /*!
igbt6 0:4e8ef5758455 1146 * RegOokFix
igbt6 0:4e8ef5758455 1147 */
igbt6 0:4e8ef5758455 1148 #define RF_OOKFIX_OOKFIXEDTHRESHOLD 0x0C // Default
igbt6 0:4e8ef5758455 1149
igbt6 0:4e8ef5758455 1150 /*!
igbt6 0:4e8ef5758455 1151 * RegOokAvg
igbt6 0:4e8ef5758455 1152 */
igbt6 0:4e8ef5758455 1153 #define RF_OOKAVG_OOKPEAKTHRESHDEC_MASK 0x1F
igbt6 0:4e8ef5758455 1154 #define RF_OOKAVG_OOKPEAKTHRESHDEC_000 0x00 // Default
igbt6 0:4e8ef5758455 1155 #define RF_OOKAVG_OOKPEAKTHRESHDEC_001 0x20
igbt6 0:4e8ef5758455 1156 #define RF_OOKAVG_OOKPEAKTHRESHDEC_010 0x40
igbt6 0:4e8ef5758455 1157 #define RF_OOKAVG_OOKPEAKTHRESHDEC_011 0x60
igbt6 0:4e8ef5758455 1158 #define RF_OOKAVG_OOKPEAKTHRESHDEC_100 0x80
igbt6 0:4e8ef5758455 1159 #define RF_OOKAVG_OOKPEAKTHRESHDEC_101 0xA0
igbt6 0:4e8ef5758455 1160 #define RF_OOKAVG_OOKPEAKTHRESHDEC_110 0xC0
igbt6 0:4e8ef5758455 1161 #define RF_OOKAVG_OOKPEAKTHRESHDEC_111 0xE0
igbt6 0:4e8ef5758455 1162
igbt6 0:4e8ef5758455 1163 #define RF_OOKAVG_AVERAGEOFFSET_MASK 0xF3
igbt6 0:4e8ef5758455 1164 #define RF_OOKAVG_AVERAGEOFFSET_0_DB 0x00 // Default
igbt6 0:4e8ef5758455 1165 #define RF_OOKAVG_AVERAGEOFFSET_2_DB 0x04
igbt6 0:4e8ef5758455 1166 #define RF_OOKAVG_AVERAGEOFFSET_4_DB 0x08
igbt6 0:4e8ef5758455 1167 #define RF_OOKAVG_AVERAGEOFFSET_6_DB 0x0C
igbt6 0:4e8ef5758455 1168
igbt6 0:4e8ef5758455 1169 #define RF_OOKAVG_OOKAVERAGETHRESHFILT_MASK 0xFC
igbt6 0:4e8ef5758455 1170 #define RF_OOKAVG_OOKAVERAGETHRESHFILT_00 0x00
igbt6 0:4e8ef5758455 1171 #define RF_OOKAVG_OOKAVERAGETHRESHFILT_01 0x01
igbt6 0:4e8ef5758455 1172 #define RF_OOKAVG_OOKAVERAGETHRESHFILT_10 0x02 // Default
igbt6 0:4e8ef5758455 1173 #define RF_OOKAVG_OOKAVERAGETHRESHFILT_11 0x03
igbt6 0:4e8ef5758455 1174
igbt6 0:4e8ef5758455 1175 /*!
igbt6 0:4e8ef5758455 1176 * RegAfcFei
igbt6 0:4e8ef5758455 1177 */
igbt6 0:4e8ef5758455 1178 #define RF_AFCFEI_AGCSTART 0x10
igbt6 0:4e8ef5758455 1179
igbt6 0:4e8ef5758455 1180 #define RF_AFCFEI_AFCCLEAR 0x02
igbt6 0:4e8ef5758455 1181
igbt6 0:4e8ef5758455 1182 #define RF_AFCFEI_AFCAUTOCLEAR_MASK 0xFE
igbt6 0:4e8ef5758455 1183 #define RF_AFCFEI_AFCAUTOCLEAR_ON 0x01
igbt6 0:4e8ef5758455 1184 #define RF_AFCFEI_AFCAUTOCLEAR_OFF 0x00 // Default
igbt6 0:4e8ef5758455 1185
igbt6 0:4e8ef5758455 1186 /*!
igbt6 0:4e8ef5758455 1187 * RegAfcMsb (Read Only)
igbt6 0:4e8ef5758455 1188 */
igbt6 0:4e8ef5758455 1189
igbt6 0:4e8ef5758455 1190 /*!
igbt6 0:4e8ef5758455 1191 * RegAfcLsb (Read Only)
igbt6 0:4e8ef5758455 1192 */
igbt6 0:4e8ef5758455 1193
igbt6 0:4e8ef5758455 1194 /*!
igbt6 0:4e8ef5758455 1195 * RegFeiMsb (Read Only)
igbt6 0:4e8ef5758455 1196 */
igbt6 0:4e8ef5758455 1197
igbt6 0:4e8ef5758455 1198 /*!
igbt6 0:4e8ef5758455 1199 * RegFeiLsb (Read Only)
igbt6 0:4e8ef5758455 1200 */
igbt6 0:4e8ef5758455 1201
igbt6 0:4e8ef5758455 1202 /*!
igbt6 0:4e8ef5758455 1203 * RegPreambleDetect
igbt6 0:4e8ef5758455 1204 */
igbt6 0:4e8ef5758455 1205 #define RF_PREAMBLEDETECT_DETECTOR_MASK 0x7F
igbt6 0:4e8ef5758455 1206 #define RF_PREAMBLEDETECT_DETECTOR_ON 0x80 // Default
igbt6 0:4e8ef5758455 1207 #define RF_PREAMBLEDETECT_DETECTOR_OFF 0x00
igbt6 0:4e8ef5758455 1208
igbt6 0:4e8ef5758455 1209 #define RF_PREAMBLEDETECT_DETECTORSIZE_MASK 0x9F
igbt6 0:4e8ef5758455 1210 #define RF_PREAMBLEDETECT_DETECTORSIZE_1 0x00
igbt6 0:4e8ef5758455 1211 #define RF_PREAMBLEDETECT_DETECTORSIZE_2 0x20 // Default
igbt6 0:4e8ef5758455 1212 #define RF_PREAMBLEDETECT_DETECTORSIZE_3 0x40
igbt6 0:4e8ef5758455 1213 #define RF_PREAMBLEDETECT_DETECTORSIZE_4 0x60
igbt6 0:4e8ef5758455 1214
igbt6 0:4e8ef5758455 1215 #define RF_PREAMBLEDETECT_DETECTORTOL_MASK 0xE0
igbt6 0:4e8ef5758455 1216 #define RF_PREAMBLEDETECT_DETECTORTOL_0 0x00
igbt6 0:4e8ef5758455 1217 #define RF_PREAMBLEDETECT_DETECTORTOL_1 0x01
igbt6 0:4e8ef5758455 1218 #define RF_PREAMBLEDETECT_DETECTORTOL_2 0x02
igbt6 0:4e8ef5758455 1219 #define RF_PREAMBLEDETECT_DETECTORTOL_3 0x03
igbt6 0:4e8ef5758455 1220 #define RF_PREAMBLEDETECT_DETECTORTOL_4 0x04
igbt6 0:4e8ef5758455 1221 #define RF_PREAMBLEDETECT_DETECTORTOL_5 0x05
igbt6 0:4e8ef5758455 1222 #define RF_PREAMBLEDETECT_DETECTORTOL_6 0x06
igbt6 0:4e8ef5758455 1223 #define RF_PREAMBLEDETECT_DETECTORTOL_7 0x07
igbt6 0:4e8ef5758455 1224 #define RF_PREAMBLEDETECT_DETECTORTOL_8 0x08
igbt6 0:4e8ef5758455 1225 #define RF_PREAMBLEDETECT_DETECTORTOL_9 0x09
igbt6 0:4e8ef5758455 1226 #define RF_PREAMBLEDETECT_DETECTORTOL_10 0x0A // Default
igbt6 0:4e8ef5758455 1227 #define RF_PREAMBLEDETECT_DETECTORTOL_11 0x0B
igbt6 0:4e8ef5758455 1228 #define RF_PREAMBLEDETECT_DETECTORTOL_12 0x0C
igbt6 0:4e8ef5758455 1229 #define RF_PREAMBLEDETECT_DETECTORTOL_13 0x0D
igbt6 0:4e8ef5758455 1230 #define RF_PREAMBLEDETECT_DETECTORTOL_14 0x0E
igbt6 0:4e8ef5758455 1231 #define RF_PREAMBLEDETECT_DETECTORTOL_15 0x0F
igbt6 0:4e8ef5758455 1232 #define RF_PREAMBLEDETECT_DETECTORTOL_16 0x10
igbt6 0:4e8ef5758455 1233 #define RF_PREAMBLEDETECT_DETECTORTOL_17 0x11
igbt6 0:4e8ef5758455 1234 #define RF_PREAMBLEDETECT_DETECTORTOL_18 0x12
igbt6 0:4e8ef5758455 1235 #define RF_PREAMBLEDETECT_DETECTORTOL_19 0x13
igbt6 0:4e8ef5758455 1236 #define RF_PREAMBLEDETECT_DETECTORTOL_20 0x14
igbt6 0:4e8ef5758455 1237 #define RF_PREAMBLEDETECT_DETECTORTOL_21 0x15
igbt6 0:4e8ef5758455 1238 #define RF_PREAMBLEDETECT_DETECTORTOL_22 0x16
igbt6 0:4e8ef5758455 1239 #define RF_PREAMBLEDETECT_DETECTORTOL_23 0x17
igbt6 0:4e8ef5758455 1240 #define RF_PREAMBLEDETECT_DETECTORTOL_24 0x18
igbt6 0:4e8ef5758455 1241 #define RF_PREAMBLEDETECT_DETECTORTOL_25 0x19
igbt6 0:4e8ef5758455 1242 #define RF_PREAMBLEDETECT_DETECTORTOL_26 0x1A
igbt6 0:4e8ef5758455 1243 #define RF_PREAMBLEDETECT_DETECTORTOL_27 0x1B
igbt6 0:4e8ef5758455 1244 #define RF_PREAMBLEDETECT_DETECTORTOL_28 0x1C
igbt6 0:4e8ef5758455 1245 #define RF_PREAMBLEDETECT_DETECTORTOL_29 0x1D
igbt6 0:4e8ef5758455 1246 #define RF_PREAMBLEDETECT_DETECTORTOL_30 0x1E
igbt6 0:4e8ef5758455 1247 #define RF_PREAMBLEDETECT_DETECTORTOL_31 0x1F
igbt6 0:4e8ef5758455 1248
igbt6 0:4e8ef5758455 1249 /*!
igbt6 0:4e8ef5758455 1250 * RegRxTimeout1
igbt6 0:4e8ef5758455 1251 */
igbt6 0:4e8ef5758455 1252 #define RF_RXTIMEOUT1_TIMEOUTRXRSSI 0x00 // Default
igbt6 0:4e8ef5758455 1253
igbt6 0:4e8ef5758455 1254 /*!
igbt6 0:4e8ef5758455 1255 * RegRxTimeout2
igbt6 0:4e8ef5758455 1256 */
igbt6 0:4e8ef5758455 1257 #define RF_RXTIMEOUT2_TIMEOUTRXPREAMBLE 0x00 // Default
igbt6 0:4e8ef5758455 1258
igbt6 0:4e8ef5758455 1259 /*!
igbt6 0:4e8ef5758455 1260 * RegRxTimeout3
igbt6 0:4e8ef5758455 1261 */
igbt6 0:4e8ef5758455 1262 #define RF_RXTIMEOUT3_TIMEOUTSIGNALSYNC 0x00 // Default
igbt6 0:4e8ef5758455 1263
igbt6 0:4e8ef5758455 1264 /*!
igbt6 0:4e8ef5758455 1265 * RegRxDelay
igbt6 0:4e8ef5758455 1266 */
igbt6 0:4e8ef5758455 1267 #define RF_RXDELAY_INTERPACKETRXDELAY 0x00 // Default
igbt6 0:4e8ef5758455 1268
igbt6 0:4e8ef5758455 1269 /*!
igbt6 0:4e8ef5758455 1270 * RegOsc
igbt6 0:4e8ef5758455 1271 */
igbt6 0:4e8ef5758455 1272 #define RF_OSC_RCCALSTART 0x08
igbt6 0:4e8ef5758455 1273
igbt6 0:4e8ef5758455 1274 #define RF_OSC_CLKOUT_MASK 0xF8
igbt6 0:4e8ef5758455 1275 #define RF_OSC_CLKOUT_32_MHZ 0x00
igbt6 0:4e8ef5758455 1276 #define RF_OSC_CLKOUT_16_MHZ 0x01
igbt6 0:4e8ef5758455 1277 #define RF_OSC_CLKOUT_8_MHZ 0x02
igbt6 0:4e8ef5758455 1278 #define RF_OSC_CLKOUT_4_MHZ 0x03
igbt6 0:4e8ef5758455 1279 #define RF_OSC_CLKOUT_2_MHZ 0x04
igbt6 0:4e8ef5758455 1280 #define RF_OSC_CLKOUT_1_MHZ 0x05 // Default
igbt6 0:4e8ef5758455 1281 #define RF_OSC_CLKOUT_RC 0x06
igbt6 0:4e8ef5758455 1282 #define RF_OSC_CLKOUT_OFF 0x07
igbt6 0:4e8ef5758455 1283
igbt6 0:4e8ef5758455 1284 /*!
igbt6 0:4e8ef5758455 1285 * RegPreambleMsb/RegPreambleLsb
igbt6 0:4e8ef5758455 1286 */
igbt6 0:4e8ef5758455 1287 #define RF_PREAMBLEMSB_SIZE 0x00 // Default
igbt6 0:4e8ef5758455 1288 #define RF_PREAMBLELSB_SIZE 0x03 // Default
igbt6 0:4e8ef5758455 1289
igbt6 0:4e8ef5758455 1290 /*!
igbt6 0:4e8ef5758455 1291 * RegSyncConfig
igbt6 0:4e8ef5758455 1292 */
igbt6 0:4e8ef5758455 1293 #define RF_SYNCCONFIG_AUTORESTARTRXMODE_MASK 0x3F
igbt6 0:4e8ef5758455 1294 #define RF_SYNCCONFIG_AUTORESTARTRXMODE_WAITPLL_ON 0x80 // Default
igbt6 0:4e8ef5758455 1295 #define RF_SYNCCONFIG_AUTORESTARTRXMODE_WAITPLL_OFF 0x40
igbt6 0:4e8ef5758455 1296 #define RF_SYNCCONFIG_AUTORESTARTRXMODE_OFF 0x00
igbt6 0:4e8ef5758455 1297
igbt6 0:4e8ef5758455 1298
igbt6 0:4e8ef5758455 1299 #define RF_SYNCCONFIG_PREAMBLEPOLARITY_MASK 0xDF
igbt6 0:4e8ef5758455 1300 #define RF_SYNCCONFIG_PREAMBLEPOLARITY_55 0x20
igbt6 0:4e8ef5758455 1301 #define RF_SYNCCONFIG_PREAMBLEPOLARITY_AA 0x00 // Default
igbt6 0:4e8ef5758455 1302
igbt6 0:4e8ef5758455 1303 #define RF_SYNCCONFIG_SYNC_MASK 0xEF
igbt6 0:4e8ef5758455 1304 #define RF_SYNCCONFIG_SYNC_ON 0x10 // Default
igbt6 0:4e8ef5758455 1305 #define RF_SYNCCONFIG_SYNC_OFF 0x00
igbt6 0:4e8ef5758455 1306
igbt6 0:4e8ef5758455 1307
igbt6 0:4e8ef5758455 1308 #define RF_SYNCCONFIG_SYNCSIZE_MASK 0xF8
igbt6 0:4e8ef5758455 1309 #define RF_SYNCCONFIG_SYNCSIZE_1 0x00
igbt6 0:4e8ef5758455 1310 #define RF_SYNCCONFIG_SYNCSIZE_2 0x01
igbt6 0:4e8ef5758455 1311 #define RF_SYNCCONFIG_SYNCSIZE_3 0x02
igbt6 0:4e8ef5758455 1312 #define RF_SYNCCONFIG_SYNCSIZE_4 0x03 // Default
igbt6 0:4e8ef5758455 1313 #define RF_SYNCCONFIG_SYNCSIZE_5 0x04
igbt6 0:4e8ef5758455 1314 #define RF_SYNCCONFIG_SYNCSIZE_6 0x05
igbt6 0:4e8ef5758455 1315 #define RF_SYNCCONFIG_SYNCSIZE_7 0x06
igbt6 0:4e8ef5758455 1316 #define RF_SYNCCONFIG_SYNCSIZE_8 0x07
igbt6 0:4e8ef5758455 1317
igbt6 0:4e8ef5758455 1318 /*!
igbt6 0:4e8ef5758455 1319 * RegSyncValue1-8
igbt6 0:4e8ef5758455 1320 */
igbt6 0:4e8ef5758455 1321 #define RF_SYNCVALUE1_SYNCVALUE 0x01 // Default
igbt6 0:4e8ef5758455 1322 #define RF_SYNCVALUE2_SYNCVALUE 0x01 // Default
igbt6 0:4e8ef5758455 1323 #define RF_SYNCVALUE3_SYNCVALUE 0x01 // Default
igbt6 0:4e8ef5758455 1324 #define RF_SYNCVALUE4_SYNCVALUE 0x01 // Default
igbt6 0:4e8ef5758455 1325 #define RF_SYNCVALUE5_SYNCVALUE 0x01 // Default
igbt6 0:4e8ef5758455 1326 #define RF_SYNCVALUE6_SYNCVALUE 0x01 // Default
igbt6 0:4e8ef5758455 1327 #define RF_SYNCVALUE7_SYNCVALUE 0x01 // Default
igbt6 0:4e8ef5758455 1328 #define RF_SYNCVALUE8_SYNCVALUE 0x01 // Default
igbt6 0:4e8ef5758455 1329
igbt6 0:4e8ef5758455 1330 /*!
igbt6 0:4e8ef5758455 1331 * RegPacketConfig1
igbt6 0:4e8ef5758455 1332 */
igbt6 0:4e8ef5758455 1333 #define RF_PACKETCONFIG1_PACKETFORMAT_MASK 0x7F
igbt6 0:4e8ef5758455 1334 #define RF_PACKETCONFIG1_PACKETFORMAT_FIXED 0x00
igbt6 0:4e8ef5758455 1335 #define RF_PACKETCONFIG1_PACKETFORMAT_VARIABLE 0x80 // Default
igbt6 0:4e8ef5758455 1336
igbt6 0:4e8ef5758455 1337 #define RF_PACKETCONFIG1_DCFREE_MASK 0x9F
igbt6 0:4e8ef5758455 1338 #define RF_PACKETCONFIG1_DCFREE_OFF 0x00 // Default
igbt6 0:4e8ef5758455 1339 #define RF_PACKETCONFIG1_DCFREE_MANCHESTER 0x20
igbt6 0:4e8ef5758455 1340 #define RF_PACKETCONFIG1_DCFREE_WHITENING 0x40
igbt6 0:4e8ef5758455 1341
igbt6 0:4e8ef5758455 1342 #define RF_PACKETCONFIG1_CRC_MASK 0xEF
igbt6 0:4e8ef5758455 1343 #define RF_PACKETCONFIG1_CRC_ON 0x10 // Default
igbt6 0:4e8ef5758455 1344 #define RF_PACKETCONFIG1_CRC_OFF 0x00
igbt6 0:4e8ef5758455 1345
igbt6 0:4e8ef5758455 1346 #define RF_PACKETCONFIG1_CRCAUTOCLEAR_MASK 0xF7
igbt6 0:4e8ef5758455 1347 #define RF_PACKETCONFIG1_CRCAUTOCLEAR_ON 0x00 // Default
igbt6 0:4e8ef5758455 1348 #define RF_PACKETCONFIG1_CRCAUTOCLEAR_OFF 0x08
igbt6 0:4e8ef5758455 1349
igbt6 0:4e8ef5758455 1350 #define RF_PACKETCONFIG1_ADDRSFILTERING_MASK 0xF9
igbt6 0:4e8ef5758455 1351 #define RF_PACKETCONFIG1_ADDRSFILTERING_OFF 0x00 // Default
igbt6 0:4e8ef5758455 1352 #define RF_PACKETCONFIG1_ADDRSFILTERING_NODE 0x02
igbt6 0:4e8ef5758455 1353 #define RF_PACKETCONFIG1_ADDRSFILTERING_NODEBROADCAST 0x04
igbt6 0:4e8ef5758455 1354
igbt6 0:4e8ef5758455 1355 #define RF_PACKETCONFIG1_CRCWHITENINGTYPE_MASK 0xFE
igbt6 0:4e8ef5758455 1356 #define RF_PACKETCONFIG1_CRCWHITENINGTYPE_CCITT 0x00 // Default
igbt6 0:4e8ef5758455 1357 #define RF_PACKETCONFIG1_CRCWHITENINGTYPE_IBM 0x01
igbt6 0:4e8ef5758455 1358
igbt6 0:4e8ef5758455 1359 /*!
igbt6 0:4e8ef5758455 1360 * RegPacketConfig2
igbt6 0:4e8ef5758455 1361 */
igbt6 0:4e8ef5758455 1362
igbt6 0:4e8ef5758455 1363 #define RF_PACKETCONFIG2_WMBUS_CRC_ENABLE_MASK 0x7F
igbt6 0:4e8ef5758455 1364 #define RF_PACKETCONFIG2_WMBUS_CRC_ENABLE 0x80
igbt6 0:4e8ef5758455 1365 #define RF_PACKETCONFIG2_WMBUS_CRC_DISABLE 0x00 // Default
igbt6 0:4e8ef5758455 1366
igbt6 0:4e8ef5758455 1367 #define RF_PACKETCONFIG2_DATAMODE_MASK 0xBF
igbt6 0:4e8ef5758455 1368 #define RF_PACKETCONFIG2_DATAMODE_CONTINUOUS 0x00
igbt6 0:4e8ef5758455 1369 #define RF_PACKETCONFIG2_DATAMODE_PACKET 0x40 // Default
igbt6 0:4e8ef5758455 1370
igbt6 0:4e8ef5758455 1371 #define RF_PACKETCONFIG2_IOHOME_MASK 0xDF
igbt6 0:4e8ef5758455 1372 #define RF_PACKETCONFIG2_IOHOME_ON 0x20
igbt6 0:4e8ef5758455 1373 #define RF_PACKETCONFIG2_IOHOME_OFF 0x00 // Default
igbt6 0:4e8ef5758455 1374
igbt6 0:4e8ef5758455 1375 #define RF_PACKETCONFIG2_BEACON_MASK 0xF7
igbt6 0:4e8ef5758455 1376 #define RF_PACKETCONFIG2_BEACON_ON 0x08
igbt6 0:4e8ef5758455 1377 #define RF_PACKETCONFIG2_BEACON_OFF 0x00 // Default
igbt6 0:4e8ef5758455 1378
igbt6 0:4e8ef5758455 1379 #define RF_PACKETCONFIG2_PAYLOADLENGTH_MSB_MASK 0xF8
igbt6 0:4e8ef5758455 1380
igbt6 0:4e8ef5758455 1381 /*!
igbt6 0:4e8ef5758455 1382 * RegPayloadLength
igbt6 0:4e8ef5758455 1383 */
igbt6 0:4e8ef5758455 1384 #define RF_PAYLOADLENGTH_LENGTH 0x40 // Default
igbt6 0:4e8ef5758455 1385
igbt6 0:4e8ef5758455 1386 /*!
igbt6 0:4e8ef5758455 1387 * RegNodeAdrs
igbt6 0:4e8ef5758455 1388 */
igbt6 0:4e8ef5758455 1389 #define RF_NODEADDRESS_ADDRESS 0x00
igbt6 0:4e8ef5758455 1390
igbt6 0:4e8ef5758455 1391 /*!
igbt6 0:4e8ef5758455 1392 * RegBroadcastAdrs
igbt6 0:4e8ef5758455 1393 */
igbt6 0:4e8ef5758455 1394 #define RF_BROADCASTADDRESS_ADDRESS 0x00
igbt6 0:4e8ef5758455 1395
igbt6 0:4e8ef5758455 1396 /*!
igbt6 0:4e8ef5758455 1397 * RegFifoThresh
igbt6 0:4e8ef5758455 1398 */
igbt6 0:4e8ef5758455 1399 #define RF_FIFOTHRESH_TXSTARTCONDITION_MASK 0x7F
igbt6 0:4e8ef5758455 1400 #define RF_FIFOTHRESH_TXSTARTCONDITION_FIFOTHRESH 0x00 // Default
igbt6 0:4e8ef5758455 1401 #define RF_FIFOTHRESH_TXSTARTCONDITION_FIFONOTEMPTY 0x80
igbt6 0:4e8ef5758455 1402
igbt6 0:4e8ef5758455 1403 #define RF_FIFOTHRESH_FIFOTHRESHOLD_MASK 0xC0
igbt6 0:4e8ef5758455 1404 #define RF_FIFOTHRESH_FIFOTHRESHOLD_THRESHOLD 0x0F // Default
igbt6 0:4e8ef5758455 1405
igbt6 0:4e8ef5758455 1406 /*!
igbt6 0:4e8ef5758455 1407 * RegSeqConfig1
igbt6 0:4e8ef5758455 1408 */
igbt6 0:4e8ef5758455 1409 #define RF_SEQCONFIG1_SEQUENCER_START 0x80
igbt6 0:4e8ef5758455 1410
igbt6 0:4e8ef5758455 1411 #define RF_SEQCONFIG1_SEQUENCER_STOP 0x40
igbt6 0:4e8ef5758455 1412
igbt6 0:4e8ef5758455 1413 #define RF_SEQCONFIG1_IDLEMODE_MASK 0xDF
igbt6 0:4e8ef5758455 1414 #define RF_SEQCONFIG1_IDLEMODE_SLEEP 0x20
igbt6 0:4e8ef5758455 1415 #define RF_SEQCONFIG1_IDLEMODE_STANDBY 0x00 // Default
igbt6 0:4e8ef5758455 1416
igbt6 0:4e8ef5758455 1417 #define RF_SEQCONFIG1_FROMSTART_MASK 0xE7
igbt6 0:4e8ef5758455 1418 #define RF_SEQCONFIG1_FROMSTART_TOLPS 0x00 // Default
igbt6 0:4e8ef5758455 1419 #define RF_SEQCONFIG1_FROMSTART_TORX 0x08
igbt6 0:4e8ef5758455 1420 #define RF_SEQCONFIG1_FROMSTART_TOTX 0x10
igbt6 0:4e8ef5758455 1421 #define RF_SEQCONFIG1_FROMSTART_TOTX_ONFIFOLEVEL 0x18
igbt6 0:4e8ef5758455 1422
igbt6 0:4e8ef5758455 1423 #define RF_SEQCONFIG1_LPS_MASK 0xFB
igbt6 0:4e8ef5758455 1424 #define RF_SEQCONFIG1_LPS_SEQUENCER_OFF 0x00 // Default
igbt6 0:4e8ef5758455 1425 #define RF_SEQCONFIG1_LPS_IDLE 0x04
igbt6 0:4e8ef5758455 1426
igbt6 0:4e8ef5758455 1427 #define RF_SEQCONFIG1_FROMIDLE_MASK 0xFD
igbt6 0:4e8ef5758455 1428 #define RF_SEQCONFIG1_FROMIDLE_TOTX 0x00 // Default
igbt6 0:4e8ef5758455 1429 #define RF_SEQCONFIG1_FROMIDLE_TORX 0x02
igbt6 0:4e8ef5758455 1430
igbt6 0:4e8ef5758455 1431 #define RF_SEQCONFIG1_FROMTX_MASK 0xFE
igbt6 0:4e8ef5758455 1432 #define RF_SEQCONFIG1_FROMTX_TOLPS 0x00 // Default
igbt6 0:4e8ef5758455 1433 #define RF_SEQCONFIG1_FROMTX_TORX 0x01
igbt6 0:4e8ef5758455 1434
igbt6 0:4e8ef5758455 1435 /*!
igbt6 0:4e8ef5758455 1436 * RegSeqConfig2
igbt6 0:4e8ef5758455 1437 */
igbt6 0:4e8ef5758455 1438 #define RF_SEQCONFIG2_FROMRX_MASK 0x1F
igbt6 0:4e8ef5758455 1439 #define RF_SEQCONFIG2_FROMRX_TOUNUSED_000 0x00 // Default
igbt6 0:4e8ef5758455 1440 #define RF_SEQCONFIG2_FROMRX_TORXPKT_ONPLDRDY 0x20
igbt6 0:4e8ef5758455 1441 #define RF_SEQCONFIG2_FROMRX_TOLPS_ONPLDRDY 0x40
igbt6 0:4e8ef5758455 1442 #define RF_SEQCONFIG2_FROMRX_TORXPKT_ONCRCOK 0x60
igbt6 0:4e8ef5758455 1443 #define RF_SEQCONFIG2_FROMRX_TOSEQUENCEROFF_ONRSSI 0x80
igbt6 0:4e8ef5758455 1444 #define RF_SEQCONFIG2_FROMRX_TOSEQUENCEROFF_ONSYNC 0xA0
igbt6 0:4e8ef5758455 1445 #define RF_SEQCONFIG2_FROMRX_TOSEQUENCEROFF_ONPREAMBLE 0xC0
igbt6 0:4e8ef5758455 1446 #define RF_SEQCONFIG2_FROMRX_TOUNUSED_111 0xE0
igbt6 0:4e8ef5758455 1447
igbt6 0:4e8ef5758455 1448 #define RF_SEQCONFIG2_FROMRXTIMEOUT_MASK 0xE7
igbt6 0:4e8ef5758455 1449 #define RF_SEQCONFIG2_FROMRXTIMEOUT_TORXRESTART 0x00 // Default
igbt6 0:4e8ef5758455 1450 #define RF_SEQCONFIG2_FROMRXTIMEOUT_TOTX 0x08
igbt6 0:4e8ef5758455 1451 #define RF_SEQCONFIG2_FROMRXTIMEOUT_TOLPS 0x10
igbt6 0:4e8ef5758455 1452 #define RF_SEQCONFIG2_FROMRXTIMEOUT_TOSEQUENCEROFF 0x18
igbt6 0:4e8ef5758455 1453
igbt6 0:4e8ef5758455 1454 #define RF_SEQCONFIG2_FROMRXPKT_MASK 0xF8
igbt6 0:4e8ef5758455 1455 #define RF_SEQCONFIG2_FROMRXPKT_TOSEQUENCEROFF 0x00 // Default
igbt6 0:4e8ef5758455 1456 #define RF_SEQCONFIG2_FROMRXPKT_TOTX_ONFIFOEMPTY 0x01
igbt6 0:4e8ef5758455 1457 #define RF_SEQCONFIG2_FROMRXPKT_TOLPS 0x02
igbt6 0:4e8ef5758455 1458 #define RF_SEQCONFIG2_FROMRXPKT_TOSYNTHESIZERRX 0x03
igbt6 0:4e8ef5758455 1459 #define RF_SEQCONFIG2_FROMRXPKT_TORX 0x04
igbt6 0:4e8ef5758455 1460
igbt6 0:4e8ef5758455 1461 /*!
igbt6 0:4e8ef5758455 1462 * RegTimerResol
igbt6 0:4e8ef5758455 1463 */
igbt6 0:4e8ef5758455 1464 #define RF_TIMERRESOL_TIMER1RESOL_MASK 0xF3
igbt6 0:4e8ef5758455 1465 #define RF_TIMERRESOL_TIMER1RESOL_OFF 0x00 // Default
igbt6 0:4e8ef5758455 1466 #define RF_TIMERRESOL_TIMER1RESOL_000064_US 0x04
igbt6 0:4e8ef5758455 1467 #define RF_TIMERRESOL_TIMER1RESOL_004100_US 0x08
igbt6 0:4e8ef5758455 1468 #define RF_TIMERRESOL_TIMER1RESOL_262000_US 0x0C
igbt6 0:4e8ef5758455 1469
igbt6 0:4e8ef5758455 1470 #define RF_TIMERRESOL_TIMER2RESOL_MASK 0xFC
igbt6 0:4e8ef5758455 1471 #define RF_TIMERRESOL_TIMER2RESOL_OFF 0x00 // Default
igbt6 0:4e8ef5758455 1472 #define RF_TIMERRESOL_TIMER2RESOL_000064_US 0x01
igbt6 0:4e8ef5758455 1473 #define RF_TIMERRESOL_TIMER2RESOL_004100_US 0x02
igbt6 0:4e8ef5758455 1474 #define RF_TIMERRESOL_TIMER2RESOL_262000_US 0x03
igbt6 0:4e8ef5758455 1475
igbt6 0:4e8ef5758455 1476 /*!
igbt6 0:4e8ef5758455 1477 * RegTimer1Coef
igbt6 0:4e8ef5758455 1478 */
igbt6 0:4e8ef5758455 1479 #define RF_TIMER1COEF_TIMER1COEFFICIENT 0xF5 // Default
igbt6 0:4e8ef5758455 1480
igbt6 0:4e8ef5758455 1481 /*!
igbt6 0:4e8ef5758455 1482 * RegTimer2Coef
igbt6 0:4e8ef5758455 1483 */
igbt6 0:4e8ef5758455 1484 #define RF_TIMER2COEF_TIMER2COEFFICIENT 0x20 // Default
igbt6 0:4e8ef5758455 1485
igbt6 0:4e8ef5758455 1486 /*!
igbt6 0:4e8ef5758455 1487 * RegImageCal
igbt6 0:4e8ef5758455 1488 */
igbt6 0:4e8ef5758455 1489 #define RF_IMAGECAL_AUTOIMAGECAL_MASK 0x7F
igbt6 0:4e8ef5758455 1490 #define RF_IMAGECAL_AUTOIMAGECAL_ON 0x80
igbt6 0:4e8ef5758455 1491 #define RF_IMAGECAL_AUTOIMAGECAL_OFF 0x00 // Default
igbt6 0:4e8ef5758455 1492
igbt6 0:4e8ef5758455 1493 #define RF_IMAGECAL_IMAGECAL_MASK 0xBF
igbt6 0:4e8ef5758455 1494 #define RF_IMAGECAL_IMAGECAL_START 0x40
igbt6 0:4e8ef5758455 1495
igbt6 0:4e8ef5758455 1496 #define RF_IMAGECAL_IMAGECAL_RUNNING 0x20
igbt6 0:4e8ef5758455 1497 #define RF_IMAGECAL_IMAGECAL_DONE 0x00 // Default
igbt6 0:4e8ef5758455 1498
igbt6 0:4e8ef5758455 1499 #define RF_IMAGECAL_TEMPCHANGE_HIGHER 0x08
igbt6 0:4e8ef5758455 1500 #define RF_IMAGECAL_TEMPCHANGE_LOWER 0x00
igbt6 0:4e8ef5758455 1501
igbt6 0:4e8ef5758455 1502 #define RF_IMAGECAL_TEMPTHRESHOLD_MASK 0xF9
igbt6 0:4e8ef5758455 1503 #define RF_IMAGECAL_TEMPTHRESHOLD_05 0x00
igbt6 0:4e8ef5758455 1504 #define RF_IMAGECAL_TEMPTHRESHOLD_10 0x02 // Default
igbt6 0:4e8ef5758455 1505 #define RF_IMAGECAL_TEMPTHRESHOLD_15 0x04
igbt6 0:4e8ef5758455 1506 #define RF_IMAGECAL_TEMPTHRESHOLD_20 0x06
igbt6 0:4e8ef5758455 1507
igbt6 0:4e8ef5758455 1508 #define RF_IMAGECAL_TEMPMONITOR_MASK 0xFE
igbt6 0:4e8ef5758455 1509 #define RF_IMAGECAL_TEMPMONITOR_ON 0x00 // Default
igbt6 0:4e8ef5758455 1510 #define RF_IMAGECAL_TEMPMONITOR_OFF 0x01
igbt6 0:4e8ef5758455 1511
igbt6 0:4e8ef5758455 1512 /*!
igbt6 0:4e8ef5758455 1513 * RegTemp (Read Only)
igbt6 0:4e8ef5758455 1514 */
igbt6 0:4e8ef5758455 1515
igbt6 0:4e8ef5758455 1516 /*!
igbt6 0:4e8ef5758455 1517 * RegLowBat
igbt6 0:4e8ef5758455 1518 */
igbt6 0:4e8ef5758455 1519 #define RF_LOWBAT_MASK 0xF7
igbt6 0:4e8ef5758455 1520 #define RF_LOWBAT_ON 0x08
igbt6 0:4e8ef5758455 1521 #define RF_LOWBAT_OFF 0x00 // Default
igbt6 0:4e8ef5758455 1522
igbt6 0:4e8ef5758455 1523 #define RF_LOWBAT_TRIM_MASK 0xF8
igbt6 0:4e8ef5758455 1524 #define RF_LOWBAT_TRIM_1695 0x00
igbt6 0:4e8ef5758455 1525 #define RF_LOWBAT_TRIM_1764 0x01
igbt6 0:4e8ef5758455 1526 #define RF_LOWBAT_TRIM_1835 0x02 // Default
igbt6 0:4e8ef5758455 1527 #define RF_LOWBAT_TRIM_1905 0x03
igbt6 0:4e8ef5758455 1528 #define RF_LOWBAT_TRIM_1976 0x04
igbt6 0:4e8ef5758455 1529 #define RF_LOWBAT_TRIM_2045 0x05
igbt6 0:4e8ef5758455 1530 #define RF_LOWBAT_TRIM_2116 0x06
igbt6 0:4e8ef5758455 1531 #define RF_LOWBAT_TRIM_2185 0x07
igbt6 0:4e8ef5758455 1532
igbt6 0:4e8ef5758455 1533 /*!
igbt6 0:4e8ef5758455 1534 * RegIrqFlags1
igbt6 0:4e8ef5758455 1535 */
igbt6 0:4e8ef5758455 1536 #define RF_IRQFLAGS1_MODEREADY 0x80
igbt6 0:4e8ef5758455 1537
igbt6 0:4e8ef5758455 1538 #define RF_IRQFLAGS1_RXREADY 0x40
igbt6 0:4e8ef5758455 1539
igbt6 0:4e8ef5758455 1540 #define RF_IRQFLAGS1_TXREADY 0x20
igbt6 0:4e8ef5758455 1541
igbt6 0:4e8ef5758455 1542 #define RF_IRQFLAGS1_PLLLOCK 0x10
igbt6 0:4e8ef5758455 1543
igbt6 0:4e8ef5758455 1544 #define RF_IRQFLAGS1_RSSI 0x08
igbt6 0:4e8ef5758455 1545
igbt6 0:4e8ef5758455 1546 #define RF_IRQFLAGS1_TIMEOUT 0x04
igbt6 0:4e8ef5758455 1547
igbt6 0:4e8ef5758455 1548 #define RF_IRQFLAGS1_PREAMBLEDETECT 0x02
igbt6 0:4e8ef5758455 1549
igbt6 0:4e8ef5758455 1550 #define RF_IRQFLAGS1_SYNCADDRESSMATCH 0x01
igbt6 0:4e8ef5758455 1551
igbt6 0:4e8ef5758455 1552 /*!
igbt6 0:4e8ef5758455 1553 * RegIrqFlags2
igbt6 0:4e8ef5758455 1554 */
igbt6 0:4e8ef5758455 1555 #define RF_IRQFLAGS2_FIFOFULL 0x80
igbt6 0:4e8ef5758455 1556
igbt6 0:4e8ef5758455 1557 #define RF_IRQFLAGS2_FIFOEMPTY 0x40
igbt6 0:4e8ef5758455 1558
igbt6 0:4e8ef5758455 1559 #define RF_IRQFLAGS2_FIFOLEVEL 0x20
igbt6 0:4e8ef5758455 1560
igbt6 0:4e8ef5758455 1561 #define RF_IRQFLAGS2_FIFOOVERRUN 0x10
igbt6 0:4e8ef5758455 1562
igbt6 0:4e8ef5758455 1563 #define RF_IRQFLAGS2_PACKETSENT 0x08
igbt6 0:4e8ef5758455 1564
igbt6 0:4e8ef5758455 1565 #define RF_IRQFLAGS2_PAYLOADREADY 0x04
igbt6 0:4e8ef5758455 1566
igbt6 0:4e8ef5758455 1567 #define RF_IRQFLAGS2_CRCOK 0x02
igbt6 0:4e8ef5758455 1568
igbt6 0:4e8ef5758455 1569 #define RF_IRQFLAGS2_LOWBAT 0x01
igbt6 0:4e8ef5758455 1570
igbt6 0:4e8ef5758455 1571 /*!
igbt6 0:4e8ef5758455 1572 * RegDioMapping1
igbt6 0:4e8ef5758455 1573 */
igbt6 0:4e8ef5758455 1574 #define RF_DIOMAPPING1_DIO0_MASK 0x3F
igbt6 0:4e8ef5758455 1575 #define RF_DIOMAPPING1_DIO0_00 0x00 // Default
igbt6 0:4e8ef5758455 1576 #define RF_DIOMAPPING1_DIO0_01 0x40
igbt6 0:4e8ef5758455 1577 #define RF_DIOMAPPING1_DIO0_10 0x80
igbt6 0:4e8ef5758455 1578 #define RF_DIOMAPPING1_DIO0_11 0xC0
igbt6 0:4e8ef5758455 1579
igbt6 0:4e8ef5758455 1580 #define RF_DIOMAPPING1_DIO1_MASK 0xCF
igbt6 0:4e8ef5758455 1581 #define RF_DIOMAPPING1_DIO1_00 0x00 // Default
igbt6 0:4e8ef5758455 1582 #define RF_DIOMAPPING1_DIO1_01 0x10
igbt6 0:4e8ef5758455 1583 #define RF_DIOMAPPING1_DIO1_10 0x20
igbt6 0:4e8ef5758455 1584 #define RF_DIOMAPPING1_DIO1_11 0x30
igbt6 0:4e8ef5758455 1585
igbt6 0:4e8ef5758455 1586 #define RF_DIOMAPPING1_DIO2_MASK 0xF3
igbt6 0:4e8ef5758455 1587 #define RF_DIOMAPPING1_DIO2_00 0x00 // Default
igbt6 0:4e8ef5758455 1588 #define RF_DIOMAPPING1_DIO2_01 0x04
igbt6 0:4e8ef5758455 1589 #define RF_DIOMAPPING1_DIO2_10 0x08
igbt6 0:4e8ef5758455 1590 #define RF_DIOMAPPING1_DIO2_11 0x0C
igbt6 0:4e8ef5758455 1591
igbt6 0:4e8ef5758455 1592 #define RF_DIOMAPPING1_DIO3_MASK 0xFC
igbt6 0:4e8ef5758455 1593 #define RF_DIOMAPPING1_DIO3_00 0x00 // Default
igbt6 0:4e8ef5758455 1594 #define RF_DIOMAPPING1_DIO3_01 0x01
igbt6 0:4e8ef5758455 1595 #define RF_DIOMAPPING1_DIO3_10 0x02
igbt6 0:4e8ef5758455 1596 #define RF_DIOMAPPING1_DIO3_11 0x03
igbt6 0:4e8ef5758455 1597
igbt6 0:4e8ef5758455 1598 /*!
igbt6 0:4e8ef5758455 1599 * RegDioMapping2
igbt6 0:4e8ef5758455 1600 */
igbt6 0:4e8ef5758455 1601 #define RF_DIOMAPPING2_DIO4_MASK 0x3F
igbt6 0:4e8ef5758455 1602 #define RF_DIOMAPPING2_DIO4_00 0x00 // Default
igbt6 0:4e8ef5758455 1603 #define RF_DIOMAPPING2_DIO4_01 0x40
igbt6 0:4e8ef5758455 1604 #define RF_DIOMAPPING2_DIO4_10 0x80
igbt6 0:4e8ef5758455 1605 #define RF_DIOMAPPING2_DIO4_11 0xC0
igbt6 0:4e8ef5758455 1606
igbt6 0:4e8ef5758455 1607 #define RF_DIOMAPPING2_DIO5_MASK 0xCF
igbt6 0:4e8ef5758455 1608 #define RF_DIOMAPPING2_DIO5_00 0x00 // Default
igbt6 0:4e8ef5758455 1609 #define RF_DIOMAPPING2_DIO5_01 0x10
igbt6 0:4e8ef5758455 1610 #define RF_DIOMAPPING2_DIO5_10 0x20
igbt6 0:4e8ef5758455 1611 #define RF_DIOMAPPING2_DIO5_11 0x30
igbt6 0:4e8ef5758455 1612
igbt6 0:4e8ef5758455 1613 #define RF_DIOMAPPING2_MAP_MASK 0xFE
igbt6 0:4e8ef5758455 1614 #define RF_DIOMAPPING2_MAP_PREAMBLEDETECT 0x01
igbt6 0:4e8ef5758455 1615 #define RF_DIOMAPPING2_MAP_RSSI 0x00 // Default
igbt6 0:4e8ef5758455 1616
igbt6 0:4e8ef5758455 1617 /*!
igbt6 0:4e8ef5758455 1618 * RegVersion (Read Only)
igbt6 0:4e8ef5758455 1619 */
igbt6 0:4e8ef5758455 1620
igbt6 0:4e8ef5758455 1621 /*!
igbt6 0:4e8ef5758455 1622 * RegPllHop
igbt6 0:4e8ef5758455 1623 */
igbt6 0:4e8ef5758455 1624 #define RF_PLLHOP_FASTHOP_MASK 0x7F
igbt6 0:4e8ef5758455 1625 #define RF_PLLHOP_FASTHOP_ON 0x80
igbt6 0:4e8ef5758455 1626 #define RF_PLLHOP_FASTHOP_OFF 0x00 // Default
igbt6 0:4e8ef5758455 1627
igbt6 0:4e8ef5758455 1628 /*!
igbt6 0:4e8ef5758455 1629 * RegTcxo
igbt6 0:4e8ef5758455 1630 */
igbt6 0:4e8ef5758455 1631 #define RF_TCXO_TCXOINPUT_MASK 0xEF
igbt6 0:4e8ef5758455 1632 #define RF_TCXO_TCXOINPUT_ON 0x10
igbt6 0:4e8ef5758455 1633 #define RF_TCXO_TCXOINPUT_OFF 0x00 // Default
igbt6 0:4e8ef5758455 1634
igbt6 0:4e8ef5758455 1635 /*!
igbt6 0:4e8ef5758455 1636 * RegPaDac
igbt6 0:4e8ef5758455 1637 */
igbt6 0:4e8ef5758455 1638 #define RF_PADAC_20DBM_MASK 0xF8
igbt6 0:4e8ef5758455 1639 #define RF_PADAC_20DBM_ON 0x07
igbt6 0:4e8ef5758455 1640 #define RF_PADAC_20DBM_OFF 0x04 // Default
igbt6 0:4e8ef5758455 1641
igbt6 0:4e8ef5758455 1642 /*!
igbt6 0:4e8ef5758455 1643 * RegFormerTemp
igbt6 0:4e8ef5758455 1644 */
igbt6 0:4e8ef5758455 1645
igbt6 0:4e8ef5758455 1646 /*!
igbt6 0:4e8ef5758455 1647 * RegBitrateFrac
igbt6 0:4e8ef5758455 1648 */
igbt6 0:4e8ef5758455 1649 #define RF_BITRATEFRAC_MASK 0xF0
igbt6 0:4e8ef5758455 1650
igbt6 0:4e8ef5758455 1651 /*!
igbt6 0:4e8ef5758455 1652 * RegAgcRef
igbt6 0:4e8ef5758455 1653 */
igbt6 0:4e8ef5758455 1654
igbt6 0:4e8ef5758455 1655 /*!
igbt6 0:4e8ef5758455 1656 * RegAgcThresh1
igbt6 0:4e8ef5758455 1657 */
igbt6 0:4e8ef5758455 1658
igbt6 0:4e8ef5758455 1659 /*!
igbt6 0:4e8ef5758455 1660 * RegAgcThresh2
igbt6 0:4e8ef5758455 1661 */
igbt6 0:4e8ef5758455 1662
igbt6 0:4e8ef5758455 1663 /*!
igbt6 0:4e8ef5758455 1664 * RegAgcThresh3
igbt6 0:4e8ef5758455 1665 */
igbt6 0:4e8ef5758455 1666
igbt6 0:4e8ef5758455 1667 /*!
igbt6 0:4e8ef5758455 1668 * RegPll
igbt6 0:4e8ef5758455 1669 */
igbt6 0:4e8ef5758455 1670 #define RF_PLL_BANDWIDTH_MASK 0x3F
igbt6 0:4e8ef5758455 1671 #define RF_PLL_BANDWIDTH_75 0x00
igbt6 0:4e8ef5758455 1672 #define RF_PLL_BANDWIDTH_150 0x40
igbt6 0:4e8ef5758455 1673 #define RF_PLL_BANDWIDTH_225 0x80
igbt6 0:4e8ef5758455 1674 #define RF_PLL_BANDWIDTH_300 0xC0 // Default
igbt6 0:4e8ef5758455 1675
igbt6 0:4e8ef5758455 1676
igbt6 0:4e8ef5758455 1677
igbt6 0:4e8ef5758455 1678
igbt6 0:4e8ef5758455 1679
igbt6 0:4e8ef5758455 1680
igbt6 0:4e8ef5758455 1681
igbt6 0:4e8ef5758455 1682
igbt6 0:4e8ef5758455 1683
igbt6 0:4e8ef5758455 1684
igbt6 0:4e8ef5758455 1685
igbt6 0:4e8ef5758455 1686 #endif // __REGISTERS_H__