Zoltan Hudak / mbed-STM32F103C8T6

mbed support for STM32F103C8T6 (Blue Pill) boards

Dependents:   STM32F103C8T6_nRF24L01P_Hello_World Serial_over_Ethernet STM32F103C8T6_LoRaWAN-lmic-app STM32F103C8T6_WebUSBDFU ... more

Demo program and additional info:

Import programSTM32F103C8T6_Hello

Using low cost Bluepill (STM32F103C8T6) boards with mbed.

Last commit 05 Feb 2019 by Zoltan Hudak

Files at this revision

API Documentation at this revision

Revision 5:9fbbea76d6f6, committed 2016-08-02

Comitter:
hudakz
Date:
Tue Aug 02 19:37:40 2016 +0000
Parent:
4:306609fe9dc8
Child:
6:e35173aca75e
Child:
8:2582ee8cc84c
Commit message:
USB clock implemented

Changed in this revision

SysClockConf.cpp Show annotated file Show diff for this revision Revisions of this file
SysClockConf.h Show annotated file Show diff for this revision Revisions of this file 
--- a/SysClockConf.cpp	Tue Jul 05 21:02:59 2016 +0000
+++ b/SysClockConf.cpp	Tue Aug 02 19:37:40 2016 +0000
@@ -29,7 +29,7 @@
 #include "SysClockConf.h"
 #include "mbed.h"
 
-bool HSE_SystemClock_Config(int freq) {
+bool HSE_SystemClock_Config(void) {
     RCC_OscInitTypeDef RCC_OscInitStruct;
 
     RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
@@ -37,16 +37,7 @@
     RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
     RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
     RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
-    switch(freq) {
-    case 36:
-        RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
-        break;
-    case 48:
-        RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL6;
-        break;
-    default:
-        RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
-    }
+    RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
 
     if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
         return false;
@@ -67,26 +58,17 @@
     RCC_PeriphCLKInitTypeDef PeriphClkInit;
 
     PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC|RCC_PERIPHCLK_USB;
-    switch(freq) {
-    case 36:
-        PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6;
-        break;
-    case 48:
-        PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV4;
-        break;
-    default:
-        PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6;
-    }
-    PeriphClkInit.UsbClockSelection = RCC_USBPLLCLK_DIV1;
+    PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6;
+    PeriphClkInit.UsbClockSelection = RCC_USBPLLCLK_DIV1_5;
     if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) {
         return false;
     }
     return true;
 }
 
-bool confSysClock(int freq) {
+bool confSysClock(void) {
     HAL_RCC_DeInit();
-    if (!HSE_SystemClock_Config(freq)) {
+    if (!HSE_SystemClock_Config()) {
         return false;
     }
     SystemCoreClockUpdate();
@@ -94,3 +76,4 @@
 }
 
 
+

--- a/SysClockConf.h	Tue Jul 05 21:02:59 2016 +0000
+++ b/SysClockConf.h	Tue Aug 02 19:37:40 2016 +0000
@@ -1,2 +1,2 @@
 #pragma once
-bool confSysClock(int freq = 36 /*MHz*/);
+bool confSysClock(void);