Zoltan Hudak / Mbed OS LCD_McuFriend_FSMC_STM32F407

3.5" inch TFT LCD Display Module 480X320 driven with FSMC.

TFT LCD Display Module 480X320 driven with FSMC

I have recently bought a 3.5" inch TFT LCD Touch Screen Display Module 480X320 with a www.mcufriend.com label on the back side. The display was equipped with an 8bit parallel interface. First I decided to test it with the UniGraphic library using the BUS_8 protocol. The display was very slow but improved when I switched to the PAR_8 protocol. Because I heard about the possibility to use a Flexible Static Memory Controller (FSMC), built into some STM MCU's, to drive LCD's (read/write to LCD's memory rather than to an external SRAM) I thought it would be a fun to try it out.

https://os.mbed.com/media/uploads/hudakz/lcd_3.5_tft_480x320_mcufriend_front.png

Below is the brief story of what I did:

  • Selected FSMC in the Connectivity category and configured it as below: https://os.mbed.com/media/uploads/hudakz/arch_max_fsmc_conf.png
  • Let the STM32CubeIDE generate the code (files).
  • Created a new program for the Seeed Arch Max target in the Mbed Online Compiler by selecting a mbed os blinky template.
  • Replaced the main.cpp with the main.c content of the STM32CubeIDE project.
  • Copy & Pasted the other files with codes from the STM32CubeIDE project to the online compiler project.
  • Renamed and modified:
    "stm32f4xx_it.h" to "stm32f4xx_it_msp.h"
    "stm32f4xx_it.c" to "stm32f4xx_it_msp.c"
  • Added the UniGraphic library to the online compiler project.
  • Extended the UniGraphic library with a FSMC_8 protocol and replaced the TFT::set_orientation(int orient) function with the one used by mcufriend for arduino.
  • Modified the main.cpp as needed.
https://os.mbed.com/media/uploads/hudakz/stm32f407vet6_st-link03.pnghttps://os.mbed.com/media/uploads/hudakz/lcd_3.5_tft_480x320_mcufriend_back.png


Wiring

STM32F407VETFT LCD module
+3.3V3V3
GNDGND
PB_12LCD_RST
GNDLCD_CS
PD_13 (RS)LCD_RS
PD_5 (WR)LCD_WR
PD_4 (RD)LCD_RD
PD_14 (DB00)LCD_D0
PD_15 (DB01)LCD_D1
PD_0 (DB02)LCD_D2
PD_1 (DB03)LCD_D3
PE_7 (DB04)LCD_D4
PE_8 (DB05)LCD_D5
PE_9 (DB06)LCD_D6
PE_10 (DB07)LCD_D7



Results
Execution times
Used protocolBUS_8FSMC_8
Operation \ Timemsms
Clear2283.98038.454
Plot192.06611.365
8bit BMP63.80541.338
Large Font163.8727.895
Sparce pixels2072.265/1458.05174.107/52.168
16bit BMP2288.58959.904

UniGraphic/Protocols/SPI8.cpp@1:47c996032a9e, 2020-09-25 (annotated)

Committer:
hudakz
Date:
Fri Sep 25 14:52:27 2020 +0000
Revision:
1:47c996032a9e
Parent:
0:fa952828e34c 
3.5" inch TFT LCD Display Module 480X320 driven with FSMC.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
hudakz 0:fa952828e34c 1 /* mbed UniGraphic library - SPI8 protocol class
hudakz 0:fa952828e34c 2 * Copyright (c) 2015 Giuliano Dianda
hudakz 0:fa952828e34c 3 * Released under the MIT License: http://mbed.org/license/mit
hudakz 0:fa952828e34c 4 *
hudakz 0:fa952828e34c 5 * Derived work of:
hudakz 0:fa952828e34c 6 *
hudakz 0:fa952828e34c 7 * mbed library for 240*320 pixel display TFT based on ILI9341 LCD Controller
hudakz 0:fa952828e34c 8 * Copyright (c) 2013 Peter Drescher - DC2PD
hudakz 0:fa952828e34c 9 *
hudakz 0:fa952828e34c 10 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
hudakz 0:fa952828e34c 11 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
hudakz 0:fa952828e34c 12 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
hudakz 0:fa952828e34c 13 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
hudakz 0:fa952828e34c 14 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
hudakz 0:fa952828e34c 15 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
hudakz 0:fa952828e34c 16 * THE SOFTWARE.
hudakz 0:fa952828e34c 17 */
hudakz 0:fa952828e34c 18
hudakz 0:fa952828e34c 19 #include "SPI8.h"
hudakz 0:fa952828e34c 20
hudakz 0:fa952828e34c 21
hudakz 0:fa952828e34c 22 SPI8::SPI8(int Hz, PinName mosi, PinName miso, PinName sclk, PinName CS, PinName reset, PinName DC)
hudakz 0:fa952828e34c 23 : _CS(CS), _spi(mosi, miso, sclk), _reset(reset), _DC(DC)
hudakz 0:fa952828e34c 24 {
hudakz 0:fa952828e34c 25 _reset = 1;
hudakz 0:fa952828e34c 26 _DC=1;
hudakz 0:fa952828e34c 27 _CS=1;
hudakz 0:fa952828e34c 28 _spi.format(8,0); // 8 bit spi mode 0
hudakz 0:fa952828e34c 29 _spi.frequency(Hz);
hudakz 0:fa952828e34c 30 hw_reset();
hudakz 0:fa952828e34c 31 }
hudakz 0:fa952828e34c 32
hudakz 0:fa952828e34c 33 void SPI8::wr_cmd8(unsigned char cmd)
hudakz 0:fa952828e34c 34 {
hudakz 0:fa952828e34c 35 _DC.write(0); // 0=cmd
hudakz 0:fa952828e34c 36 _spi.write(cmd); // write 8bit
hudakz 0:fa952828e34c 37 _DC.write(1); // 1=data next
hudakz 0:fa952828e34c 38 }
hudakz 0:fa952828e34c 39 void SPI8::wr_data8(unsigned char data)
hudakz 0:fa952828e34c 40 {
hudakz 0:fa952828e34c 41 _spi.write(data); // write 8bit
hudakz 0:fa952828e34c 42 }
hudakz 0:fa952828e34c 43 void SPI8::wr_cmd16(unsigned short cmd)
hudakz 0:fa952828e34c 44 {
hudakz 0:fa952828e34c 45 _DC.write(0); // 0=cmd
hudakz 0:fa952828e34c 46 _spi.write(cmd>>8); // write 8bit
hudakz 0:fa952828e34c 47 _spi.write(cmd&0xFF); // write 8bit
hudakz 0:fa952828e34c 48 _DC.write(1); // 1=data next
hudakz 0:fa952828e34c 49 }
hudakz 0:fa952828e34c 50 void SPI8::wr_data16(unsigned short data)
hudakz 0:fa952828e34c 51 {
hudakz 0:fa952828e34c 52 _spi.write(data>>8); // write 8bit
hudakz 0:fa952828e34c 53 _spi.write(data&0xFF); // write 8bit
hudakz 0:fa952828e34c 54 }
hudakz 0:fa952828e34c 55 void SPI8::wr_gram(unsigned short data)
hudakz 0:fa952828e34c 56 {
hudakz 0:fa952828e34c 57 _spi.write(data>>8); // write 8bit
hudakz 0:fa952828e34c 58 _spi.write(data&0xFF); // write 8bit
hudakz 0:fa952828e34c 59 }
hudakz 0:fa952828e34c 60 void SPI8::wr_gram(unsigned short data, unsigned int count)
hudakz 0:fa952828e34c 61 {
hudakz 0:fa952828e34c 62 if((data>>8)==(data&0xFF))
hudakz 0:fa952828e34c 63 {
hudakz 0:fa952828e34c 64 count<<=1;
hudakz 0:fa952828e34c 65 while(count)
hudakz 0:fa952828e34c 66 {
hudakz 0:fa952828e34c 67 _spi.write(data); // write 8bit
hudakz 0:fa952828e34c 68 count--;
hudakz 0:fa952828e34c 69 }
hudakz 0:fa952828e34c 70 }
hudakz 0:fa952828e34c 71 else
hudakz 0:fa952828e34c 72 {
hudakz 0:fa952828e34c 73 while(count)
hudakz 0:fa952828e34c 74 {
hudakz 0:fa952828e34c 75 _spi.write(data>>8); // write 8bit
hudakz 0:fa952828e34c 76 _spi.write(data&0xFF); // write 8bit
hudakz 0:fa952828e34c 77 count--;
hudakz 0:fa952828e34c 78 }
hudakz 0:fa952828e34c 79 }
hudakz 0:fa952828e34c 80 }
hudakz 0:fa952828e34c 81 void SPI8::wr_grambuf(unsigned short* data, unsigned int lenght)
hudakz 0:fa952828e34c 82 {
hudakz 0:fa952828e34c 83 while(lenght)
hudakz 0:fa952828e34c 84 {
hudakz 0:fa952828e34c 85 _spi.write((*data)>>8); // write 8bit
hudakz 0:fa952828e34c 86 _spi.write((*data)&0xFF); // write 8bit
hudakz 0:fa952828e34c 87 data++;
hudakz 0:fa952828e34c 88 lenght--;
hudakz 0:fa952828e34c 89 }
hudakz 0:fa952828e34c 90 }
hudakz 0:fa952828e34c 91 unsigned short SPI8::rd_gram(bool convert)
hudakz 0:fa952828e34c 92 {
hudakz 0:fa952828e34c 93 unsigned int r=0;
hudakz 0:fa952828e34c 94 _spi.write(0); // whole first byte is dummy
hudakz 0:fa952828e34c 95 r |= _spi.write(0);
hudakz 0:fa952828e34c 96 r <<= 8;
hudakz 0:fa952828e34c 97 r |= _spi.write(0);
hudakz 0:fa952828e34c 98 if(convert)
hudakz 0:fa952828e34c 99 {
hudakz 0:fa952828e34c 100 r <<= 8;
hudakz 0:fa952828e34c 101 r |= _spi.write(0);
hudakz 0:fa952828e34c 102 // gram is 18bit/pixel, if you set 16bit/pixel (cmd 3A), during writing the 16bits are expanded to 18bit
hudakz 0:fa952828e34c 103 // during reading, you read the raw 18bit gram
hudakz 0:fa952828e34c 104 r = RGB24to16((r&0xFF0000)>>16, (r&0xFF00)>>8, r&0xFF);// 18bit pixel padded to 24bits, rrrrrr00_gggggg00_bbbbbb00, converted to 16bit
hudakz 0:fa952828e34c 105 }
hudakz 0:fa952828e34c 106 _CS = 1; // force CS HIG to interupt the "read state"
hudakz 0:fa952828e34c 107 _CS = 0;
hudakz 0:fa952828e34c 108 return (unsigned short)r;
hudakz 0:fa952828e34c 109 }
hudakz 0:fa952828e34c 110 unsigned int SPI8::rd_reg_data32(unsigned char reg)
hudakz 0:fa952828e34c 111 {
hudakz 0:fa952828e34c 112 wr_cmd8(reg);
hudakz 0:fa952828e34c 113 unsigned int r=0;
hudakz 0:fa952828e34c 114
hudakz 0:fa952828e34c 115 r |= _spi.write(0); // we get only 7bit valid, first bit was the dummy cycle
hudakz 0:fa952828e34c 116 r <<= 8;
hudakz 0:fa952828e34c 117 r |= _spi.write(0);
hudakz 0:fa952828e34c 118 r <<= 8;
hudakz 0:fa952828e34c 119 r |= _spi.write(0);
hudakz 0:fa952828e34c 120 r <<= 8;
hudakz 0:fa952828e34c 121 r |= _spi.write(0);
hudakz 0:fa952828e34c 122 r <<= 1; // 32bits are aligned, now collecting bit_0
hudakz 0:fa952828e34c 123 r |= (_spi.write(0) >> 7);
hudakz 0:fa952828e34c 124 // we clocked 7 more bit so ILI waiting for 8th, we need to reset spi bus
hudakz 0:fa952828e34c 125 _CS = 1; // force CS HIG to interupt the cmd
hudakz 0:fa952828e34c 126 _CS = 0;
hudakz 0:fa952828e34c 127 return r;
hudakz 0:fa952828e34c 128 }
hudakz 0:fa952828e34c 129 unsigned int SPI8::rd_extcreg_data32(unsigned char reg, unsigned char SPIreadenablecmd)
hudakz 0:fa952828e34c 130 {
hudakz 0:fa952828e34c 131 unsigned int r=0;
hudakz 0:fa952828e34c 132 for(int regparam=1; regparam<4; regparam++) // when reading EXTC regs, first parameter is always dummy, so start with 1
hudakz 0:fa952828e34c 133 {
hudakz 0:fa952828e34c 134 wr_cmd8(SPIreadenablecmd); // spi-in enable cmd, 0xD9 (ili9341) or 0xFB (ili9488) or don't know
hudakz 0:fa952828e34c 135 wr_data8(0xF0|regparam); // in low nibble specify which reg parameter we want
hudakz 0:fa952828e34c 136 wr_cmd8(reg); // now send cmd (select register we want to read)
hudakz 0:fa952828e34c 137 r <<= 8;
hudakz 0:fa952828e34c 138 r |= _spi.write(0);
hudakz 0:fa952828e34c 139 // r = _spi.write(0) >> 8; for 16bit
hudakz 0:fa952828e34c 140 }
hudakz 0:fa952828e34c 141 _CS = 1; // force CS HIG to interupt the cmd
hudakz 0:fa952828e34c 142 _CS = 0;
hudakz 0:fa952828e34c 143 return r;
hudakz 0:fa952828e34c 144 }
hudakz 0:fa952828e34c 145 // ILI932x specific
hudakz 0:fa952828e34c 146 void SPI8::dummyread()
hudakz 0:fa952828e34c 147 {
hudakz 0:fa952828e34c 148 _spi.write(0); // dummy read
hudakz 0:fa952828e34c 149 }
hudakz 0:fa952828e34c 150 // ILI932x specific
hudakz 0:fa952828e34c 151 void SPI8::reg_select(unsigned char reg, bool forread)
hudakz 0:fa952828e34c 152 {
hudakz 0:fa952828e34c 153 _CS = 1; //fixme: really needed?
hudakz 0:fa952828e34c 154 _CS = 0; //fixme: really needed?
hudakz 0:fa952828e34c 155 _spi.write(0x70);
hudakz 0:fa952828e34c 156 _spi.write(0); // write MSB
hudakz 0:fa952828e34c 157 _spi.write(reg); // write LSB
hudakz 0:fa952828e34c 158 _CS = 1; //fixme: really needed?
hudakz 0:fa952828e34c 159 _CS = 0; //fixme: really needed?
hudakz 0:fa952828e34c 160 if(forread) _spi.write(0x73);
hudakz 0:fa952828e34c 161 else _spi.write(0x72);
hudakz 0:fa952828e34c 162 }
hudakz 0:fa952828e34c 163 // ILI932x specific
hudakz 0:fa952828e34c 164 void SPI8::reg_write(unsigned char reg, unsigned short data)
hudakz 0:fa952828e34c 165 {
hudakz 0:fa952828e34c 166 _CS = 1; //fixme: really needed?
hudakz 0:fa952828e34c 167 _CS = 0; //fixme: really needed?
hudakz 0:fa952828e34c 168 _spi.write(0x70);
hudakz 0:fa952828e34c 169 _spi.write(0); // write MSB
hudakz 0:fa952828e34c 170 _spi.write(reg); // write LSB
hudakz 0:fa952828e34c 171 _CS = 1; //fixme: really needed?
hudakz 0:fa952828e34c 172 _CS = 0; //fixme: really needed?
hudakz 0:fa952828e34c 173 _spi.write(0x72);
hudakz 0:fa952828e34c 174 _spi.write(data>>8);
hudakz 0:fa952828e34c 175 _spi.write(data&0xFF);
hudakz 0:fa952828e34c 176 }
hudakz 0:fa952828e34c 177 // ILI932x specific
hudakz 0:fa952828e34c 178 unsigned short SPI8::reg_read(unsigned char reg)
hudakz 0:fa952828e34c 179 {
hudakz 0:fa952828e34c 180 unsigned short r=0;
hudakz 0:fa952828e34c 181 _CS = 1; //fixme: really needed?
hudakz 0:fa952828e34c 182 _CS = 0; //fixme: really needed?
hudakz 0:fa952828e34c 183 _spi.write(0x70);
hudakz 0:fa952828e34c 184 _spi.write(0); // write MSB
hudakz 0:fa952828e34c 185 _spi.write(reg); // write LSB
hudakz 0:fa952828e34c 186 _CS = 1; //fixme: really needed?
hudakz 0:fa952828e34c 187 _CS = 0; //fixme: really needed?
hudakz 0:fa952828e34c 188 _spi.write(0x73);
hudakz 0:fa952828e34c 189 _spi.write(0); // dummy read
hudakz 0:fa952828e34c 190 r = _spi.write(0); // read 8bit
hudakz 0:fa952828e34c 191 r <<= 8;
hudakz 0:fa952828e34c 192 r |= _spi.write(0); // read 8bit
hudakz 0:fa952828e34c 193 return r;
hudakz 0:fa952828e34c 194 }
hudakz 0:fa952828e34c 195 void SPI8::hw_reset()
hudakz 0:fa952828e34c 196 {
hudakz 0:fa952828e34c 197 wait_ms(15);
hudakz 0:fa952828e34c 198 _DC = 1;
hudakz 0:fa952828e34c 199 _CS = 1;
hudakz 0:fa952828e34c 200 _reset = 0; // display reset
hudakz 0:fa952828e34c 201 wait_ms(2);
hudakz 0:fa952828e34c 202 _reset = 1; // end reset
hudakz 0:fa952828e34c 203 wait_ms(100);
hudakz 0:fa952828e34c 204 }
hudakz 0:fa952828e34c 205 void SPI8::BusEnable(bool enable)
hudakz 0:fa952828e34c 206 {
hudakz 0:fa952828e34c 207 _CS = enable ? 0:1;
hudakz 0:fa952828e34c 208 }