3.5" inch TFT LCD Display Module 480X320 driven with FSMC.

TFT LCD Display Module 480X320 driven with FSMC

I have recently bought a 3.5" inch TFT LCD Touch Screen Display Module 480X320 with a www.mcufriend.com label on the back side. The display was equipped with an 8bit parallel interface. First I decided to test it with the UniGraphic library using the BUS_8 protocol. The display was very slow but improved when I switched to the PAR_8 protocol. Because I heard about the possibility to use a Flexible Static Memory Controller (FSMC), built into some STM MCU's, to drive LCD's (read/write to LCD's memory rather than to an external SRAM) I thought it would be a fun to try it out.

https://os.mbed.com/media/uploads/hudakz/lcd_3.5_tft_480x320_mcufriend_front.png

Below is the brief story of what I did:

  • Selected FSMC in the Connectivity category and configured it as below: https://os.mbed.com/media/uploads/hudakz/arch_max_fsmc_conf.png
  • Let the STM32CubeIDE generate the code (files).
  • Created a new program for the Seeed Arch Max target in the Mbed Online Compiler by selecting a mbed os blinky template.
  • Replaced the main.cpp with the main.c content of the STM32CubeIDE project.
  • Copy & Pasted the other files with codes from the STM32CubeIDE project to the online compiler project.
  • Renamed and modified:
    "stm32f4xx_it.h" to "stm32f4xx_it_msp.h"
    "stm32f4xx_it.c" to "stm32f4xx_it_msp.c"
  • Added the UniGraphic library to the online compiler project.
  • Extended the UniGraphic library with a FSMC_8 protocol and replaced the TFT::set_orientation(int orient) function with the one used by mcufriend for arduino.
  • Modified the main.cpp as needed.
https://os.mbed.com/media/uploads/hudakz/stm32f407vet6_st-link03.pnghttps://os.mbed.com/media/uploads/hudakz/lcd_3.5_tft_480x320_mcufriend_back.png


Wiring

STM32F407VETFT LCD module
+3.3V3V3
GNDGND
PB_12LCD_RST
GNDLCD_CS
PD_13 (RS)LCD_RS
PD_5 (WR)LCD_WR
PD_4 (RD)LCD_RD
PD_14 (DB00)LCD_D0
PD_15 (DB01)LCD_D1
PD_0 (DB02)LCD_D2
PD_1 (DB03)LCD_D3
PE_7 (DB04)LCD_D4
PE_8 (DB05)LCD_D5
PE_9 (DB06)LCD_D6
PE_10 (DB07)LCD_D7



Results
Execution times
Used protocolBUS_8FSMC_8
Operation \ Timemsms
Clear2283.98038.454
Plot192.06611.365
8bit BMP63.80541.338
Large Font163.8727.895
Sparce pixels2072.265/1458.05174.107/52.168
16bit BMP2288.58959.904
Committer:
hudakz
Date:
Sun May 10 10:44:31 2020 +0000
Revision:
0:fa952828e34c
3.5" inch TFT LCD Display Module 480X320 driven with FSMC.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
hudakz 0:fa952828e34c 1 /* mbed UniGraphic library - Abstract protocol class
hudakz 0:fa952828e34c 2 * Copyright (c) 2015 Giuliano Dianda
hudakz 0:fa952828e34c 3 * Released under the MIT License: http://mbed.org/license/mit
hudakz 0:fa952828e34c 4 */
hudakz 0:fa952828e34c 5
hudakz 0:fa952828e34c 6 /** @file Protocols.h
hudakz 0:fa952828e34c 7 */
hudakz 0:fa952828e34c 8 #ifndef Protocols_H
hudakz 0:fa952828e34c 9 #define Protocols_H
hudakz 0:fa952828e34c 10
hudakz 0:fa952828e34c 11 #include "mbed.h"
hudakz 0:fa952828e34c 12
hudakz 0:fa952828e34c 13 #define RGB24to16(r,g,b) (((r&0xF8)<<8)|((g&0xFC)<<3)|((b&0xF8)>>3)) //5 red | 6 green | 5 blue
hudakz 0:fa952828e34c 14 #define BGR2RGB(color) (((color&0x1F)<<11) | (color&0x7E0) | ((color&0xF800)>>11))
hudakz 0:fa952828e34c 15
hudakz 0:fa952828e34c 16 #define FLIP_NONE 0
hudakz 0:fa952828e34c 17 #define FLIP_X 1
hudakz 0:fa952828e34c 18 #define FLIP_Y 2
hudakz 0:fa952828e34c 19
hudakz 0:fa952828e34c 20 //#define USE_CS
hudakz 0:fa952828e34c 21
hudakz 0:fa952828e34c 22 /** Protocol types
hudakz 0:fa952828e34c 23 */
hudakz 0:fa952828e34c 24 #include "platform.h"
hudakz 0:fa952828e34c 25
hudakz 0:fa952828e34c 26 #if DEVICE_PORTINOUT
hudakz 0:fa952828e34c 27 enum proto_t {
hudakz 0:fa952828e34c 28 PAR_8 /**< Parallel 8bit, port pins 0 to 7 */
hudakz 0:fa952828e34c 29 ,PAR_16 /**< Parallel 16bit, port pins 0 to 15 */
hudakz 0:fa952828e34c 30 ,BUS_8 /**< Parallel 8bit, scattered pins */
hudakz 0:fa952828e34c 31 ,BUS_16 /**< Parallel 16bit, scattered pins */
hudakz 0:fa952828e34c 32 ,SPI_8 /**< SPI 8bit */
hudakz 0:fa952828e34c 33 ,SPI_16 /**< SPI 16bit */
hudakz 0:fa952828e34c 34 ,I2C_ /**< I2C */
hudakz 0:fa952828e34c 35 ,FSMC_8 /**< FSMC 8bit */
hudakz 0:fa952828e34c 36 };
hudakz 0:fa952828e34c 37 #else
hudakz 0:fa952828e34c 38 enum proto_t {
hudakz 0:fa952828e34c 39 BUS_8 /**< Parallel 8bit, scattered pins */
hudakz 0:fa952828e34c 40 ,BUS_16 /**< Parallel 16bit, scattered pins */
hudakz 0:fa952828e34c 41 ,SPI_8 /**< SPI 8bit */
hudakz 0:fa952828e34c 42 ,SPI_16 /**< SPI 16bit */
hudakz 0:fa952828e34c 43 ,I2C_ /**< I2C */
hudakz 0:fa952828e34c 44 };
hudakz 0:fa952828e34c 45 #endif
hudakz 0:fa952828e34c 46
hudakz 0:fa952828e34c 47
hudakz 0:fa952828e34c 48 /** Abstract interface class for spi and parallel protocols
hudakz 0:fa952828e34c 49 */
hudakz 0:fa952828e34c 50 class Protocols
hudakz 0:fa952828e34c 51 {
hudakz 0:fa952828e34c 52 public:
hudakz 0:fa952828e34c 53
hudakz 0:fa952828e34c 54 /** Send 8bit command to display controller
hudakz 0:fa952828e34c 55 *
hudakz 0:fa952828e34c 56 * @param cmd: byte to send
hudakz 0:fa952828e34c 57 *
hudakz 0:fa952828e34c 58 */
hudakz 0:fa952828e34c 59 virtual void wr_cmd8(unsigned char cmd) = 0;
hudakz 0:fa952828e34c 60
hudakz 0:fa952828e34c 61 /** Send 8bit data to display controller
hudakz 0:fa952828e34c 62 *
hudakz 0:fa952828e34c 63 * @param data: byte to send
hudakz 0:fa952828e34c 64 *
hudakz 0:fa952828e34c 65 */
hudakz 0:fa952828e34c 66 virtual void wr_data8(unsigned char data) = 0;
hudakz 0:fa952828e34c 67
hudakz 0:fa952828e34c 68 /** Send 2x8bit command to display controller
hudakz 0:fa952828e34c 69 *
hudakz 0:fa952828e34c 70 * @param cmd: halfword to send
hudakz 0:fa952828e34c 71 *
hudakz 0:fa952828e34c 72 */
hudakz 0:fa952828e34c 73 virtual void wr_cmd16(unsigned short cmd) = 0;
hudakz 0:fa952828e34c 74
hudakz 0:fa952828e34c 75 /** Send 2x8bit data to display controller
hudakz 0:fa952828e34c 76 *
hudakz 0:fa952828e34c 77 * @param data: halfword to send
hudakz 0:fa952828e34c 78 *
hudakz 0:fa952828e34c 79 */
hudakz 0:fa952828e34c 80 virtual void wr_data16(unsigned short data) = 0;
hudakz 0:fa952828e34c 81
hudakz 0:fa952828e34c 82 /** Send 16bit pixeldata to display controller
hudakz 0:fa952828e34c 83 *
hudakz 0:fa952828e34c 84 * @param data: halfword to send
hudakz 0:fa952828e34c 85 *
hudakz 0:fa952828e34c 86 */
hudakz 0:fa952828e34c 87 virtual void wr_gram(unsigned short data) = 0;
hudakz 0:fa952828e34c 88
hudakz 0:fa952828e34c 89 /** Send same 16bit pixeldata to display controller multiple times
hudakz 0:fa952828e34c 90 *
hudakz 0:fa952828e34c 91 * @param data: halfword to send
hudakz 0:fa952828e34c 92 * @param count: how many
hudakz 0:fa952828e34c 93 *
hudakz 0:fa952828e34c 94 */
hudakz 0:fa952828e34c 95 virtual void wr_gram(unsigned short data, unsigned int count) = 0;
hudakz 0:fa952828e34c 96
hudakz 0:fa952828e34c 97 /** Send array of pixeldata shorts to display controller
hudakz 0:fa952828e34c 98 *
hudakz 0:fa952828e34c 99 * @param data: unsigned short pixeldata array
hudakz 0:fa952828e34c 100 * @param lenght: lenght (in shorts)
hudakz 0:fa952828e34c 101 *
hudakz 0:fa952828e34c 102 */
hudakz 0:fa952828e34c 103 virtual void wr_grambuf(unsigned short* data, unsigned int lenght) = 0;
hudakz 0:fa952828e34c 104
hudakz 0:fa952828e34c 105 /** Read 16bit pixeldata from display controller (with dummy cycle)
hudakz 0:fa952828e34c 106 *
hudakz 0:fa952828e34c 107 * @param convert true/false. Convert 18bit to 16bit, some controllers returns 18bit
hudakz 0:fa952828e34c 108 * @returns 16bit color
hudakz 0:fa952828e34c 109 */
hudakz 0:fa952828e34c 110 virtual unsigned short rd_gram(bool convert) = 0;
hudakz 0:fa952828e34c 111
hudakz 0:fa952828e34c 112 /** Read 4x8bit register data (with dummy cycle)
hudakz 0:fa952828e34c 113 * @param reg the register to read
hudakz 0:fa952828e34c 114 * @returns data as uint
hudakz 0:fa952828e34c 115 *
hudakz 0:fa952828e34c 116 */
hudakz 0:fa952828e34c 117 virtual unsigned int rd_reg_data32(unsigned char reg) = 0;
hudakz 0:fa952828e34c 118
hudakz 0:fa952828e34c 119 /** Read 3x8bit ExtendedCommands register data
hudakz 0:fa952828e34c 120 * @param reg the register to read
hudakz 0:fa952828e34c 121 * @param SPIreadenablecmd vendor/device specific cmd to read EXTC registers
hudakz 0:fa952828e34c 122 * @returns data as uint
hudakz 0:fa952828e34c 123 * @note EXTC regs (0xB0 to 0xFF) are read/write registers but needs special cmd to be read in SPI mode
hudakz 0:fa952828e34c 124 */
hudakz 0:fa952828e34c 125 virtual unsigned int rd_extcreg_data32(unsigned char reg, unsigned char SPIreadenablecmd) = 0;
hudakz 0:fa952828e34c 126
hudakz 0:fa952828e34c 127 /** ILI932x specific, does a dummy read cycle, number of bits is protocol dependent
hudakz 0:fa952828e34c 128 * for PAR protocols: a signle RD bit toggle
hudakz 0:fa952828e34c 129 * for SPI8: 8clocks
hudakz 0:fa952828e34c 130 * for SPI16: 16 clocks
hudakz 0:fa952828e34c 131 */
hudakz 0:fa952828e34c 132 virtual void dummyread () = 0;
hudakz 0:fa952828e34c 133
hudakz 0:fa952828e34c 134 /** ILI932x specific, select register for a successive write or read
hudakz 0:fa952828e34c 135 *
hudakz 0:fa952828e34c 136 * @param reg register to be selected
hudakz 0:fa952828e34c 137 * @param forread false = a write next (default), true = a read next
hudakz 0:fa952828e34c 138 * @note forread only used by SPI protocols
hudakz 0:fa952828e34c 139 */
hudakz 0:fa952828e34c 140 virtual void reg_select(unsigned char reg, bool forread =false) = 0;
hudakz 0:fa952828e34c 141
hudakz 0:fa952828e34c 142 /** ILI932x specific, write register with data
hudakz 0:fa952828e34c 143 *
hudakz 0:fa952828e34c 144 * @param reg register to write
hudakz 0:fa952828e34c 145 * @param data 16bit data
hudakz 0:fa952828e34c 146 */
hudakz 0:fa952828e34c 147 virtual void reg_write(unsigned char reg, unsigned short data) = 0;
hudakz 0:fa952828e34c 148
hudakz 0:fa952828e34c 149 /** ILI932x specific, read register
hudakz 0:fa952828e34c 150 *
hudakz 0:fa952828e34c 151 * @param reg register to be read
hudakz 0:fa952828e34c 152 * @returns 16bit register value
hudakz 0:fa952828e34c 153 */
hudakz 0:fa952828e34c 154 virtual unsigned short reg_read(unsigned char reg) = 0;
hudakz 0:fa952828e34c 155
hudakz 0:fa952828e34c 156 /** HW reset sequence (without display init commands)
hudakz 0:fa952828e34c 157 */
hudakz 0:fa952828e34c 158 virtual void hw_reset() = 0;
hudakz 0:fa952828e34c 159
hudakz 0:fa952828e34c 160 /** Set ChipSelect high or low
hudakz 0:fa952828e34c 161 * @param enable 0/1
hudakz 0:fa952828e34c 162 */
hudakz 0:fa952828e34c 163 virtual void BusEnable(bool enable) = 0;
hudakz 0:fa952828e34c 164
hudakz 0:fa952828e34c 165 };
hudakz 0:fa952828e34c 166 #endif