Zoltan Hudak / Mbed OS LCD_McuFriend_FSMC_STM32F407

3.5" inch TFT LCD Display Module 480X320 driven with FSMC.

TFT LCD Display Module 480X320 driven with FSMC

I have recently bought a 3.5" inch TFT LCD Touch Screen Display Module 480X320 with a www.mcufriend.com label on the back side. The display was equipped with an 8bit parallel interface. First I decided to test it with the UniGraphic library using the BUS_8 protocol. The display was very slow but improved when I switched to the PAR_8 protocol. Because I heard about the possibility to use a Flexible Static Memory Controller (FSMC), built into some STM MCU's, to drive LCD's (read/write to LCD's memory rather than to an external SRAM) I thought it would be a fun to try it out.

https://os.mbed.com/media/uploads/hudakz/lcd_3.5_tft_480x320_mcufriend_front.png

Below is the brief story of what I did:

  • Selected FSMC in the Connectivity category and configured it as below: https://os.mbed.com/media/uploads/hudakz/arch_max_fsmc_conf.png
  • Let the STM32CubeIDE generate the code (files).
  • Created a new program for the Seeed Arch Max target in the Mbed Online Compiler by selecting a mbed os blinky template.
  • Replaced the main.cpp with the main.c content of the STM32CubeIDE project.
  • Copy & Pasted the other files with codes from the STM32CubeIDE project to the online compiler project.
  • Renamed and modified:
    "stm32f4xx_it.h" to "stm32f4xx_it_msp.h"
    "stm32f4xx_it.c" to "stm32f4xx_it_msp.c"
  • Added the UniGraphic library to the online compiler project.
  • Extended the UniGraphic library with a FSMC_8 protocol and replaced the TFT::set_orientation(int orient) function with the one used by mcufriend for arduino.
  • Modified the main.cpp as needed.
https://os.mbed.com/media/uploads/hudakz/stm32f407vet6_st-link03.pnghttps://os.mbed.com/media/uploads/hudakz/lcd_3.5_tft_480x320_mcufriend_back.png


Wiring

STM32F407VETFT LCD module
+3.3V3V3
GNDGND
PB_12LCD_RST
GNDLCD_CS
PD_13 (RS)LCD_RS
PD_5 (WR)LCD_WR
PD_4 (RD)LCD_RD
PD_14 (DB00)LCD_D0
PD_15 (DB01)LCD_D1
PD_0 (DB02)LCD_D2
PD_1 (DB03)LCD_D3
PE_7 (DB04)LCD_D4
PE_8 (DB05)LCD_D5
PE_9 (DB06)LCD_D6
PE_10 (DB07)LCD_D7



Results
Execution times
Used protocolBUS_8FSMC_8
Operation \ Timemsms
Clear2283.98038.454
Plot192.06611.365
8bit BMP63.80541.338
Large Font163.8727.895
Sparce pixels2072.265/1458.05174.107/52.168
16bit BMP2288.58959.904

UniGraphic/Protocols/PAR8.cpp@1:47c996032a9e, 2020-09-25 (annotated)

Committer:
hudakz
Date:
Fri Sep 25 14:52:27 2020 +0000
Revision:
1:47c996032a9e
Parent:
0:fa952828e34c 
3.5" inch TFT LCD Display Module 480X320 driven with FSMC.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
hudakz 0:fa952828e34c 1 /* mbed UniGraphic library - PAR8 protocol class
hudakz 0:fa952828e34c 2 * Copyright (c) 2015 Giuliano Dianda
hudakz 0:fa952828e34c 3 * Released under the MIT License: http://mbed.org/license/mit
hudakz 0:fa952828e34c 4 *
hudakz 0:fa952828e34c 5 * Derived work of:
hudakz 0:fa952828e34c 6 *
hudakz 0:fa952828e34c 7 * mbed library for 240*320 pixel display TFT based on ILI9341 LCD Controller
hudakz 0:fa952828e34c 8 * Copyright (c) 2013 Peter Drescher - DC2PD
hudakz 0:fa952828e34c 9 *
hudakz 0:fa952828e34c 10 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
hudakz 0:fa952828e34c 11 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
hudakz 0:fa952828e34c 12 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
hudakz 0:fa952828e34c 13 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
hudakz 0:fa952828e34c 14 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
hudakz 0:fa952828e34c 15 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
hudakz 0:fa952828e34c 16 * THE SOFTWARE.
hudakz 0:fa952828e34c 17 */
hudakz 0:fa952828e34c 18 #include "platform.h"
hudakz 0:fa952828e34c 19 #if DEVICE_PORTINOUT
hudakz 0:fa952828e34c 20
hudakz 0:fa952828e34c 21 #include "PAR8.h"
hudakz 0:fa952828e34c 22
hudakz 0:fa952828e34c 23 PAR8::PAR8(PortName port, PinName CS, PinName reset, PinName DC, PinName WR, PinName RD)
hudakz 0:fa952828e34c 24 : _port(port,0xFF), _CS(CS), _reset(reset), _DC(DC), _WR(WR), _RD(RD)
hudakz 0:fa952828e34c 25 {
hudakz 0:fa952828e34c 26 _reset = 1;
hudakz 0:fa952828e34c 27 _DC=1;
hudakz 0:fa952828e34c 28 _WR=1;
hudakz 0:fa952828e34c 29 _RD=1;
hudakz 0:fa952828e34c 30 _CS=1;
hudakz 0:fa952828e34c 31 _port.mode(PullNone);
hudakz 0:fa952828e34c 32 _port.output(); // will re-enable our GPIO port
hudakz 0:fa952828e34c 33 hw_reset();
hudakz 0:fa952828e34c 34 }
hudakz 0:fa952828e34c 35
hudakz 0:fa952828e34c 36 void PAR8::wr_cmd8(unsigned char cmd)
hudakz 0:fa952828e34c 37 {
hudakz 0:fa952828e34c 38 _DC = 0; // 0=cmd
hudakz 0:fa952828e34c 39 _port.write(cmd); // write 8bit
hudakz 0:fa952828e34c 40 _WR=0;
hudakz 0:fa952828e34c 41 _WR=1;
hudakz 0:fa952828e34c 42 _DC = 1; // 1=data next
hudakz 0:fa952828e34c 43 }
hudakz 0:fa952828e34c 44 void PAR8::wr_data8(unsigned char data)
hudakz 0:fa952828e34c 45 {
hudakz 0:fa952828e34c 46 _port.write(data); // write 8bit
hudakz 0:fa952828e34c 47 _WR=0;
hudakz 0:fa952828e34c 48 _WR=1;
hudakz 0:fa952828e34c 49 }
hudakz 0:fa952828e34c 50 void PAR8::wr_cmd16(unsigned short cmd)
hudakz 0:fa952828e34c 51 {
hudakz 0:fa952828e34c 52 _DC = 0; // 0=cmd
hudakz 0:fa952828e34c 53 _port.write(cmd>>8); // write 8bit
hudakz 0:fa952828e34c 54 _WR=0;
hudakz 0:fa952828e34c 55 _WR=1;
hudakz 0:fa952828e34c 56 _port.write(cmd&0xFF); // write 8bit
hudakz 0:fa952828e34c 57 _WR=0;
hudakz 0:fa952828e34c 58 _WR=1;
hudakz 0:fa952828e34c 59 _DC = 1; // 1=data next
hudakz 0:fa952828e34c 60 }
hudakz 0:fa952828e34c 61 void PAR8::wr_data16(unsigned short data)
hudakz 0:fa952828e34c 62 {
hudakz 0:fa952828e34c 63 _port.write(data>>8); // write 8bit
hudakz 0:fa952828e34c 64 _WR=0;
hudakz 0:fa952828e34c 65 _WR=1;
hudakz 0:fa952828e34c 66 _port.write(data&0xFF); // write 8bit
hudakz 0:fa952828e34c 67 _WR=0;
hudakz 0:fa952828e34c 68 _WR=1;
hudakz 0:fa952828e34c 69 }
hudakz 0:fa952828e34c 70 void PAR8::wr_gram(unsigned short data)
hudakz 0:fa952828e34c 71 {
hudakz 0:fa952828e34c 72 _port.write(data>>8); // write 8bit
hudakz 0:fa952828e34c 73 _WR=0;
hudakz 0:fa952828e34c 74 _WR=1;
hudakz 0:fa952828e34c 75 _port.write(data&0xFF); // write 8bit
hudakz 0:fa952828e34c 76 _WR=0;
hudakz 0:fa952828e34c 77 _WR=1;
hudakz 0:fa952828e34c 78 }
hudakz 0:fa952828e34c 79 void PAR8::wr_gram(unsigned short data, unsigned int count)
hudakz 0:fa952828e34c 80 {
hudakz 0:fa952828e34c 81 if((data>>8)==(data&0xFF))
hudakz 0:fa952828e34c 82 {
hudakz 0:fa952828e34c 83 count<<=1;
hudakz 0:fa952828e34c 84 // _port.write(data); // write 8bit
hudakz 0:fa952828e34c 85 while(count)
hudakz 0:fa952828e34c 86 {
hudakz 0:fa952828e34c 87 _port.write(data); // rewrite even if same data, otherwise too much fast
hudakz 0:fa952828e34c 88 _WR=0;
hudakz 0:fa952828e34c 89 _WR=1;
hudakz 0:fa952828e34c 90 count--;
hudakz 0:fa952828e34c 91 }
hudakz 0:fa952828e34c 92 }
hudakz 0:fa952828e34c 93 else
hudakz 0:fa952828e34c 94 {
hudakz 0:fa952828e34c 95 while(count)
hudakz 0:fa952828e34c 96 {
hudakz 0:fa952828e34c 97 _port.write(data>>8); // write 8bit
hudakz 0:fa952828e34c 98 _WR=0;
hudakz 0:fa952828e34c 99 _WR=1;
hudakz 0:fa952828e34c 100 _port.write(data&0xFF); // write 8bit
hudakz 0:fa952828e34c 101 _WR=0;
hudakz 0:fa952828e34c 102 _WR=1;
hudakz 0:fa952828e34c 103 count--;
hudakz 0:fa952828e34c 104 }
hudakz 0:fa952828e34c 105 }
hudakz 0:fa952828e34c 106 }
hudakz 0:fa952828e34c 107 void PAR8::wr_grambuf(unsigned short* data, unsigned int lenght)
hudakz 0:fa952828e34c 108 {
hudakz 0:fa952828e34c 109 while(lenght)
hudakz 0:fa952828e34c 110 {
hudakz 0:fa952828e34c 111 _port.write((*data)>>8); // write 8bit
hudakz 0:fa952828e34c 112 _WR=0;
hudakz 0:fa952828e34c 113 _WR=1;
hudakz 0:fa952828e34c 114 _port.write((*data)&0xFF); // write 8bit
hudakz 0:fa952828e34c 115 _WR=0;
hudakz 0:fa952828e34c 116 _WR=1;
hudakz 0:fa952828e34c 117 data++;
hudakz 0:fa952828e34c 118 lenght--;
hudakz 0:fa952828e34c 119 }
hudakz 0:fa952828e34c 120 }
hudakz 0:fa952828e34c 121 unsigned short PAR8::rd_gram(bool convert)
hudakz 0:fa952828e34c 122 {
hudakz 0:fa952828e34c 123 unsigned int r=0;
hudakz 0:fa952828e34c 124 _port.input();
hudakz 0:fa952828e34c 125
hudakz 0:fa952828e34c 126 _RD = 0;
hudakz 0:fa952828e34c 127 _RD = 0; // add wait
hudakz 0:fa952828e34c 128 _port.read(); //dummy read
hudakz 0:fa952828e34c 129 _RD = 1;
hudakz 0:fa952828e34c 130
hudakz 0:fa952828e34c 131 _RD = 0;
hudakz 0:fa952828e34c 132 _RD = 0; // add wait
hudakz 0:fa952828e34c 133 r |= _port.read();
hudakz 0:fa952828e34c 134 _RD = 1;
hudakz 0:fa952828e34c 135 r <<= 8;
hudakz 0:fa952828e34c 136
hudakz 0:fa952828e34c 137 _RD = 0;
hudakz 0:fa952828e34c 138 _RD = 0; // add wait
hudakz 0:fa952828e34c 139 r |= _port.read();
hudakz 0:fa952828e34c 140 _RD = 1;
hudakz 0:fa952828e34c 141 if(convert)
hudakz 0:fa952828e34c 142 {
hudakz 0:fa952828e34c 143 r <<= 8;
hudakz 0:fa952828e34c 144 _RD = 0;
hudakz 0:fa952828e34c 145 // _RD = 0; // add wait
hudakz 0:fa952828e34c 146 r |= _port.read();
hudakz 0:fa952828e34c 147 _RD = 1;
hudakz 0:fa952828e34c 148 // gram is 18bit/pixel, if you set 16bit/pixel (cmd 3A), during writing the 16bits are expanded to 18bit
hudakz 0:fa952828e34c 149 // during reading, you read the raw 18bit gram
hudakz 0:fa952828e34c 150 r = RGB24to16((r&0xFF0000)>>16, (r&0xFF00)>>8, r&0xFF);// 18bit pixel padded to 24bits, rrrrrr00_gggggg00_bbbbbb00, converted to 16bit
hudakz 0:fa952828e34c 151 }
hudakz 0:fa952828e34c 152 _port.output();
hudakz 0:fa952828e34c 153 return (unsigned short)r;
hudakz 0:fa952828e34c 154 }
hudakz 0:fa952828e34c 155 unsigned int PAR8::rd_reg_data32(unsigned char reg)
hudakz 0:fa952828e34c 156 {
hudakz 0:fa952828e34c 157 wr_cmd8(reg);
hudakz 0:fa952828e34c 158 unsigned int r=0;
hudakz 0:fa952828e34c 159 _port.input();
hudakz 0:fa952828e34c 160
hudakz 0:fa952828e34c 161 _RD = 0;
hudakz 0:fa952828e34c 162 _port.read(); //dummy read
hudakz 0:fa952828e34c 163 _RD = 1;
hudakz 0:fa952828e34c 164
hudakz 0:fa952828e34c 165 _RD = 0;
hudakz 0:fa952828e34c 166 // _RD = 0; // add wait
hudakz 0:fa952828e34c 167 r |= (_port.read()&0xFF);
hudakz 0:fa952828e34c 168 r <<= 8;
hudakz 0:fa952828e34c 169 _RD = 1;
hudakz 0:fa952828e34c 170
hudakz 0:fa952828e34c 171 _RD = 0;
hudakz 0:fa952828e34c 172 // _RD = 0; // add wait
hudakz 0:fa952828e34c 173 r |= (_port.read()&0xFF);
hudakz 0:fa952828e34c 174 r <<= 8;
hudakz 0:fa952828e34c 175 _RD = 1;
hudakz 0:fa952828e34c 176
hudakz 0:fa952828e34c 177 _RD = 0;
hudakz 0:fa952828e34c 178 // _RD = 0; // add wait
hudakz 0:fa952828e34c 179 r |= (_port.read()&0xFF);
hudakz 0:fa952828e34c 180 r <<= 8;
hudakz 0:fa952828e34c 181 _RD = 1;
hudakz 0:fa952828e34c 182
hudakz 0:fa952828e34c 183 _RD = 0;
hudakz 0:fa952828e34c 184 // _RD = 0; // add wait
hudakz 0:fa952828e34c 185 r |= (_port.read()&0xFF);
hudakz 0:fa952828e34c 186 _RD = 1;
hudakz 0:fa952828e34c 187
hudakz 0:fa952828e34c 188 _CS = 1; // force CS HIG to interupt the cmd in case was not supported
hudakz 0:fa952828e34c 189 _CS = 0;
hudakz 0:fa952828e34c 190 _port.output();
hudakz 0:fa952828e34c 191 return r;
hudakz 0:fa952828e34c 192 }
hudakz 0:fa952828e34c 193 // in Par mode EXTC regs (0xB0-0xFF) can be directly read
hudakz 0:fa952828e34c 194 unsigned int PAR8::rd_extcreg_data32(unsigned char reg, unsigned char SPIreadenablecmd)
hudakz 0:fa952828e34c 195 {
hudakz 0:fa952828e34c 196 return rd_reg_data32(reg);
hudakz 0:fa952828e34c 197 }
hudakz 0:fa952828e34c 198 // ILI932x specific
hudakz 0:fa952828e34c 199 void PAR8::dummyread()
hudakz 0:fa952828e34c 200 {
hudakz 0:fa952828e34c 201 _port.input();
hudakz 0:fa952828e34c 202 _RD=0;
hudakz 0:fa952828e34c 203 _RD=0; // add wait
hudakz 0:fa952828e34c 204 _port.read(); // dummy read
hudakz 0:fa952828e34c 205 _RD=1;
hudakz 0:fa952828e34c 206 // _port.output();
hudakz 0:fa952828e34c 207 }
hudakz 0:fa952828e34c 208 // ILI932x specific
hudakz 0:fa952828e34c 209 void PAR8::reg_select(unsigned char reg, bool forread)
hudakz 0:fa952828e34c 210 {
hudakz 0:fa952828e34c 211 _DC = 0;
hudakz 0:fa952828e34c 212 _port.write(0); // write MSB
hudakz 0:fa952828e34c 213 _WR=0;
hudakz 0:fa952828e34c 214 _WR=1;
hudakz 0:fa952828e34c 215 _port.write(reg); // write LSB
hudakz 0:fa952828e34c 216 _WR=0;
hudakz 0:fa952828e34c 217 _WR=1;
hudakz 0:fa952828e34c 218 _DC = 1; // 1=data next
hudakz 0:fa952828e34c 219 }
hudakz 0:fa952828e34c 220 // ILI932x specific
hudakz 0:fa952828e34c 221 void PAR8::reg_write(unsigned char reg, unsigned short data)
hudakz 0:fa952828e34c 222 {
hudakz 0:fa952828e34c 223 _DC = 0;
hudakz 0:fa952828e34c 224 _port.write(0); // write MSB
hudakz 0:fa952828e34c 225 _WR=0;
hudakz 0:fa952828e34c 226 _WR=1;
hudakz 0:fa952828e34c 227 _port.write(reg); // write MSB
hudakz 0:fa952828e34c 228 _WR=0;
hudakz 0:fa952828e34c 229 _WR=1;
hudakz 0:fa952828e34c 230 _DC = 1;
hudakz 0:fa952828e34c 231 _port.write(data>>8);
hudakz 0:fa952828e34c 232 _WR=0;
hudakz 0:fa952828e34c 233 _WR=1;
hudakz 0:fa952828e34c 234 _port.write(data&0xFF);
hudakz 0:fa952828e34c 235 _WR=0;
hudakz 0:fa952828e34c 236 _WR=1;
hudakz 0:fa952828e34c 237 }
hudakz 0:fa952828e34c 238 // ILI932x specific
hudakz 0:fa952828e34c 239 unsigned short PAR8::reg_read(unsigned char reg)
hudakz 0:fa952828e34c 240 {
hudakz 0:fa952828e34c 241 unsigned short r=0;
hudakz 0:fa952828e34c 242 _DC = 0;
hudakz 0:fa952828e34c 243 _port.write(0);
hudakz 0:fa952828e34c 244 _WR=0;
hudakz 0:fa952828e34c 245 _WR=1;
hudakz 0:fa952828e34c 246 _port.write(reg);
hudakz 0:fa952828e34c 247 _WR=0;
hudakz 0:fa952828e34c 248 _WR=1;
hudakz 0:fa952828e34c 249 _DC = 1;
hudakz 0:fa952828e34c 250 _port.input();
hudakz 0:fa952828e34c 251 _RD=0;
hudakz 0:fa952828e34c 252 r |= _port.read(); // read 8bit
hudakz 0:fa952828e34c 253 _RD=1;
hudakz 0:fa952828e34c 254 r <<= 8;
hudakz 0:fa952828e34c 255 _RD=0;
hudakz 0:fa952828e34c 256 r |= _port.read(); // read 8bit
hudakz 0:fa952828e34c 257 _RD=1;
hudakz 0:fa952828e34c 258 _port.output();
hudakz 0:fa952828e34c 259
hudakz 0:fa952828e34c 260 return r;
hudakz 0:fa952828e34c 261 }
hudakz 0:fa952828e34c 262 void PAR8::hw_reset()
hudakz 0:fa952828e34c 263 {
hudakz 0:fa952828e34c 264 wait_ms(15);
hudakz 0:fa952828e34c 265 _DC = 1;
hudakz 0:fa952828e34c 266 _CS = 1;
hudakz 0:fa952828e34c 267 _WR = 1;
hudakz 0:fa952828e34c 268 _RD = 1;
hudakz 0:fa952828e34c 269 _reset = 0; // display reset
hudakz 0:fa952828e34c 270 wait_ms(2);
hudakz 0:fa952828e34c 271 _reset = 1; // end reset
hudakz 0:fa952828e34c 272 wait_ms(100);
hudakz 0:fa952828e34c 273 }
hudakz 0:fa952828e34c 274 void PAR8::BusEnable(bool enable)
hudakz 0:fa952828e34c 275 {
hudakz 0:fa952828e34c 276 _CS = enable ? 0:1;
hudakz 0:fa952828e34c 277 }
hudakz 0:fa952828e34c 278
hudakz 0:fa952828e34c 279 #endif