3.5" inch TFT LCD Display Module 480X320 driven with FSMC.
TFT LCD Display Module 480X320 driven with FSMC
I have recently bought a 3.5" inch TFT LCD Touch Screen Display Module 480X320 with a www.mcufriend.com
label on the back side. The display was equipped with an 8bit parallel interface. First I decided to test it with the UniGraphic library using the BUS_8
protocol. The display was very slow but improved when I switched to the PAR_8
protocol. Because I heard about the possibility to use a Flexible Static Memory Controller (FSMC), built into some STM MCU's, to drive LCD's (read/write to LCD's memory rather than to an external SRAM) I thought it would be a fun to try it out.
Below is the brief story of what I did:
- Created a project for my STM32F407VE board in the STM32CubeIDE
- Set the
Clock Configuration
to match the one used by Mbed for the Seeed Arch Max board:
- Selected
FSMC
in theConnectivity
category and configured it as below: - Let the
STM32CubeIDE
generate the code (files). - Created a new program for the Seeed Arch Max target in the Mbed Online Compiler by selecting a
mbed os blinky
template. - Replaced the
main.cpp
with themain.c
content of theSTM32CubeIDE
project. Copy & Pasted
the other files with codes from theSTM32CubeIDE
project to the online compiler project.- Renamed and modified:
"stm32f4xx_it.h" to "stm32f4xx_it_msp.h"
"stm32f4xx_it.c" to "stm32f4xx_it_msp.c" - Added the UniGraphic library to the online compiler project.
- Extended the
UniGraphic
library with aFSMC_8
protocol and replaced theTFT::set_orientation(int orient)
function with the one used bymcufriend
for arduino. - Modified the
main.cpp
as needed.
Wiring
STM32F407VE | TFT LCD module |
---|---|
+3.3V | 3V3 |
GND | GND |
PB_12 | LCD_RST |
GND | LCD_CS |
PD_13 (RS) | LCD_RS |
PD_5 (WR) | LCD_WR |
PD_4 (RD) | LCD_RD |
PD_14 (DB00) | LCD_D0 |
PD_15 (DB01) | LCD_D1 |
PD_0 (DB02) | LCD_D2 |
PD_1 (DB03) | LCD_D3 |
PE_7 (DB04) | LCD_D4 |
PE_8 (DB05) | LCD_D5 |
PE_9 (DB06) | LCD_D6 |
PE_10 (DB07) | LCD_D7 |
Results
Execution times | ||
---|---|---|
Used protocol | BUS_8 | FSMC_8 |
Operation \ Time | ms | ms |
Clear | 2283.980 | 38.454 |
Plot | 192.066 | 11.365 |
8bit BMP | 63.805 | 41.338 |
Large Font | 163.872 | 7.895 |
Sparce pixels | 2072.265/1458.051 | 74.107/52.168 |
16bit BMP | 2288.589 | 59.904 |
UniGraphic/Protocols/BUS8.h@1:47c996032a9e, 2020-09-25 (annotated)
- Committer:
- hudakz
- Date:
- Fri Sep 25 14:52:27 2020 +0000
- Revision:
- 1:47c996032a9e
- Parent:
- 0:fa952828e34c
3.5" inch TFT LCD Display Module 480X320 driven with FSMC.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
hudakz | 0:fa952828e34c | 1 | #ifndef BUS8_H |
hudakz | 0:fa952828e34c | 2 | #define BUS8_H |
hudakz | 0:fa952828e34c | 3 | |
hudakz | 0:fa952828e34c | 4 | #include "mbed.h" |
hudakz | 0:fa952828e34c | 5 | #include "Protocols.h" |
hudakz | 0:fa952828e34c | 6 | //#include "GraphicsDisplay.h" |
hudakz | 0:fa952828e34c | 7 | |
hudakz | 0:fa952828e34c | 8 | /** Parallel 8bit interface |
hudakz | 0:fa952828e34c | 9 | */ |
hudakz | 0:fa952828e34c | 10 | class BUS8 : public Protocols |
hudakz | 0:fa952828e34c | 11 | { |
hudakz | 0:fa952828e34c | 12 | public: |
hudakz | 0:fa952828e34c | 13 | |
hudakz | 0:fa952828e34c | 14 | /** Create a BUS8 display interface with scattered pins and 5 control pins |
hudakz | 0:fa952828e34c | 15 | * |
hudakz | 0:fa952828e34c | 16 | * @param buspins array of PinName to group as Bus |
hudakz | 0:fa952828e34c | 17 | * , i.e PinName buspins[8]={PC_0,PC_1,PC_2,PC_3,D9,D8,D7,D6}; |
hudakz | 0:fa952828e34c | 18 | * @param CS pin connected to CS of display |
hudakz | 0:fa952828e34c | 19 | * @param reset pin connected to RESET of display |
hudakz | 0:fa952828e34c | 20 | * @param DC pin connected to data/command of display |
hudakz | 0:fa952828e34c | 21 | * @param WR pin connected to SDI of display |
hudakz | 0:fa952828e34c | 22 | * @param RD pin connected to RS of display |
hudakz | 0:fa952828e34c | 23 | */ |
hudakz | 0:fa952828e34c | 24 | BUS8(PinName* buspins, PinName CS, PinName reset, PinName DC, PinName WR, PinName RD); |
hudakz | 0:fa952828e34c | 25 | |
hudakz | 0:fa952828e34c | 26 | protected: |
hudakz | 0:fa952828e34c | 27 | |
hudakz | 0:fa952828e34c | 28 | /** Send 8bit command to display controller |
hudakz | 0:fa952828e34c | 29 | * |
hudakz | 0:fa952828e34c | 30 | * @param cmd: byte to send |
hudakz | 0:fa952828e34c | 31 | * |
hudakz | 0:fa952828e34c | 32 | */ |
hudakz | 0:fa952828e34c | 33 | virtual void wr_cmd8(unsigned char cmd); |
hudakz | 0:fa952828e34c | 34 | |
hudakz | 0:fa952828e34c | 35 | /** Send 8bit data to display controller |
hudakz | 0:fa952828e34c | 36 | * |
hudakz | 0:fa952828e34c | 37 | * @param data: byte to send |
hudakz | 0:fa952828e34c | 38 | * |
hudakz | 0:fa952828e34c | 39 | */ |
hudakz | 0:fa952828e34c | 40 | virtual void wr_data8(unsigned char data); |
hudakz | 0:fa952828e34c | 41 | |
hudakz | 0:fa952828e34c | 42 | /** Send 2x8bit command to display controller |
hudakz | 0:fa952828e34c | 43 | * |
hudakz | 0:fa952828e34c | 44 | * @param cmd: halfword to send |
hudakz | 0:fa952828e34c | 45 | * |
hudakz | 0:fa952828e34c | 46 | */ |
hudakz | 0:fa952828e34c | 47 | virtual void wr_cmd16(unsigned short cmd); |
hudakz | 0:fa952828e34c | 48 | |
hudakz | 0:fa952828e34c | 49 | /** Send 2x8bit data to display controller |
hudakz | 0:fa952828e34c | 50 | * |
hudakz | 0:fa952828e34c | 51 | * @param data: halfword to send |
hudakz | 0:fa952828e34c | 52 | * |
hudakz | 0:fa952828e34c | 53 | */ |
hudakz | 0:fa952828e34c | 54 | virtual void wr_data16(unsigned short data); |
hudakz | 0:fa952828e34c | 55 | |
hudakz | 0:fa952828e34c | 56 | /** Send 16bit pixeldata to display controller |
hudakz | 0:fa952828e34c | 57 | * |
hudakz | 0:fa952828e34c | 58 | * @param data: halfword to send |
hudakz | 0:fa952828e34c | 59 | * |
hudakz | 0:fa952828e34c | 60 | */ |
hudakz | 0:fa952828e34c | 61 | virtual void wr_gram(unsigned short data); |
hudakz | 0:fa952828e34c | 62 | |
hudakz | 0:fa952828e34c | 63 | /** Send same 16bit pixeldata to display controller multiple times |
hudakz | 0:fa952828e34c | 64 | * |
hudakz | 0:fa952828e34c | 65 | * @param data: halfword to send |
hudakz | 0:fa952828e34c | 66 | * @param count: how many |
hudakz | 0:fa952828e34c | 67 | * |
hudakz | 0:fa952828e34c | 68 | */ |
hudakz | 0:fa952828e34c | 69 | virtual void wr_gram(unsigned short data, unsigned int count); |
hudakz | 0:fa952828e34c | 70 | |
hudakz | 0:fa952828e34c | 71 | /** Send array of pixeldata shorts to display controller |
hudakz | 0:fa952828e34c | 72 | * |
hudakz | 0:fa952828e34c | 73 | * @param data: unsigned short pixeldata array |
hudakz | 0:fa952828e34c | 74 | * @param lenght: lenght (in shorts) |
hudakz | 0:fa952828e34c | 75 | * |
hudakz | 0:fa952828e34c | 76 | */ |
hudakz | 0:fa952828e34c | 77 | virtual void wr_grambuf(unsigned short* data, unsigned int lenght); |
hudakz | 0:fa952828e34c | 78 | |
hudakz | 0:fa952828e34c | 79 | /** Read 16bit pixeldata from display controller (with dummy cycle) |
hudakz | 0:fa952828e34c | 80 | * |
hudakz | 0:fa952828e34c | 81 | * @param convert true/false. Convert 18bit to 16bit, some controllers returns 18bit |
hudakz | 0:fa952828e34c | 82 | * @returns 16bit color |
hudakz | 0:fa952828e34c | 83 | */ |
hudakz | 0:fa952828e34c | 84 | virtual unsigned short rd_gram(bool convert); |
hudakz | 0:fa952828e34c | 85 | |
hudakz | 0:fa952828e34c | 86 | /** Read 4x8bit register data (with dummy cycle) |
hudakz | 0:fa952828e34c | 87 | * @param reg the register to read |
hudakz | 0:fa952828e34c | 88 | * @returns data as uint |
hudakz | 0:fa952828e34c | 89 | * |
hudakz | 0:fa952828e34c | 90 | */ |
hudakz | 0:fa952828e34c | 91 | virtual unsigned int rd_reg_data32(unsigned char reg); |
hudakz | 0:fa952828e34c | 92 | |
hudakz | 0:fa952828e34c | 93 | /** Read 3x8bit ExtendedCommands register data |
hudakz | 0:fa952828e34c | 94 | * @param reg the register to read |
hudakz | 0:fa952828e34c | 95 | * @returns data as uint |
hudakz | 0:fa952828e34c | 96 | * @note EXTC regs (0xB0 to 0xFF) are read/write registers, for Parallel mode directly accessible in both directions |
hudakz | 0:fa952828e34c | 97 | */ |
hudakz | 0:fa952828e34c | 98 | virtual unsigned int rd_extcreg_data32(unsigned char reg, unsigned char SPIreadenablecmd); |
hudakz | 0:fa952828e34c | 99 | |
hudakz | 0:fa952828e34c | 100 | /** ILI932x specific, does a dummy read cycle, number of bits is protocol dependent |
hudakz | 0:fa952828e34c | 101 | * for PAR protocols: a signle RD bit toggle |
hudakz | 0:fa952828e34c | 102 | * for SPI8: 8clocks |
hudakz | 0:fa952828e34c | 103 | * for SPI16: 16 clocks |
hudakz | 0:fa952828e34c | 104 | */ |
hudakz | 0:fa952828e34c | 105 | virtual void dummyread (); |
hudakz | 0:fa952828e34c | 106 | |
hudakz | 0:fa952828e34c | 107 | /** ILI932x specific, select register for a successive write or read |
hudakz | 0:fa952828e34c | 108 | * |
hudakz | 0:fa952828e34c | 109 | * @param reg register to be selected |
hudakz | 0:fa952828e34c | 110 | * @param forread false = a write next (default), true = a read next |
hudakz | 0:fa952828e34c | 111 | * @note forread only used by SPI protocols |
hudakz | 0:fa952828e34c | 112 | */ |
hudakz | 0:fa952828e34c | 113 | virtual void reg_select(unsigned char reg, bool forread =false); |
hudakz | 0:fa952828e34c | 114 | |
hudakz | 0:fa952828e34c | 115 | /** ILI932x specific, write register with data |
hudakz | 0:fa952828e34c | 116 | * |
hudakz | 0:fa952828e34c | 117 | * @param reg register to write |
hudakz | 0:fa952828e34c | 118 | * @param data 16bit data |
hudakz | 0:fa952828e34c | 119 | */ |
hudakz | 0:fa952828e34c | 120 | virtual void reg_write(unsigned char reg, unsigned short data); |
hudakz | 0:fa952828e34c | 121 | |
hudakz | 0:fa952828e34c | 122 | /** ILI932x specific, read register |
hudakz | 0:fa952828e34c | 123 | * |
hudakz | 0:fa952828e34c | 124 | * @param reg register to be read |
hudakz | 0:fa952828e34c | 125 | * @returns 16bit register value |
hudakz | 0:fa952828e34c | 126 | */ |
hudakz | 0:fa952828e34c | 127 | virtual unsigned short reg_read(unsigned char reg); |
hudakz | 0:fa952828e34c | 128 | |
hudakz | 0:fa952828e34c | 129 | /** HW reset sequence (without display init commands) |
hudakz | 0:fa952828e34c | 130 | */ |
hudakz | 0:fa952828e34c | 131 | virtual void hw_reset(); |
hudakz | 0:fa952828e34c | 132 | |
hudakz | 0:fa952828e34c | 133 | /** Set ChipSelect high or low |
hudakz | 0:fa952828e34c | 134 | * @param enable 0/1 |
hudakz | 0:fa952828e34c | 135 | */ |
hudakz | 0:fa952828e34c | 136 | virtual void BusEnable(bool enable); |
hudakz | 0:fa952828e34c | 137 | |
hudakz | 0:fa952828e34c | 138 | |
hudakz | 0:fa952828e34c | 139 | |
hudakz | 0:fa952828e34c | 140 | private: |
hudakz | 0:fa952828e34c | 141 | |
hudakz | 0:fa952828e34c | 142 | BusInOut _bus; |
hudakz | 0:fa952828e34c | 143 | DigitalOut _CS; |
hudakz | 0:fa952828e34c | 144 | DigitalOut _reset; |
hudakz | 0:fa952828e34c | 145 | DigitalOut _DC; |
hudakz | 0:fa952828e34c | 146 | DigitalOut _WR; |
hudakz | 0:fa952828e34c | 147 | DigitalOut _RD; |
hudakz | 0:fa952828e34c | 148 | |
hudakz | 0:fa952828e34c | 149 | }; |
hudakz | 0:fa952828e34c | 150 | #endif |