FeliCa Link(RC-S730) Library

FeliCa Link(RC-S730) Library

  • Not all API is tested.

RC-S730

Sample

Committer:
hiro99ma
Date:
Sun Mar 29 07:59:13 2015 +0000
Revision:
1:bb5616cb01fb
Parent:
0:be4ff952ae7a
fix comment

Who changed what in which revision?

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hiro99ma 0:be4ff952ae7a 1 /** FeliCa Link(RC-S730) Library
hiro99ma 0:be4ff952ae7a 2 *
hiro99ma 0:be4ff952ae7a 3 * @file RCS730.h
hiro99ma 0:be4ff952ae7a 4 * @author hiro99ma
hiro99ma 0:be4ff952ae7a 5 * @version 1.00
hiro99ma 0:be4ff952ae7a 6 */
hiro99ma 0:be4ff952ae7a 7
hiro99ma 0:be4ff952ae7a 8 #ifndef RCS730_H
hiro99ma 0:be4ff952ae7a 9 #define RCS730_H
hiro99ma 0:be4ff952ae7a 10
hiro99ma 0:be4ff952ae7a 11 #include "mbed.h"
hiro99ma 0:be4ff952ae7a 12
hiro99ma 0:be4ff952ae7a 13 /** callback function type */
hiro99ma 0:be4ff952ae7a 14 typedef bool (*RCS730_CALLBACK_T)(void *pUser, uint8_t *pData, uint8_t Len);
hiro99ma 0:be4ff952ae7a 15
hiro99ma 0:be4ff952ae7a 16
hiro99ma 0:be4ff952ae7a 17 /** FeliCa Link(RC-S730) class
hiro99ma 0:be4ff952ae7a 18 *
hiro99ma 0:be4ff952ae7a 19 * @class RCS730
hiro99ma 0:be4ff952ae7a 20 */
hiro99ma 0:be4ff952ae7a 21 class RCS730 {
hiro99ma 0:be4ff952ae7a 22 public:
hiro99ma 0:be4ff952ae7a 23 static const uint16_t BLK_PAD0 = 0x0000; //!< [addr]PAD0
hiro99ma 0:be4ff952ae7a 24 static const uint16_t BLK_PAD1 = 0x0001; //!< [addr]PAD1
hiro99ma 0:be4ff952ae7a 25 static const uint16_t BLK_PAD2 = 0x0002; //!< [addr]PAD2
hiro99ma 0:be4ff952ae7a 26 static const uint16_t BLK_PAD3 = 0x0003; //!< [addr]PAD3
hiro99ma 0:be4ff952ae7a 27 static const uint16_t BLK_PAD4 = 0x0004; //!< [addr]PAD4
hiro99ma 0:be4ff952ae7a 28 static const uint16_t BLK_PAD5 = 0x0005; //!< [addr]PAD5
hiro99ma 0:be4ff952ae7a 29 static const uint16_t BLK_PAD6 = 0x0006; //!< [addr]PAD6
hiro99ma 0:be4ff952ae7a 30 static const uint16_t BLK_PAD7 = 0x0007; //!< [addr]PAD7
hiro99ma 0:be4ff952ae7a 31 static const uint16_t BLK_PAD8 = 0x0008; //!< [addr]PAD8
hiro99ma 0:be4ff952ae7a 32 static const uint16_t BLK_PAD9 = 0x0009; //!< [addr]PAD9
hiro99ma 0:be4ff952ae7a 33 static const uint16_t BLK_PAD10 = 0x000a; //!< [addr]PAD10
hiro99ma 0:be4ff952ae7a 34 static const uint16_t BLK_PAD11 = 0x000b; //!< [addr]PAD11
hiro99ma 0:be4ff952ae7a 35 static const uint16_t BLK_PAD12 = 0x000c; //!< [addr]PAD12
hiro99ma 0:be4ff952ae7a 36 static const uint16_t BLK_PAD13 = 0x000d; //!< [addr]PAD13
hiro99ma 0:be4ff952ae7a 37 static const uint16_t BLK_REG = 0x000e; //!< [addr]REG
hiro99ma 0:be4ff952ae7a 38 static const uint16_t BLK_RC = 0x0080; //!< [addr]RC
hiro99ma 0:be4ff952ae7a 39 static const uint16_t BLK_MAC = 0x0081; //!< [addr]MAC
hiro99ma 0:be4ff952ae7a 40 static const uint16_t BLK_ID = 0x0082; //!< [addr]ID
hiro99ma 0:be4ff952ae7a 41 static const uint16_t BLK_D_ID = 0x0083; //!< [addr]D_ID
hiro99ma 0:be4ff952ae7a 42 static const uint16_t BLK_SER_C = 0x0084; //!< [addr]SER_C
hiro99ma 0:be4ff952ae7a 43 static const uint16_t BLK_SYS_C = 0x0085; //!< [addr]SYS_C
hiro99ma 0:be4ff952ae7a 44 static const uint16_t BLK_CKV = 0x0086; //!< [addr]CKV
hiro99ma 0:be4ff952ae7a 45 static const uint16_t BLK_CK = 0x0087; //!< [addr]CK
hiro99ma 0:be4ff952ae7a 46 static const uint16_t BLK_MC = 0x0088; //!< [addr]MC
hiro99ma 0:be4ff952ae7a 47 static const uint16_t BLK_WCNT = 0x0090; //!< [addr]WCNT
hiro99ma 0:be4ff952ae7a 48 static const uint16_t BLK_MAC_A = 0x0091; //!< [addr]MAC_A
hiro99ma 0:be4ff952ae7a 49 static const uint16_t BLK_STATE = 0x0092; //!< [addr]STATE
hiro99ma 0:be4ff952ae7a 50 static const uint16_t BLK_CRC_CHECK = 0x00a0; //!< [addr]CRC_CHECK
hiro99ma 0:be4ff952ae7a 51
hiro99ma 0:be4ff952ae7a 52 static const uint16_t REG_OPMODE = 0x0b00; //!< [addr]Operation Mode register
hiro99ma 0:be4ff952ae7a 53 static const uint16_t REG_TAG_TX_CTRL = 0x0b04; //!< [addr]Tag TX Control register
hiro99ma 0:be4ff952ae7a 54 static const uint16_t REG_TAG_RX_CTRL = 0x0b08; //!< [addr]Tag RX Control register
hiro99ma 0:be4ff952ae7a 55 static const uint16_t REG_RF_STATUS = 0x0b0c; //!< [addr]RF Status register
hiro99ma 0:be4ff952ae7a 56 static const uint16_t REG_I2C_SLAVE_ADDR = 0x0b10; //!< [addr]I2C Slave Address register
hiro99ma 0:be4ff952ae7a 57 static const uint16_t REG_I2C_BUFF_CTRL = 0x0b14; //!< [addr]I2C Buffer Control register
hiro99ma 0:be4ff952ae7a 58 static const uint16_t REG_I2C_STATUS = 0x0b18; //!< [addr]I2C Status register
hiro99ma 0:be4ff952ae7a 59 static const uint16_t REG_INT_MASK = 0x0b20; //!< [addr]Interrupt Mask register
hiro99ma 0:be4ff952ae7a 60 static const uint16_t REG_INT_RAW_STATUS = 0x0b24; //!< [addr]Interrupt Raw Status register
hiro99ma 0:be4ff952ae7a 61 static const uint16_t REG_INT_STATUS = 0x0b28; //!< [addr]Interrupt Status register
hiro99ma 0:be4ff952ae7a 62 static const uint16_t REG_INT_CLEAR = 0x0b2c; //!< [addr]Interrupt Clear register
hiro99ma 0:be4ff952ae7a 63 static const uint16_t REG_WRT_PROTECT = 0x0b30; //!< [addr]Write Protect register
hiro99ma 0:be4ff952ae7a 64 static const uint16_t REG_STBY_CTRL = 0x0b34; //!< [addr]Standby Control register
hiro99ma 0:be4ff952ae7a 65 static const uint16_t REG_INIT_CTRL = 0x0b38; //!< [addr]Initialize Control register
hiro99ma 0:be4ff952ae7a 66 static const uint16_t REG_HOST_IF_SECURITY = 0x0b40; //!< [addr]Host Interface Security register
hiro99ma 0:be4ff952ae7a 67 static const uint16_t REG_HOST_IF_WCNT = 0x0b44; //!< [addr]Host Interface WCNT register
hiro99ma 0:be4ff952ae7a 68 static const uint16_t REG_RF_PARAM = 0x0b50; //!< [addr]RF Parameter register
hiro99ma 0:be4ff952ae7a 69 static const uint16_t REG_LITES_HT_CONF = 0x0b60; //!< [addr]Lite-S Host Through Configration register
hiro99ma 0:be4ff952ae7a 70 static const uint16_t REG_LITES_PMM = 0x0b64; //!< [addr]Lite-S PMm register
hiro99ma 0:be4ff952ae7a 71 static const uint16_t REG_PLUG_CONF1 = 0x0b80; //!< [addr]Plug Configration 1 register
hiro99ma 0:be4ff952ae7a 72 static const uint16_t REG_PLUG_CONF2 = 0x0b84; //!< [addr]Plug Configration 2 register
hiro99ma 0:be4ff952ae7a 73 static const uint16_t REG_PLUG_CONF3 = 0x0b88; //!< [addr]Plug Configration 3 register
hiro99ma 0:be4ff952ae7a 74 static const uint16_t REG_DEP_CONF = 0x0ba0; //!< [addr]DEP Configration register
hiro99ma 0:be4ff952ae7a 75 static const uint16_t REG_DEP_PMM1 = 0x0ba4; //!< [addr]DEP PMm1 register
hiro99ma 0:be4ff952ae7a 76 static const uint16_t REG_DEP_PMM2 = 0x0ba8; //!< [addr]DEP PMm2 register
hiro99ma 0:be4ff952ae7a 77 static const uint16_t REG_RW_CONF = 0x0bc0; //!< [addr]RW Configration register
hiro99ma 0:be4ff952ae7a 78 static const uint16_t REG_RW_CTRL = 0x0b4c; //!< [addr]RW Control register
hiro99ma 0:be4ff952ae7a 79 static const uint16_t REG_RW_TIMEOUT = 0x0bc8; //!< [addr]RW Timeout register
hiro99ma 0:be4ff952ae7a 80
hiro99ma 0:be4ff952ae7a 81 static const uint16_t BUF_RF_COMM = 0x0c00; //!< [addr]RF Communication
hiro99ma 0:be4ff952ae7a 82 static const uint16_t BUF_I2CFELICA_COMM = 0x0d00; //!< [addr]I2C FeliCa Communication
hiro99ma 0:be4ff952ae7a 83
hiro99ma 0:be4ff952ae7a 84 static const uint32_t MSK_MODE_CHANGED = 0x80000000; //!< OPMODE changed
hiro99ma 0:be4ff952ae7a 85 static const uint32_t MSK_INT_RW_RX_ERROR = 0x00080000; //!< [R/W]
hiro99ma 0:be4ff952ae7a 86 static const uint32_t MSK_INT_RW_RX_TIMEOUT = 0x00040000; //!< [R/W]
hiro99ma 0:be4ff952ae7a 87 static const uint32_t MSK_INT_RW_RX_DONE = 0x00020000; //!< [R/W]
hiro99ma 0:be4ff952ae7a 88 static const uint32_t MSK_INT_RW_TX_DONE = 0x00010000; //!< [R/W]
hiro99ma 0:be4ff952ae7a 89 static const uint32_t MSK_INT_I2C_FELICA_CMD_ERROR = 0x00000200; //!< [I2C]
hiro99ma 0:be4ff952ae7a 90 static const uint32_t MSK_INT_I2C_FELICA_CMD_DONE = 0x00000100; //!< [I2C]
hiro99ma 0:be4ff952ae7a 91 static const uint32_t MSK_INT_TAG_TX_DONE = 0x00000040; //!< [tag/DEP]Tx done
hiro99ma 0:be4ff952ae7a 92 static const uint32_t MSK_INT_TAG_NFC_DEP_RX_DONE = 0x00000020; //!< [DEP]D4 command Rx done
hiro99ma 0:be4ff952ae7a 93 static const uint32_t MSK_INT_TAG_RW_RX_DONE3 = 0x00000010; //!< [tag]Write w/o Enc Rx done for HT block
hiro99ma 0:be4ff952ae7a 94 static const uint32_t MSK_INT_TAG_RW_RX_DONE2 = 0x00000008; //!< [tag]Read or Write w/o Enc Rx done for HT block
hiro99ma 0:be4ff952ae7a 95 static const uint32_t MSK_INT_TAG_RW_RX_DONE1 = 0x00000004; //!< [tag]Write w/o Enc Rx done for User block
hiro99ma 0:be4ff952ae7a 96 static const uint32_t MSK_INT_TAG_PL_RX_DONE = 0x00000002; //!< [tag]Polling Rx done
hiro99ma 0:be4ff952ae7a 97 static const uint32_t MSK_INT_TAG_RX_DONE = 0x00000001; //!< [tag]Read or Write w/o Enc Rx done
hiro99ma 0:be4ff952ae7a 98 static const uint32_t MSK_ALL = 0x800f037f;
hiro99ma 0:be4ff952ae7a 99
hiro99ma 0:be4ff952ae7a 100 public:
hiro99ma 0:be4ff952ae7a 101
hiro99ma 0:be4ff952ae7a 102 /** Operation Mode
hiro99ma 0:be4ff952ae7a 103 *
hiro99ma 0:be4ff952ae7a 104 * @enum OpMode
hiro99ma 0:be4ff952ae7a 105 */
hiro99ma 0:be4ff952ae7a 106 enum OpMode {
hiro99ma 0:be4ff952ae7a 107 OPMODE_LITES_HT = 0x00, //!< Lite-S HT mode
hiro99ma 0:be4ff952ae7a 108 OPMODE_PLUG = 0x01, //!< Plug mode
hiro99ma 0:be4ff952ae7a 109 OPMODE_NFCDEP = 0x02, //!< NFC-DEP mode
hiro99ma 0:be4ff952ae7a 110 OPMODE_LITES = 0x03 //!< Lite-S mode
hiro99ma 0:be4ff952ae7a 111 };
hiro99ma 0:be4ff952ae7a 112
hiro99ma 0:be4ff952ae7a 113
hiro99ma 0:be4ff952ae7a 114 /** System Code in Plug mode
hiro99ma 0:be4ff952ae7a 115 *
hiro99ma 0:be4ff952ae7a 116 * @enum PlugSysCode
hiro99ma 0:be4ff952ae7a 117 */
hiro99ma 0:be4ff952ae7a 118 enum PlugSysCode {
hiro99ma 0:be4ff952ae7a 119 PLUG_SYS_CODE_FEEL = 0, //!< 0xFEE1
hiro99ma 0:be4ff952ae7a 120 PLUG_SYS_CODE_NDEF = 2, //!< 0x12FC
hiro99ma 0:be4ff952ae7a 121 };
hiro99ma 0:be4ff952ae7a 122
hiro99ma 0:be4ff952ae7a 123
hiro99ma 0:be4ff952ae7a 124 /** Callback Table
hiro99ma 0:be4ff952ae7a 125 *
hiro99ma 0:be4ff952ae7a 126 * @struct callbacktable_t
hiro99ma 0:be4ff952ae7a 127 */
hiro99ma 0:be4ff952ae7a 128 struct callbacktable_t {
hiro99ma 0:be4ff952ae7a 129 void *pUserData; //!< User Data pointer
hiro99ma 0:be4ff952ae7a 130 RCS730_CALLBACK_T pCbRxHTRDone; //!< Rx Done(Read w/o Enc[HT mode])
hiro99ma 0:be4ff952ae7a 131 RCS730_CALLBACK_T pCbRxHTWDone; //!< Rx Done(Write w/o Enc[HT mode])
hiro99ma 0:be4ff952ae7a 132 #if 0
hiro99ma 0:be4ff952ae7a 133 RCS730_CALLBACK_T pCbTxDone; //!< Tx Done
hiro99ma 0:be4ff952ae7a 134 RCS730_CALLBACK_T pCbRxDepDone; //!< Rx Done(DEP mode)
hiro99ma 0:be4ff952ae7a 135 RCS730_CALLBACK_T pCbOther; //!< Other IRQ interrupt
hiro99ma 0:be4ff952ae7a 136 #endif
hiro99ma 0:be4ff952ae7a 137 };
hiro99ma 0:be4ff952ae7a 138
hiro99ma 0:be4ff952ae7a 139 public:
hiro99ma 0:be4ff952ae7a 140 /** constructor
hiro99ma 0:be4ff952ae7a 141 *
hiro99ma 0:be4ff952ae7a 142 * @param [in,out] I2c I2C
hiro99ma 0:be4ff952ae7a 143 */
hiro99ma 0:be4ff952ae7a 144 RCS730(I2C &I2c);
hiro99ma 0:be4ff952ae7a 145
hiro99ma 0:be4ff952ae7a 146 /** destructor
hiro99ma 0:be4ff952ae7a 147 */
hiro99ma 0:be4ff952ae7a 148 virtual ~RCS730();
hiro99ma 0:be4ff952ae7a 149
hiro99ma 0:be4ff952ae7a 150 /** Set Callback Table
hiro99ma 0:be4ff952ae7a 151 *
hiro99ma 0:be4ff952ae7a 152 * @param [in] pInitTable callback table
hiro99ma 0:be4ff952ae7a 153 */
hiro99ma 0:be4ff952ae7a 154 void setCallbackTable(const callbacktable_t *pInitTable);
hiro99ma 0:be4ff952ae7a 155
hiro99ma 0:be4ff952ae7a 156
hiro99ma 0:be4ff952ae7a 157 public:
hiro99ma 0:be4ff952ae7a 158 /** Byte Write(1byte)
hiro99ma 0:be4ff952ae7a 159 *
hiro99ma 0:be4ff952ae7a 160 * @param [in] MemAddr memory address to write
hiro99ma 0:be4ff952ae7a 161 * @param [in] pData data to write
hiro99ma 0:be4ff952ae7a 162 * @retval 0 success
hiro99ma 0:be4ff952ae7a 163 */
hiro99ma 0:be4ff952ae7a 164 int byteWrite(uint16_t MemAddr, uint8_t Data);
hiro99ma 0:be4ff952ae7a 165
hiro99ma 0:be4ff952ae7a 166
hiro99ma 0:be4ff952ae7a 167 /** Page Write
hiro99ma 0:be4ff952ae7a 168 *
hiro99ma 0:be4ff952ae7a 169 * @param [in] MemAddr memory address to write
hiro99ma 0:be4ff952ae7a 170 * @param [in] pData data to write
hiro99ma 0:be4ff952ae7a 171 * @param [in] Length pData Length
hiro99ma 0:be4ff952ae7a 172 * @retval 0 success
hiro99ma 0:be4ff952ae7a 173 */
hiro99ma 0:be4ff952ae7a 174 int pageWrite(uint16_t MemAddr, const uint8_t *pData, int Length);
hiro99ma 0:be4ff952ae7a 175
hiro99ma 0:be4ff952ae7a 176
hiro99ma 0:be4ff952ae7a 177 /** Random Read(1byte)
hiro99ma 0:be4ff952ae7a 178 *
hiro99ma 0:be4ff952ae7a 179 * @param [in] MemAddr memory address to read
hiro99ma 0:be4ff952ae7a 180 * @param [out] pData data buffer to read
hiro99ma 0:be4ff952ae7a 181 * @retval 0 success
hiro99ma 0:be4ff952ae7a 182 */
hiro99ma 0:be4ff952ae7a 183 int randomRead(uint16_t MemAddr, uint8_t *pData);
hiro99ma 0:be4ff952ae7a 184
hiro99ma 0:be4ff952ae7a 185
hiro99ma 0:be4ff952ae7a 186 /** Sequential Read
hiro99ma 0:be4ff952ae7a 187 *
hiro99ma 0:be4ff952ae7a 188 * @param [in] MemAddr memory address to read
hiro99ma 0:be4ff952ae7a 189 * @param [out] pData data buffer to read
hiro99ma 0:be4ff952ae7a 190 * @param [in] Length pData Length
hiro99ma 0:be4ff952ae7a 191 * @retval 0 success
hiro99ma 0:be4ff952ae7a 192 */
hiro99ma 0:be4ff952ae7a 193 int sequentialRead(uint16_t MemAddr, uint8_t *pData, int Length);
hiro99ma 0:be4ff952ae7a 194
hiro99ma 0:be4ff952ae7a 195
hiro99ma 0:be4ff952ae7a 196 /** Current Address Read(1byte)
hiro99ma 0:be4ff952ae7a 197 *
hiro99ma 0:be4ff952ae7a 198 * @param [out] pData data buffer to read
hiro99ma 0:be4ff952ae7a 199 * @retval 0 success
hiro99ma 0:be4ff952ae7a 200 */
hiro99ma 0:be4ff952ae7a 201 int currentAddrRead(uint8_t *pData);
hiro99ma 0:be4ff952ae7a 202
hiro99ma 0:be4ff952ae7a 203
hiro99ma 0:be4ff952ae7a 204 /** Read Register
hiro99ma 0:be4ff952ae7a 205 *
hiro99ma 0:be4ff952ae7a 206 * @param [in] Reg FeliCa Link Register
hiro99ma 0:be4ff952ae7a 207 * @param [out] pData data buffer to read
hiro99ma 0:be4ff952ae7a 208 * @retval 0 success
hiro99ma 0:be4ff952ae7a 209 */
hiro99ma 0:be4ff952ae7a 210 inline int readRegister(uint16_t Reg, uint32_t *pData);
hiro99ma 0:be4ff952ae7a 211
hiro99ma 0:be4ff952ae7a 212
hiro99ma 0:be4ff952ae7a 213 /** Write Register Force
hiro99ma 0:be4ff952ae7a 214 *
hiro99ma 0:be4ff952ae7a 215 * @param [in] Reg FeliCa Link Register
hiro99ma 0:be4ff952ae7a 216 * @param [in] Data data buffer to write
hiro99ma 0:be4ff952ae7a 217 * @retval 0 success
hiro99ma 0:be4ff952ae7a 218 */
hiro99ma 0:be4ff952ae7a 219 inline int writeRegisterForce(uint16_t Reg, uint32_t Data);
hiro99ma 0:be4ff952ae7a 220
hiro99ma 0:be4ff952ae7a 221
hiro99ma 0:be4ff952ae7a 222 /** Write Register
hiro99ma 0:be4ff952ae7a 223 *
hiro99ma 1:bb5616cb01fb 224 * Write Register if not same value.
hiro99ma 0:be4ff952ae7a 225 *
hiro99ma 0:be4ff952ae7a 226 * @param [in] Reg FeliCa Link Register
hiro99ma 0:be4ff952ae7a 227 * @param [in] Data data buffer to write
hiro99ma 0:be4ff952ae7a 228 * @param [in] Mask write mask(default: 0xffffffff)
hiro99ma 0:be4ff952ae7a 229 * @retval 0 success
hiro99ma 0:be4ff952ae7a 230 *
hiro99ma 0:be4ff952ae7a 231 * @note
hiro99ma 0:be4ff952ae7a 232 * - this API like below:
hiro99ma 0:be4ff952ae7a 233 * @code
hiro99ma 1:bb5616cb01fb 234 * uint32_t val_old = REG[Reg];
hiro99ma 1:bb5616cb01fb 235 * uint32_t val_new = (val_old & ~Mask) | Data;
hiro99ma 1:bb5616cb01fb 236 * if (val_old != val_new) {
hiro99ma 1:bb5616cb01fb 237 * REG[Reg] = val_new;
hiro99ma 1:bb5616cb01fb 238 * }
hiro99ma 0:be4ff952ae7a 239 * @endcode
hiro99ma 0:be4ff952ae7a 240 */
hiro99ma 0:be4ff952ae7a 241 int writeRegister(uint16_t Reg, uint32_t Data, uint32_t Mask=0xffffffff);
hiro99ma 0:be4ff952ae7a 242
hiro99ma 0:be4ff952ae7a 243
hiro99ma 1:bb5616cb01fb 244 /** Set operation mode
hiro99ma 0:be4ff952ae7a 245 *
hiro99ma 0:be4ff952ae7a 246 * @param [in] Mode Operation Mode
hiro99ma 0:be4ff952ae7a 247 * @retval 0 success
hiro99ma 0:be4ff952ae7a 248 *
hiro99ma 0:be4ff952ae7a 249 * @note
hiro99ma 0:be4ff952ae7a 250 * - This value is written to non-volatile memory in FeliCa Link.
hiro99ma 0:be4ff952ae7a 251 */
hiro99ma 0:be4ff952ae7a 252 int setRegOpMode(OpMode Mode);
hiro99ma 0:be4ff952ae7a 253
hiro99ma 0:be4ff952ae7a 254
hiro99ma 0:be4ff952ae7a 255 /** Set I2C Slave Address
hiro99ma 0:be4ff952ae7a 256 *
hiro99ma 0:be4ff952ae7a 257 * @param [in] SAddr Slave Address(7bit address)
hiro99ma 0:be4ff952ae7a 258 * @retval 0 success
hiro99ma 0:be4ff952ae7a 259 *
hiro99ma 0:be4ff952ae7a 260 * @attention
hiro99ma 0:be4ff952ae7a 261 * - SAddr is "7bit" address(not 8bit address).
hiro99ma 0:be4ff952ae7a 262 *
hiro99ma 0:be4ff952ae7a 263 * @note
hiro99ma 0:be4ff952ae7a 264 * - This value is written to non-volatile memory in FeliCa Link.
hiro99ma 0:be4ff952ae7a 265 * - Default slave address is 0x40.
hiro99ma 0:be4ff952ae7a 266 */
hiro99ma 0:be4ff952ae7a 267 int setRegSlaveAddr(int SAddr);
hiro99ma 0:be4ff952ae7a 268
hiro99ma 0:be4ff952ae7a 269
hiro99ma 1:bb5616cb01fb 270 /** Set interrupt mask
hiro99ma 0:be4ff952ae7a 271 *
hiro99ma 0:be4ff952ae7a 272 * @param [in] Mask Bit Mask
hiro99ma 0:be4ff952ae7a 273 * @param [in] Value Set value to Mask
hiro99ma 0:be4ff952ae7a 274 * @retval 0 success
hiro99ma 0:be4ff952ae7a 275 *
hiro99ma 0:be4ff952ae7a 276 * @note
hiro99ma 0:be4ff952ae7a 277 * - This value is written to non-volatile memory in FeliCa Link.
hiro99ma 0:be4ff952ae7a 278 */
hiro99ma 0:be4ff952ae7a 279 int setRegInterruptMask(uint32_t Mask, uint32_t Value);
hiro99ma 0:be4ff952ae7a 280
hiro99ma 0:be4ff952ae7a 281
hiro99ma 0:be4ff952ae7a 282 /** Set System Code in Plug mode
hiro99ma 0:be4ff952ae7a 283 *
hiro99ma 0:be4ff952ae7a 284 * @param [in] SysCode System Code
hiro99ma 0:be4ff952ae7a 285 * @retval 0 success
hiro99ma 0:be4ff952ae7a 286 *
hiro99ma 0:be4ff952ae7a 287 * @note
hiro99ma 0:be4ff952ae7a 288 * - This value is written to non-volatile memory in FeliCa Link.
hiro99ma 0:be4ff952ae7a 289 */
hiro99ma 0:be4ff952ae7a 290 int setRegPlugSysCode(PlugSysCode SysCode);
hiro99ma 0:be4ff952ae7a 291
hiro99ma 0:be4ff952ae7a 292
hiro99ma 0:be4ff952ae7a 293 /** go to initialize status
hiro99ma 0:be4ff952ae7a 294 *
hiro99ma 0:be4ff952ae7a 295 * @retval 0 success
hiro99ma 0:be4ff952ae7a 296 */
hiro99ma 0:be4ff952ae7a 297 int goToInitializeStatus();
hiro99ma 0:be4ff952ae7a 298
hiro99ma 0:be4ff952ae7a 299
hiro99ma 1:bb5616cb01fb 300 /** initialize to FeliCa Through(FT) mode
hiro99ma 0:be4ff952ae7a 301 *
hiro99ma 0:be4ff952ae7a 302 * @param [in] Mode Operation Mode(OPMODE_LITES_HT or OPMODE_PLUG)
hiro99ma 0:be4ff952ae7a 303 * @retval 0 success
hiro99ma 0:be4ff952ae7a 304 */
hiro99ma 0:be4ff952ae7a 305 int initFTMode(OpMode Mode);
hiro99ma 0:be4ff952ae7a 306
hiro99ma 0:be4ff952ae7a 307
hiro99ma 0:be4ff952ae7a 308 #if 0
hiro99ma 0:be4ff952ae7a 309 /** initialize to NFC-DEP mode
hiro99ma 0:be4ff952ae7a 310 *
hiro99ma 0:be4ff952ae7a 311 * @retval 0 success
hiro99ma 0:be4ff952ae7a 312 */
hiro99ma 0:be4ff952ae7a 313 int initNfcDepMode();
hiro99ma 0:be4ff952ae7a 314 #endif
hiro99ma 0:be4ff952ae7a 315
hiro99ma 0:be4ff952ae7a 316
hiro99ma 0:be4ff952ae7a 317 /** Interrupt Service Routine(IRQ pin)
hiro99ma 0:be4ff952ae7a 318 *
hiro99ma 0:be4ff952ae7a 319 */
hiro99ma 0:be4ff952ae7a 320 void isrIrq();
hiro99ma 0:be4ff952ae7a 321
hiro99ma 0:be4ff952ae7a 322
hiro99ma 0:be4ff952ae7a 323 private:
hiro99ma 0:be4ff952ae7a 324 I2C& _i2c; //!< I2C
hiro99ma 0:be4ff952ae7a 325 int _slvAddr; //!< Slave Address(8bit)
hiro99ma 0:be4ff952ae7a 326 callbacktable_t _cbTable; //!< Callback Table
hiro99ma 0:be4ff952ae7a 327 };
hiro99ma 0:be4ff952ae7a 328
hiro99ma 0:be4ff952ae7a 329 #endif /* RCS730_H */
hiro99ma 0:be4ff952ae7a 330
hiro99ma 0:be4ff952ae7a 331
hiro99ma 0:be4ff952ae7a 332
hiro99ma 0:be4ff952ae7a 333