Henry Herman / MCP23S18

16 channel MUX library

Dependents:   elixys

mcp23s18.h@0:c084a37d5aaf, 2013-12-15 (annotated)

Committer:
henryeherman
Date:
Sun Dec 15 02:41:53 2013 +0000
Revision:
0:c084a37d5aaf
Working IOMux library

Who changed what in which revision?

UserRevisionLine numberNew contents of line
henryeherman 0:c084a37d5aaf 1 #ifndef MCP23S18_h
henryeherman 0:c084a37d5aaf 2 #define MCP23S18_h
henryeherman 0:c084a37d5aaf 3
henryeherman 0:c084a37d5aaf 4 #include "mbed.h"
henryeherman 0:c084a37d5aaf 5
henryeherman 0:c084a37d5aaf 6 // If you set IOCON.BANK = 0 then all
henryeherman 0:c084a37d5aaf 7 // the registers are
henryeherman 0:c084a37d5aaf 8 // BUT each bank uses the lowest significant bit
henryeherman 0:c084a37d5aaf 9 // in the upper word for identifying the bank
henryeherman 0:c084a37d5aaf 10 // We will NOT use this method to address
henryeherman 0:c084a37d5aaf 11 // the registers since it hurts my head :)
henryeherman 0:c084a37d5aaf 12 // I am documenting these registers here simply
henryeherman 0:c084a37d5aaf 13 // as an exercise
henryeherman 0:c084a37d5aaf 14 #define MCP23S18WRADDR 0x40
henryeherman 0:c084a37d5aaf 15 #define MCP23S18RDADDR 0x41
henryeherman 0:c084a37d5aaf 16
henryeherman 0:c084a37d5aaf 17 #define IODIRA_BANK1 0x00
henryeherman 0:c084a37d5aaf 18 #define IODIRB_BANK1 0x10
henryeherman 0:c084a37d5aaf 19 #define IPOLA_BANK1 0x01
henryeherman 0:c084a37d5aaf 20 #define IPOLB_BANK1 0x11
henryeherman 0:c084a37d5aaf 21 #define GPINTENA_BANK1 0x02
henryeherman 0:c084a37d5aaf 22 #define GPINTENB_BANK1 0x12
henryeherman 0:c084a37d5aaf 23 #define DEFVALA_BANK1 0x03
henryeherman 0:c084a37d5aaf 24 #define DEFVALB_BANK1 0x13
henryeherman 0:c084a37d5aaf 25 #define INTCONA_BANK1 0x04
henryeherman 0:c084a37d5aaf 26 #define INTCONB_BANK1 0x14
henryeherman 0:c084a37d5aaf 27 #define IOCONA_BANK1 0x05
henryeherman 0:c084a37d5aaf 28 #define IOCONB_BANK1 0x15
henryeherman 0:c084a37d5aaf 29 #define GPPUA_BANK1 0x06
henryeherman 0:c084a37d5aaf 30 #define GPPUB_BANK1 0x16
henryeherman 0:c084a37d5aaf 31 #define INTFA_BANK1 0x07
henryeherman 0:c084a37d5aaf 32 #define INTFB_BANK1 0x17
henryeherman 0:c084a37d5aaf 33 #define INTCAPA_BANK1 0x08
henryeherman 0:c084a37d5aaf 34 #define INTCAPB_BANK1 0x18
henryeherman 0:c084a37d5aaf 35 #define GPIOA_BANK1 0x09
henryeherman 0:c084a37d5aaf 36 #define GPIOB_BANK1 0x19
henryeherman 0:c084a37d5aaf 37 #define OLATA_BANK1 0x0A
henryeherman 0:c084a37d5aaf 38 #define OLATB_BANK1 0x1A
henryeherman 0:c084a37d5aaf 39
henryeherman 0:c084a37d5aaf 40 // If you set IOCON.BANK = 1 then all
henryeherman 0:c084a37d5aaf 41 // the registers are set sequentially
henryeherman 0:c084a37d5aaf 42 // We will use this method to address
henryeherman 0:c084a37d5aaf 43 // the registers since it hurts my head less :)
henryeherman 0:c084a37d5aaf 44
henryeherman 0:c084a37d5aaf 45 #define IODIRA_BANK0 0x00
henryeherman 0:c084a37d5aaf 46 #define IODIRB_BANK0 0x01
henryeherman 0:c084a37d5aaf 47 #define IPOLA_BANK0 0x02
henryeherman 0:c084a37d5aaf 48 #define IPOLB_BANK0 0x03
henryeherman 0:c084a37d5aaf 49 #define GPINTENA_BANK0 0x04
henryeherman 0:c084a37d5aaf 50 #define GPINTENB_BANK0 0x05
henryeherman 0:c084a37d5aaf 51 #define DEFVALA_BANK0 0x06
henryeherman 0:c084a37d5aaf 52 #define DEFVALB_BANK0 0x07
henryeherman 0:c084a37d5aaf 53 #define INTCONA_BANK0 0x08
henryeherman 0:c084a37d5aaf 54 #define INTCONB_BANK0 0x09
henryeherman 0:c084a37d5aaf 55 #define IOCONA_BANK0 0x0A
henryeherman 0:c084a37d5aaf 56 #define IOCONB_BANK0 0x0B
henryeherman 0:c084a37d5aaf 57 #define GPPUA_BANK0 0x0C
henryeherman 0:c084a37d5aaf 58 #define GPPUB_BANK0 0x0D
henryeherman 0:c084a37d5aaf 59 #define INTFA_BANK0 0x0E
henryeherman 0:c084a37d5aaf 60 #define INTFB_BANK0 0x0F
henryeherman 0:c084a37d5aaf 61 #define INTCAPA_BANK0 0x10
henryeherman 0:c084a37d5aaf 62 #define INTCAPB_BANK0 0x11
henryeherman 0:c084a37d5aaf 63 #define GPIOA_BANK0 0x12
henryeherman 0:c084a37d5aaf 64 #define GPIOB_BANK0 0x13
henryeherman 0:c084a37d5aaf 65 #define OLATA_BANK0 0x14
henryeherman 0:c084a37d5aaf 66 #define OLATB_BANK0 0x15
henryeherman 0:c084a37d5aaf 67
henryeherman 0:c084a37d5aaf 68 #define IODIRn_IO0 (1<<0)
henryeherman 0:c084a37d5aaf 69 #define IODIRn_IO1 (1<<1)
henryeherman 0:c084a37d5aaf 70 #define IODIRn_IO2 (1<<2)
henryeherman 0:c084a37d5aaf 71 #define IODIRn_IO3 (1<<3)
henryeherman 0:c084a37d5aaf 72 #define IODIRn_IO4 (1<<4)
henryeherman 0:c084a37d5aaf 73 #define IODIRn_IO5 (1<<5)
henryeherman 0:c084a37d5aaf 74 #define IODIRn_IO6 (1<<6)
henryeherman 0:c084a37d5aaf 75 #define IODIRn_IO7 (1<<7)
henryeherman 0:c084a37d5aaf 76
henryeherman 0:c084a37d5aaf 77 #define IPOLn_IP0 (1<<0)
henryeherman 0:c084a37d5aaf 78 #define IPOLn_IP1 (1<<1)
henryeherman 0:c084a37d5aaf 79 #define IPOLn_IP2 (1<<2)
henryeherman 0:c084a37d5aaf 80 #define IPOLn_IP3 (1<<3)
henryeherman 0:c084a37d5aaf 81 #define IPOLn_IP4 (1<<4)
henryeherman 0:c084a37d5aaf 82 #define IPOLn_IP5 (1<<5)
henryeherman 0:c084a37d5aaf 83 #define IPOLn_IP6 (1<<6)
henryeherman 0:c084a37d5aaf 84 #define IPOLn_IP7 (1<<7)
henryeherman 0:c084a37d5aaf 85
henryeherman 0:c084a37d5aaf 86 #define GPINTENn_GPINT0 (1<<0)
henryeherman 0:c084a37d5aaf 87 #define GPINTENn_GPINT1 (1<<1)
henryeherman 0:c084a37d5aaf 88 #define GPINTENn_GPINT2 (1<<2)
henryeherman 0:c084a37d5aaf 89 #define GPINTENn_GPINT3 (1<<3)
henryeherman 0:c084a37d5aaf 90 #define GPINTENn_GPINT4 (1<<4)
henryeherman 0:c084a37d5aaf 91 #define GPINTENn_GPINT5 (1<<5)
henryeherman 0:c084a37d5aaf 92 #define GPINTENn_GPINT6 (1<<6)
henryeherman 0:c084a37d5aaf 93 #define GPINTENn_GPINT7 (1<<7)
henryeherman 0:c084a37d5aaf 94
henryeherman 0:c084a37d5aaf 95 #define DEFVALn_DEF0 (1<<0)
henryeherman 0:c084a37d5aaf 96 #define DEFVALn_DEF1 (1<<1)
henryeherman 0:c084a37d5aaf 97 #define DEFVALn_DEF2 (1<<2)
henryeherman 0:c084a37d5aaf 98 #define DEFVALn_DEF3 (1<<3)
henryeherman 0:c084a37d5aaf 99 #define DEFVALn_DEF4 (1<<4)
henryeherman 0:c084a37d5aaf 100 #define DEFVALn_DEF5 (1<<5)
henryeherman 0:c084a37d5aaf 101 #define DEFVALn_DEF6 (1<<6)
henryeherman 0:c084a37d5aaf 102 #define DEFVALn_DEF7 (1<<7)
henryeherman 0:c084a37d5aaf 103
henryeherman 0:c084a37d5aaf 104 #define INTCONn_IOC0 (1<<0)
henryeherman 0:c084a37d5aaf 105 #define INTCONn_IOC1 (1<<1)
henryeherman 0:c084a37d5aaf 106 #define INTCONn_IOC2 (1<<2)
henryeherman 0:c084a37d5aaf 107 #define INTCONn_IOC3 (1<<3)
henryeherman 0:c084a37d5aaf 108 #define INTCONn_IOC4 (1<<4)
henryeherman 0:c084a37d5aaf 109 #define INTCONn_IOC5 (1<<5)
henryeherman 0:c084a37d5aaf 110 #define INTCONn_IOC6 (1<<6)
henryeherman 0:c084a37d5aaf 111 #define INTCONn_IOC7 (1<<7)
henryeherman 0:c084a37d5aaf 112
henryeherman 0:c084a37d5aaf 113 #define IOCON_INTCC (1<<0)
henryeherman 0:c084a37d5aaf 114 #define IOCON_INTPOL (1<<1)
henryeherman 0:c084a37d5aaf 115 #define IOCON_ODR (1<<2)
henryeherman 0:c084a37d5aaf 116 #define IOCON_RSVD0 (1<<3)
henryeherman 0:c084a37d5aaf 117 #define IOCON_RSVD1 (1<<4)
henryeherman 0:c084a37d5aaf 118 #define IOCON_SEQOP (1<<5)
henryeherman 0:c084a37d5aaf 119 #define IOCON_MIRROR (1<<6)
henryeherman 0:c084a37d5aaf 120 #define IOCON_BANK (1<<7)
henryeherman 0:c084a37d5aaf 121 #define IOX_ALLOUTPUT 0x00000000
henryeherman 0:c084a37d5aaf 122 #define IOX_ALLINPUT 0xFFFFFFFF
henryeherman 0:c084a37d5aaf 123 #define IOX_ALLINVERTED 0x00000000
henryeherman 0:c084a37d5aaf 124 #define IOX_NONEINVERTED 0xFFFFFFFF
henryeherman 0:c084a37d5aaf 125
henryeherman 0:c084a37d5aaf 126 class mcp23s18
henryeherman 0:c084a37d5aaf 127 {
henryeherman 0:c084a37d5aaf 128 SPI& spi;
henryeherman 0:c084a37d5aaf 129 void(*selectfxn)(void);
henryeherman 0:c084a37d5aaf 130 void(*unselectfxn)(void);
henryeherman 0:c084a37d5aaf 131 //DigitalOut ncs;
henryeherman 0:c084a37d5aaf 132 public:
henryeherman 0:c084a37d5aaf 133
henryeherman 0:c084a37d5aaf 134 mcp23s18(SPI& _spi, void(*sel)(void), void(*usel)(void));
henryeherman 0:c084a37d5aaf 135 void configspi();
henryeherman 0:c084a37d5aaf 136 void select();
henryeherman 0:c084a37d5aaf 137 void deselect();
henryeherman 0:c084a37d5aaf 138 int initialize(int setType=0);
henryeherman 0:c084a37d5aaf 139 int read_config();
henryeherman 0:c084a37d5aaf 140 void set_direction(unsigned int dirpins);
henryeherman 0:c084a37d5aaf 141 int read_direction();
henryeherman 0:c084a37d5aaf 142 void set_all_output();
henryeherman 0:c084a37d5aaf 143 void set_all_input();
henryeherman 0:c084a37d5aaf 144
henryeherman 0:c084a37d5aaf 145 void set_inverted(unsigned int dirpins);
henryeherman 0:c084a37d5aaf 146 void set_all_inverted();
henryeherman 0:c084a37d5aaf 147 void set_none_inverted();
henryeherman 0:c084a37d5aaf 148
henryeherman 0:c084a37d5aaf 149 void set_pullups(unsigned int pupins);
henryeherman 0:c084a37d5aaf 150 int read_pullups();
henryeherman 0:c084a37d5aaf 151 void set_all_pullups();
henryeherman 0:c084a37d5aaf 152 void set_none_pullups();
henryeherman 0:c084a37d5aaf 153
henryeherman 0:c084a37d5aaf 154 void write_port(unsigned int value);
henryeherman 0:c084a37d5aaf 155
henryeherman 0:c084a37d5aaf 156 int read_register(char reg);
henryeherman 0:c084a37d5aaf 157
henryeherman 0:c084a37d5aaf 158 int read_port();
henryeherman 0:c084a37d5aaf 159 int read_latch();
henryeherman 0:c084a37d5aaf 160
henryeherman 0:c084a37d5aaf 161 int faultCode;
henryeherman 0:c084a37d5aaf 162
henryeherman 0:c084a37d5aaf 163 private:
henryeherman 0:c084a37d5aaf 164 float _error;
henryeherman 0:c084a37d5aaf 165 };
henryeherman 0:c084a37d5aaf 166
henryeherman 0:c084a37d5aaf 167 #endif