MCUFRIEND_kbv.cpp

00001 // link:
00002 // https://os.mbed.com/users/davidprentice/code/Nucleo_dir_L152//file/d88d2ad55fac/main.cpp/
00003 // Committer: davidprentice
00004 // Date:      19 months ago
00005 // 2021-04-21
00006 //
00007 // MCUFRIEND_kbv.cpp
00008 //
00009 
00010 //#define SUPPORT_0139              //S6D0139 +280 bytes
00011 #define SUPPORT_0154              //S6D0154 +320 bytes
00012 //#define SUPPORT_1289              //SSD1289,SSD1297 (ID=0x9797) +626 bytes, 0.03s
00013 //#define SUPPORT_1580              //R61580 Untested
00014 #define SUPPORT_1963              //only works with 16BIT bus anyway
00015 //#define SUPPORT_4532              //LGDP4532 +120 bytes.  thanks Leodino
00016 #define SUPPORT_4535              //LGDP4535 +180 bytes
00017 #define SUPPORT_68140             //RM68140 +52 bytes defaults to PIXFMT=0x55
00018 //#define SUPPORT_7735
00019 #define SUPPORT_7781              //ST7781 +172 bytes
00020 //#define SUPPORT_8230              //UC8230 +118 bytes
00021 //#define SUPPORT_8347D             //HX8347-D, HX8347-G, HX8347-I, HX8367-A +520 bytes, 0.27s
00022 //#define SUPPORT_8347A             //HX8347-A +500 bytes, 0.27s
00023 //#define SUPPORT_8352A             //HX8352A +486 bytes, 0.27s
00024 //#define SUPPORT_8352B             //HX8352B
00025 //#define SUPPORT_8357D_GAMMA       //monster 34 byte 
00026 //#define SUPPORT_9163              //
00027 //#define SUPPORT_9225              //ILI9225-B, ILI9225-G ID=0x9225, ID=0x9226, ID=0x6813 +380 bytes
00028 //#define SUPPORT_9326_5420         //ILI9326, SPFD5420 +246 bytes
00029 //#define SUPPORT_9342              //costs +114 bytes
00030 //#define SUPPORT_9806              //UNTESTED
00031 #define SUPPORT_9488_555          //costs +230 bytes, 0.03s / 0.19s
00032 #define SUPPORT_B509_7793         //R61509, ST7793 +244 bytes
00033 #define OFFSET_9327 32            //costs about 103 bytes, 0.08s
00034  
00035 #include "MCUFRIEND_kbv.h"
00036 #if defined(USE_SERIAL)
00037 #include "utility/mcufriend_serial.h"
00038  //uint8_t running;
00039 #elif defined(__MBED__)
00040 #include "utility/mcufriend_mbed.h"
00041 #elif defined(__CC_ARM) || defined(__CROSSWORKS_ARM)
00042 #include "utility/mcufriend_keil.h"
00043 #else
00044 #include "utility/mcufriend_shield.h"
00045 #endif
00046  
00047 #define MIPI_DCS_REV1   (1<<0)
00048 #define AUTO_READINC    (1<<1)
00049 #define READ_BGR        (1<<2)
00050 #define READ_LOWHIGH    (1<<3)
00051 #define READ_24BITS     (1<<4)
00052 #define XSA_XEA_16BIT   (1<<5)
00053 #define READ_NODUMMY    (1<<6)
00054 #define INVERT_GS       (1<<8)
00055 #define INVERT_SS       (1<<9)
00056 #define MV_AXIS         (1<<10)
00057 #define INVERT_RGB      (1<<11)
00058 #define REV_SCREEN      (1<<12)
00059 #define FLIP_VERT       (1<<13)
00060 #define FLIP_HORIZ      (1<<14)
00061  
00062 #if (defined(USES_16BIT_BUS))   //only comes from SPECIALs
00063 #define USING_16BIT_BUS 1
00064 #else
00065 #define USING_16BIT_BUS 0
00066 #endif
00067  
00068 MCUFRIEND_kbv::MCUFRIEND_kbv(int CS, int RS, int WR, int RD, int _RST):Adafruit_GFX(240, 320)
00069 {
00070     // we can not access GPIO pins until AHB has been enabled.
00071 }
00072  
00073 static uint8_t done_reset, is8347, is555, is9797;
00074 static uint16_t color565_to_555(uint16_t color) {
00075     return (color & 0xFFC0) | ((color & 0x1F) << 1) | ((color & 0x01));  //lose Green LSB, extend Blue LSB
00076 }
00077 static uint16_t color555_to_565(uint16_t color) {
00078     return (color & 0xFFC0) | ((color & 0x0400) >> 5) | ((color & 0x3F) >> 1); //extend Green LSB
00079 }
00080 static uint8_t color565_to_r(uint16_t color) {
00081     return ((color & 0xF800) >> 8);  // transform to rrrrrxxx
00082 }
00083 static uint8_t color565_to_g(uint16_t color) {
00084     return ((color & 0x07E0) >> 3);  // transform to ggggggxx
00085 }
00086 static uint8_t color565_to_b(uint16_t color) {
00087     return ((color & 0x001F) << 3);  // transform to bbbbbxxx
00088 }
00089 static void write24(uint16_t color) {
00090     uint8_t r = color565_to_r(color);
00091     uint8_t g = color565_to_g(color);
00092     uint8_t b = color565_to_b(color);
00093     write8(r);
00094     write8(g);
00095     write8(b);
00096 }
00097  
00098 void MCUFRIEND_kbv::reset(void)
00099 {
00100     done_reset = 1;
00101     setWriteDir();
00102     CTL_INIT();
00103     CS_IDLE;
00104     RD_IDLE;
00105     WR_IDLE;
00106     RESET_IDLE;
00107     delay(50);
00108     RESET_ACTIVE;
00109     delay(100);
00110     RESET_IDLE;
00111     delay(100);
00112     WriteCmdData(0xB0, 0x0000);   //R61520 needs this to read ID
00113 }
00114  
00115 static void writecmddata(uint16_t cmd, uint16_t dat)
00116 {
00117     CS_ACTIVE;
00118     WriteCmd(cmd);
00119     WriteData(dat);
00120     CS_IDLE;
00121 }
00122  
00123 void MCUFRIEND_kbv::WriteCmdData(uint16_t cmd, uint16_t dat) { writecmddata(cmd, dat); }
00124  
00125 static void WriteCmdParamN(uint16_t cmd, int8_t N, uint8_t * block)
00126 {
00127     CS_ACTIVE;
00128     WriteCmd(cmd);
00129     while (N-- > 0) {
00130         uint8_t u8 = *block++;
00131         write8(u8);
00132         if (N && is8347) {
00133             cmd++;
00134             WriteCmd(cmd);
00135         }
00136     }
00137     CS_IDLE;
00138 }
00139  
00140 static inline void WriteCmdParam4(uint8_t cmd, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4)
00141 {
00142     uint8_t d[4];
00143     d[0] = d1, d[1] = d2, d[2] = d3, d[3] = d4;
00144     WriteCmdParamN(cmd, 4, d);
00145 }
00146  
00147 //#define WriteCmdParam4(cmd, d1, d2, d3, d4) {uint8_t d[4];d[0] = d1, d[1] = d2, d[2] = d3, d[3] = d4;WriteCmdParamN(cmd, 4, d);}
00148 void MCUFRIEND_kbv::pushCommand(uint16_t cmd, uint8_t * block, int8_t N) { WriteCmdParamN(cmd, N, block); }
00149  
00150 static uint16_t read16bits(void)
00151 {
00152     uint16_t ret;
00153     uint8_t lo;
00154 #if USING_16BIT_BUS
00155     READ_16(ret);               //single strobe to read whole bus
00156     if (ret > 255)              //ID might say 0x00D3
00157         return ret;
00158 #else
00159     READ_8(ret);
00160 #endif
00161     //all MIPI_DCS_REV1 style params are 8-bit
00162     READ_8(lo);
00163     return (ret << 8) | lo;
00164 }
00165  
00166 uint16_t MCUFRIEND_kbv::readReg(uint16_t reg, int8_t index)
00167 {
00168     uint16_t ret;
00169     uint8_t lo;
00170     if (!done_reset)
00171         reset();
00172     CS_ACTIVE;
00173     WriteCmd(reg);
00174     setReadDir();
00175     delay(1);    //1us should be adequate
00176     //    READ_16(ret);
00177     do { ret = read16bits(); }while (--index >= 0);  //need to test with SSD1963
00178     RD_IDLE;
00179     CS_IDLE;
00180     setWriteDir();
00181     return ret;
00182 }
00183  
00184 uint32_t MCUFRIEND_kbv::readReg32(uint16_t reg)
00185 {
00186     uint16_t h = readReg(reg, 0);
00187     uint16_t l = readReg(reg, 1);
00188     return ((uint32_t) h << 16) | (l);
00189 }
00190  
00191 uint32_t MCUFRIEND_kbv::readReg40(uint16_t reg)
00192 {
00193     uint16_t h = readReg(reg, 0);
00194     uint16_t m = readReg(reg, 1);
00195     uint16_t l = readReg(reg, 2);
00196     return ((uint32_t) h << 24) | (m << 8) | (l >> 8);
00197 }
00198  
00199 uint16_t MCUFRIEND_kbv::readID(void)
00200 {
00201     uint16_t ret, ret2;
00202     uint8_t msb;
00203     ret = readReg(0);           //forces a reset() if called before begin()
00204     if (ret == 0x5408)          //the SPFD5408 fails the 0xD3D3 test.
00205         return 0x5408;
00206     if (ret == 0x5420)          //the SPFD5420 fails the 0xD3D3 test.
00207         return 0x5420;
00208     if (ret == 0x8989)          //SSD1289 is always 8989
00209         return 0x1289;
00210     ret = readReg(0x67);        //HX8347-A
00211     if (ret == 0x4747)
00212         return 0x8347;
00213 //#if defined(SUPPORT_1963) && USING_16BIT_BUS 
00214     ret = readReg32(0xA1);      //SSD1963: [01 57 61 01]
00215     if (ret == 0x6101)
00216         return 0x1963;
00217     if (ret == 0xFFFF)          //R61526: [xx FF FF FF]
00218         return 0x1526;          //subsequent begin() enables Command Access
00219 //    if (ret == 0xFF00)          //R61520: [xx FF FF 00]
00220 //        return 0x1520;          //subsequent begin() enables Command Access
00221 //#endif
00222     ret = readReg40(0xBF);
00223     if (ret == 0x8357)          //HX8357B: [xx 01 62 83 57 FF]
00224         return 0x8357;
00225     if (ret == 0x9481)          //ILI9481: [xx 02 04 94 81 FF]
00226         return 0x9481;
00227     if (ret == 0x1511)          //?R61511: [xx 02 04 15 11] not tested yet
00228         return 0x1511;
00229     if (ret == 0x1520)          //?R61520: [xx 01 22 15 20]
00230         return 0x1520;
00231     if (ret == 0x1526)          //?R61526: [xx 01 22 15 26]
00232         return 0x1526;
00233     if (ret == 0x1581)          //R61581:  [xx 01 22 15 81]
00234         return 0x1581;
00235     if (ret == 0x1400)          //?RM68140:[xx FF 68 14 00] not tested yet
00236         return 0x6814;
00237     ret = readReg32(0xD4);
00238     if (ret == 0x5310)          //NT35310: [xx 01 53 10]
00239         return 0x5310;
00240     ret = readReg32(0xD7);
00241     if (ret == 0x8031)          //weird unknown from BangGood [xx 20 80 31] PrinceCharles
00242         return 0x8031;
00243     ret = readReg40(0xEF);      //ILI9327: [xx 02 04 93 27 FF] 
00244     if (ret == 0x9327)
00245         return 0x9327;
00246     ret = readReg32(0xFE) >> 8; //weird unknown from BangGood [04 20 53] 
00247     if (ret == 0x2053)
00248         return 0x2053;
00249     uint32_t ret32 = readReg32(0x04);
00250     msb = ret32 >> 16;
00251     ret = ret32;    
00252 //    if (msb = 0x38 && ret == 0x8000) //unknown [xx 38 80 00] with D3 = 0x1602
00253     if (msb == 0x00 && ret == 0x8000) { //HX8357-D [xx 00 80 00]
00254 #if 1
00255         uint8_t cmds[] = {0xFF, 0x83, 0x57};
00256         pushCommand(0xB9, cmds, 3);
00257         msb = readReg(0xD0);
00258         if (msb == 0x99) return 0x0099; //HX8357-D from datasheet
00259         if (msb == 0x90)        //HX8357-C undocumented  
00260 #endif
00261             return 0x9090;      //BIG CHANGE: HX8357-D was 0x8357
00262     }
00263 //    if (msb == 0xFF && ret == 0xFFFF) //R61526 [xx FF FF FF]
00264 //        return 0x1526;          //subsequent begin() enables Command Access
00265     if (ret == 0x1526)          //R61526 [xx 06 15 26] if I have written NVM
00266         return 0x1526;          //subsequent begin() enables Command Access
00267     if (ret == 0x89F0)          //ST7735S: [xx 7C 89 F0]
00268         return 0x7735;
00269     if (ret == 0x8552)          //ST7789V: [xx 85 85 52]
00270         return 0x7789;
00271     if (ret == 0xAC11)          //?unknown [xx 61 AC 11]
00272         return 0xAC11;
00273     ret32 = readReg32(0xD3);      //[xx 91 63 00]
00274     ret = ret32 >> 8;
00275     if (ret == 0x9163) return ret;
00276     ret = readReg32(0xD3);      //for ILI9488, 9486, 9340, 9341
00277     msb = ret >> 8;
00278     if (msb == 0x93 || msb == 0x94 || msb == 0x98 || msb == 0x77 || msb == 0x16)
00279         return ret;             //0x9488, 9486, 9340, 9341, 7796
00280     if (ret == 0x00D3 || ret == 0xD3D3)
00281         return ret;             //16-bit write-only bus
00282 /*
00283     msb = 0x12;                 //read 3rd,4th byte.  does not work in parallel
00284     pushCommand(0xD9, &msb, 1);
00285     ret2 = readReg(0xD3);
00286     msb = 0x13;
00287     pushCommand(0xD9, &msb, 1);
00288     ret = (ret2 << 8) | readReg(0xD3);
00289 //  if (ret2 == 0x93)
00290         return ret2;
00291 */
00292     return readReg(0);          //0154, 7783, 9320, 9325, 9335, B505, B509
00293 }
00294  
00295  // independent cursor and window registers.   S6D0154, ST7781 increments.  ILI92320/5 do not.  
00296 int16_t MCUFRIEND_kbv::readGRAM(int16_t x, int16_t y, uint16_t * block, int16_t w, int16_t h)
00297 {
00298     uint16_t ret, dummy, _MR = _MW;
00299     int16_t n = w * h, row = 0, col = 0;
00300     uint8_t r, g, b, tmp;
00301     if (!is8347 && _lcd_capable & MIPI_DCS_REV1) // HX8347 uses same register
00302         _MR = 0x2E;
00303     if (_lcd_ID == 0x1602) _MR = 0x2E;
00304     setAddrWindow(x, y, x + w - 1, y + h - 1);
00305     while (n > 0) {
00306         if (!(_lcd_capable & MIPI_DCS_REV1)) {
00307             WriteCmdData(_MC, x + col);
00308             WriteCmdData(_MP, y + row);
00309         }
00310         CS_ACTIVE;
00311         WriteCmd(_MR);
00312         setReadDir();
00313         if (_lcd_capable & READ_NODUMMY) {
00314             ;
00315         } else if ((_lcd_capable & MIPI_DCS_REV1) || _lcd_ID == 0x1289) {
00316             READ_8(r);
00317         } else {
00318             READ_16(dummy);
00319         }
00320         if (_lcd_ID == 0x1511) READ_8(r);   //extra dummy for R61511
00321         while (n) {
00322             if (_lcd_capable & READ_24BITS) {
00323                 READ_8(r);
00324                 READ_8(g);
00325                 READ_8(b);
00326                 if (_lcd_capable & READ_BGR)
00327                     ret = color565(b, g, r);
00328                 else
00329                     ret = color565(r, g, b);
00330             } else {
00331                 READ_16(ret);
00332                 if (_lcd_capable & READ_LOWHIGH)
00333                     ret = (ret >> 8) | (ret << 8);
00334                 if (_lcd_capable & READ_BGR)
00335                     ret = (ret & 0x07E0) | (ret >> 11) | (ret << 11);
00336             }
00337 #if defined(SUPPORT_9488_555)
00338     if (is555) ret = color555_to_565(ret);
00339 #endif
00340             *block++ = ret;
00341             n--;
00342             if (!(_lcd_capable & AUTO_READINC))
00343                 break;
00344         }
00345         if (++col >= w) {
00346             col = 0;
00347             if (++row >= h)
00348                 row = 0;
00349         }
00350         RD_IDLE;
00351         CS_IDLE;
00352         setWriteDir();
00353     }
00354     if (!(_lcd_capable & MIPI_DCS_REV1))
00355         setAddrWindow(0, 0, width() - 1, height() - 1);
00356     return 0;
00357 }
00358  
00359 void MCUFRIEND_kbv::setRotation(uint8_t r)
00360 {
00361     uint16_t GS, SS_v, ORG, REV = _lcd_rev;
00362     uint8_t val, d[3];
00363     rotation = r & 3;           // just perform the operation ourselves on the protected variables
00364     _width = (rotation & 1) ? HEIGHT : WIDTH;
00365     _height = (rotation & 1) ? WIDTH : HEIGHT;
00366     switch (rotation) {
00367     case 0:                    //PORTRAIT:
00368         val = 0x48;             //MY=0, MX=1, MV=0, ML=0, BGR=1
00369         break;
00370     case 1:                    //LANDSCAPE: 90 degrees
00371         val = 0x28;             //MY=0, MX=0, MV=1, ML=0, BGR=1
00372         break;
00373     case 2:                    //PORTRAIT_REV: 180 degrees
00374         val = 0x98;             //MY=1, MX=0, MV=0, ML=1, BGR=1
00375         break;
00376     case 3:                    //LANDSCAPE_REV: 270 degrees
00377         val = 0xF8;             //MY=1, MX=1, MV=1, ML=1, BGR=1
00378         break;
00379     }
00380     if (_lcd_capable & INVERT_GS)
00381         val ^= 0x80;
00382     if (_lcd_capable & INVERT_SS)
00383         val ^= 0x40;
00384     if (_lcd_capable & INVERT_RGB)
00385         val ^= 0x08;
00386     if (_lcd_capable & MIPI_DCS_REV1) {
00387         if (_lcd_ID == 0x6814) {  //.kbv my weird 0x9486 might be 68140
00388             GS = (val & 0x80) ? (1 << 6) : 0;   //MY
00389             SS_v = (val & 0x40) ? (1 << 5) : 0;   //MX
00390             val &= 0x28;        //keep MV, BGR, MY=0, MX=0, ML=0
00391             d[0] = 0;
00392             d[1] = GS | SS_v | 0x02;      //MY, MX
00393             d[2] = 0x3B;
00394             WriteCmdParamN(0xB6, 3, d);
00395             goto common_MC;
00396         } else if (_lcd_ID == 0x1963 || _lcd_ID == 0x9481 || _lcd_ID == 0x1511) {
00397             if (val & 0x80)
00398                 val |= 0x01;    //GS
00399             if ((val & 0x40))
00400                 val |= 0x02;    //SS
00401             if (_lcd_ID == 0x1963) val &= ~0xC0;
00402             if (_lcd_ID == 0x9481) val &= ~0xD0;
00403             if (_lcd_ID == 0x1511) {
00404                 val &= ~0x10;   //remove ML
00405                 val |= 0xC0;    //force penguin 180 rotation
00406             }
00407 //            val &= (_lcd_ID == 0x1963) ? ~0xC0 : ~0xD0; //MY=0, MX=0 with ML=0 for ILI9481
00408             goto common_MC;
00409         } else if (is8347) {
00410             _MC = 0x02, _MP = 0x06, _MW = 0x22, _SC = 0x02, _EC = 0x04, _SP = 0x06, _EP = 0x08;
00411             if (_lcd_ID == 0x0065) {             //HX8352-B
00412                 val |= 0x01;    //GS=1
00413                 if ((val & 0x10)) val ^= 0xD3;  //(ML) flip MY, MX, ML, SS, GS
00414                 if (r & 1) _MC = 0x82, _MP = 0x80;
00415                 else _MC = 0x80, _MP = 0x82;
00416             }
00417             if (_lcd_ID == 0x5252) {             //HX8352-A
00418                 val |= 0x02;   //VERT_SCROLLON
00419                 if ((val & 0x10)) val ^= 0xD4;  //(ML) flip MY, MX, SS. GS=1
00420             }
00421             goto common_BGR;
00422         }
00423       common_MC:
00424         _MC = 0x2A, _MP = 0x2B, _MW = 0x2C, _SC = 0x2A, _EC = 0x2A, _SP = 0x2B, _EP = 0x2B;
00425       common_BGR:
00426         WriteCmdParamN(is8347 ? 0x16 : 0x36, 1, &val);
00427         _lcd_madctl = val;
00428 //      if (_lcd_ID == 0x1963) WriteCmdParamN(0x13, 0, NULL);   //NORMAL mode
00429     }
00430     // cope with 9320 variants
00431     else {
00432         switch (_lcd_ID) {
00433 #if defined(SUPPORT_9225)
00434         case 0x9225:
00435             _SC = 0x37, _EC = 0x36, _SP = 0x39, _EP = 0x38;
00436             _MC = 0x20, _MP = 0x21, _MW = 0x22;
00437             GS = (val & 0x80) ? (1 << 9) : 0;
00438             SS_v = (val & 0x40) ? (1 << 8) : 0;
00439             WriteCmdData(0x01, GS | SS_v | 0x001C);       // set Driver Output Control
00440             goto common_ORG;
00441 #endif
00442 #if defined(SUPPORT_0139) || defined(SUPPORT_0154)
00443 #ifdef SUPPORT_0139
00444         case 0x0139:
00445             _SC = 0x46, _EC = 0x46, _SP = 0x48, _EP = 0x47;
00446             goto common_S6D;
00447 #endif
00448 #ifdef SUPPORT_0154
00449         case 0x0154:
00450             _SC = 0x37, _EC = 0x36, _SP = 0x39, _EP = 0x38;
00451             goto common_S6D;
00452 #endif
00453           common_S6D:
00454             _MC = 0x20, _MP = 0x21, _MW = 0x22;
00455             GS = (val & 0x80) ? (1 << 9) : 0;
00456             SS_v = (val & 0x40) ? (1 << 8) : 0;
00457             // S6D0139 requires NL = 0x27,  S6D0154 NL = 0x28
00458             WriteCmdData(0x01, GS | SS_v | ((_lcd_ID == 0x0139) ? 0x27 : 0x28));
00459             goto common_ORG;
00460 #endif
00461         case 0x5420:
00462         case 0x7793:
00463         case 0x9326:
00464         case 0xB509:
00465             _MC = 0x200, _MP = 0x201, _MW = 0x202, _SC = 0x210, _EC = 0x211, _SP = 0x212, _EP = 0x213;
00466             GS = (val & 0x80) ? (1 << 15) : 0;
00467             uint16_t NL;
00468             NL = ((432 / 8) - 1) << 9;
00469             if (_lcd_ID == 0x9326 || _lcd_ID == 0x5420) NL >>= 1;
00470             WriteCmdData(0x400, GS | NL);
00471             goto common_SS;
00472         default:
00473             _MC = 0x20, _MP = 0x21, _MW = 0x22, _SC = 0x50, _EC = 0x51, _SP = 0x52, _EP = 0x53;
00474             GS = (val & 0x80) ? (1 << 15) : 0;
00475             WriteCmdData(0x60, GS | 0x2700);    // Gate Scan Line (0xA700)
00476           common_SS:
00477             SS_v = (val & 0x40) ? (1 << 8) : 0;
00478             WriteCmdData(0x01, SS_v);     // set Driver Output Control
00479           common_ORG:
00480             ORG = (val & 0x20) ? (1 << 3) : 0;
00481 #ifdef SUPPORT_8230
00482             if (_lcd_ID == 0x8230) {    // UC8230 has strange BGR and READ_BGR behaviour
00483                 if (rotation == 1 || rotation == 2) {
00484                     val ^= 0x08;        // change BGR bit for LANDSCAPE and PORTRAIT_REV
00485                 }
00486             }               
00487 #endif
00488             if (val & 0x08)
00489                 ORG |= 0x1000;  //BGR
00490             _lcd_madctl = ORG | 0x0030;
00491             WriteCmdData(0x03, _lcd_madctl);    // set GRAM write direction and BGR=1.
00492             break;
00493 #ifdef SUPPORT_1289
00494         case 0x1289:
00495             _MC = 0x4E, _MP = 0x4F, _MW = 0x22, _SC = 0x44, _EC = 0x44, _SP = 0x45, _EP = 0x46;
00496             if (rotation & 1)
00497                 val ^= 0xD0;    // exchange Landscape modes
00498             GS = (val & 0x80) ? (1 << 14) : 0;    //called TB (top-bottom), CAD=0
00499             SS_v = (val & 0x40) ? (1 << 9) : 0;   //called RL (right-left)
00500             ORG = (val & 0x20) ? (1 << 3) : 0;  //called AM
00501             _lcd_drivOut = GS | SS_v | (REV << 13) | 0x013F;      //REV=0, BGR=0, MUX=319
00502             if (val & 0x08)
00503                 _lcd_drivOut |= 0x0800; //BGR
00504             WriteCmdData(0x01, _lcd_drivOut);   // set Driver Output Control
00505             if (is9797) WriteCmdData(0x11, ORG | 0x4C30); else  // DFM=2, DEN=1, WM=1, TY=0
00506             WriteCmdData(0x11, ORG | 0x6070);   // DFM=3, EN=0, TY=1
00507             break;
00508 #endif
00509         }
00510     }
00511     if ((rotation & 1) && ((_lcd_capable & MV_AXIS) == 0)) {
00512         uint16_t x;
00513         x = _MC, _MC = _MP, _MP = x;
00514         x = _SC, _SC = _SP, _SP = x;    //.kbv check 0139
00515         x = _EC, _EC = _EP, _EP = x;    //.kbv check 0139
00516     }
00517     setAddrWindow(0, 0, width() - 1, height() - 1);
00518     vertScroll(0, HEIGHT, 0);   //reset scrolling after a rotation
00519 }
00520  
00521 void MCUFRIEND_kbv::drawPixel(int16_t x, int16_t y, uint16_t color)
00522 {
00523     // MCUFRIEND just plots at edge if you try to write outside of the box:
00524     if (x < 0 || y < 0 || x >= width() || y >= height())
00525         return;
00526 #if defined(SUPPORT_9488_555)
00527     if (is555) color = color565_to_555(color);
00528 #endif
00529     setAddrWindow(x, y, x, y);
00530 //    CS_ACTIVE; WriteCmd(_MW); write16(color); CS_IDLE; //-0.01s +98B
00531     if (is9797) { CS_ACTIVE; WriteCmd(_MW); write24(color); CS_IDLE;} else
00532     WriteCmdData(_MW, color);
00533 }
00534  
00535 void MCUFRIEND_kbv::setAddrWindow(int16_t x, int16_t y, int16_t x1, int16_t y1)
00536 {
00537 #if defined(OFFSET_9327)
00538     if (_lcd_ID == 0x9327) {
00539         if (rotation == 2) y += OFFSET_9327, y1 += OFFSET_9327;
00540         if (rotation == 3) x += OFFSET_9327, x1 += OFFSET_9327;
00541     }
00542 #endif
00543 #if 1
00544     if (_lcd_ID == 0x1526 && (rotation & 1)) {
00545         int16_t dx = x1 - x, dy = y1 - y;
00546         if (dy == 0) { y1++; }
00547         else if (dx == 0) { x1 += dy; y1 -= dy; }
00548     }
00549 #endif
00550     if (_lcd_capable & MIPI_DCS_REV1) {
00551         WriteCmdParam4(_SC, x >> 8, x, x1 >> 8, x1);   //Start column instead of _MC
00552         WriteCmdParam4(_SP, y >> 8, y, y1 >> 8, y1);   //
00553         if (is8347 && _lcd_ID == 0x0065) {             //HX8352-B has separate _MC, _SC
00554             uint8_t d[2];
00555             d[0] = x >> 8; d[1] = x;
00556             WriteCmdParamN(_MC, 2, d);                 //allows !MV_AXIS to work
00557             d[0] = y >> 8; d[1] = y;
00558             WriteCmdParamN(_MP, 2, d);
00559         }
00560     } else {
00561         WriteCmdData(_MC, x);
00562         WriteCmdData(_MP, y);
00563         if (!(x == x1 && y == y1)) {  //only need MC,MP for drawPixel
00564             if (_lcd_capable & XSA_XEA_16BIT) {
00565                 if (rotation & 1)
00566                     y1 = y = (y1 << 8) | y;
00567                 else
00568                     x1 = x = (x1 << 8) | x;
00569             }
00570             WriteCmdData(_SC, x);
00571             WriteCmdData(_SP, y);
00572             WriteCmdData(_EC, x1);
00573             WriteCmdData(_EP, y1);
00574         }
00575     }
00576 }
00577  
00578 void MCUFRIEND_kbv::fillRect(int16_t x, int16_t y, int16_t w, int16_t h, uint16_t color)
00579 {
00580     int16_t end;
00581 #if defined(SUPPORT_9488_555)
00582     if (is555) color = color565_to_555(color);
00583 #endif
00584     if (w < 0) {
00585         w = -w;
00586         x -= w;
00587     }                           //+ve w
00588     end = x + w;
00589     if (x < 0)
00590         x = 0;
00591     if (end > width())
00592         end = width();
00593     w = end - x;
00594     if (h < 0) {
00595         h = -h;
00596         y -= h;
00597     }                           //+ve h
00598     end = y + h;
00599     if (y < 0)
00600         y = 0;
00601     if (end > height())
00602         end = height();
00603     h = end - y;
00604     setAddrWindow(x, y, x + w - 1, y + h - 1);
00605     CS_ACTIVE;
00606     WriteCmd(_MW);
00607     if (h > w) {
00608         end = h;
00609         h = w;
00610         w = end;
00611     }
00612     uint8_t hi = color >> 8, lo = color & 0xFF;
00613     while (h-- > 0) {
00614         end = w;
00615 #if USING_16BIT_BUS
00616 #if defined(__MK66FX1M0__)      //180MHz M4
00617 #define STROBE_16BIT {WR_ACTIVE4;WR_ACTIVE;WR_IDLE4;WR_IDLE;}   //56ns
00618 #elif defined(__SAM3X8E__)      //84MHz M3
00619 #define STROBE_16BIT {WR_ACTIVE4;WR_ACTIVE2;WR_IDLE4;WR_IDLE2;} //286ns ?ILI9486
00620 //#define STROBE_16BIT {WR_ACTIVE4;WR_ACTIVE;WR_IDLE4;WR_IDLE;} //238ns SSD1289
00621 //#define STROBE_16BIT {WR_ACTIVE2;WR_ACTIVE;WR_IDLE2;}      //119ns RM68140
00622 #else                           //16MHz AVR
00623 #define STROBE_16BIT {WR_ACTIVE;WR_ACTIVE;WR_IDLE; }            //375ns ?ILI9486
00624 #endif
00625         write_16(color);        //we could just do the strobe
00626         lo = end & 7;
00627         hi = end >> 3;
00628         if (hi)
00629             do {
00630                 STROBE_16BIT;
00631                 STROBE_16BIT;
00632                 STROBE_16BIT;
00633                 STROBE_16BIT;
00634                 STROBE_16BIT;
00635                 STROBE_16BIT;
00636                 STROBE_16BIT;
00637                 STROBE_16BIT;
00638             } while (--hi > 0);
00639         while (lo-- > 0) {
00640             STROBE_16BIT;
00641         }
00642 #else
00643 #if defined(SUPPORT_1289)
00644         if (is9797) {
00645              uint8_t r = color565_to_r(color);
00646              uint8_t g = color565_to_g(color);
00647              uint8_t b = color565_to_b(color);
00648              do {
00649                  write8(r);
00650                  write8(g);
00651                  write8(b);
00652              } while (--end != 0);
00653         } else
00654 #endif
00655         do {
00656             write8(hi);
00657             write8(lo);
00658         } while (--end != 0);
00659 #endif
00660     }
00661     CS_IDLE;
00662     if (!(_lcd_capable & MIPI_DCS_REV1) || ((_lcd_ID == 0x1526) && (rotation & 1)))
00663         setAddrWindow(0, 0, width() - 1, height() - 1);
00664 }
00665  
00666 static void pushColors_any(uint16_t cmd, uint8_t * block, int16_t n, bool first, uint8_t flags)
00667 {
00668     uint16_t color;
00669     uint8_t h, l;
00670     bool isconst = flags & 1;
00671     bool isbigend = (flags & 2) != 0;
00672     CS_ACTIVE;
00673     if (first) {
00674         WriteCmd(cmd);
00675     }
00676  
00677     if (!isconst && !isbigend) {
00678         uint16_t *block16 = (uint16_t*)block;
00679         while (n-- > 0) {
00680             color = *block16++;
00681             write16(color);
00682         }
00683     } else
00684  
00685     while (n-- > 0) {
00686         if (isconst) {
00687             h = pgm_read_byte(block++);
00688             l = pgm_read_byte(block++);
00689         } else {
00690             h = (*block++);
00691             l = (*block++);
00692         }
00693         color = (isbigend) ? (h << 8 | l) :  (l << 8 | h);
00694 #if defined(SUPPORT_9488_555)
00695         if (is555) color = color565_to_555(color);
00696 #endif
00697         if (is9797) write24(color); else
00698         write16(color);
00699     }
00700     CS_IDLE;
00701 }
00702  
00703 void MCUFRIEND_kbv::pushColors(uint16_t * block, int16_t n, bool first)
00704 {
00705     pushColors_any(_MW, (uint8_t *)block, n, first, 0);
00706 }
00707 void MCUFRIEND_kbv::pushColors(uint8_t * block, int16_t n, bool first)
00708 {
00709     pushColors_any(_MW, (uint8_t *)block, n, first, 2);   //regular bigend
00710 }
00711 void MCUFRIEND_kbv::pushColors(const uint8_t * block, int16_t n, bool first, bool bigend)
00712 {
00713     pushColors_any(_MW, (uint8_t *)block, n, first, bigend ? 3 : 1);
00714 }
00715  
00716 void MCUFRIEND_kbv::vertScroll(int16_t top, int16_t scrollines, int16_t offset)
00717 {
00718 #if defined(OFFSET_9327)
00719     if (_lcd_ID == 0x9327) {
00720         if (rotation == 2 || rotation == 3) top += OFFSET_9327;
00721     }
00722 #endif
00723     int16_t bfa = HEIGHT - top - scrollines;  // bottom fixed area
00724     int16_t vsp;
00725     int16_t sea = top;
00726     if (_lcd_ID == 0x9327) bfa += 32;
00727     if (offset <= -scrollines || offset >= scrollines) offset = 0; //valid scroll
00728     vsp = top + offset; // vertical start position
00729     if (offset < 0)
00730         vsp += scrollines;          //keep in unsigned range
00731     sea = top + scrollines - 1;
00732     if (_lcd_capable & MIPI_DCS_REV1) {
00733         uint8_t d[6];           // for multi-byte parameters
00734 /*
00735         if (_lcd_ID == 0x9327) {        //panel is wired for 240x432 
00736             if (rotation == 2 || rotation == 3) { //180 or 270 degrees
00737                 if (scrollines == HEIGHT) {
00738                     scrollines = 432;   // we get a glitch but hey-ho
00739                     vsp -= 432 - HEIGHT;
00740                 }
00741                 if (vsp < 0)
00742                     vsp += 432;
00743             }
00744             bfa = 432 - top - scrollines;
00745         }
00746 */
00747         d[0] = top >> 8;        //TFA
00748         d[1] = top;
00749         d[2] = scrollines >> 8; //VSA
00750         d[3] = scrollines;
00751         d[4] = bfa >> 8;        //BFA
00752         d[5] = bfa;
00753         WriteCmdParamN(is8347 ? 0x0E : 0x33, 6, d);
00754 //        if (offset == 0 && rotation > 1) vsp = top + scrollines;   //make non-valid
00755         d[0] = vsp >> 8;        //VSP
00756         d[1] = vsp;
00757         WriteCmdParamN(is8347 ? 0x14 : 0x37, 2, d);
00758         if (is8347) { 
00759             d[0] = (offset != 0) ? (_lcd_ID == 0x8347 ? 0x02 : 0x08) : 0;
00760             WriteCmdParamN(_lcd_ID == 0x8347 ? 0x18 : 0x01, 1, d);  //HX8347-D
00761         } else if (offset == 0 && (_lcd_capable & MIPI_DCS_REV1)) {
00762             WriteCmdParamN(0x13, 0, NULL);    //NORMAL i.e. disable scroll
00763         }
00764         return;
00765     }
00766     // cope with 9320 style variants:
00767     switch (_lcd_ID) {
00768     case 0x7783:
00769         WriteCmdData(0x61, _lcd_rev);   //!NDL, !VLE, REV
00770         WriteCmdData(0x6A, vsp);        //VL#
00771         break;
00772 #ifdef SUPPORT_0139 
00773     case 0x0139:
00774         WriteCmdData(0x07, 0x0213 | (_lcd_rev << 2));  //VLE1=1, GON=1, REV=x, D=3
00775         WriteCmdData(0x41, vsp);  //VL# check vsp
00776         break;
00777 #endif
00778 #if defined(SUPPORT_0154) || defined(SUPPORT_9225)  //thanks tongbajiel
00779     case 0x9225:
00780     case 0x0154:
00781         WriteCmdData(0x31, sea);        //SEA
00782         WriteCmdData(0x32, top);        //SSA
00783         WriteCmdData(0x33, vsp - top);  //SST
00784         break;
00785 #endif
00786 #ifdef SUPPORT_1289
00787     case 0x1289:
00788         WriteCmdData(0x41, vsp);        //VL#
00789         break;
00790 #endif
00791     case 0x5420:
00792     case 0x7793:
00793     case 0x9326:
00794     case 0xB509:
00795         WriteCmdData(0x401, (1 << 1) | _lcd_rev);       //VLE, REV 
00796         WriteCmdData(0x404, vsp);       //VL# 
00797         break;
00798     default:
00799         // 0x6809, 0x9320, 0x9325, 0x9335, 0xB505 can only scroll whole screen
00800         WriteCmdData(0x61, (1 << 1) | _lcd_rev);        //!NDL, VLE, REV
00801         WriteCmdData(0x6A, vsp);        //VL#
00802         break;
00803     }
00804 }
00805  
00806 void MCUFRIEND_kbv::invertDisplay(boolean i)
00807 {
00808     uint8_t val;
00809     _lcd_rev = ((_lcd_capable & REV_SCREEN) != 0) ^ i;
00810     if (_lcd_capable & MIPI_DCS_REV1) {
00811         if (is8347) {
00812             // HX8347D: 0x36 Panel Characteristic. REV_Panel
00813             // HX8347A: 0x36 is Display Control 10
00814             if (_lcd_ID == 0x8347 || _lcd_ID == 0x5252) // HX8347-A, HX5352-A
00815                 val = _lcd_rev ? 6 : 2;       //INVON id bit#2,  NORON=bit#1
00816             else val = _lcd_rev ? 8 : 10;     //HX8347-D, G, I: SCROLLON=bit3, INVON=bit1
00817             // HX8347: 0x01 Display Mode has diff bit mapping for A, D 
00818             WriteCmdParamN(0x01, 1, &val);
00819         } else
00820             WriteCmdParamN(_lcd_rev ? 0x21 : 0x20, 0, NULL);
00821         return;
00822     }
00823     // cope with 9320 style variants:
00824     switch (_lcd_ID) {
00825 #ifdef SUPPORT_0139
00826     case 0x0139:
00827 #endif
00828     case 0x9225:                                        //REV is in reg(0x07) like Samsung
00829     case 0x0154:
00830         WriteCmdData(0x07, 0x13 | (_lcd_rev << 2));     //.kbv kludge
00831         break;
00832 #ifdef SUPPORT_1289
00833     case 0x1289:
00834         _lcd_drivOut &= ~(1 << 13);
00835         if (_lcd_rev)
00836             _lcd_drivOut |= (1 << 13);
00837         WriteCmdData(0x01, _lcd_drivOut);
00838         break;
00839 #endif
00840     case 0x5420:
00841     case 0x7793:
00842     case 0x9326:
00843     case 0xB509:
00844         WriteCmdData(0x401, (1 << 1) | _lcd_rev);       //.kbv kludge VLE 
00845         break;
00846     default:
00847         WriteCmdData(0x61, _lcd_rev);
00848         break;
00849     }
00850 }
00851  
00852 #define TFTLCD_DELAY 0xFFFF
00853 #define TFTLCD_DELAY8 0x7F
00854 static void init_table(const void *table, int16_t size)
00855 {
00856 #ifdef SUPPORT_8357D_GAMMA
00857     uint8_t *p = (uint8_t *) table, dat[36];            //HX8357_99 has GAMMA[34] 
00858 #else
00859     uint8_t *p = (uint8_t *) table, dat[24];            //R61526 has GAMMA[22] 
00860 #endif
00861     while (size > 0) {
00862         uint8_t cmd = pgm_read_byte(p++);
00863         uint8_t len = pgm_read_byte(p++);
00864         if (cmd == TFTLCD_DELAY8) {
00865             delay(len);
00866             len = 0;
00867         } else {
00868             for (uint8_t i = 0; i < len; i++)
00869                 dat[i] = pgm_read_byte(p++);
00870             WriteCmdParamN(cmd, len, dat);
00871         }
00872         size -= len + 2;
00873     }
00874 }
00875  
00876 static void init_table16(const void *table, int16_t size)
00877 {
00878     uint16_t *p = (uint16_t *) table;
00879     while (size > 0) {
00880         uint16_t cmd = pgm_read_word(p++);
00881         uint16_t d = pgm_read_word(p++);
00882         if (cmd == TFTLCD_DELAY)
00883             delay(d);
00884         else {
00885             writecmddata(cmd, d);                      //static function
00886         }
00887         size -= 2 * sizeof(int16_t);
00888     }
00889 }
00890  
00891 void MCUFRIEND_kbv::begin(uint16_t ID)
00892 {
00893     int16_t *p16;               //so we can "write" to a const protected variable.
00894     const uint8_t *table8_ads = NULL;
00895     int16_t table_size;
00896     reset();
00897     _lcd_xor = 0;
00898     switch (_lcd_ID = ID) {
00899 /*
00900     static const uint16_t _regValues[] PROGMEM = {
00901     0x0000, 0x0001, // start oscillation
00902     0x0007, 0x0000, //  source output control 0 D0 
00903     0x0013, 0x0000, // power control 3 off
00904     0x0011, 0x2604, //    
00905     0x0014, 0x0015, //   
00906     0x0010, 0x3C00, //  
00907  //    0x0013, 0x0040, // 
00908  //    0x0013, 0x0060, //     
00909  //    0x0013, 0x0070, // 
00910     0x0013, 0x0070, // power control 3 PON PON1 AON
00911        
00912     0x0001, 0x0127, //      driver output control
00913  //    0x0002, 0x0700, //  field 0 b/c waveform xor waveform
00914     0x0003, 0x1030, //    
00915     0x0007, 0x0000, //    
00916     0x0008, 0x0404, //    
00917     0x000B, 0x0200, // 
00918     0x000C, 0x0000, //   
00919     0x00015,0x0000, //     
00920        
00921     //gamma setting    
00922     0x0030, 0x0000,      
00923     0x0031, 0x0606,    
00924     0x0032, 0x0006,    
00925     0x0033, 0x0403,  
00926     0x0034, 0x0107,  
00927     0x0035, 0x0101, 
00928     0x0036, 0x0707,   
00929     0x0037, 0x0304,   
00930     0x0038, 0x0A00,     
00931     0x0039, 0x0706,     
00932        
00933     0x0040, 0x0000,     
00934     0x0041, 0x0000,      
00935     0x0042, 0x013F,    
00936     0x0043, 0x0000,   
00937     0x0044, 0x0000,     
00938     0x0045, 0x0000,     
00939     0x0046, 0xEF00,    
00940     0x0047, 0x013F,     
00941     0x0048, 0x0000,     
00942     0x0007, 0x0011,  
00943     0x0007, 0x0017,     
00944 };
00945 */
00946 #ifdef SUPPORT_0139
00947     case 0x0139:
00948         _lcd_capable = REV_SCREEN | XSA_XEA_16BIT;    //remove AUTO_READINC
00949         static const uint16_t S6D0139_regValues[] PROGMEM = {
00950             0x0000, 0x0001,     //Start oscillator
00951             0x0011, 0x1a00,     //Power Control 2
00952             0x0014, 0x2020,     //Power Control 4
00953             0x0010, 0x0900,     //Power Control 1
00954             0x0013, 0x0040,     //Power Control 3
00955             0x0013, 0x0060,     //Power Control 3
00956             0x0013, 0x0070,     //Power Control 3
00957             0x0011, 0x1a04,     //Power Control 2
00958             0x0010, 0x2f00,     //Power Control 1
00959             0x0001, 0x0127,     //Driver Control: SM=0, GS=0, SS=1, 240x320
00960             0x0002, 0x0100,     //LCD Control:  (.kbv was 0700) FLD=0, BC= 0, EOR=1
00961             0x0003, 0x1030,     //Entry Mode:    TR1=0, DFM=0, BGR=1, I_D=3   
00962             0x0007, 0x0000,     //Display Control: everything off
00963             0x0008, 0x0303,     //Blank Period:  FP=3, BP=3
00964             0x0009, 0x0000,     //f.k.
00965             0x000b, 0x0000,     //Frame Control:
00966             0x000c, 0x0000,     //Interface Control: system i/f
00967             0x0040, 0x0000,     //Scan Line
00968             0x0041, 0x0000,     //Vertical Scroll Control
00969             0x0007, 0x0014,     //Display Control: VLE1=0, SPT=0, GON=1, REV=1, D=0 (halt)
00970             0x0007, 0x0016,     //Display Control: VLE1=0, SPT=0, GON=1, REV=1, D=2 (blank)
00971             0x0007, 0x0017,     //Display Control: VLE1=0, SPT=0, GON=1, REV=1, D=3 (normal)
00972 //            0x0007, 0x0217,     //Display Control: VLE1=1, SPT=0, GON=1, REV=1, D=3
00973         };
00974         init_table16(S6D0139_regValues, sizeof(S6D0139_regValues));
00975         break;
00976 #endif
00977  
00978 #ifdef SUPPORT_0154
00979     case 0x0154:
00980         _lcd_capable = AUTO_READINC | REV_SCREEN;
00981         static const uint16_t S6D0154_regValues[] PROGMEM = {
00982             0x0011, 0x001A,
00983             0x0012, 0x3121,     //BT=3, DC1=1, DC2=2, DC3=1
00984             0x0013, 0x006C,     //GVD=108
00985             0x0014, 0x4249,     //VCM=66, VML=73
00986  
00987             0x0010, 0x0800,     //SAP=8
00988             TFTLCD_DELAY, 10,
00989             0x0011, 0x011A,     //APON=0, PON=1, AON=0, VCI1_EN=1, VC=10
00990             TFTLCD_DELAY, 10,
00991             0x0011, 0x031A,     //APON=0, PON=3, AON=0, VCI1_EN=1, VC=10
00992             TFTLCD_DELAY, 10,
00993             0x0011, 0x071A,     //APON=0, PON=7, AON=0, VCI1_EN=1, VC=10
00994             TFTLCD_DELAY, 10,
00995             0x0011, 0x0F1A,     //APON=0, PON=15, AON=0, VCI1_EN=1, VC=10
00996             TFTLCD_DELAY, 10,
00997             0x0011, 0x0F3A,     //APON=0, PON=15, AON=1, VCI1_EN=1, VC=10 
00998             TFTLCD_DELAY, 30,
00999  
01000             0x0001, 0x0128,
01001             0x0002, 0x0100,
01002             0x0003, 0x1030,
01003             0x0007, 0x1012,
01004             0x0008, 0x0303,
01005             0x000B, 0x1100,
01006             0x000C, 0x0000,
01007             0x000F, 0x1801,
01008             0x0015, 0x0020,
01009             
01010                0x0050,0x0101,
01011                0x0051,0x0603,
01012                0x0052,0x0408,
01013                0x0053,0x0000,
01014                0x0054,0x0605,
01015                0x0055,0x0406,
01016                0x0056,0x0303,
01017                0x0057,0x0303,
01018                0x0058,0x0010,
01019                0x0059,0x1000,
01020             
01021             0x0007, 0x0012,     //GON=1, REV=0, D=2
01022             TFTLCD_DELAY, 40,
01023             0x0007, 0x0013,     //GON=1, REV=0, D=3
01024             0x0007, 0x0017,     //GON=1, REV=1, D=3 DISPLAY ON 
01025         };
01026         init_table16(S6D0154_regValues, sizeof(S6D0154_regValues));
01027  
01028         break;
01029 #endif
01030  
01031 #ifdef SUPPORT_1289
01032     case 0x9797:
01033         is9797 = 1;
01034 //        _lcd_capable = 0 | XSA_XEA_16BIT | REV_SCREEN | AUTO_READINC | READ_24BITS;
01035 // deliberately set READ_BGR to disable Software Scroll in graphictest_kbv example
01036         _lcd_capable = 0 | XSA_XEA_16BIT | REV_SCREEN | AUTO_READINC | READ_24BITS | READ_BGR;
01037         _lcd_ID = 0x1289;
01038         goto common_1289;
01039     case 0x1289:
01040         _lcd_capable = 0 | XSA_XEA_16BIT | REV_SCREEN | AUTO_READINC;
01041       common_1289:
01042         // came from MikroElektronika library http://www.hmsprojects.com/tft_lcd.html
01043         static const uint16_t SSD1289_regValues[] PROGMEM = {
01044             0x0000, 0x0001,
01045             0x0003, 0xA8A4,
01046             0x000C, 0x0000,
01047             0x000D, 0x000A,     // VRH=10
01048             0x000E, 0x2B00,
01049             0x001E, 0x00B7,
01050             0x0001, 0x2B3F,     // setRotation() alters
01051             0x0002, 0x0600,     // B_C=1, EOR=1
01052             0x0010, 0x0000,
01053             0x0011, 0x6070,     // setRotation() alters 
01054             0x0005, 0x0000,
01055             0x0006, 0x0000,
01056             0x0016, 0xEF1C,
01057             0x0017, 0x0003,
01058             0x0007, 0x0233,
01059             0x000B, 0x0000,
01060             0x000F, 0x0000,
01061             0x0030, 0x0707,
01062             0x0031, 0x0204,
01063             0x0032, 0x0204,
01064             0x0033, 0x0502,
01065             0x0034, 0x0507,
01066             0x0035, 0x0204,
01067             0x0036, 0x0204,
01068             0x0037, 0x0502,
01069             0x003A, 0x0302,
01070             0x003B, 0x0302,
01071             0x0023, 0x0000,
01072             0x0024, 0x0000,
01073             0x0025, 0x8000,
01074         };
01075         init_table16(SSD1289_regValues, sizeof(SSD1289_regValues));
01076         break;
01077 #endif
01078  
01079     case 0x1511:                // Unknown from Levy
01080         _lcd_capable = AUTO_READINC | MIPI_DCS_REV1;   //extra read_8(dummy)
01081         static const uint8_t R61511_regValues[] PROGMEM = {
01082             0xB0, 1, 0x00,       //Command Access Protect
01083         };
01084         table8_ads = R61511_regValues, table_size = sizeof(R61511_regValues);
01085         p16 = (int16_t *) & HEIGHT;
01086         *p16 = 480;
01087         p16 = (int16_t *) & WIDTH;
01088         *p16 = 320;
01089         break;
01090  
01091     case 0x1520:
01092         _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_24BITS;
01093         static const uint8_t R61520_regValues[] PROGMEM = {
01094             0xB0, 1, 0x00,      //Command Access Protect
01095             0xC0, 1, 0x0A,      //DM=1, BGR=1
01096         };
01097         table8_ads = R61520_regValues, table_size = sizeof(R61520_regValues);
01098         break;
01099  
01100     case 0x1526:
01101         _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_24BITS;
01102         static const uint8_t R61526_regValues[] PROGMEM = {
01103             0xB0, 1, 0x03,      //Command Access 
01104             0xE2, 1, 0x3F,      //Command Write Access
01105             0xC0, 1, 0x22,      //REV=0, BGR=1, SS=0
01106             0xE2, 1, 0x00,      //Command Write Protect
01107         };
01108         table8_ads = R61526_regValues, table_size = sizeof(R61526_regValues);
01109         break;
01110  
01111 #ifdef SUPPORT_1580
01112     case 0x1580:
01113         _lcd_capable = 0 | REV_SCREEN | READ_BGR | INVERT_GS | READ_NODUMMY; //thanks vanhan123
01114         static const uint16_t R61580_regValues[] PROGMEM = {  //from MCHIP Graphics Lib drvTFT001.c
01115             // Synchronization after reset
01116             TFTLCD_DELAY, 2,
01117             0x0000, 0x0000,
01118             0x0000, 0x0000,
01119             0x0000, 0x0000,
01120             0x0000, 0x0000,
01121  
01122             // Setup display
01123             0x00A4, 0x0001,          // CALB=1
01124             TFTLCD_DELAY, 2,
01125             0x0060, 0xA700,          // Driver Output Control
01126             0x0008, 0x0808,          // Display Control BP=8, FP=8
01127             0x0030, 0x0111,          // y control
01128             0x0031, 0x2410,          // y control
01129             0x0032, 0x0501,          // y control
01130             0x0033, 0x050C,          // y control
01131             0x0034, 0x2211,          // y control
01132             0x0035, 0x0C05,          // y control
01133             0x0036, 0x2105,          // y control
01134             0x0037, 0x1004,          // y control
01135             0x0038, 0x1101,          // y control
01136             0x0039, 0x1122,          // y control
01137             0x0090, 0x0019,          // 80Hz
01138             0x0010, 0x0530,          // Power Control
01139             0x0011, 0x0237,          //DC1=2, DC0=3, VC=7
01140 //            0x0011, 0x17B0,          //DC1=7, DC0=3, VC=0 ?b12 ?b7 vanhan123
01141             0x0012, 0x01BF,          //VCMR=1, PSON=1, PON=1, VRH=15 
01142 //            0x0012, 0x013A,          //VCMR=1, PSON=1, PON=1, VRH=10 vanhan123
01143             0x0013, 0x1300,          //VDV=19
01144             TFTLCD_DELAY, 100,
01145  
01146             0x0001, 0x0100,
01147             0x0002, 0x0200,
01148             0x0003, 0x1030,
01149             0x0009, 0x0001,
01150             0x000A, 0x0008,
01151             0x000C, 0x0001,
01152             0x000D, 0xD000,
01153             0x000E, 0x0030,
01154             0x000F, 0x0000,
01155             0x0020, 0x0000,
01156             0x0021, 0x0000,
01157             0x0029, 0x0077,
01158             0x0050, 0x0000,
01159             0x0051, 0xD0EF,
01160             0x0052, 0x0000,
01161             0x0053, 0x013F,
01162             0x0061, 0x0001,
01163             0x006A, 0x0000,
01164             0x0080, 0x0000,
01165             0x0081, 0x0000,
01166             0x0082, 0x005F,
01167             0x0093, 0x0701,
01168             0x0007, 0x0100,
01169         };
01170         static const uint16_t R61580_DEM240320C[] PROGMEM = { //from DEM 240320C TMH-PW-N
01171             0x00, 0x0000,
01172             0x00, 0x0000,
01173             TFTLCD_DELAY, 100,
01174             0x00, 0x0000,
01175             0x00, 0x0000,
01176             0x00, 0x0000,
01177             0x00, 0x0000,
01178             0xA4, 0x0001,
01179             TFTLCD_DELAY, 100,
01180             0x60, 0xA700,
01181             0x08, 0x0808,
01182             /******************************************/
01183             //Gamma Setting:
01184             0x30, 0x0203,
01185             0x31, 0x080F,
01186             0x32, 0x0401,
01187             0x33, 0x050B,
01188             0x34, 0x3330,
01189             0x35, 0x0B05,
01190             0x36, 0x0005,
01191             0x37, 0x0F08,
01192             0x38, 0x0302,
01193             0x39, 0x3033,
01194             /******************************************/
01195             //Power Setting:
01196             0x90, 0x0018, //80Hz
01197             0x10, 0x0530, //BT,AP
01198             0x11, 0x0237, //DC1,DC0,VC
01199             0x12, 0x01BF,
01200             0x13, 0x1000, //VCOM
01201             TFTLCD_DELAY, 200,
01202             /******************************************/
01203             0x01, 0x0100,
01204             0x02, 0x0200,
01205             0x03, 0x1030,
01206             0x09, 0x0001,
01207             0x0A, 0x0008,
01208             0x0C, 0x0000,
01209             0x0D, 0xD000,
01210  
01211             0x0E, 0x0030,
01212             0x0F, 0x0000,
01213             0x20, 0x0000, //H Start
01214             0x21, 0x0000, //V Start
01215             0x29, 0x002E,
01216             0x50, 0x0000,
01217             0x51, 0x00EF,
01218             0x52, 0x0000,
01219             0x53, 0x013F,
01220             0x61, 0x0001,
01221             0x6A, 0x0000,
01222             0x80, 0x0000,
01223             0x81, 0x0000,
01224             0x82, 0x005F,
01225             0x93, 0x0701,
01226             /******************************************/
01227             0x07, 0x0100,
01228             TFTLCD_DELAY, 100,
01229         };
01230         init_table16(R61580_DEM240320C, sizeof(R61580_DEM240320C));
01231 //        init_table16(R61580_regValues, sizeof(R61580_regValues));
01232         break;
01233 #endif
01234  
01235 #if defined(SUPPORT_1963) && USING_16BIT_BUS 
01236     case 0x1963:
01237         _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | READ_NODUMMY | INVERT_SS | INVERT_RGB;
01238         // from NHD 5.0" 8-bit
01239         static const uint8_t SSD1963_NHD_50_regValues[] PROGMEM = {
01240             (0xE0), 1, 0x01,    // PLL enable
01241             TFTLCD_DELAY8, 10,
01242             (0xE0), 1, 0x03,    // Lock PLL
01243             (0xB0), 7, 0x08, 0x80, 0x03, 0x1F, 0x01, 0xDF, 0x00,        //LCD SPECIFICATION
01244             (0xF0), 1, 0x03,    //was 00 pixel data interface
01245             //            (0x3A), 1, 0x60,        // SET R G B format = 6 6 6
01246             (0xE2), 3, 0x1D, 0x02, 0x54,        //PLL multiplier, set PLL clock to 120M
01247             (0xE6), 3, 0x02, 0xFF, 0xFF,        //PLL setting for PCLK, depends on resolution
01248             (0xB4), 8, 0x04, 0x20, 0x00, 0x58, 0x80, 0x00, 0x00, 0x00,  //HSYNC
01249             (0xB6), 7, 0x02, 0x0D, 0x00, 0x20, 0x01, 0x00, 0x00,        //VSYNC
01250             (0x13), 0,          //Enter Normal mode
01251             (0x38), 0,          //Exit Idle mode
01252         };
01253         // from NHD 7.0" 8-bit
01254         static const uint8_t SSD1963_NHD_70_regValues[] PROGMEM = {
01255             (0xE2), 3, 0x1D, 0x02, 0x04,        //PLL multiplier, set PLL clock to 120M
01256             (0xE0), 1, 0x01,    // PLL enable
01257             TFTLCD_DELAY8, 10,
01258             (0xE0), 1, 0x03,    // Lock PLL
01259             0x01, 0,            //Soft Reset
01260             TFTLCD_DELAY8, 120,
01261             (0xB0), 7, 0x08, 0x80, 0x03, 0x1F, 0x01, 0xDF, 0x00,        //LCD SPECIFICATION
01262             (0xF0), 1, 0x03,    //was 00 pixel data interface
01263             //            (0x3A), 1, 0x60,        // SET R G B format = 6 6 6
01264             (0xE6), 3, 0x0F, 0xFF, 0xFF,        //PLL setting for PCLK, depends on resolution
01265             (0xB4), 8, 0x04, 0x20, 0x00, 0x58, 0x80, 0x00, 0x00, 0x00,  //HSYNC
01266             (0xB6), 7, 0x02, 0x0D, 0x00, 0x20, 0x01, 0x00, 0x00,        //VSYNC
01267             (0x13), 0,          //Enter Normal mode
01268             (0x38), 0,          //Exit Idle mode
01269         };
01270         // from UTFTv2.81 initlcd.h
01271         static const uint8_t SSD1963_800_regValues[] PROGMEM = {
01272             (0xE2), 3, 0x1E, 0x02, 0x54,        //PLL multiplier, set PLL clock to 120M
01273             (0xE0), 1, 0x01,    // PLL enable
01274             TFTLCD_DELAY8, 10,
01275             (0xE0), 1, 0x03,    //
01276             TFTLCD_DELAY8, 10,
01277             0x01, 0,            //Soft Reset
01278             TFTLCD_DELAY8, 100,
01279             (0xE6), 3, 0x03, 0xFF, 0xFF,        //PLL setting for PCLK, depends on resolution
01280             (0xB0), 7, 0x24, 0x00, 0x03, 0x1F, 0x01, 0xDF, 0x00,        //LCD SPECIFICATION
01281             //            (0xB0), 7, 0x24, 0x00, 0x03, 0x1F, 0x01, 0xDF, 0x2D,        //LCD SPECIFICATION
01282             (0xB4), 8, 0x03, 0xA0, 0x00, 0x2E, 0x30, 0x00, 0x0F, 0x00,  //HSYNC
01283             (0xB6), 7, 0x02, 0x0D, 0x00, 0x10, 0x10, 0x00, 0x08,        //VSYNC
01284             (0xBA), 1, 0x0F,    //GPIO[3:0] out 1
01285             (0xB8), 2, 0x07, 0x01,      //GPIO3=input, GPIO[2:0]=output
01286             (0xF0), 1, 0x03,    //pixel data interface
01287             TFTLCD_DELAY8, 1,
01288             0x28, 0,            //Display Off
01289             0x11, 0,            //Sleep Out
01290             TFTLCD_DELAY8, 100,
01291             0x29, 0,            //Display On
01292             (0xBE), 6, 0x06, 0xF0, 0x01, 0xF0, 0x00, 0x00,      //set PWM for B/L
01293             (0xD0), 1, 0x0D,
01294         };
01295         // from UTFTv2.82 initlcd.h
01296         static const uint8_t SSD1963_800NEW_regValues[] PROGMEM = {
01297             (0xE2), 3, 0x1E, 0x02, 0x54,        //PLL multiplier, set PLL clock to 120M
01298             (0xE0), 1, 0x01,    // PLL enable
01299             TFTLCD_DELAY8, 10,
01300             (0xE0), 1, 0x03,    //
01301             TFTLCD_DELAY8, 10,
01302             0x01, 0,            //Soft Reset
01303             TFTLCD_DELAY8, 100,
01304             (0xE6), 3, 0x03, 0xFF, 0xFF,        //PLL setting for PCLK, depends on resolution
01305             (0xB0), 7, 0x24, 0x00, 0x03, 0x1F, 0x01, 0xDF, 0x00,        //LCD SPECIFICATION
01306             (0xB4), 8, 0x03, 0xA0, 0x00, 0x2E, 0x30, 0x00, 0x0F, 0x00,  //HSYNC HT=928, HPS=46, HPW=48, LPS=15
01307             (0xB6), 7, 0x02, 0x0D, 0x00, 0x10, 0x10, 0x00, 0x08,        //VSYNC VT=525, VPS=16, VPW=16, FPS=8
01308             (0xBA), 1, 0x0F,    //GPIO[3:0] out 1
01309             (0xB8), 2, 0x07, 0x01,      //GPIO3=input, GPIO[2:0]=output
01310             (0xF0), 1, 0x03,    //pixel data interface
01311             TFTLCD_DELAY8, 1,
01312             0x28, 0,            //Display Off
01313             0x11, 0,            //Sleep Out
01314             TFTLCD_DELAY8, 100,
01315             0x29, 0,            //Display On
01316             (0xBE), 6, 0x06, 0xF0, 0x01, 0xF0, 0x00, 0x00,      //set PWM for B/L
01317             (0xD0), 1, 0x0D,
01318         };
01319         // from UTFTv2.82 initlcd.h
01320         static const uint8_t SSD1963_800ALT_regValues[] PROGMEM = {
01321             (0xE2), 3, 0x23, 0x02, 0x04,        //PLL multiplier, set PLL clock to 120M
01322             (0xE0), 1, 0x01,    // PLL enable
01323             TFTLCD_DELAY8, 10,
01324             (0xE0), 1, 0x03,    //
01325             TFTLCD_DELAY8, 10,
01326             0x01, 0,            //Soft Reset
01327             TFTLCD_DELAY8, 100,
01328             (0xE6), 3, 0x04, 0x93, 0xE0,        //PLL setting for PCLK, depends on resolution
01329             (0xB0), 7, 0x00, 0x00, 0x03, 0x1F, 0x01, 0xDF, 0x00,        //LCD SPECIFICATION
01330             (0xB4), 8, 0x03, 0xA0, 0x00, 0x2E, 0x30, 0x00, 0x0F, 0x00,  //HSYNC HT=928, HPS=46, HPW=48, LPS=15
01331             (0xB6), 7, 0x02, 0x0D, 0x00, 0x10, 0x10, 0x00, 0x08,        //VSYNC VT=525, VPS=16, VPW=16, FPS=8
01332             (0xBA), 1, 0x0F,    //GPIO[3:0] out 1
01333             (0xB8), 2, 0x07, 0x01,      //GPIO3=input, GPIO[2:0]=output
01334             (0xF0), 1, 0x03,    //pixel data interface
01335             TFTLCD_DELAY8, 1,
01336             0x28, 0,            //Display Off
01337             0x11, 0,            //Sleep Out
01338             TFTLCD_DELAY8, 100,
01339             0x29, 0,            //Display On
01340             (0xBE), 6, 0x06, 0xF0, 0x01, 0xF0, 0x00, 0x00,      //set PWM for B/L
01341             (0xD0), 1, 0x0D,
01342         };
01343         // from UTFTv2.82 initlcd.h
01344         static const uint8_t SSD1963_480_regValues[] PROGMEM = {
01345             (0xE2), 3, 0x23, 0x02, 0x54,        //PLL multiplier, set PLL clock to 120M
01346             (0xE0), 1, 0x01,    // PLL enable
01347             TFTLCD_DELAY8, 10,
01348             (0xE0), 1, 0x03,    //
01349             TFTLCD_DELAY8, 10,
01350             0x01, 0,            //Soft Reset
01351             TFTLCD_DELAY8, 100,
01352             (0xE6), 3, 0x01, 0x1F, 0xFF,        //PLL setting for PCLK, depends on resolution
01353             (0xB0), 7, 0x20, 0x00, 0x01, 0xDF, 0x01, 0x0F, 0x00,        //LCD SPECIFICATION
01354             (0xB4), 8, 0x02, 0x13, 0x00, 0x08, 0x2B, 0x00, 0x02, 0x00,  //HSYNC
01355             (0xB6), 7, 0x01, 0x20, 0x00, 0x04, 0x0C, 0x00, 0x02,        //VSYNC
01356             (0xBA), 1, 0x0F,    //GPIO[3:0] out 1
01357             (0xB8), 2, 0x07, 0x01,      //GPIO3=input, GPIO[2:0]=output
01358             (0xF0), 1, 0x03,    //pixel data interface
01359             TFTLCD_DELAY8, 1,
01360             0x28, 0,            //Display Off
01361             0x11, 0,            //Sleep Out
01362             TFTLCD_DELAY8, 100,
01363             0x29, 0,            //Display On
01364             (0xBE), 6, 0x06, 0xF0, 0x01, 0xF0, 0x00, 0x00,      //set PWM for B/L
01365             (0xD0), 1, 0x0D,
01366         };
01367 //        table8_ads = SSD1963_480_regValues, table_size = sizeof(SSD1963_480_regValues);
01368         table8_ads = SSD1963_800_regValues, table_size = sizeof(SSD1963_800_regValues);
01369 //        table8_ads = SSD1963_NHD_50_regValues, table_size = sizeof(SSD1963_NHD_50_regValues);
01370 //        table8_ads = SSD1963_NHD_70_regValues, table_size = sizeof(SSD1963_NHD_70_regValues);
01371 //        table8_ads = SSD1963_800NEW_regValues, table_size = sizeof(SSD1963_800NEW_regValues);
01372 //        table8_ads = SSD1963_800ALT_regValues, table_size = sizeof(SSD1963_800ALT_regValues);
01373         p16 = (int16_t *) & HEIGHT;
01374         *p16 = 480;
01375         p16 = (int16_t *) & WIDTH;
01376         *p16 = 800;
01377         break;
01378 #endif
01379  
01380 #ifdef SUPPORT_4532
01381 //Support for LG Electronics LGDP4532 (also 4531 i guess) by Leodino v1.0 2-Nov-2016
01382 //based on data by waveshare and the datasheet of LG Electronics
01383 //My approach to get it working: the parameters by waveshare did no make it function allright
01384 //I started with remming lines to see if this helped. Basically the stuff in range 41-93
01385 //gives problems.
01386 //The other lines that are REMmed give no problems, but it seems default values are OK as well.
01387 case 0x4532:    // thanks Leodino
01388     _lcd_capable = 0 | REV_SCREEN;  // | INVERT_GS;
01389     static const uint16_t LGDP4532_regValues[] PROGMEM = {
01390         0x0000,0x0001, //Device code read
01391         0x0010,0x0628, //Power control 1 SAP[2:0] BT[3:0] AP[2:0] DK DSTB SLP
01392         0x0012,0x0006, //Power control 3 PON VRH[3:0]
01393         //0x0013,0x0A32, //Power control 4 VCOMG VDV[4:0] VCM[6:0]
01394         0x0011,0x0040, //Power control 2; DC1[2:0] DC0[2:0] VC[2:0]
01395         //0x0015,0x0050, //Regulator control RSET RI[2:0] RV[2:0] RCONT[2:0]
01396         0x0012,0x0016, //Power control 3 PON VRH[3:0]
01397         TFTLCD_DELAY,50,
01398         0x0010,0x5660, //Power control 1 SAP[2:0] BT[3:0] AP[2:0] DK DSTB SLP
01399         TFTLCD_DELAY,50,
01400         //0x0013,0x2A4E, //Power control 4 VCOMG VDV[4:0] VCM[6:0]
01401         //0x0001,0x0100, //Driver output control SM SS
01402         //0x0002,0x0300, //LCD Driving Wave Control
01403         //0x0003,0x1030, //Entry mode TRI DFM  BGR  ORG I/D[1:0] AM
01404         //0x0007,0x0202, //Display Control 1 PTDE[1:0] BASEE GON DTE COL D[1:0]
01405         TFTLCD_DELAY,50,
01406         //0x0008,0x0202, //Display Control 2 FP[3:0] BP[3:0] front and back porch (blank period at begin and end..)
01407         //0x000A,0x0000, //Test Register 1 (RA0h)
01408         //Gamma adjustment
01409         0x0030,0x0000,
01410         0x0031,0x0402,
01411         0x0032,0x0106,
01412         0x0033,0x0700,
01413         0x0034,0x0104,
01414         0x0035,0x0301,
01415         0x0036,0x0707,
01416         0x0037,0x0305,
01417         0x0038,0x0208,
01418         0x0039,0x0F0B,
01419         TFTLCD_DELAY,50,
01420         //some of this stuff in range 41-93 really throws things off....
01421         //0x0041,0x0002,
01422         //0x0060,0x2700, //Driver Output Control (R60h)
01423         //0x0061,0x0001, //Base Image Display Control (R61h)
01424         //0x0090,0x0119,   //Panel Interface Control 1 (R90h) DIVI[1:0]  RTNI[4:0]
01425         //0x0092,0x010A,  //Panel Interface Control 2 (R92h)  NOWI[2:0] EQI2[1:0] EQI1[1:0]
01426         //0x0093,0x0004, //Panel Interface Control 3 (R93h) MCPI[2:0]
01427         //0x00A0,0x0100, //Test Register 1 (RA0h)
01428         TFTLCD_DELAY,50,
01429         0x0007,0x0133, //Display Control 1 PTDE[1:0] BASEE GON DTE COL D[1:0]
01430         TFTLCD_DELAY,50,
01431         //0x00A0,0x0000, //Test Register 1 (RA0h)
01432         };
01433     init_table16(LGDP4532_regValues, sizeof(LGDP4532_regValues));
01434     break;
01435 #endif
01436  
01437 #ifdef SUPPORT_4535
01438     case 0x4535:
01439         _lcd_capable = 0 | REV_SCREEN;  // | INVERT_GS;
01440         static const uint16_t LGDP4535_regValues[] PROGMEM = {
01441             0x0015, 0x0030,     // Set the internal vcore voltage                                               
01442             0x009A, 0x0010,     // Start internal OSC 
01443             0x0011, 0x0020,     // set SS and SM bit 
01444             0x0010, 0x3428,     // set 1 line inversion 
01445             0x0012, 0x0002,     // set GRAM write direction and BGR=1  
01446             0x0013, 0x1038,     // Resize register 
01447             TFTLCD_DELAY, 40,
01448             0x0012, 0x0012,     // set the back porch and front porch 
01449             TFTLCD_DELAY, 40,
01450             0x0010, 0x3420,     // set non-display area refresh cycle ISC[3:0] 
01451             0x0013, 0x3045,     // FMARK function 
01452             TFTLCD_DELAY, 70,
01453             0x0030, 0x0000,     // RGB interface setting 
01454             0x0031, 0x0402,     // Frame marker Position 
01455             0x0032, 0x0307,     // RGB interface polarity 
01456             0x0033, 0x0304,     // SAP, BT[3:0], AP, DSTB, SLP, STB 
01457             0x0034, 0x0004,     // DC1[2:0], DC0[2:0], VC[2:0] 
01458             0x0035, 0x0401,     // VREG1OUT voltage 
01459             0x0036, 0x0707,     // VDV[4:0] for VCOM amplitude 
01460             0x0037, 0x0305,     // SAP, BT[3:0], AP, DSTB, SLP, STB 
01461             0x0038, 0x0610,     // DC1[2:0], DC0[2:0], VC[2:0] 
01462             0x0039, 0x0610,     // VREG1OUT voltage 
01463             0x0001, 0x0100,     // VDV[4:0] for VCOM amplitude 
01464             0x0002, 0x0300,     // VCM[4:0] for VCOMH 
01465             0x0003, 0x1030,     // GRAM horizontal Address 
01466             0x0008, 0x0808,     // GRAM Vertical Address 
01467             0x000A, 0x0008,
01468             0x0060, 0x2700,     // Gate Scan Line 
01469             0x0061, 0x0001,     // NDL,VLE, REV 
01470             0x0090, 0x013E,
01471             0x0092, 0x0100,
01472             0x0093, 0x0100,
01473             0x00A0, 0x3000,
01474             0x00A3, 0x0010,
01475             0x0007, 0x0001,
01476             0x0007, 0x0021,
01477             0x0007, 0x0023,
01478             0x0007, 0x0033,
01479             0x0007, 0x0133,
01480         };
01481         init_table16(LGDP4535_regValues, sizeof(LGDP4535_regValues));
01482         break;
01483 #endif
01484  
01485     case 0x5310:
01486         _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | INVERT_SS | INVERT_RGB | READ_24BITS;
01487         static const uint8_t NT35310_regValues[] PROGMEM = {        //
01488             TFTLCD_DELAY8, 10,    //just some dummy
01489         };
01490         table8_ads = NT35310_regValues, table_size = sizeof(NT35310_regValues);
01491         p16 = (int16_t *) & HEIGHT;
01492         *p16 = 480;
01493         p16 = (int16_t *) & WIDTH;
01494         *p16 = 320;
01495         break;
01496  
01497 #ifdef SUPPORT_68140
01498     case 0x6814:
01499         _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS;
01500         static const uint8_t RM68140_regValues_max[] PROGMEM = {        //
01501             0x3A, 1, 0x55,      //Pixel format .kbv my Mega Shield
01502         };
01503         table8_ads = RM68140_regValues_max, table_size = sizeof(RM68140_regValues_max);
01504         p16 = (int16_t *) & HEIGHT;
01505         *p16 = 480;
01506         p16 = (int16_t *) & WIDTH;
01507         *p16 = 320;
01508         break;
01509 #endif
01510  
01511 #ifdef SUPPORT_7735
01512     case 0x7735:                //
01513         _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | REV_SCREEN | READ_24BITS;
01514         static const uint8_t PROGMEM table7735S[] = {
01515             //  (COMMAND_BYTE), n, data_bytes....
01516             0xB1, 3, 0x01, 0x2C, 0x2D,  // [05 3C 3C] FRMCTR1 if GM==11
01517             0xB2, 3, 0x01, 0x2C, 0x2D,  // [05 3C 3C]
01518             0xB3, 6, 0x01, 0x2C, 0x2D, 0x01, 0x2C, 0x2D, // [05 3C 3C 05 3C 3C]
01519             0xB4, 1, 0x07,              // [07] INVCTR Column inversion
01520             //ST7735XR Power Sequence
01521             0xC0, 3, 0xA2, 0x02, 0x84,  // [A8 08 84] PWCTR1
01522             0xC1, 1, 0xC5,              // [C0]
01523             0xC2, 2, 0x0A, 0x00,        // [0A 00]
01524             0xC3, 2, 0x8A, 0x2A,        // [8A 26]
01525             0xC4, 2, 0x8A, 0xEE,        // [8A EE]
01526             0xC5, 1, 0x0E,              // [05] VMCTR1 VCOM
01527         };
01528         table8_ads = table7735S, table_size = sizeof(table7735S);   //
01529         p16 = (int16_t *) & HEIGHT;
01530         *p16 = 160;
01531         p16 = (int16_t *) & WIDTH;
01532         *p16 = 128;
01533         break;
01534 #endif
01535  
01536 #ifdef SUPPORT_7781
01537     case 0x7783:
01538         _lcd_capable = AUTO_READINC | REV_SCREEN | INVERT_GS;
01539         static const uint16_t ST7781_regValues[] PROGMEM = {
01540             0x00FF, 0x0001,     //can we do 0xFF
01541             0x00F3, 0x0008,
01542             //  LCD_Write_COM(0x00F3,
01543  
01544             0x00, 0x0001,
01545             0x0001, 0x0100,     // Driver Output Control Register (R01h)
01546             0x0002, 0x0700,     // LCD Driving Waveform Control (R02h)
01547             0x0003, 0x1030,     // Entry Mode (R03h)
01548             0x0008, 0x0302,
01549             0x0009, 0x0000,
01550             0x0010, 0x0000,     // Power Control 1 (R10h)
01551             0x0011, 0x0007,     // Power Control 2 (R11h)
01552             0x0012, 0x0000,     // Power Control 3 (R12h)
01553             0x0013, 0x0000,     // Power Control 4 (R13h)
01554             TFTLCD_DELAY, 50,
01555             0x0010, 0x14B0,     // Power Control 1 SAP=1, BT=4, APE=1, AP=3
01556             TFTLCD_DELAY, 10,
01557             0x0011, 0x0007,     // Power Control 2 VC=7
01558             TFTLCD_DELAY, 10,
01559             0x0012, 0x008E,     // Power Control 3 VCIRE=1, VRH=14
01560             0x0013, 0x0C00,     // Power Control 4 VDV=12
01561             0x0029, 0x0015,     // NVM read data 2 VCM=21
01562             TFTLCD_DELAY, 10,
01563             0x0030, 0x0000,     // Gamma Control 1
01564             0x0031, 0x0107,     // Gamma Control 2
01565             0x0032, 0x0000,     // Gamma Control 3
01566             0x0035, 0x0203,     // Gamma Control 6
01567             0x0036, 0x0402,     // Gamma Control 7
01568             0x0037, 0x0000,     // Gamma Control 8
01569             0x0038, 0x0207,     // Gamma Control 9
01570             0x0039, 0x0000,     // Gamma Control 10
01571             0x003C, 0x0203,     // Gamma Control 13
01572             0x003D, 0x0403,     // Gamma Control 14
01573             0x0060, 0xA700,     // Driver Output Control (R60h) .kbv was 0xa700
01574             0x0061, 0x0001,     // Driver Output Control (R61h)
01575             0x0090, 0X0029,     // Panel Interface Control 1 (R90h)
01576  
01577             // Display On
01578             0x0007, 0x0133,     // Display Control (R07h)
01579             TFTLCD_DELAY, 50,
01580         };
01581         init_table16(ST7781_regValues, sizeof(ST7781_regValues));
01582         break;
01583 #endif
01584  
01585     case 0x7789:
01586         _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_24BITS;
01587         static const uint8_t ST7789_regValues[] PROGMEM = {
01588             (0xB2), 5, 0x0C, 0x0C, 0x00, 0x33, 0x33,    //PORCTRK: Porch setting [08 08 00 22 22] PSEN=0 anyway
01589             (0xB7), 1, 0x35,    //GCTRL: Gate Control [35]
01590             (0xBB), 1, 0x2B,    //VCOMS: VCOM setting VCOM=1.175 [20] VCOM=0.9
01591             (0xC0), 1, 0x04,    //LCMCTRL: LCM Control [2C]
01592             (0xC2), 2, 0x01, 0xFF,      //VDVVRHEN: VDV and VRH Command Enable [01 FF]
01593             (0xC3), 1, 0x11,    //VRHS: VRH Set VAP=4.4, VAN=-4.4 [0B]
01594             (0xC4), 1, 0x20,    //VDVS: VDV Set [20]
01595             (0xC6), 1, 0x0F,    //FRCTRL2: Frame Rate control in normal mode [0F]
01596             (0xD0), 2, 0xA4, 0xA1,      //PWCTRL1: Power Control 1 [A4 A1]
01597             (0xE0), 14, 0xD0, 0x00, 0x05, 0x0E, 0x15, 0x0D, 0x37, 0x43, 0x47, 0x09, 0x15, 0x12, 0x16, 0x19,     //PVGAMCTRL: Positive Voltage Gamma control        
01598             (0xE1), 14, 0xD0, 0x00, 0x05, 0x0D, 0x0C, 0x06, 0x2D, 0x44, 0x40, 0x0E, 0x1C, 0x18, 0x16, 0x19,     //NVGAMCTRL: Negative Voltage Gamma control
01599         };
01600         static const uint8_t ST7789_regValues_arcain6[] PROGMEM = {
01601             (0xB2), 5, 0x0C, 0x0C, 0x00, 0x33, 0x33,    //PORCTRK: Porch setting [08 08 00 22 22] PSEN=0 anyway
01602             (0xB7), 1, 0x35,    //GCTRL: Gate Control [35]
01603             (0xBB), 1, 0x35,    //VCOMS: VCOM setting VCOM=??? [20] VCOM=0.9
01604             (0xC0), 1, 0x2C,    //LCMCTRL: LCM Control [2C]
01605             (0xC2), 2, 0x01, 0xFF,      //VDVVRHEN: VDV and VRH Command Enable [01 FF]
01606             (0xC3), 1, 0x13,    //VRHS: VRH Set VAP=???, VAN=-??? [0B]
01607             (0xC4), 1, 0x20,    //VDVS: VDV Set [20]
01608             (0xC6), 1, 0x0F,    //FRCTRL2: Frame Rate control in normal mode [0F]
01609             (0xCA), 1, 0x0F,    //REGSEL2 [0F]
01610             (0xC8), 1, 0x08,    //REGSEL1 [08]
01611             (0x55), 1, 0x90,    //WRCACE  [00]
01612             (0xD0), 2, 0xA4, 0xA1,      //PWCTRL1: Power Control 1 [A4 A1]
01613             (0xE0), 14, 0xD0, 0x00, 0x06, 0x09, 0x0B, 0x2A, 0x3C, 0x55, 0x4B, 0x08, 0x16, 0x14, 0x19, 0x20,     //PVGAMCTRL: Positive Voltage Gamma control        
01614             (0xE1), 14, 0xD0, 0x00, 0x06, 0x09, 0x0B, 0x29, 0x36, 0x54, 0x4B, 0x0D, 0x16, 0x14, 0x21, 0x20,     //NVGAMCTRL: Negative Voltage Gamma control
01615         };
01616         table8_ads = ST7789_regValues, table_size = sizeof(ST7789_regValues); //
01617         break;
01618  
01619     case 0x8031:      //Unknown BangGood thanks PrinceCharles
01620         _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_24BITS | REV_SCREEN;
01621         static const uint8_t FK8031_regValues[] PROGMEM = {
01622             // 0xF2:8.2 = SM, 0xF2:8.0 = REV. invertDisplay(), vertScroll() do not work
01623             0xF2,11, 0x16, 0x16, 0x03, 0x08, 0x08, 0x08, 0x08, 0x10, 0x04, 0x16, 0x16, // f.k. 0xF2:8.2 SM=1
01624             0xFD, 3, 0x11, 0x02, 0x35,     //f.k 0xFD:1.1 creates contiguous scan lins
01625         };
01626         table8_ads = FK8031_regValues, table_size = sizeof(FK8031_regValues);
01627         break;
01628  
01629 #ifdef SUPPORT_8347D
01630     case 0x4747:       //HX8347-D
01631         _lcd_capable = REV_SCREEN | MIPI_DCS_REV1 | MV_AXIS | INVERT_SS | AUTO_READINC | READ_24BITS;
01632         goto common_8347DGI;
01633     case 0x6767:       //HX8367-A
01634     case 0x7575:       //HX8347-G
01635     case 0x9595:       //HX8347-I
01636         _lcd_capable = REV_SCREEN | MIPI_DCS_REV1 | MV_AXIS;
01637       common_8347DGI:  
01638         is8347 = 1;
01639         static const uint8_t HX8347G_2_regValues[] PROGMEM = {
01640             0xEA, 2, 0x00, 0x20,        //PTBA[15:0]
01641             0xEC, 2, 0x0C, 0xC4,        //STBA[15:0]
01642             0xE8, 1, 0x38,      //OPON[7:0]
01643             0xE9, 1, 0x10,      //OPON1[7:0]
01644             0xF1, 1, 0x01,      //OTPS1B
01645             0xF2, 1, 0x10,      //GEN
01646             //Gamma 2.2 Setting
01647             0x40, 13, 0x01, 0x00, 0x00, 0x10, 0x0E, 0x24, 0x04, 0x50, 0x02, 0x13, 0x19, 0x19, 0x16,
01648             0x50, 14, 0x1B, 0x31, 0x2F, 0x3F, 0x3F, 0x3E, 0x2F, 0x7B, 0x09, 0x06, 0x06, 0x0C, 0x1D, 0xCC,
01649             //Power Voltage Setting
01650             0x1B, 1, 0x1B,      //VRH=4.65V
01651             0x1A, 1, 0x01,      //BT (VGH~15V,VGL~-10V,DDVDH~5V)
01652             0x24, 1, 0x2F,      //VMH(VCOM High voltage ~3.2V)
01653             0x25, 1, 0x57,      //VML(VCOM Low voltage -1.2V)
01654             //****VCOM offset**///
01655             0x23, 1, 0x88,      //for Flicker adjust //can reload from OTP
01656             //Power on Setting
01657             0x18, 1, 0x34,      //I/P_RADJ,N/P_RADJ, Normal mode 60Hz
01658             0x19, 1, 0x01,      //OSC_EN='1', start Osc
01659             0x01, 1, 0x00,      //DP_STB='0', out deep sleep
01660             0x1F, 1, 0x88,      // GAS=1, VOMG=00, PON=0, DK=1, XDK=0, DVDH_TRI=0, STB=0
01661             TFTLCD_DELAY8, 5,
01662             0x1F, 1, 0x80,      // GAS=1, VOMG=00, PON=0, DK=0, XDK=0, DVDH_TRI=0, STB=0
01663             TFTLCD_DELAY8, 3,
01664             0x1F, 1, 0x90,      // GAS=1, VOMG=00, PON=1, DK=0, XDK=0, DVDH_TRI=0, STB=0
01665             TFTLCD_DELAY8, 5,
01666             0x1F, 1, 0xD0,      // GAS=1, VOMG=10, PON=1, DK=0, XDK=0, DDVDH_TRI=0, STB=0
01667             TFTLCD_DELAY8, 5,
01668             //262k/65k color selection
01669             0x17, 1, 0x05,      //default 0x06 262k color // 0x05 65k color
01670             //SET PANEL
01671             0x36, 1, 0x00,      //SS_P, GS_P,REV_P,BGR_P
01672             //Display ON Setting
01673             0x28, 1, 0x38,      //GON=1, DTE=1, D=1000
01674             TFTLCD_DELAY8, 40,
01675             0x28, 1, 0x3F,      //GON=1, DTE=1, D=1100
01676  
01677             0x16, 1, 0x18,
01678         };
01679         init_table(HX8347G_2_regValues, sizeof(HX8347G_2_regValues));
01680         break;
01681 #endif
01682         
01683 #ifdef SUPPORT_8352A
01684     case 0x5252:       //HX8352-A
01685         _lcd_capable = MIPI_DCS_REV1 | MV_AXIS;
01686         is8347 = 1;
01687         static const uint8_t HX8352A_regValues[] PROGMEM = {
01688             0x83, 1, 0x02,      //Test Mode: TESTM=1
01689             0x85, 1, 0x03,      //VDD ctl  : VDC_SEL=3 [05]
01690             0x8B, 1, 0x01,      //VGS_RES 1: RES_VGS1=1 
01691             0x8C, 1, 0x93,      //VGS_RES 2: RES_VGS2=1, anon=0x13 [93]
01692             0x91, 1, 0x01,      //PWM control: SYNC=1
01693             0x83, 1, 0x00,      //Test Mode: TESTM=0
01694             //Gamma  Setting
01695             0x3E, 12, 0xB0, 0x03, 0x10, 0x56, 0x13, 0x46, 0x23, 0x76, 0x00, 0x5E, 0x4F, 0x40,
01696             //Power Voltage Setting
01697             0x17, 1, 0x91,      //OSC   1: RADJ=9, OSC_EN=1 [F0]
01698             0x2B, 1, 0xF9,      //Cycle 1: N_DC=F9 [BE]
01699             TFTLCD_DELAY8, 10,
01700             0x1B, 1, 0x14,      //Power 3: BT=1, ??=1, AP=0 [42]  
01701             0x1A, 1, 0x11,      //Power 2: VC3=1, VC1=1 [05]
01702             0x1C, 1, 0x06,      //Power 4: VRH=6 [0D]
01703             0x1F, 1, 0x42,      //VCOM   : VCM=42 [55]
01704             TFTLCD_DELAY8, 20,
01705             0x19, 1, 0x0A,      //Power 1: DK=1, VL_TR1=1 [09]
01706             0x19, 1, 0x1A,      //Power 1: PON=1, DK=1, VL_TR1=1 [09]
01707             TFTLCD_DELAY8, 40,
01708             0x19, 1, 0x12,      //Power 1: PON=1, DK=1, STB=1 [09]
01709             TFTLCD_DELAY8, 40,
01710             0x1E, 1, 0x27,      //Power 6: VCOMG=1, VDV=7 [10]
01711             TFTLCD_DELAY8, 100,
01712             //Display ON Setting
01713             0x24, 1, 0x60,      //Display 2: PT=1, GON=1 [A0]
01714             0x3D, 1, 0x40,      //Source 1: N_SAP=40 [C0]
01715             0x34, 1, 0x38,      //Cycle 10: EQS=0x38 [38]
01716             0x35, 1, 0x38,      //Cycle 11: EQP=0x38 [38]
01717             0x24, 1, 0x38,      //Display 2: GON=1 D=2 [A0]
01718             TFTLCD_DELAY8, 40,
01719             0x24, 1, 0x3C,      //Display 2: GON=1 D=3 [A0]
01720             0x16, 1, 0x1C,      //Memaccess: GS=1, BGR=1, SS=1 
01721             0x01, 1, 0x06,      //Disp Mode: INVON=1, NORON=1 [02]
01722             0x55, 1, 0x06,      //SM_PANEL=0, SS_PANEL=0, GS_PANEL=1, REV_PANEL=1, BGR_PANEL=0
01723         };
01724         init_table(HX8352A_regValues, sizeof(HX8352A_regValues));
01725         p16 = (int16_t *) & HEIGHT;
01726         *p16 = 400;
01727         break;
01728 #endif
01729  
01730 #ifdef SUPPORT_8352B
01731     case 0x0065:       //HX8352-B
01732         _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_24BITS | REV_SCREEN;
01733         is8347 = 1;
01734         static const uint8_t HX8352B_regValues[] PROGMEM = {
01735             // Register setting for EQ setting
01736             0xe5, 1, 0x10,      //
01737             0xe7, 1, 0x10,      //
01738             0xe8, 1, 0x48,      //
01739             0xec, 1, 0x09,      //
01740             0xed, 1, 0x6c,      //
01741             // Power on Setting
01742             0x23, 1, 0x6F,      //VMF
01743             0x24, 1, 0x57,      //VMH
01744             0x25, 1, 0x71,      //VML
01745             0xE2, 1, 0x18,      //
01746             0x1B, 1, 0x15,      //VRH
01747             0x01, 1, 0x00,      //
01748             0x1C, 1, 0x03,      //AP=3
01749             // Power on sequence
01750             0x19, 1, 0x01,      //OSCEN=1
01751             TFTLCD_DELAY8, 5,
01752             0x1F, 1, 0x8C,      //GASEN=1, DK=1, XDK=1
01753             0x1F, 1, 0x84,      //GASEN=1, XDK=1
01754             TFTLCD_DELAY8, 10,
01755             0x1F, 1, 0x94,      //GASEN=1, PON=1, XDK=1
01756             TFTLCD_DELAY8, 10,
01757             0x1F, 1, 0xD4,      //GASEN=1, VCOMG=1, PON=1, XDK=1
01758             TFTLCD_DELAY8, 5,
01759             // Gamma Setting
01760             0x40, 13, 0x00, 0x2B, 0x29, 0x3E, 0x3D, 0x3F, 0x24, 0x74, 0x08, 0x06, 0x07, 0x0D, 0x17,
01761             0x50, 13, 0x00, 0x02, 0x01, 0x16, 0x14, 0x3F, 0x0B, 0x5B, 0x08, 0x12, 0x18, 0x19, 0x17,
01762             0x5D, 1, 0xFF,      //
01763  
01764             0x16, 1, 0x08,      //MemoryAccess BGR=1
01765             0x28, 1, 0x20,      //GON=1
01766             TFTLCD_DELAY8, 40,
01767             0x28, 1, 0x38,      //GON=1, DTE=1, D=2
01768             TFTLCD_DELAY8, 40,
01769             0x28, 1, 0x3C,      //GON=1, DTE=1, D=3
01770  
01771             0x02, 2, 0x00, 0x00,     //SC
01772             0x04, 2, 0x00, 0xEF,     //EC
01773             0x06, 2, 0x00, 0x00,     //SP
01774             0x08, 2, 0x01, 0x8F,     //EP
01775  
01776             0x80, 2, 0x00, 0x00,     //CAC
01777             0x82, 2, 0x00, 0x00,     //RAC
01778             0x17, 1, 0x05,      //COLMOD = 565
01779  
01780         };
01781         init_table(HX8352B_regValues, sizeof(HX8352B_regValues));
01782         p16 = (int16_t *) & HEIGHT;
01783         *p16 = 400;
01784         break;
01785 #endif
01786  
01787 #ifdef SUPPORT_8347A
01788     case 0x8347:
01789         _lcd_capable = REV_SCREEN | MIPI_DCS_REV1 | MV_AXIS;
01790         // AN.01 The reference setting of CMO 3.2” Panel
01791         static const uint8_t HX8347A_CMO32_regValues[] PROGMEM = {
01792             //  VENDOR Gamma for 3.2"
01793             (0x46), 12, 0xA4, 0x53, 0x00, 0x44, 0x04, 0x67, 0x33, 0x77, 0x12, 0x4C, 0x46, 0x44,
01794             // Display Setting
01795             (0x01), 1, 0x06,    // IDMON=0, INVON=1, NORON=1, PTLON=0
01796             (0x16), 1, 0x48,    // MY=0, MX=0, MV=0, ML=1, BGR=0, TEON=0
01797             (0x23), 3, 0x95, 0x95, 0xFF,        // N_DC=1001 0101, PI_DC=1001 0101, I_DC=1111 1111
01798  
01799             (0x27), 4, 0x02, 0x02, 0x02, 0x02,  // N_BP=2, N_FP=2, PI_BP=2, PI_FP=2
01800             (0x2C), 2, 0x02, 0x02,      // I_BP=2, I_FP=2
01801  
01802             (0x3a), 4, 0x01, 0x01, 0xF0, 0x00,  // N_RTN=0, N_NW=1, P_RTN=0, P_NW=1, I_RTN=15, I_NW=0, DIV=0
01803             TFTLCD_DELAY8, 5,
01804             (0x35), 2, 0x38, 0x78,      // EQS=38h, EQP=78h
01805             (0x3E), 1, 0x38,    // SON=38h
01806             (0x40), 2, 0x0F, 0xF0,      // GDON=0Fh, GDOFF 
01807             // Power Supply Setting
01808             (0x19), 1, 0x49,    // CADJ=0100, CUADJ=100, OSD_EN=1 ,60Hz
01809             (0x93), 1, 0x0F,    // RADJ=1111, 100%
01810             TFTLCD_DELAY8, 5,
01811             (0x20), 1, 0x40,    // BT=0100
01812             (0x1D), 3, 0x07, 0x00, 0x04,        // VC1=7, VC3=0, VRH=??
01813             //VCOM SETTING for 3.2"
01814             (0x44), 2, 0x4D, 0x11,      // VCM=100 1101, VDV=1 0001   
01815             TFTLCD_DELAY8, 10,
01816             (0x1C), 1, 0x04,    // AP=100
01817             TFTLCD_DELAY8, 20,
01818             (0x1B), 1, 0x18,    // GASENB=0, PON=0, DK=1, XDK=0, VLCD_TRI=0, STB=0
01819             TFTLCD_DELAY8, 40,
01820             (0x1B), 1, 0x10,    // GASENB=0, PON=1, DK=0, XDK=0, VLCD_TRI=0, STB=0
01821             TFTLCD_DELAY8, 40,
01822             (0x43), 1, 0x80,    //set VCOMG=1
01823             TFTLCD_DELAY8, 100,
01824             // Display ON Setting
01825             (0x90), 1, 0x7F,    // SAP=0111 1111
01826             (0x26), 1, 0x04,    //GON=0, DTE=0, D=01
01827             TFTLCD_DELAY8, 40,
01828             (0x26), 1, 0x24,    //GON=1, DTE=0, D=01
01829             (0x26), 1, 0x2C,    //GON=1, DTE=0, D=11
01830             TFTLCD_DELAY8, 40,
01831             (0x26), 1, 0x3C,    //GON=1, DTE=1, D=11
01832             // INTERNAL REGISTER SETTING
01833             (0x57), 1, 0x02,    // TEST_Mode=1: into TEST mode
01834             (0x55), 1, 0x00,    // VDC_SEL=000, VDDD=1.95V
01835             (0xFE), 1, 0x5A,    // For ESD protection
01836             (0x57), 1, 0x00,    // TEST_Mode=0: exit TEST mode
01837         };
01838         // AN.01 The reference setting of CMO 2.4” Panel
01839         static const uint8_t HX8347A_CMO24_regValues[] PROGMEM = {
01840             //  VENDOR Gamma for 2.4"
01841             (0x46), 12, 0x94, 0x41, 0x00, 0x33, 0x23, 0x45, 0x44, 0x77, 0x12, 0xCC, 0x46, 0x82,
01842             // Display Setting
01843             (0x01), 1, 0x06,    // IDMON=0, INVON=1, NORON=1, PTLON=0
01844             (0x16), 1, 0x48,    // MY=0, MX=0, MV=0, ML=1, BGR=0, TEON=0
01845             (0x23), 3, 0x95, 0x95, 0xFF,        // N_DC=1001 0101, PI_DC=1001 0101, I_DC=1111 1111
01846  
01847             (0x27), 4, 0x02, 0x02, 0x02, 0x02,  // N_BP=2, N_FP=2, PI_BP=2, PI_FP=2
01848             (0x2C), 2, 0x02, 0x02,      // I_BP=2, I_FP=2
01849  
01850             (0x3a), 4, 0x01, 0x01, 0xF0, 0x00,  // N_RTN=0, N_NW=1, P_RTN=0, P_NW=1, I_RTN=15, I_NW=0, DIV=0
01851             TFTLCD_DELAY8, 5,
01852             (0x35), 2, 0x38, 0x78,      // EQS=38h, EQP=78h
01853             (0x3E), 1, 0x38,    // SON=38h
01854             (0x40), 2, 0x0F, 0xF0,      // GDON=0Fh, GDOFF 
01855             // Power Supply Setting
01856             (0x19), 1, 0x49,    // CADJ=0100, CUADJ=100, OSD_EN=1 ,60Hz
01857             (0x93), 1, 0x0F,    // RADJ=1111, 100%
01858             TFTLCD_DELAY8, 5,
01859             (0x20), 1, 0x40,    // BT=0100
01860             (0x1D), 3, 0x07, 0x00, 0x04,        // VC1=7, VC3=0, VRH=??
01861             //VCOM SETTING for 2.4"
01862             (0x44), 2, 0x40, 0x12,      // VCM=100 0000, VDV=1 0001   
01863             TFTLCD_DELAY8, 10,
01864             (0x1C), 1, 0x04,    // AP=100
01865             TFTLCD_DELAY8, 20,
01866             (0x1B), 1, 0x18,    // GASENB=0, PON=0, DK=1, XDK=0, VLCD_TRI=0, STB=0
01867             TFTLCD_DELAY8, 40,
01868             (0x1B), 1, 0x10,    // GASENB=0, PON=1, DK=0, XDK=0, VLCD_TRI=0, STB=0
01869             TFTLCD_DELAY8, 40,
01870             (0x43), 1, 0x80,    //set VCOMG=1
01871             TFTLCD_DELAY8, 100,
01872             // Display ON Setting
01873             (0x90), 1, 0x7F,    // SAP=0111 1111
01874             (0x26), 1, 0x04,    //GON=0, DTE=0, D=01
01875             TFTLCD_DELAY8, 40,
01876             (0x26), 1, 0x24,    //GON=1, DTE=0, D=01
01877             (0x26), 1, 0x2C,    //GON=1, DTE=0, D=11
01878             TFTLCD_DELAY8, 40,
01879             (0x26), 1, 0x3C,    //GON=1, DTE=1, D=11
01880             // INTERNAL REGISTER SETTING
01881             (0x57), 1, 0x02,    // TEST_Mode=1: into TEST mode
01882             (0x55), 1, 0x00,    // VDC_SEL=000, VDDD=1.95V
01883             (0xFE), 1, 0x5A,    // For ESD protection
01884             (0x57), 1, 0x00,    // TEST_Mode=0: exit TEST mode
01885         };
01886         static const uint8_t HX8347A_ITDB02_regValues[] PROGMEM = {
01887             //  VENDOR Gamma ITDB02 same as CMO32.   Delays are shorter than AN01
01888             (0x46), 12, 0xA4, 0x53, 0x00, 0x44, 0x04, 0x67, 0x33, 0x77, 0x12, 0x4C, 0x46, 0x44,
01889             // Display Setting
01890             (0x01), 1, 0x06,    // IDMON=0, INVON=1, NORON=1, PTLON=0
01891             (0x16), 1, 0xC8,    // MY=0, MX=0, MV=0, ML=1, BGR=0, TEON=0 .itead
01892             (0x23), 3, 0x95, 0x95, 0xFF,        // N_DC=1001 0101, PI_DC=1001 0101, I_DC=1111 1111
01893  
01894             (0x27), 4, 0x02, 0x02, 0x02, 0x02,  // N_BP=2, N_FP=2, PI_BP=2, PI_FP=2
01895             (0x2C), 2, 0x02, 0x02,      // I_BP=2, I_FP=2
01896  
01897             (0x3a), 4, 0x01, 0x00, 0xF0, 0x00,  // N_RTN=0, N_NW=1, P_RTN=0, ?? P_NW=1, I_RTN=15, I_NW=0, DIV=0 .itead
01898             TFTLCD_DELAY8, 5,
01899             (0x35), 2, 0x38, 0x78,      // EQS=38h, EQP=78h
01900             (0x3E), 1, 0x38,    // SON=38h
01901             (0x40), 2, 0x0F, 0xF0,      // GDON=0Fh, GDOFF 
01902             // Power Supply Setting 
01903             (0x19), 1, 0x49,    // CADJ=0100, CUADJ=100, OSD_EN=1 ,60Hz
01904             (0x93), 1, 0x0F,    // RADJ=1111, 100%
01905             TFTLCD_DELAY8, 5,
01906             (0x20), 1, 0x40,    // BT=0100
01907             (0x1D), 3, 0x07, 0x00, 0x04,        // VC1=7, VC3=0, VRH=??
01908             //VCOM SETTING for ITDB02
01909             (0x44), 2, 0x4D, 0x0E,      // VCM=101 0000  4D, VDV=1 0001 .itead
01910             TFTLCD_DELAY8, 5,
01911             (0x1C), 1, 0x04,    // AP=100
01912             TFTLCD_DELAY8, 5,
01913             (0x1B), 1, 0x18,    // GASENB=0, PON=0, DK=1, XDK=0, VLCD_TRI=0, STB=0
01914             TFTLCD_DELAY8, 5,
01915             (0x1B), 1, 0x10,    // GASENB=0, PON=1, DK=0, XDK=0, VLCD_TRI=0, STB=0
01916             TFTLCD_DELAY8, 5,
01917             (0x43), 1, 0x80,    //set VCOMG=1
01918             TFTLCD_DELAY8, 5,
01919             // Display ON Setting
01920             (0x90), 1, 0x7F,    // SAP=0111 1111
01921             (0x26), 1, 0x04,    //GON=0, DTE=0, D=01
01922             TFTLCD_DELAY8, 5,
01923             (0x26), 1, 0x24,    //GON=1, DTE=0, D=01
01924             (0x26), 1, 0x2C,    //GON=1, DTE=0, D=11
01925             TFTLCD_DELAY8, 5,
01926             (0x26), 1, 0x3C,    //GON=1, DTE=1, D=11
01927             // INTERNAL REGISTER SETTING for ITDB02
01928             (0x57), 1, 0x02,    // TEST_Mode=1: into TEST mode
01929             (0x95), 1, 0x01,    // SET DISPLAY CLOCK AND PUMPING CLOCK TO SYNCHRONIZE .itead
01930             (0x57), 1, 0x00,    // TEST_Mode=0: exit TEST mode
01931         };
01932         static const uint8_t HX8347A_NHD_regValues[] PROGMEM = {
01933             //Gamma Setting NHD
01934             (0x46), 12, 0x94, 0x41, 0x00, 0x33, 0x23, 0x45, 0x44, 0x77, 0x12, 0xCC, 0x46, 0x82,
01935             (0x01), 1, 0x06,    //Display Mode [06]
01936             (0x16), 1, 0xC8,    //MADCTL [00] MY=1, MX=1, BGR=1
01937 //            (0x70), 1, 0x05,    //Panel [06] 16-bit
01938             (0x23), 3, 0x95, 0x95, 0xFF,        //Cycle Control 1-3 [95 95 FF]
01939             (0x27), 4, 0x02, 0x02, 0x02, 0x02,  //Display Control 2-5 [02 02 02 02]
01940             (0x2C), 2, 0x02, 0x02,      //Display Control 6-7 [02 02]
01941             (0x3A), 4, 0x01, 0x01, 0xF0, 0x00,  //Cycle Control 1-4 [01 01 F0 00]
01942             TFTLCD_DELAY8, 80,
01943             (0x35), 2, 0x38, 0x78,      //Display Control 9-10 [09 09] EQS=56, EQP=120
01944             (0x3E), 1, 0x38,    //Cycle Control 5 [38]  
01945             (0x40), 1, 0x0F,    //Cycle Control 6 [03]  GDON=15
01946             (0x41), 1, 0xF0,    //Cycle Control 14 [F8] GDOF=248
01947  
01948             (0x19), 1, 0x2D,    //OSC Control 1 [86] CADJ=2, CUADJ=6, OSCEN=1
01949             (0x93), 1, 0x06,    //SAP Idle mode [00] ???  .nhd
01950             TFTLCD_DELAY8, 80,
01951             (0x20), 1, 0x40,    //Power Control 6 [40]
01952             (0x1D), 3, 0x07, 0x00, 0x04,        //Power Control 3-5 [04 00 06] VC=7
01953             (0x44), 2, 0x3C, 0x12,      //VCOM Control 2-3 [5A 11] VCM=60, VDV=18
01954             TFTLCD_DELAY8, 80,
01955             (0x1C), 1, 0x04,    //Power Control 2 [04]
01956             TFTLCD_DELAY8, 80,
01957             (0x43), 1, 0x80,    //VCOM Control 1 [80]
01958             TFTLCD_DELAY8, 80,
01959             (0x1B), 1, 0x08,    //Power Control 1 [00] DK=1
01960             TFTLCD_DELAY8, 80,
01961             (0x1B), 1, 0x10,    //Power Control 1 [00] PON=1
01962             TFTLCD_DELAY8, 80,
01963             (0x90), 1, 0x7F,    //Display Control 8 [0A]
01964             (0x26), 1, 0x04,    //Display Control 1 [A0] D=1
01965             TFTLCD_DELAY8, 80,
01966             (0x26), 1, 0x24,    //Display Control 1 [A0] GON=1, D=1
01967             (0x26), 1, 0x2C,    //Display Control 1 [A0] GON=1, D=3 
01968             TFTLCD_DELAY8, 80,
01969             (0x26), 1, 0x3C,    //Display Control 1 [A0] GON=1, DTE=1, D=3
01970             (0x57), 1, 0x02,    //?
01971             (0x55), 1, 0x00,    //?
01972             (0x57), 1, 0x00,    //? 
01973         };
01974         // Atmel ASF code uses VCOM2-3: 0x38, 0x12. 50ms delays and no TEST mode changes.
01975         init_table(HX8347A_NHD_regValues, sizeof(HX8347A_NHD_regValues));
01976         //        init_table(HX8347A_CMO32_regValues, sizeof(HX8347A_CMO32_regValues));
01977         //        init_table(HX8347A_CMO24_regValues, sizeof(HX8347A_CMO24_regValues));
01978         //        init_table(HX8347A_ITDB02_regValues, sizeof(HX8347A_ITDB02_regValues));
01979         //        init_table(HX8347G_2_regValues, sizeof(HX8347G_2_regValues));
01980         break;
01981 #endif
01982  
01983     case 0x8357:                //BIG CHANGE: HX8357-B is now 0x8357
01984         _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | REV_SCREEN;
01985         goto common_8357;
01986     case 0x9090:                //BIG CHANGE: HX8357-D was 0x8357
01987         _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | REV_SCREEN | READ_24BITS;
01988       common_8357:
01989         static const uint8_t HX8357C_regValues[] PROGMEM = {
01990             TFTLCD_DELAY8, 1,  //dummy table
01991         };
01992         table8_ads = HX8357C_regValues, table_size = sizeof(HX8357C_regValues);
01993         p16 = (int16_t *) & HEIGHT;
01994         *p16 = 480;
01995         p16 = (int16_t *) & WIDTH;
01996         *p16 = 320;
01997         break;
01998  
01999     case 0x0099:                //HX8357-D matches datasheet
02000         _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | REV_SCREEN | READ_24BITS;
02001         static const uint8_t HX8357_99_regValues[] PROGMEM = {
02002             (0xB9), 3, 0xFF, 0x83, 0x57,   // SETEXTC
02003             TFTLCD_DELAY8, 150,
02004             TFTLCD_DELAY8, 150,
02005             (0xB6), 1, 0x25,   // SETCOM [4B 00] -2.5V+37*0.02V=-1.76V [-1.00V]
02006             (0xC0), 6, 0x50, 0x50, 0x01, 0x3C, 0x1E, 0x08,  // SETSTBA [73 50 00 3C C4 08]
02007             (0xB4), 7, 0x02, 0x40, 0x00, 0x2A, 0x2A, 0x0D, 0x78, // SETCYC [02 40 00 2A 2A 0D 96]
02008 #ifdef SUPPORT_8357D_GAMMA
02009             // HX8357D_SETGAMMA [0B 0C 11 1D 25 37 43 4B 4E 47 41 39 35 31 2E 21 1C 1D 1D 26 31 44 4E 56 44 3F 39 33 31 2E 28 1D E0 01]
02010             (0xE0),34, 0x02, 0x0A, 0x11, 0x1D, 0x23, 0x35, 0x41, 0x4B, 0x4B, 0x42, 0x3A, 0x27, 0x1B, 0x08, 0x09, 0x03, 0x02, 0x0A, 0x11, 0x1D, 0x23, 0x35, 0x41, 0x4B, 0x4B, 0x42, 0x3A, 0x27, 0x1B, 0x08, 0x09, 0x03, 0x00, 0x01,
02011 #endif
02012         };
02013         table8_ads = HX8357_99_regValues, table_size = sizeof(HX8357_99_regValues);
02014         p16 = (int16_t *) & HEIGHT;
02015         *p16 = 480;
02016         p16 = (int16_t *) & WIDTH;
02017         *p16 = 320;
02018         break;
02019  
02020 #ifdef SUPPORT_8230
02021     case 0x8230:    //thanks Auzman
02022         _lcd_capable = 0 | REV_SCREEN | INVERT_GS | INVERT_RGB | READ_BGR;
02023         static const uint16_t UC8230_regValues[] PROGMEM = {
02024             //After pin Reset wait at least 100ms
02025             TFTLCD_DELAY, 100, //at least 100ms
02026             0x0046, 0x0002, //MTP Disable
02027             0x0010, 0x1590, //SAP=1, BT=5, APE=1, AP=1
02028             0x0011, 0x0227, //DC1=2, DC0=2, VC=7
02029             0x0012, 0x80ff, //P5VMD=1, PON=7, VRH=15
02030             0x0013, 0x9c31, //VDV=28, VCM=49
02031             TFTLCD_DELAY, 10, //at least 10ms
02032             0x0002, 0x0300, //set N-line = 1
02033             0x0003, 0x1030, //set GRAM writing direction & BGR=1
02034             0x0060, 0xa700, //GS; gate scan: start position & drive line Q'ty
02035             0x0061, 0x0001, //REV, NDL, VLE
02036             /*--------------------Gamma control------------------------*/
02037             0x0030, 0x0303,
02038             0x0031, 0x0303,
02039             0x0032, 0x0303,
02040             0x0033, 0x0300,
02041             0x0034, 0x0003,
02042             0x0035, 0x0303,
02043             0x0036, 0x1400,
02044             0x0037, 0x0303,
02045             0x0038, 0x0303,
02046             0x0039, 0x0303,
02047             0x003a, 0x0300,
02048             0x003b, 0x0003,
02049             0x003c, 0x0303,
02050             0x003d, 0x1400,
02051             //-----------------------------------------------------------//
02052             0x0020, 0x0000, //GRAM horizontal address
02053             0x0021, 0x0000, //GRAM vertical address
02054             //************** Partial Display control*********************//
02055             0x0080, 0x0000,
02056             0x0081, 0x0000,
02057             0x0082, 0x0000,
02058             0x0083, 0x0000,
02059             0x0084, 0x0000,
02060             0x0085, 0x0000,
02061             //-----------------------------------------------------------//
02062             0x0092, 0x0200,
02063             0x0093, 0x0303,
02064             0x0090, 0x0010, //set clocks/Line
02065             0x0000, 0x0001,
02066             TFTLCD_DELAY, 200, // Delay 200 ms
02067             0x0007, 0x0173, //Display on setting
02068         };
02069         init_table16(UC8230_regValues, sizeof(UC8230_regValues));
02070         break;
02071 #endif
02072  
02073 #ifdef SUPPORT_9163
02074     case 0x9163:                //
02075         _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_24BITS;
02076         static const uint8_t PROGMEM table9163C[] = {
02077             //  (COMMAND_BYTE), n, data_bytes....
02078             0x26, 1, 0x02,       // [01] GAMMASET use CURVE=1, 2, 4, 8
02079             0xB1, 2, 0x08, 0x02, // [0E 14] FRMCTR1 if GM==011 61.7Hz
02080             0xB4, 1, 0x07,       // [02] INVCTR
02081             0xB8, 1, 0x01,       // [00] GSCTRL
02082             0xC0, 2, 0x0A, 0x02, // [0A 05] PWCTR1 if LCM==10
02083             0xC1, 1, 0x02,       // [07] PWCTR2
02084             0xC5, 2, 0x50, 0x63, // [43 4D] VMCTR1
02085             0xC7, 1, 0,          // [40] VCOMOFFS
02086         };
02087         table8_ads = table9163C, table_size = sizeof(table9163C);   //
02088         p16 = (int16_t *) & HEIGHT;
02089         *p16 = 160;
02090         p16 = (int16_t *) & WIDTH;
02091         *p16 = 128;
02092         break;
02093 #endif
02094  
02095 #ifdef SUPPORT_9225
02096 #define ILI9225_DRIVER_OUTPUT_CTRL      (0x01u)  // Driver Output Control
02097 #define ILI9225_LCD_AC_DRIVING_CTRL     (0x02u)  // LCD AC Driving Control
02098 #define ILI9225_ENTRY_MODE                (0x03u)  // Entry Mode
02099 #define ILI9225_DISP_CTRL1              (0x07u)  // Display Control 1
02100 #define ILI9225_BLANK_PERIOD_CTRL1      (0x08u)  // Blank Period Control
02101 #define ILI9225_FRAME_CYCLE_CTRL        (0x0Bu)  // Frame Cycle Control
02102 #define ILI9225_INTERFACE_CTRL          (0x0Cu)  // Interface Control
02103 #define ILI9225_OSC_CTRL                (0x0Fu)  // Osc Control
02104 #define ILI9225_POWER_CTRL1             (0x10u)  // Power Control 1
02105 #define ILI9225_POWER_CTRL2             (0x11u)  // Power Control 2
02106 #define ILI9225_POWER_CTRL3             (0x12u)  // Power Control 3
02107 #define ILI9225_POWER_CTRL4             (0x13u)  // Power Control 4
02108 #define ILI9225_POWER_CTRL5             (0x14u)  // Power Control 5
02109 #define ILI9225_VCI_RECYCLING           (0x15u)  // VCI Recycling
02110 #define ILI9225_RAM_ADDR_SET1           (0x20u)  // Horizontal GRAM Address Set
02111 #define ILI9225_RAM_ADDR_SET2           (0x21u)  // Vertical GRAM Address Set
02112 #define ILI9225_GRAM_DATA_REG           (0x22u)  // GRAM Data Register
02113 #define ILI9225_GATE_SCAN_CTRL          (0x30u)  // Gate Scan Control Register
02114 #define ILI9225_VERTICAL_SCROLL_CTRL1   (0x31u)  // Vertical Scroll Control 1 Register
02115 #define ILI9225_VERTICAL_SCROLL_CTRL2   (0x32u)  // Vertical Scroll Control 2 Register
02116 #define ILI9225_VERTICAL_SCROLL_CTRL3   (0x33u)  // Vertical Scroll Control 3 Register
02117 #define ILI9225_PARTIAL_DRIVING_POS1    (0x34u)  // Partial Driving Position 1 Register
02118 #define ILI9225_PARTIAL_DRIVING_POS2    (0x35u)  // Partial Driving Position 2 Register
02119 #define ILI9225_HORIZONTAL_WINDOW_ADDR1 (0x36u)  // Horizontal Address END Position   HEA
02120 #define ILI9225_HORIZONTAL_WINDOW_ADDR2 (0x37u)  // Horizontal Address START Position HSA
02121 #define ILI9225_VERTICAL_WINDOW_ADDR1   (0x38u)  // Vertical Address END Position     VEA
02122 #define ILI9225_VERTICAL_WINDOW_ADDR2   (0x39u)  // Vertical Address START Position   VSA
02123 #define ILI9225_GAMMA_CTRL1             (0x50u)  // Gamma Control 1
02124 #define ILI9225_GAMMA_CTRL2             (0x51u)  // Gamma Control 2
02125 #define ILI9225_GAMMA_CTRL3             (0x52u)  // Gamma Control 3
02126 #define ILI9225_GAMMA_CTRL4             (0x53u)  // Gamma Control 4
02127 #define ILI9225_GAMMA_CTRL5             (0x54u)  // Gamma Control 5
02128 #define ILI9225_GAMMA_CTRL6             (0x55u)  // Gamma Control 6
02129 #define ILI9225_GAMMA_CTRL7             (0x56u)  // Gamma Control 7
02130 #define ILI9225_GAMMA_CTRL8             (0x57u)  // Gamma Control 8
02131 #define ILI9225_GAMMA_CTRL9             (0x58u)  // Gamma Control 9
02132 #define ILI9225_GAMMA_CTRL10            (0x59u)  // Gamma Control 10
02133  
02134 #define ILI9225C_INVOFF  0x20
02135 #define ILI9225C_INVON   0x21
02136  
02137     case 0x6813:
02138     case 0x9226:
02139         _lcd_ID = 0x9225;                //fall through
02140     case 0x9225:
02141         _lcd_capable = REV_SCREEN | READ_BGR;     //thanks tongbajiel
02142         static const uint16_t ILI9225_regValues[] PROGMEM = {
02143             /* Start Initial Sequence */
02144             /* Set SS bit and direction output from S528 to S1 */
02145             ILI9225_POWER_CTRL1, 0x0000, // Set SAP,DSTB,STB
02146             ILI9225_POWER_CTRL2, 0x0000, // Set APON,PON,AON,VCI1EN,VC
02147             ILI9225_POWER_CTRL3, 0x0000, // Set BT,DC1,DC2,DC3
02148             ILI9225_POWER_CTRL4, 0x0000, // Set GVDD
02149             ILI9225_POWER_CTRL5, 0x0000, // Set VCOMH/VCOML voltage
02150             TFTLCD_DELAY, 40,
02151  
02152             // Power-on sequence
02153             ILI9225_POWER_CTRL2, 0x0018, // Set APON,PON,AON,VCI1EN,VC
02154             ILI9225_POWER_CTRL3, 0x6121, // Set BT,DC1,DC2,DC3
02155             ILI9225_POWER_CTRL4, 0x006F, // Set GVDD   /*007F 0088 */
02156             ILI9225_POWER_CTRL5, 0x495F, // Set VCOMH/VCOML voltage
02157             ILI9225_POWER_CTRL1, 0x0800, // Set SAP,DSTB,STB
02158             TFTLCD_DELAY, 10,
02159             ILI9225_POWER_CTRL2, 0x103B, // Set APON,PON,AON,VCI1EN,VC
02160             TFTLCD_DELAY, 50,
02161  
02162             ILI9225_DRIVER_OUTPUT_CTRL, 0x011C, // set the display line number and display direction
02163             ILI9225_LCD_AC_DRIVING_CTRL, 0x0100, // set 1 line inversion
02164             ILI9225_ENTRY_MODE, 0x1030, // set GRAM write direction and BGR=1.
02165             ILI9225_DISP_CTRL1, 0x0000, // Display off
02166             ILI9225_BLANK_PERIOD_CTRL1, 0x0808, // set the back porch and front porch
02167             ILI9225_FRAME_CYCLE_CTRL, 0x1100, // set the clocks number per line
02168             ILI9225_INTERFACE_CTRL, 0x0000, // CPU interface
02169             ILI9225_OSC_CTRL, 0x0D01, // Set Osc  /*0e01*/
02170             ILI9225_VCI_RECYCLING, 0x0020, // Set VCI recycling
02171             ILI9225_RAM_ADDR_SET1, 0x0000, // RAM Address
02172             ILI9225_RAM_ADDR_SET2, 0x0000, // RAM Address
02173  
02174             /* Set GRAM area */
02175             ILI9225_GATE_SCAN_CTRL, 0x0000,
02176             ILI9225_VERTICAL_SCROLL_CTRL1, 0x00DB,
02177             ILI9225_VERTICAL_SCROLL_CTRL2, 0x0000,
02178             ILI9225_VERTICAL_SCROLL_CTRL3, 0x0000,
02179             ILI9225_PARTIAL_DRIVING_POS1, 0x00DB,
02180             ILI9225_PARTIAL_DRIVING_POS2, 0x0000,
02181             ILI9225_HORIZONTAL_WINDOW_ADDR1, 0x00AF,
02182             ILI9225_HORIZONTAL_WINDOW_ADDR2, 0x0000,
02183             ILI9225_VERTICAL_WINDOW_ADDR1, 0x00DB,
02184             ILI9225_VERTICAL_WINDOW_ADDR2, 0x0000,
02185  
02186             /* Set GAMMA curve */
02187             ILI9225_GAMMA_CTRL1, 0x0000,
02188             ILI9225_GAMMA_CTRL2, 0x0808,
02189             ILI9225_GAMMA_CTRL3, 0x080A,
02190             ILI9225_GAMMA_CTRL4, 0x000A,
02191             ILI9225_GAMMA_CTRL5, 0x0A08,
02192             ILI9225_GAMMA_CTRL6, 0x0808,
02193             ILI9225_GAMMA_CTRL7, 0x0000,
02194             ILI9225_GAMMA_CTRL8, 0x0A00,
02195             ILI9225_GAMMA_CTRL9, 0x0710,
02196             ILI9225_GAMMA_CTRL10, 0x0710,
02197  
02198             ILI9225_DISP_CTRL1, 0x0012,
02199             TFTLCD_DELAY, 50,
02200             ILI9225_DISP_CTRL1, 0x1017,
02201         };
02202         init_table16(ILI9225_regValues, sizeof(ILI9225_regValues));
02203         p16 = (int16_t *) & HEIGHT;
02204         *p16 = 220;
02205         p16 = (int16_t *) & WIDTH;
02206         *p16 = 176;
02207         break;
02208 #endif
02209  
02210     case 0x0001:
02211         _lcd_capable = 0 | REV_SCREEN | INVERT_GS; //no RGB bug. thanks Ivo_Deshev
02212         goto common_9320;
02213     case 0x5408:
02214         _lcd_capable = 0 | REV_SCREEN | READ_BGR; //Red 2.4" thanks jorgenv, Ardlab_Gent
02215 //        _lcd_capable = 0 | REV_SCREEN | READ_BGR | INVERT_GS; //Blue 2.8" might be different
02216         goto common_9320;
02217     case 0x1505:                //R61505 thanks Ravi_kanchan2004. R61505V, R61505W different
02218     case 0x9320:
02219         _lcd_capable = 0 | REV_SCREEN | READ_BGR;
02220       common_9320:
02221         static const uint16_t ILI9320_regValues[] PROGMEM = {
02222             0x00e5, 0x8000,
02223             0x0000, 0x0001,
02224             0x0001, 0x100,
02225             0x0002, 0x0700,
02226             0x0003, 0x1030,
02227             0x0004, 0x0000,
02228             0x0008, 0x0202,
02229             0x0009, 0x0000,
02230             0x000A, 0x0000,
02231             0x000C, 0x0000,
02232             0x000D, 0x0000,
02233             0x000F, 0x0000,
02234             //-----Power On sequence-----------------------
02235             0x0010, 0x0000,
02236             0x0011, 0x0007,
02237             0x0012, 0x0000,
02238             0x0013, 0x0000,
02239             TFTLCD_DELAY, 50,
02240             0x0010, 0x17B0,  //SAP=1, BT=7, APE=1, AP=3
02241             0x0011, 0x0007,  //DC1=0, DC0=0, VC=7
02242             TFTLCD_DELAY, 10,
02243             0x0012, 0x013A,  //VCMR=1, PON=3, VRH=10
02244             TFTLCD_DELAY, 10,
02245             0x0013, 0x1A00,  //VDV=26
02246             0x0029, 0x000c,  //VCM=12
02247             TFTLCD_DELAY, 10,
02248             //-----Gamma control-----------------------
02249             0x0030, 0x0000,
02250             0x0031, 0x0505,
02251             0x0032, 0x0004,
02252             0x0035, 0x0006,
02253             0x0036, 0x0707,
02254             0x0037, 0x0105,
02255             0x0038, 0x0002,
02256             0x0039, 0x0707,
02257             0x003C, 0x0704,
02258             0x003D, 0x0807,
02259             //-----Set RAM area-----------------------
02260             0x0060, 0xA700,     //GS=1
02261             0x0061, 0x0001,
02262             0x006A, 0x0000,
02263             0x0021, 0x0000,
02264             0x0020, 0x0000,
02265             //-----Partial Display Control------------
02266             0x0080, 0x0000,
02267             0x0081, 0x0000,
02268             0x0082, 0x0000,
02269             0x0083, 0x0000,
02270             0x0084, 0x0000,
02271             0x0085, 0x0000,
02272             //-----Panel Control----------------------
02273             0x0090, 0x0010,
02274             0x0092, 0x0000,
02275             0x0093, 0x0003,
02276             0x0095, 0x0110,
02277             0x0097, 0x0000,
02278             0x0098, 0x0000,
02279             //-----Display on-----------------------
02280             0x0007, 0x0173,
02281             TFTLCD_DELAY, 50,
02282         };
02283         init_table16(ILI9320_regValues, sizeof(ILI9320_regValues));
02284         break;
02285     case 0x6809:
02286         _lcd_capable = 0 | REV_SCREEN | INVERT_GS | AUTO_READINC;
02287         goto common_93x5;
02288     case 0x9328:
02289     case 0x9325:
02290         _lcd_capable = 0 | REV_SCREEN | INVERT_GS;
02291         goto common_93x5;
02292     case 0x9331:
02293     case 0x9335:
02294         _lcd_capable = 0 | REV_SCREEN;
02295       common_93x5:
02296         static const uint16_t ILI9325_regValues[] PROGMEM = {
02297             0x00E5, 0x78F0,     // set SRAM internal timing
02298             0x0001, 0x0100,     // set Driver Output Control
02299             0x0002, 0x0200,     // set 1 line inversion
02300             0x0003, 0x1030,     // set GRAM write direction and BGR=1.
02301             0x0004, 0x0000,     // Resize register
02302             0x0005, 0x0000,     // .kbv 16bits Data Format Selection
02303             0x0008, 0x0207,     // set the back porch and front porch
02304             0x0009, 0x0000,     // set non-display area refresh cycle ISC[3:0]
02305             0x000A, 0x0000,     // FMARK function
02306             0x000C, 0x0000,     // RGB interface setting
02307             0x000D, 0x0000,     // Frame marker Position
02308             0x000F, 0x0000,     // RGB interface polarity
02309             // ----------- Power On sequence ----------- //
02310             0x0010, 0x0000,     // SAP, BT[3:0], AP, DSTB, SLP, STB
02311             0x0011, 0x0007,     // DC1[2:0], DC0[2:0], VC[2:0]
02312             0x0012, 0x0000,     // VREG1OUT voltage
02313             0x0013, 0x0000,     // VDV[4:0] for VCOM amplitude
02314             0x0007, 0x0001,
02315             TFTLCD_DELAY, 200,  // Dis-charge capacitor power voltage
02316             0x0010, 0x1690,     // SAP=1, BT=6, APE=1, AP=1, DSTB=0, SLP=0, STB=0
02317             0x0011, 0x0227,     // DC1=2, DC0=2, VC=7
02318             TFTLCD_DELAY, 50,   // wait_ms 50ms
02319             0x0012, 0x000D,     // VCIRE=1, PON=0, VRH=5
02320             TFTLCD_DELAY, 50,   // wait_ms 50ms
02321             0x0013, 0x1200,     // VDV=28 for VCOM amplitude
02322             0x0029, 0x000A,     // VCM=10 for VCOMH
02323             0x002B, 0x000D,     // Set Frame Rate
02324             TFTLCD_DELAY, 50,   // wait_ms 50ms
02325             0x0020, 0x0000,     // GRAM horizontal Address
02326             0x0021, 0x0000,     // GRAM Vertical Address
02327             // ----------- Adjust the Gamma Curve ----------//
02328  
02329             0x0030, 0x0000,
02330             0x0031, 0x0404,
02331             0x0032, 0x0003,
02332             0x0035, 0x0405,
02333             0x0036, 0x0808,
02334             0x0037, 0x0407,
02335             0x0038, 0x0303,
02336             0x0039, 0x0707,
02337             0x003C, 0x0504,
02338             0x003D, 0x0808,
02339  
02340             //------------------ Set GRAM area ---------------//
02341             0x0060, 0x2700,     // Gate Scan Line GS=0 [0xA700] 
02342             0x0061, 0x0001,     // NDL,VLE, REV .kbv
02343             0x006A, 0x0000,     // set scrolling line
02344             //-------------- Partial Display Control ---------//
02345             0x0080, 0x0000,
02346             0x0081, 0x0000,
02347             0x0082, 0x0000,
02348             0x0083, 0x0000,
02349             0x0084, 0x0000,
02350             0x0085, 0x0000,
02351             //-------------- Panel Control -------------------//
02352             0x0090, 0x0010,
02353             0x0092, 0x0000,
02354             0x0007, 0x0133,     // 262K color and display ON
02355         };
02356         init_table16(ILI9325_regValues, sizeof(ILI9325_regValues));
02357         break;
02358  
02359 #if defined(SUPPORT_9326_5420)
02360     case 0x5420:
02361     case 0x9326:
02362         _lcd_capable = REV_SCREEN | READ_BGR;
02363         static const uint16_t ILI9326_CPT28_regValues[] PROGMEM = {
02364 //************* Start Initial Sequence **********//
02365          0x0702, 0x3008,     //  Set internal timing, don’t change this value
02366          0x0705, 0x0036,     //  Set internal timing, don’t change this value
02367          0x070B, 0x1213,     //  Set internal timing, don’t change this value
02368          0x0001, 0x0100,     //  set SS and SM bit
02369          0x0002, 0x0100,     //  set 1 line inversion
02370          0x0003, 0x1030,     //  set GRAM write direction and BGR=1.
02371          0x0008, 0x0202,     //  set the back porch and front porch
02372          0x0009, 0x0000,     //  set non-display area refresh cycle ISC[3:0]
02373          0x000C, 0x0000,     //  RGB interface setting
02374          0x000F, 0x0000,     //  RGB interface polarity
02375 //*************Power On sequence ****************//
02376          0x0100, 0x0000,     //  SAP, BT[3:0], AP, DSTB, SLP, STB
02377          0x0102, 0x0000,     //  VREG1OUT voltage
02378          0x0103, 0x0000,   // VDV[4:0] for VCOM amplitude
02379         TFTLCD_DELAY, 200,   // Dis-charge capacitor power voltage
02380          0x0100, 0x1190,   // SAP, BT[3:0], AP, DSTB, SLP, STB
02381          0x0101, 0x0227,   // DC1[2:0], DC0[2:0], VC[2:0]
02382         TFTLCD_DELAY, 50,   // Delay 50ms
02383          0x0102, 0x01BD,   // VREG1OUT voltage
02384         TFTLCD_DELAY, 50,   // Delay 50ms
02385          0x0103, 0x2D00,   // VDV[4:0] for VCOM amplitude
02386          0x0281, 0x000E,   // VCM[5:0] for VCOMH
02387         TFTLCD_DELAY, 50,   //
02388          0x0200, 0x0000,   // GRAM horizontal Address
02389          0x0201, 0x0000,   // GRAM Vertical Address
02390 // ----------- Adjust the Gamma Curve ----------//
02391          0x0300, 0x0000,   //
02392          0x0301, 0x0707,   //
02393          0x0302, 0x0606,   //
02394          0x0305, 0x0000,   //
02395          0x0306, 0x0D00,   //
02396          0x0307, 0x0706,   //
02397          0x0308, 0x0005,   //
02398          0x0309, 0x0007,   //
02399          0x030C, 0x0000,   //
02400          0x030D, 0x000A,   //
02401 //------------------ Set GRAM area ---------------//
02402          0x0400, 0x3100,     //  Gate Scan Line 400 lines
02403          0x0401, 0x0001,     //  NDL,VLE, REV
02404          0x0404, 0x0000,     //  set scrolling line
02405 //-------------- Partial Display Control ---------//
02406          0x0500, 0x0000,     // Partial Image 1 Display Position
02407          0x0501, 0x0000,     // Partial Image 1 RAM Start/End Address
02408          0x0502, 0x0000,     // Partial Image 1 RAM Start/End Address
02409          0x0503, 0x0000,     // Partial Image 2 Display Position
02410          0x0504, 0x0000,     // Partial Image 2 RAM Start/End Address
02411          0x0505, 0x0000,     // Partial Image 2 RAM Start/End Address
02412 //-------------- Panel Control -------------------//
02413          0x0010, 0x0010,     // DIVI[1:0];RTNI[4:0]
02414          0x0011, 0x0600,     // NOWI[2:0];SDTI[2:0]
02415          0x0020, 0x0002,     // DIVE[1:0];RTNE[5:0]
02416          0x0007, 0x0173,     //  262K color and display ON
02417          };
02418         init_table16(ILI9326_CPT28_regValues, sizeof(ILI9326_CPT28_regValues));
02419         p16 = (int16_t *) & HEIGHT;
02420         *p16 = 400;
02421         p16 = (int16_t *) & WIDTH;
02422         *p16 = 240;
02423         break;
02424 #endif
02425  
02426     case 0x9327:
02427         _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS;
02428         static const uint8_t ILI9327_regValues[] PROGMEM = {
02429             0xB0, 1, 0x00,      //Disable Protect for cmds B1-DF, E0-EF, F0-FF 
02430             //            0xE0, 1, 0x20,      //NV Memory Write [00]
02431             //            0xD1, 3, 0x00, 0x71, 0x19,  //VCOM control [00 40 0F]
02432             //            0xD0, 3, 0x07, 0x01, 0x08,  //Power Setting [07 04 8C]
02433             0xC1, 4, 0x10, 0x10, 0x02, 0x02,    //Display Timing [10 10 02 02]
02434             0xC0, 6, 0x00, 0x35, 0x00, 0x00, 0x01, 0x02,        //Panel Drive [00 35 00 00 01 02 REV=0,GS=0,SS=0
02435             0xC5, 1, 0x04,      //Frame Rate [04]
02436             0xD2, 2, 0x01, 0x04,        //Power Setting [01 44]
02437             //            0xC8, 15, 0x04, 0x67, 0x35, 0x04, 0x08, 0x06, 0x24, 0x01, 0x37, 0x40, 0x03, 0x10, 0x08, 0x80, 0x00,
02438             //            0xC8, 15, 0x00, 0x77, 0x77, 0x04, 0x04, 0x00, 0x00, 0x00, 0x77, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
02439             0xCA, 1, 0x00,      //DGC LUT ???
02440             0xEA, 1, 0x80,      //3-Gamma Function Enable
02441             //                     0xB0, 1, 0x03,      //Enable Protect
02442         };
02443         table8_ads = ILI9327_regValues, table_size = sizeof(ILI9327_regValues);
02444         p16 = (int16_t *) & HEIGHT;
02445         *p16 = 400;
02446         p16 = (int16_t *) & WIDTH;
02447         *p16 = 240;
02448         break;
02449     case 0x1602:
02450         _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS; //does not readGRAM
02451         static const uint8_t XX1602_regValues[] PROGMEM = {
02452             0xB8, 1, 0x01,      //GS [00]
02453             0xC0, 1, 0x0E,      //??Power [0A]
02454         };
02455         table8_ads = XX1602_regValues, table_size = sizeof(XX1602_regValues);
02456         break;
02457  
02458     case 0x2053:    //weird from BangGood
02459         _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_24BITS | REV_SCREEN | READ_BGR;
02460         goto common_9329;
02461     case 0xAC11:
02462         _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_24BITS | REV_SCREEN; //thanks viliam
02463         goto common_9329;
02464     case 0x9302:
02465         _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS;
02466         goto common_9329;
02467     case 0x9338:
02468         _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_24BITS;
02469         goto common_9329;
02470     case 0x9329:
02471         _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | INVERT_SS | REV_SCREEN;
02472       common_9329:
02473         static const uint8_t ILI9329_regValues[] PROGMEM = {
02474 //            0xF6, 3, 0x01, 0x01, 0x00,  //Interface Control needs EXTC=1 MX_EOR=1, TM=0, RIM=0
02475 //            0xB6, 3, 0x0A, 0x82, 0x27,  //Display Function [0A 82 27]
02476 //            0xB7, 1, 0x06,      //Entry Mode Set [06]
02477             0x36, 1, 0x00,      //Memory Access [00] pointless but stops an empty array
02478         };
02479         table8_ads = ILI9329_regValues, table_size = sizeof(ILI9329_regValues);
02480         break;
02481  
02482     case 0x9340:                //ILI9340 thanks Ravi_kanchan2004.
02483         _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_24BITS | REV_SCREEN;
02484         goto common_9341;
02485     case 0x9341:
02486       common_9341:  
02487         _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_24BITS;
02488         static const uint8_t ILI9341_regValues_2_4[] PROGMEM = {        // BOE 2.4"
02489             0xF6, 3, 0x01, 0x01, 0x00,  //Interface Control needs EXTC=1 MV_EOR=0, TM=0, RIM=0
02490             0xCF, 3, 0x00, 0x81, 0x30,  //Power Control B [00 81 30]
02491             0xED, 4, 0x64, 0x03, 0x12, 0x81,    //Power On Seq [55 01 23 01]
02492             0xE8, 3, 0x85, 0x10, 0x78,  //Driver Timing A [04 11 7A]
02493             0xCB, 5, 0x39, 0x2C, 0x00, 0x34, 0x02,      //Power Control A [39 2C 00 34 02]
02494             0xF7, 1, 0x20,      //Pump Ratio [10]
02495             0xEA, 2, 0x00, 0x00,        //Driver Timing B [66 00]
02496             0xB0, 1, 0x00,      //RGB Signal [00] 
02497             0xB1, 2, 0x00, 0x1B,        //Frame Control [00 1B]
02498             //            0xB6, 2, 0x0A, 0xA2, 0x27, //Display Function [0A 82 27 XX]    .kbv SS=1  
02499             0xB4, 1, 0x00,      //Inversion Control [02] .kbv NLA=1, NLB=1, NLC=1
02500             0xC0, 1, 0x21,      //Power Control 1 [26]
02501             0xC1, 1, 0x11,      //Power Control 2 [00]
02502             0xC5, 2, 0x3F, 0x3C,        //VCOM 1 [31 3C]
02503             0xC7, 1, 0xB5,      //VCOM 2 [C0]
02504             0x36, 1, 0x48,      //Memory Access [00]
02505             0xF2, 1, 0x00,      //Enable 3G [02]
02506             0x26, 1, 0x01,      //Gamma Set [01]
02507             0xE0, 15, 0x0f, 0x26, 0x24, 0x0b, 0x0e, 0x09, 0x54, 0xa8, 0x46, 0x0c, 0x17, 0x09, 0x0f, 0x07, 0x00,
02508             0xE1, 15, 0x00, 0x19, 0x1b, 0x04, 0x10, 0x07, 0x2a, 0x47, 0x39, 0x03, 0x06, 0x06, 0x30, 0x38, 0x0f,
02509         };
02510         static const uint8_t ILI9341_regValues_ada[] PROGMEM = {        // Adafruit_TFTLCD only works with EXTC=0
02511             //                     0xF6, 3, 0x00, 0x01, 0x00,  //Interface Control needs EXTC=1 TM=0, RIM=0
02512             //            0xF6, 3, 0x01, 0x01, 0x03,  //Interface Control needs EXTC=1 RM=1, RIM=1
02513             0xF6, 3, 0x09, 0x01, 0x03,  //Interface Control needs EXTC=1 RM=0, RIM=1
02514             0xB0, 1, 0x40,      //RGB Signal [40] RCM=2
02515             0xB4, 1, 0x00,      //Inversion Control [02] .kbv NLA=1, NLB=1, NLC=1
02516             0xC0, 1, 0x23,      //Power Control 1 [26]
02517             0xC1, 1, 0x10,      //Power Control 2 [00]
02518             0xC5, 2, 0x2B, 0x2B,        //VCOM 1 [31 3C]
02519             0xC7, 1, 0xC0,      //VCOM 2 [C0]
02520             0x36, 1, 0x88,      //Memory Access [00]
02521             0xB1, 2, 0x00, 0x1B,        //Frame Control [00 1B]
02522             0xB7, 1, 0x07,      //Entry Mode [00]
02523         };
02524         table8_ads = ILI9341_regValues_2_4, table_size = sizeof(ILI9341_regValues_2_4);   //
02525         break;
02526 #if defined(SUPPORT_9342)
02527     case 0x9342:
02528         _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_24BITS | INVERT_GS | REV_SCREEN;
02529         static const uint8_t ILI9342_regValues_CPT24[] PROGMEM = {     //CPT 2.4"
02530             (0xB9), 3, 0xFF, 0x93, 0x42, //[00 00 00]
02531             (0xC0), 2, 0x1D, 0x0A,    //[26 09]
02532             (0xC1), 1, 0x02,          //[10]
02533             (0xC5), 2, 0x2F, 0x2F,    //[31 3C]
02534             (0xC7), 1, 0xC3,          //[C0]
02535             (0xB8), 1, 0x0B,          //[07]
02536             (0xE0), 15, 0x0F, 0x33, 0x30, 0x0C, 0x0F, 0x08, 0x5D, 0x66, 0x4A, 0x07, 0x13, 0x05, 0x1B, 0x0E, 0x08,
02537             (0xE1), 15, 0x08, 0x0E, 0x11, 0x02, 0x0E, 0x02, 0x24, 0x33, 0x37, 0x03, 0x0A, 0x09, 0x26, 0x33, 0x0F,
02538         };
02539         static const uint8_t ILI9342_regValues_Tianma23[] PROGMEM = {     //Tianma 2.3"
02540             (0xB9), 3, 0xFF, 0x93, 0x42,
02541             (0xC0), 2, 0x1D, 0x0A,
02542             (0xC1), 1, 0x01,
02543             (0xC5), 2, 0x2C, 0x2C,
02544             (0xC7), 1, 0xC6,
02545             (0xB8), 1, 0x09,
02546             (0xE0), 15, 0x0F, 0x26, 0x21, 0x07, 0x0A, 0x03, 0x4E, 0x62, 0x3E, 0x0B, 0x11, 0x00, 0x08, 0x02, 0x00,
02547             (0xE1), 15, 0x00, 0x19, 0x1E, 0x03, 0x0E, 0x03, 0x30, 0x23, 0x41, 0x03, 0x0B, 0x07, 0x2F, 0x36, 0x0F,
02548         };
02549         static const uint8_t ILI9342_regValues_HSD23[] PROGMEM = {     //HSD 2.3"
02550             (0xB9), 3, 0xFF, 0x93, 0x42,
02551             (0xC0), 2, 0x1D, 0x0A,
02552             (0xC1), 1, 0x02,
02553             (0xC5), 2, 0x2F, 0x27,
02554             (0xC7), 1, 0xA4,
02555             (0xB8), 1, 0x0B,
02556             (0xE0), 15, 0x0F, 0x24, 0x21, 0x0C, 0x0F, 0x06, 0x50, 0x75, 0x3F, 0x07, 0x12, 0x05, 0x11, 0x0B, 0x08,
02557             (0xE1), 15, 0x08, 0x1D, 0x20, 0x02, 0x0E, 0x04, 0x31, 0x24, 0x42, 0x03, 0x0B, 0x09, 0x30, 0x36, 0x0F,
02558         };
02559         table8_ads = ILI9342_regValues_CPT24, table_size = sizeof(ILI9342_regValues_CPT24);   //
02560         //        table8_ads = ILI9342_regValues_Tianma23, table_size = sizeof(ILI9342_regValues_Tianma23);   //
02561         //        table8_ads = ILI9342_regValues_HSD23, table_size = sizeof(ILI9342_regValues_HSD23);   //
02562         p16 = (int16_t *) & HEIGHT;
02563         *p16 = 240;
02564         p16 = (int16_t *) & WIDTH;
02565         *p16 = 320;
02566         break;
02567 #endif
02568     case 0x1581:                        //no BGR in MADCTL.  set BGR in Panel Control
02569         _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_24BITS; //thanks zdravke
02570         goto common_9481;
02571     case 0x9481:
02572         _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_BGR;
02573       common_9481:
02574         static const uint8_t ILI9481_regValues[] PROGMEM = {    // Atmel MaxTouch
02575             0xB0, 1, 0x00,              // unlocks E0, F0
02576             0xB3, 4, 0x02, 0x00, 0x00, 0x00, //Frame Memory, interface [02 00 00 00]
02577             0xB4, 1, 0x00,              // Frame mode [00]
02578             0xD0, 3, 0x07, 0x42, 0x18,  // Set Power [00 43 18] x1.00, x6, x3
02579             0xD1, 3, 0x00, 0x07, 0x10,  // Set VCOM  [00 00 00] x0.72, x1.02
02580             0xD2, 2, 0x01, 0x02,        // Set Power for Normal Mode [01 22]
02581             0xD3, 2, 0x01, 0x02,        // Set Power for Partial Mode [01 22]
02582             0xD4, 2, 0x01, 0x02,        // Set Power for Idle Mode [01 22]
02583             0xC0, 5, 0x12, 0x3B, 0x00, 0x02, 0x11, //Panel Driving BGR for 1581 [10 3B 00 02 11]
02584             0xC1, 3, 0x10, 0x10, 0x88,  // Display Timing Normal [10 10 88]
02585             0xC5, 1, 0x03,      //Frame Rate [03]
02586             0xC6, 1, 0x02,      //Interface Control [02]
02587             0xC8, 12, 0x00, 0x32, 0x36, 0x45, 0x06, 0x16, 0x37, 0x75, 0x77, 0x54, 0x0C, 0x00,
02588             0xCC, 1, 0x00,      //Panel Control [00]
02589         };
02590         static const uint8_t ILI9481_CPT29_regValues[] PROGMEM = {    // 320x430
02591             0xB0, 1, 0x00,
02592             0xD0, 3, 0x07, 0x42, 0x1C,  // Set Power [00 43 18]
02593             0xD1, 3, 0x00, 0x02, 0x0F,  // Set VCOM  [00 00 00] x0.695, x1.00
02594             0xD2, 2, 0x01, 0x11,        // Set Power for Normal Mode [01 22]
02595             0xC0, 5, 0x10, 0x35, 0x00, 0x02, 0x11,      //Set Panel Driving [10 3B 00 02 11]
02596             0xC5, 1, 0x03,      //Frame Rate [03]
02597             0xC8, 12, 0x00, 0x30, 0x36, 0x45, 0x04, 0x16, 0x37, 0x75, 0x77, 0x54, 0x0F, 0x00,
02598             0xE4, 1, 0xA0,
02599             0xF0, 1, 0x01,
02600             0xF3, 2, 0x02, 0x1A,            
02601         };
02602         static const uint8_t ILI9481_PVI35_regValues[] PROGMEM = {    // 320x480
02603             0xB0, 1, 0x00,
02604             0xD0, 3, 0x07, 0x41, 0x1D,  // Set Power [00 43 18]
02605             0xD1, 3, 0x00, 0x2B, 0x1F,  // Set VCOM  [00 00 00] x0.900, x1.32
02606             0xD2, 2, 0x01, 0x11,        // Set Power for Normal Mode [01 22]
02607             0xC0, 5, 0x10, 0x3B, 0x00, 0x02, 0x11,      //Set Panel Driving [10 3B 00 02 11]
02608             0xC5, 1, 0x03,      //Frame Rate [03]
02609             0xC8, 12, 0x00, 0x14, 0x33, 0x10, 0x00, 0x16, 0x44, 0x36, 0x77, 0x00, 0x0F, 0x00,
02610             0xE4, 1, 0xA0,
02611             0xF0, 1, 0x01,
02612             0xF3, 2, 0x40, 0x0A,            
02613         };
02614         static const uint8_t ILI9481_AUO317_regValues[] PROGMEM = {    // 320x480
02615             0xB0, 1, 0x00,
02616             0xD0, 3, 0x07, 0x40, 0x1D,  // Set Power [00 43 18]
02617             0xD1, 3, 0x00, 0x18, 0x13,  // Set VCOM  [00 00 00] x0.805, x1.08
02618             0xD2, 2, 0x01, 0x11,        // Set Power for Normal Mode [01 22]
02619             0xC0, 5, 0x10, 0x3B, 0x00, 0x02, 0x11,      //Set Panel Driving [10 3B 00 02 11]
02620             0xC5, 1, 0x03,      //Frame Rate [03]
02621             0xC8, 12, 0x00, 0x44, 0x06, 0x44, 0x0A, 0x08, 0x17, 0x33, 0x77, 0x44, 0x08, 0x0C,
02622             0xE4, 1, 0xA0,
02623             0xF0, 1, 0x01,          
02624         };
02625         static const uint8_t ILI9481_CMO35_regValues[] PROGMEM = {    // 320480
02626             0xB0, 1, 0x00,
02627             0xD0, 3, 0x07, 0x41, 0x1D,  // Set Power [00 43 18] 07,41,1D
02628             0xD1, 3, 0x00, 0x1C, 0x1F,  // Set VCOM  [00 00 00] x0.825, x1.32 1C,1F
02629             0xD2, 2, 0x01, 0x11,        // Set Power for Normal Mode [01 22]
02630             0xC0, 5, 0x10, 0x3B, 0x00, 0x02, 0x11,      //Set Panel Driving [10 3B 00 02 11]
02631             0xC5, 1, 0x03,      //Frame Rate [03]
02632             0xC6, 1, 0x83, 
02633             0xC8, 12, 0x00, 0x26, 0x21, 0x00, 0x00, 0x1F, 0x65, 0x23, 0x77, 0x00, 0x0F, 0x00,
02634             0xF0, 1, 0x01,      //?
02635             0xE4, 1, 0xA0,      //?SETCABC on Himax
02636             0x36, 1, 0x48,      //Memory Access [00]
02637             0xB4, 1, 0x11,          
02638         };
02639         static const uint8_t ILI9481_RGB_regValues[] PROGMEM = {    // 320x480
02640             0xB0, 1, 0x00,
02641             0xD0, 3, 0x07, 0x41, 0x1D,  // SETPOWER [00 43 18]
02642             0xD1, 3, 0x00, 0x2B, 0x1F,  // SETVCOM  [00 00 00] x0.900, x1.32
02643             0xD2, 2, 0x01, 0x11,        // SETNORPOW for Normal Mode [01 22]
02644             0xC0, 6, 0x10, 0x3B, 0x00, 0x02, 0x11, 0x00,     //SETPANEL [10 3B 00 02 11]
02645             0xC5, 1, 0x03,      //SETOSC Frame Rate [03]
02646             0xC6, 1, 0x80,      //SETRGB interface control
02647             0xC8, 12, 0x00, 0x14, 0x33, 0x10, 0x00, 0x16, 0x44, 0x36, 0x77, 0x00, 0x0F, 0x00,
02648             0xF3, 2, 0x40, 0x0A,            
02649             0xF0, 1, 0x08,
02650             0xF6, 1, 0x84,
02651             0xF7, 1, 0x80,
02652             0x0C, 2, 0x00, 0x55, //RDCOLMOD
02653             0xB4, 1, 0x00,      //SETDISPLAY
02654 //          0xB3, 4, 0x00, 0x01, 0x06, 0x01,  //SETGRAM simple example
02655             0xB3, 4, 0x00, 0x01, 0x06, 0x30,  //jpegs example
02656         };
02657         table8_ads = ILI9481_regValues, table_size = sizeof(ILI9481_regValues);
02658 //        table8_ads = ILI9481_CPT29_regValues, table_size = sizeof(ILI9481_CPT29_regValues);
02659 //        table8_ads = ILI9481_PVI35_regValues, table_size = sizeof(ILI9481_PVI35_regValues);
02660 //        table8_ads = ILI9481_AUO317_regValues, table_size = sizeof(ILI9481_AUO317_regValues);
02661 //        table8_ads = ILI9481_CMO35_regValues, table_size = sizeof(ILI9481_CMO35_regValues);
02662 //        table8_ads = ILI9481_RGB_regValues, table_size = sizeof(ILI9481_RGB_regValues);
02663         p16 = (int16_t *) & HEIGHT;
02664         *p16 = 480;
02665         p16 = (int16_t *) & WIDTH;
02666         *p16 = 320;
02667         break;
02668     case 0x9486:
02669         _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS; //Red 3.5", Blue 3.5"
02670 //        _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | REV_SCREEN; //old Red 3.5"
02671         static const uint8_t ILI9486_regValues[] PROGMEM = {
02672 /*
02673             0xF2, 9, 0x1C, 0xA3, 0x32, 0x02, 0xB2, 0x12, 0xFF, 0x12, 0x00,        //f.k
02674             0xF1, 2, 0x36, 0xA4,        //
02675             0xF8, 2, 0x21, 0x04,        //
02676             0xF9, 2, 0x00, 0x08,        //
02677 */
02678             0xC0, 2, 0x0d, 0x0d,        //Power Control 1 [0E 0E]
02679             0xC1, 2, 0x43, 0x00,        //Power Control 2 [43 00]
02680             0xC2, 1, 0x00,      //Power Control 3 [33]
02681             0xC5, 4, 0x00, 0x48, 0x00, 0x48,    //VCOM  Control 1 [00 40 00 40]
02682             0xB4, 1, 0x00,      //Inversion Control [00]
02683             0xB6, 3, 0x02, 0x02, 0x3B,  // Display Function Control [02 02 3B]
02684 #define GAMMA9486 4
02685 #if GAMMA9486 == 0
02686             // default GAMMA terrible
02687 #elif GAMMA9486 == 1
02688             // GAMMA f.k.   bad     
02689             0xE0, 15, 0x0f, 0x31, 0x2b, 0x0c, 0x0e, 0x08, 0x4e, 0xf1, 0x37, 0x07, 0x10, 0x03, 0x0e, 0x09, 0x00,
02690             0xE1, 15, 0x00, 0x0e, 0x14, 0x03, 0x11, 0x07, 0x31, 0xC1, 0x48, 0x08, 0x0f, 0x0c, 0x31, 0x36, 0x0f,
02691 #elif GAMMA9486 == 2
02692             // 1.2 CPT 3.5 Inch Initial Code not bad
02693             0xE0, 15, 0x0F, 0x1B, 0x18, 0x0B, 0x0E, 0x09, 0x47, 0x94, 0x35, 0x0A, 0x13, 0x05, 0x08, 0x03, 0x00, 
02694             0xE1, 15, 0x0F, 0x3A, 0x37, 0x0B, 0x0C, 0x05, 0x4A, 0x24, 0x39, 0x07, 0x10, 0x04, 0x27, 0x25, 0x00, 
02695 #elif GAMMA9486 == 3
02696             // 2.2 HSD 3.5 Inch Initial Code not bad
02697             0xE0, 15, 0x0F, 0x1F, 0x1C, 0x0C, 0x0F, 0x08, 0x48, 0x98, 0x37, 0x0A, 0x13, 0x04, 0x11, 0x0D, 0x00, 
02698             0xE1, 15, 0x0F, 0x32, 0x2E, 0x0B, 0x0D, 0x05, 0x47, 0x75, 0x37, 0x06, 0x10, 0x03, 0x24, 0x20, 0x00, 
02699 #elif GAMMA9486 == 4
02700             // 3.2 TM  3.2 Inch Initial Code not bad
02701             0xE0, 15, 0x0F, 0x21, 0x1C, 0x0B, 0x0E, 0x08, 0x49, 0x98, 0x38, 0x09, 0x11, 0x03, 0x14, 0x10, 0x00, 
02702             0xE1, 15, 0x0F, 0x2F, 0x2B, 0x0C, 0x0E, 0x06, 0x47, 0x76, 0x37, 0x07, 0x11, 0x04, 0x23, 0x1E, 0x00, 
02703 #elif GAMMA9486 == 5
02704             // 4.2 WTK 3.5 Inch Initial Code too white
02705             0xE0, 15, 0x0F, 0x10, 0x08, 0x05, 0x09, 0x05, 0x37, 0x98, 0x26, 0x07, 0x0F, 0x02, 0x09, 0x07, 0x00, 
02706             0xE1, 15, 0x0F, 0x38, 0x36, 0x0D, 0x10, 0x08, 0x59, 0x76, 0x48, 0x0A, 0x16, 0x0A, 0x37, 0x2F, 0x00, 
02707 #endif
02708         };
02709         table8_ads = ILI9486_regValues, table_size = sizeof(ILI9486_regValues);
02710         p16 = (int16_t *) & HEIGHT;
02711         *p16 = 480;
02712         p16 = (int16_t *) & WIDTH;
02713         *p16 = 320;
02714         break;
02715     case 0x7796:
02716         _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS;   //thanks to safari1
02717         goto common_9488;
02718     case 0x9487:                //with thanks to Charlyf
02719     case 0x9488:
02720         _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_24BITS;
02721       common_9488:
02722         static const uint8_t ILI9488_regValues_max[] PROGMEM = {        // Atmel MaxTouch
02723             0xC0, 2, 0x10, 0x10,        //Power Control 1 [0E 0E]
02724             0xC1, 1, 0x41,      //Power Control 2 [43]
02725             0xC5, 4, 0x00, 0x22, 0x80, 0x40,    //VCOM  Control 1 [00 40 00 40]
02726             0x36, 1, 0x68,      //Memory Access [00]
02727             0xB0, 1, 0x00,      //Interface     [00]
02728             0xB1, 2, 0xB0, 0x11,        //Frame Rate Control [B0 11]
02729             0xB4, 1, 0x02,      //Inversion Control [02]
02730             0xB6, 3, 0x02, 0x02, 0x3B,  // Display Function Control [02 02 3B] .kbv NL=480
02731             0xB7, 1, 0xC6,      //Entry Mode      [06]
02732             0x3A, 1, 0x55,      //Interlace Pixel Format [XX]
02733             0xF7, 4, 0xA9, 0x51, 0x2C, 0x82,    //Adjustment Control 3 [A9 51 2C 82]
02734         };
02735         table8_ads = ILI9488_regValues_max, table_size = sizeof(ILI9488_regValues_max);
02736         p16 = (int16_t *) & HEIGHT;
02737         *p16 = 480;
02738         p16 = (int16_t *) & WIDTH;
02739         *p16 = 320;
02740         break;
02741     case 0xB505:                //R61505V
02742     case 0xC505:                //R61505W
02743         _lcd_capable = 0 | REV_SCREEN | READ_LOWHIGH;
02744         static const uint16_t R61505V_regValues[] PROGMEM = {
02745             0x0000, 0x0000,
02746             0x0000, 0x0000,
02747             0x0000, 0x0000,
02748             0x0000, 0x0001,
02749             0x00A4, 0x0001,     //CALB=1
02750             TFTLCD_DELAY, 10,
02751             0x0060, 0x2700,     //NL
02752             0x0008, 0x0808,     //FP & BP
02753             0x0030, 0x0214,     //Gamma settings
02754             0x0031, 0x3715,
02755             0x0032, 0x0604,
02756             0x0033, 0x0E16,
02757             0x0034, 0x2211,
02758             0x0035, 0x1500,
02759             0x0036, 0x8507,
02760             0x0037, 0x1407,
02761             0x0038, 0x1403,
02762             0x0039, 0x0020,
02763             0x0090, 0x0015,     //DIVI & RTNI
02764             0x0010, 0x0410,     //BT=4,AP=1
02765             0x0011, 0x0237,     //DC1=2,DC0=3, VC=7
02766             0x0029, 0x0046,     //VCM1=70
02767             0x002A, 0x0046,     //VCMSEL=0,VCM2=70
02768             // Sleep mode IN sequence
02769             0x0007, 0x0000,
02770             //0x0012, 0x0000,   //PSON=0,PON=0
02771             // Sleep mode EXIT sequence 
02772             0x0012, 0x0189,     //VCMR=1,PSON=0,PON=0,VRH=9
02773             0x0013, 0x1100,     //VDV=17
02774             TFTLCD_DELAY, 150,
02775             0x0012, 0x01B9,     //VCMR=1,PSON=1,PON=1,VRH=9 [018F]
02776             0x0001, 0x0100,     //SS=1 Other mode settings
02777             0x0002, 0x0200,     //BC0=1--Line inversion
02778             0x0003, 0x1030,
02779             0x0009, 0x0001,     //ISC=1 [0000]
02780             0x000A, 0x0000,     // [0000]
02781             //            0x000C, 0x0001,   //RIM=1 [0000]
02782             0x000D, 0x0000,     // [0000]
02783             0x000E, 0x0030,     //VEM=3 VCOM equalize [0000]
02784             0x0061, 0x0001,
02785             0x006A, 0x0000,
02786             0x0080, 0x0000,
02787             0x0081, 0x0000,
02788             0x0082, 0x005F,
02789             0x0092, 0x0100,
02790             0x0093, 0x0701,
02791             TFTLCD_DELAY, 80,
02792             0x0007, 0x0100,     //BASEE=1--Display On
02793         };
02794         init_table16(R61505V_regValues, sizeof(R61505V_regValues));
02795         break;
02796  
02797 #if defined(SUPPORT_B509_7793)
02798     case 0x7793:
02799     case 0xB509:
02800         _lcd_capable = REV_SCREEN;
02801         static const uint16_t R61509V_regValues[] PROGMEM = {
02802             0x0000, 0x0000,
02803             0x0000, 0x0000,
02804             0x0000, 0x0000,
02805             0x0000, 0x0000,
02806             TFTLCD_DELAY, 15,
02807             0x0400, 0x6200,     //NL=0x31 (49) i.e. 400 rows
02808             0x0008, 0x0808,
02809             //gamma
02810             0x0300, 0x0C00,
02811             0x0301, 0x5A0B,
02812             0x0302, 0x0906,
02813             0x0303, 0x1017,
02814             0x0304, 0x2300,
02815             0x0305, 0x1700,
02816             0x0306, 0x6309,
02817             0x0307, 0x0C09,
02818             0x0308, 0x100C,
02819             0x0309, 0x2232,
02820  
02821             0x0010, 0x0016,     //69.5Hz         0016
02822             0x0011, 0x0101,
02823             0x0012, 0x0000,
02824             0x0013, 0x0001,
02825  
02826             0x0100, 0x0330,     //BT,AP
02827             0x0101, 0x0237,     //DC0,DC1,VC
02828             0x0103, 0x0D00,     //VDV
02829             0x0280, 0x6100,     //VCM
02830             0x0102, 0xC1B0,     //VRH,VCMR,PSON,PON
02831             TFTLCD_DELAY, 50,
02832  
02833             0x0001, 0x0100,
02834             0x0002, 0x0100,
02835             0x0003, 0x1030,     //1030
02836             0x0009, 0x0001,
02837             0x000C, 0x0000,
02838             0x0090, 0x8000,
02839             0x000F, 0x0000,
02840  
02841             0x0210, 0x0000,
02842             0x0211, 0x00EF,
02843             0x0212, 0x0000,
02844             0x0213, 0x018F,     //432=01AF,400=018F
02845             0x0500, 0x0000,
02846             0x0501, 0x0000,
02847             0x0502, 0x005F,     //???
02848             0x0401, 0x0001,     //REV=1
02849             0x0404, 0x0000,
02850             TFTLCD_DELAY, 50,
02851  
02852             0x0007, 0x0100,     //BASEE
02853             TFTLCD_DELAY, 50,
02854  
02855             0x0200, 0x0000,
02856             0x0201, 0x0000,
02857         };
02858         init_table16(R61509V_regValues, sizeof(R61509V_regValues));
02859         p16 = (int16_t *) & HEIGHT;
02860         *p16 = 400;
02861         break;
02862 #endif
02863  
02864 #ifdef SUPPORT_9806
02865     case 0x9806:
02866         _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_24BITS;
02867         // from ZinggJM
02868         static const uint8_t ILI9806_regValues[] PROGMEM = {
02869             (0xFF), 3, /* EXTC Command Set enable register*/ 0xFF, 0x98, 0x06,
02870             (0xBA), 1, /* SPI Interface Setting*/0xE0,
02871             (0xBC), 21, /* GIP 1*/0x03, 0x0F, 0x63, 0x69, 0x01, 0x01, 0x1B, 0x11, 0x70, 0x73, 0xFF, 0xFF, 0x08, 0x09, 0x05, 0x00, 0xEE, 0xE2, 0x01, 0x00, 0xC1,
02872             (0xBD), 8, /* GIP 2*/0x01, 0x23, 0x45, 0x67, 0x01, 0x23, 0x45, 0x67,
02873             (0xBE), 9, /* GIP 3*/0x00, 0x22, 0x27, 0x6A, 0xBC, 0xD8, 0x92, 0x22, 0x22,
02874             (0xC7), 1, /* Vcom*/0x1E,
02875             (0xED), 3, /* EN_volt_reg*/0x7F, 0x0F, 0x00,
02876             (0xC0), 3, /* Power Control 1*/0xE3, 0x0B, 0x00,
02877             (0xFC), 1, 0x08,
02878             (0xDF), 6, /* Engineering Setting*/0x00, 0x00, 0x00, 0x00, 0x00, 0x02,
02879             (0xF3), 1, /* DVDD Voltage Setting*/0x74,
02880             (0xB4), 3, /* Display Inversion Control*/0x00, 0x00, 0x00,
02881             (0xF7), 1, /* 480x854*/0x81,
02882             (0xB1), 3, /* Frame Rate*/0x00, 0x10, 0x14,
02883             (0xF1), 3, /* Panel Timing Control*/0x29, 0x8A, 0x07,
02884             (0xF2), 4, /*Panel Timing Control*/0x40, 0xD2, 0x50, 0x28,
02885             (0xC1), 4, /* Power Control 2*/0x17, 0x85, 0x85, 0x20,
02886             (0xE0), 16, 0x00, 0x0C, 0x15, 0x0D, 0x0F, 0x0C, 0x07, 0x05, 0x07, 0x0B, 0x10, 0x10, 0x0D, 0x17, 0x0F, 0x00,
02887             (0xE1), 16, 0x00, 0x0D, 0x15, 0x0E, 0x10, 0x0D, 0x08, 0x06, 0x07, 0x0C, 0x11, 0x11, 0x0E, 0x17, 0x0F, 0x00,
02888             (0x35), 1, /*Tearing Effect ON*/0x00,
02889         };
02890         table8_ads = ILI9806_regValues, table_size = sizeof(ILI9806_regValues);
02891         p16 = (int16_t *) & HEIGHT;
02892         *p16 = 480;
02893         p16 = (int16_t *) & WIDTH;
02894         *p16 = 854;
02895         break;
02896 #endif
02897     default:
02898         p16 = (int16_t *) & WIDTH;
02899         *p16 = 0;       //error value for WIDTH
02900         break;
02901     }
02902     _lcd_rev = ((_lcd_capable & REV_SCREEN) != 0);
02903     if (table8_ads != NULL) {
02904         static const uint8_t reset_off[] PROGMEM = {
02905             0x01, 0,            //Soft Reset
02906             TFTLCD_DELAY8, 150,  // .kbv will power up with ONLY reset, sleep out, display on
02907             0x28, 0,            //Display Off
02908             0x3A, 1, 0x55,      //Pixel read=565, write=565.
02909         };
02910         static const uint8_t wake_on[] PROGMEM = {
02911             0x11, 0,            //Sleep Out
02912             TFTLCD_DELAY8, 150,
02913             0x29, 0,            //Display On
02914         };
02915         init_table(&reset_off, sizeof(reset_off));
02916         init_table(table8_ads, table_size);   //can change PIXFMT
02917         init_table(&wake_on, sizeof(wake_on));
02918     }
02919     setRotation(0);             //PORTRAIT
02920     invertDisplay(false);
02921 #if defined(SUPPORT_9488_555)
02922     if (_lcd_ID == 0x9488) {
02923         is555 = 0;
02924         drawPixel(0, 0, 0xFFE0);
02925         if (readPixel(0, 0) == 0xFF1F) {
02926             uint8_t pixfmt = 0x06;
02927             pushCommand(0x3A, &pixfmt, 1);
02928             _lcd_capable &= ~READ_24BITS;
02929             is555 = 1;
02930         }
02931     }
02932 #endif
02933 }