GOPA KUMAR K C / Mbed 2 deprecated BAE_RTOS_test_1

4-10-2015 BAE_RTOS_TEST ACS_DATA_ACQ and I2C working

Dependencies:   mbed-rtos mbed

Fork of BAE_RTOS_TEST1 by GOPA KUMAR K C

beacon.cpp@1:b8c71afbe6e5, 2015-10-04 (annotated)

Committer:
gkumar
Date:
Sun Oct 04 07:06:22 2015 +0000
Revision:
1:b8c71afbe6e5
4-10-2015 BAE_RTOS_TEST1

Who changed what in which revision?

UserRevisionLine numberNew contents of line
gkumar 1:b8c71afbe6e5 1 //switch off the sync!!!!!!!
gkumar 1:b8c71afbe6e5 2 //switch off the preamble!!!!!!!
gkumar 1:b8c71afbe6e5 3 /*for crc in tx:
gkumar 1:b8c71afbe6e5 4 regIrq2(0x28) :
gkumar 1:b8c71afbe6e5 5
gkumar 1:b8c71afbe6e5 6 regpacketconfig 1(0x37) :
gkumar 1:b8c71afbe6e5 7 set crc detection/calc. on : | 0x10
gkumar 1:b8c71afbe6e5 8 crcautoclearoff : | 0x08
gkumar 1:b8c71afbe6e5 9
gkumar 1:b8c71afbe6e5 10 for data whitening : regpacketconfig 1(0x37) :| 0x40
gkumar 1:b8c71afbe6e5 11 for
gkumar 1:b8c71afbe6e5 12
gkumar 1:b8c71afbe6e5 13
gkumar 1:b8c71afbe6e5 14
gkumar 1:b8c71afbe6e5 15 */
gkumar 1:b8c71afbe6e5 16 // 6CC000 for 435 MHz
gkumar 1:b8c71afbe6e5 17 //set all values as FF for checking on spectrum analyzer
gkumar 1:b8c71afbe6e5 18 #include "beacon.h"
gkumar 1:b8c71afbe6e5 19 #include "HK.h"
gkumar 1:b8c71afbe6e5 20 #include "pin_config.h"
gkumar 1:b8c71afbe6e5 21 Serial chavan(USBTX, USBRX); // tx, rx
gkumar 1:b8c71afbe6e5 22 //SPI spi(PIN2,PIN1,PIN3); // mosi, miso, sclk
gkumar 1:b8c71afbe6e5 23 DigitalOut cs(PIN14); //slave select or chip select
gkumar 1:b8c71afbe6e5 24 //SPI spi(PTD6,PTD7,PTD5); // mosi, miso, sclk
gkumar 1:b8c71afbe6e5 25 SPI spi(PIN16,PIN17,PIN15);
gkumar 1:b8c71afbe6e5 26 //DigitalOut cs_bar(PTC11); //slave select or chip select
gkumar 1:b8c71afbe6e5 27 //InterruptIn button(p9);
gkumar 1:b8c71afbe6e5 28 //#define TIMES 16
gkumar 1:b8c71afbe6e5 29 //Timer t;
gkumar 1:b8c71afbe6e5 30
gkumar 1:b8c71afbe6e5 31 /*void interrupt_func()
gkumar 1:b8c71afbe6e5 32 {
gkumar 1:b8c71afbe6e5 33 chavan.printf("INTERRUPT_FUNC TRIGGERED\n wait for 3 secs\n");
gkumar 1:b8c71afbe6e5 34 wait(3);
gkumar 1:b8c71afbe6e5 35
gkumar 1:b8c71afbe6e5 36 }*/
gkumar 1:b8c71afbe6e5 37
gkumar 1:b8c71afbe6e5 38
gkumar 1:b8c71afbe6e5 39
gkumar 1:b8c71afbe6e5 40 extern ShortBeacy Shortbeacon;
gkumar 1:b8c71afbe6e5 41
gkumar 1:b8c71afbe6e5 42 void writereg(uint8_t reg,uint8_t val)
gkumar 1:b8c71afbe6e5 43 {
gkumar 1:b8c71afbe6e5 44 cs = 0;__disable_irq();spi.write(reg | 0x80);spi.write(val);__enable_irq();cs = 1;
gkumar 1:b8c71afbe6e5 45 }
gkumar 1:b8c71afbe6e5 46 uint8_t readreg(uint8_t reg)
gkumar 1:b8c71afbe6e5 47 {
gkumar 1:b8c71afbe6e5 48 int val;cs = 0;__disable_irq();spi.write(reg & ~0x80);val = spi.write(0);__enable_irq();cs = 1;return val;
gkumar 1:b8c71afbe6e5 49 }
gkumar 1:b8c71afbe6e5 50 void clearTxBuf()
gkumar 1:b8c71afbe6e5 51 {
gkumar 1:b8c71afbe6e5 52 writereg(RF22_REG_08_OPERATING_MODE2,0x01);
gkumar 1:b8c71afbe6e5 53 writereg(RF22_REG_08_OPERATING_MODE2,0x00);
gkumar 1:b8c71afbe6e5 54 }
gkumar 1:b8c71afbe6e5 55 void clearRxBuf()
gkumar 1:b8c71afbe6e5 56 {
gkumar 1:b8c71afbe6e5 57 writereg(RF22_REG_08_OPERATING_MODE2,0x02);
gkumar 1:b8c71afbe6e5 58 writereg(RF22_REG_08_OPERATING_MODE2,0x00);
gkumar 1:b8c71afbe6e5 59 }
gkumar 1:b8c71afbe6e5 60 int setFrequency(float centre,float afcPullInRange)
gkumar 1:b8c71afbe6e5 61 {
gkumar 1:b8c71afbe6e5 62 //freq setting begins
gkumar 1:b8c71afbe6e5 63 uint8_t fbsel = 0x40;
gkumar 1:b8c71afbe6e5 64 uint8_t afclimiter;
gkumar 1:b8c71afbe6e5 65 if (centre >= 480.0) {
gkumar 1:b8c71afbe6e5 66 centre /= 2;
gkumar 1:b8c71afbe6e5 67 fbsel |= 0x20;
gkumar 1:b8c71afbe6e5 68 afclimiter = afcPullInRange * 1000000.0 / 1250.0;
gkumar 1:b8c71afbe6e5 69 } else {
gkumar 1:b8c71afbe6e5 70 if (afcPullInRange < 0.0 || afcPullInRange > 0.159375)
gkumar 1:b8c71afbe6e5 71 return false;
gkumar 1:b8c71afbe6e5 72 afclimiter = afcPullInRange * 1000000.0 / 625.0;
gkumar 1:b8c71afbe6e5 73 }
gkumar 1:b8c71afbe6e5 74 centre /= 10.0;
gkumar 1:b8c71afbe6e5 75 float integerPart = floor(centre);
gkumar 1:b8c71afbe6e5 76 float fractionalPart = centre - integerPart;
gkumar 1:b8c71afbe6e5 77
gkumar 1:b8c71afbe6e5 78 uint8_t fb = (uint8_t)integerPart - 24; // Range 0 to 23
gkumar 1:b8c71afbe6e5 79 fbsel |= fb;
gkumar 1:b8c71afbe6e5 80 uint16_t fc = fractionalPart * 64000;
gkumar 1:b8c71afbe6e5 81 writereg(RF22_REG_73_FREQUENCY_OFFSET1, 0); // REVISIT
gkumar 1:b8c71afbe6e5 82 writereg(RF22_REG_74_FREQUENCY_OFFSET2, 0);
gkumar 1:b8c71afbe6e5 83 writereg(RF22_REG_75_FREQUENCY_BAND_SELECT, fbsel);
gkumar 1:b8c71afbe6e5 84 writereg(RF22_REG_76_NOMINAL_CARRIER_FREQUENCY1, fc >> 8);
gkumar 1:b8c71afbe6e5 85 writereg(RF22_REG_77_NOMINAL_CARRIER_FREQUENCY0, fc & 0xff);
gkumar 1:b8c71afbe6e5 86 writereg(RF22_REG_2A_AFC_LIMITER, afclimiter);
gkumar 1:b8c71afbe6e5 87 return 0;
gkumar 1:b8c71afbe6e5 88 }
gkumar 1:b8c71afbe6e5 89
gkumar 1:b8c71afbe6e5 90
gkumar 1:b8c71afbe6e5 91
gkumar 1:b8c71afbe6e5 92 void FCTN_BEA_INIT()
gkumar 1:b8c71afbe6e5 93 {
gkumar 1:b8c71afbe6e5 94 //reset()
gkumar 1:b8c71afbe6e5 95 writereg(RF22_REG_07_OPERATING_MODE1,0x80); //sw_reset
gkumar 1:b8c71afbe6e5 96 wait(1); //takes time to reset
gkumar 1:b8c71afbe6e5 97
gkumar 1:b8c71afbe6e5 98 clearTxBuf();
gkumar 1:b8c71afbe6e5 99 clearRxBuf();
gkumar 1:b8c71afbe6e5 100 //txfifoalmostempty
gkumar 1:b8c71afbe6e5 101 writereg(RF22_REG_7D_TX_FIFO_CONTROL2,5);
gkumar 1:b8c71afbe6e5 102 //rxfifoalmostfull
gkumar 1:b8c71afbe6e5 103 writereg(RF22_REG_7E_RX_FIFO_CONTROL,20);
gkumar 1:b8c71afbe6e5 104 //Packet-engine registers
gkumar 1:b8c71afbe6e5 105 writereg(RF22_REG_30_DATA_ACCESS_CONTROL,0x8E); //RF22_REG_30_DATA_ACCESS_CONTROL, RF22_ENPACRX | RF22_ENPACTX | RF22_ENCRC | RF22_CRC_CRC_16_IBM
gkumar 1:b8c71afbe6e5 106 //&0x77 = diasable packet rx-tx handling
gkumar 1:b8c71afbe6e5 107 writereg(RF22_REG_32_HEADER_CONTROL1,0x88); //RF22_REG_32_HEADER_CONTROL1, RF22_BCEN_HEADER3 | RF22_HDCH_HEADER3
gkumar 1:b8c71afbe6e5 108 writereg(RF22_REG_33_HEADER_CONTROL2,0x42); //RF22_REG_33_HEADER_CONTROL2, RF22_HDLEN_4 | RF22_SYNCLEN_2
gkumar 1:b8c71afbe6e5 109 writereg(RF22_REG_34_PREAMBLE_LENGTH,8); //RF22_REG_34_PREAMBLE_LENGTH, nibbles); preamble length = 8;
gkumar 1:b8c71afbe6e5 110 writereg(RF22_REG_36_SYNC_WORD3,0x2D); //syncword3=2D
gkumar 1:b8c71afbe6e5 111 writereg(RF22_REG_37_SYNC_WORD2,0xD4); //syncword2=D4
gkumar 1:b8c71afbe6e5 112 writereg(RF22_REG_3F_CHECK_HEADER3,0); //RF22_REG_3F_CHECK_HEADER3, RF22_DEFAULT_NODE_ADDRESS
gkumar 1:b8c71afbe6e5 113 writereg(RF22_REG_3A_TRANSMIT_HEADER3,0xab); //header_to
gkumar 1:b8c71afbe6e5 114 writereg(RF22_REG_3B_TRANSMIT_HEADER2,0xbc); //header_from
gkumar 1:b8c71afbe6e5 115 writereg(RF22_REG_3C_TRANSMIT_HEADER1,0xcd); //header_ids
gkumar 1:b8c71afbe6e5 116 writereg(RF22_REG_3D_TRANSMIT_HEADER0,0xde); //header_flags
gkumar 1:b8c71afbe6e5 117 writereg(RF22_REG_3F_CHECK_HEADER3,0xab);
gkumar 1:b8c71afbe6e5 118 writereg(RF22_REG_40_CHECK_HEADER2,0xbc);
gkumar 1:b8c71afbe6e5 119 writereg(RF22_REG_41_CHECK_HEADER1,0xcd);
gkumar 1:b8c71afbe6e5 120 writereg(RF22_REG_42_CHECK_HEADER0,0xde);
gkumar 1:b8c71afbe6e5 121
gkumar 1:b8c71afbe6e5 122 //RSSI threshold for clear channel indicator
gkumar 1:b8c71afbe6e5 123 writereg(RF22_REG_27_RSSI_THRESHOLD,0xA5); //55 for -80dBm, 2D for -100dBm, 7D for -60dBm, A5 for -40dBm, CD for -20 dBm
gkumar 1:b8c71afbe6e5 124
gkumar 1:b8c71afbe6e5 125 writereg(RF22_REG_0B_GPIO_CONFIGURATION0,0x15); // TX state ??
gkumar 1:b8c71afbe6e5 126 writereg(RF22_REG_0C_GPIO_CONFIGURATION1,0x12); // RX state ??
gkumar 1:b8c71afbe6e5 127
gkumar 1:b8c71afbe6e5 128 //interrupts
gkumar 1:b8c71afbe6e5 129 // spiWrite(RF22_REG_05_INTERRUPT_ENABLE1, RF22_ENTXFFAEM |RF22_ENRXFFAFULL | RF22_ENPKSENT |RF22_ENPKVALID| RF22_ENCRCERROR);
gkumar 1:b8c71afbe6e5 130 // spiWrite(RF22_REG_06_INTERRUPT_ENABLE2, RF22_ENPREAVAL);
gkumar 1:b8c71afbe6e5 131
gkumar 1:b8c71afbe6e5 132 setFrequency(435.0, 0.05);
gkumar 1:b8c71afbe6e5 133
gkumar 1:b8c71afbe6e5 134 //return !(statusRead() & RF22_FREQERR);
gkumar 1:b8c71afbe6e5 135 if((readreg(RF22_REG_02_DEVICE_STATUS)& 0x08)!= 0x00)
gkumar 1:b8c71afbe6e5 136 printf("frequency not set properly\n");
gkumar 1:b8c71afbe6e5 137 //frequency set
gkumar 1:b8c71afbe6e5 138
gkumar 1:b8c71afbe6e5 139 //setModemConfig(FSK_Rb2_4Fd36); FSK_Rb2_4Fd36, ///< FSK, No Manchester, Rb = 2.4kbs, Fd = 36kHz
gkumar 1:b8c71afbe6e5 140 //setmodemregisters
gkumar 1:b8c71afbe6e5 141 //0x1b, 0x03, 0x41, 0x60, 0x27, 0x52, 0x00, 0x07, 0x40, 0x0a, 0x1e, 0x80, 0x60, 0x13, 0xa9, 0x2c, 0x22, 0x3a = FSK_RB2_4FD36
gkumar 1:b8c71afbe6e5 142 //0xc8, 0x03, 0x39, 0x20, 0x68, 0xdc, 0x00, 0x6b, 0x2a, 0x08, 0x2a, 0x80, 0x60, 0x13, 0xa9, 0x2c, 0x21, 0x08 = OOK,2.4, 335
gkumar 1:b8c71afbe6e5 143 writereg(RF22_REG_1C_IF_FILTER_BANDWIDTH,0x2B);
gkumar 1:b8c71afbe6e5 144 writereg(RF22_REG_1F_CLOCK_RECOVERY_GEARSHIFT_OVERRIDE,0x03);
gkumar 1:b8c71afbe6e5 145 writereg(RF22_REG_20_CLOCK_RECOVERY_OVERSAMPLING_RATE,0x41);
gkumar 1:b8c71afbe6e5 146 writereg(RF22_REG_21_CLOCK_RECOVERY_OFFSET2,0x60);
gkumar 1:b8c71afbe6e5 147 writereg(RF22_REG_22_CLOCK_RECOVERY_OFFSET1,0x27); //updated 20 to 25 reg values from excel sheet for 1.2 Khz freq. deviation,fsk
gkumar 1:b8c71afbe6e5 148 writereg(RF22_REG_23_CLOCK_RECOVERY_OFFSET0,0x52);
gkumar 1:b8c71afbe6e5 149 writereg(RF22_REG_24_CLOCK_RECOVERY_TIMING_LOOP_GAIN1,0x00);
gkumar 1:b8c71afbe6e5 150 writereg(RF22_REG_25_CLOCK_RECOVERY_TIMING_LOOP_GAIN0,0x51);
gkumar 1:b8c71afbe6e5 151 /*writereg(RF22_REG_2C_OOK_COUNTER_VALUE_1,0x2a);
gkumar 1:b8c71afbe6e5 152 writereg(RF22_REG_2D_OOK_COUNTER_VALUE_2,0x08);*/ //not required for fsk (OOK counter value)
gkumar 1:b8c71afbe6e5 153 writereg(RF22_REG_2E_SLICER_PEAK_HOLD,0x1e); //??
gkumar 1:b8c71afbe6e5 154 writereg(RF22_REG_58,0x80);
gkumar 1:b8c71afbe6e5 155 writereg(RF22_REG_69_AGC_OVERRIDE1,0x60);
gkumar 1:b8c71afbe6e5 156 writereg(RF22_REG_6E_TX_DATA_RATE1,0x09);
gkumar 1:b8c71afbe6e5 157 writereg(RF22_REG_6F_TX_DATA_RATE0,0xd5);
gkumar 1:b8c71afbe6e5 158 writereg(RF22_REG_70_MODULATION_CONTROL1,0x2c);
gkumar 1:b8c71afbe6e5 159 writereg(RF22_REG_71_MODULATION_CONTROL2,0x22);//ook = 0x21 //fsk = 0x22
gkumar 1:b8c71afbe6e5 160 writereg(RF22_REG_72_FREQUENCY_DEVIATION,0x02);
gkumar 1:b8c71afbe6e5 161 //set tx power
gkumar 1:b8c71afbe6e5 162 writereg(RF22_REG_6D_TX_POWER,0x07); //20dbm
gkumar 1:b8c71afbe6e5 163 writereg(RF22_REG_3E_PACKET_LENGTH,TX_DATA); //packet length
gkumar 1:b8c71afbe6e5 164 }
gkumar 1:b8c71afbe6e5 165
gkumar 1:b8c71afbe6e5 166 void FCTN_BEA_MAIN()
gkumar 1:b8c71afbe6e5 167 {
gkumar 1:b8c71afbe6e5 168 FCTN_BEA_INIT();
gkumar 1:b8c71afbe6e5 169 printf("\n\rBeacon function entered\n\r");
gkumar 1:b8c71afbe6e5 170 wait(1); // wait for POR to complete //change the timing later
gkumar 1:b8c71afbe6e5 171 cs=1; // chip must be deselected
gkumar 1:b8c71afbe6e5 172 wait(1); //change the time later
gkumar 1:b8c71afbe6e5 173 spi.format(8,0);
gkumar 1:b8c71afbe6e5 174 spi.frequency(10000000); //10MHz SCLK
gkumar 1:b8c71afbe6e5 175 if (readreg(RF22_REG_00_DEVICE_TYPE) == 0x08) printf("spi connection valid\n\r");
gkumar 1:b8c71afbe6e5 176 else printf("error in spi connection\n\r");
gkumar 1:b8c71afbe6e5 177
gkumar 1:b8c71afbe6e5 178
gkumar 1:b8c71afbe6e5 179
gkumar 1:b8c71afbe6e5 180 //********
gkumar 1:b8c71afbe6e5 181 //button.rise(&interrupt_func); //interrupt enabled ( rising edge of pin 9)
gkumar 1:b8c71afbe6e5 182 wait(0.02); // pl. update this value or even avoid it!!!
gkumar 1:b8c71afbe6e5 183 //extract values from short_beacon[]
gkumar 1:b8c71afbe6e5 184 uint8_t byte_counter = 0;
gkumar 1:b8c71afbe6e5 185 /*struct Short_beacon{
gkumar 1:b8c71afbe6e5 186 uint8_t Voltage[1];
gkumar 1:b8c71afbe6e5 187 uint8_t AngularSpeed[2];
gkumar 1:b8c71afbe6e5 188 uint8_t SubsystemStatus[1];
gkumar 1:b8c71afbe6e5 189 uint8_t Temp[3];
gkumar 1:b8c71afbe6e5 190 uint8_t ErrorFlag[1];
gkumar 1:b8c71afbe6e5 191 }Shortbeacon = { {0x88}, {0x99, 0xAA} , {0xAA},{0xAA,0xDD,0xEE}, {0x00} };
gkumar 1:b8c71afbe6e5 192 */
gkumar 1:b8c71afbe6e5 193 //filling hk data
gkumar 1:b8c71afbe6e5 194 uint8_t short_beacon[] = { 0xAB, 0x8A, 0xE2, 0xBB, 0xB8, 0xA2, 0x8E,Shortbeacon.Voltage[0],Shortbeacon.AngularSpeed[0], Shortbeacon.AngularSpeed[1],Shortbeacon.SubsystemStatus[0],Shortbeacon.Temp[0],Shortbeacon.Temp[1],Shortbeacon.Temp[2],Shortbeacon.ErrorFlag[0]};
gkumar 1:b8c71afbe6e5 195
gkumar 1:b8c71afbe6e5 196 for(int i = 0; i < 15 ; i++)
gkumar 1:b8c71afbe6e5 197 {
gkumar 1:b8c71afbe6e5 198 printf("0x%X\n\r",(short_beacon[i]));
gkumar 1:b8c71afbe6e5 199 }
gkumar 1:b8c71afbe6e5 200 //tx settings begin
gkumar 1:b8c71afbe6e5 201 //setModeIdle();
gkumar 1:b8c71afbe6e5 202 writereg(RF22_REG_07_OPERATING_MODE1,0x01); //ready mode
gkumar 1:b8c71afbe6e5 203 //fillTxBuf(data, len);
gkumar 1:b8c71afbe6e5 204 clearTxBuf();
gkumar 1:b8c71afbe6e5 205
gkumar 1:b8c71afbe6e5 206 //Set to Tx mode
gkumar 1:b8c71afbe6e5 207 writereg(RF22_REG_07_OPERATING_MODE1,0x09);
gkumar 1:b8c71afbe6e5 208
gkumar 1:b8c71afbe6e5 209 while(byte_counter!=15){
gkumar 1:b8c71afbe6e5 210 //Check for fifoThresh
gkumar 1:b8c71afbe6e5 211 while((readreg(RF22_REG_03_INTERRUPT_STATUS1) & 0x20) != 0x20);
gkumar 1:b8c71afbe6e5 212 //writing again
gkumar 1:b8c71afbe6e5 213 cs = 0;
gkumar 1:b8c71afbe6e5 214 spi.write(0xFF);
gkumar 1:b8c71afbe6e5 215 for(int i=7; i>=0 ;i--)
gkumar 1:b8c71afbe6e5 216 {
gkumar 1:b8c71afbe6e5 217 //pc.printf("%d\n",byte_counter);
gkumar 1:b8c71afbe6e5 218 if((short_beacon[byte_counter] & (uint8_t) pow(2.0,i))!=0)
gkumar 1:b8c71afbe6e5 219 {
gkumar 1:b8c71afbe6e5 220 spi.write(0xFF);
gkumar 1:b8c71afbe6e5 221 spi.write(0xFF);
gkumar 1:b8c71afbe6e5 222 }
gkumar 1:b8c71afbe6e5 223 else
gkumar 1:b8c71afbe6e5 224 {
gkumar 1:b8c71afbe6e5 225 spi.write(0x00);
gkumar 1:b8c71afbe6e5 226 spi.write(0x00);
gkumar 1:b8c71afbe6e5 227
gkumar 1:b8c71afbe6e5 228 }
gkumar 1:b8c71afbe6e5 229 }
gkumar 1:b8c71afbe6e5 230 cs = 1;
gkumar 1:b8c71afbe6e5 231 byte_counter++;
gkumar 1:b8c71afbe6e5 232
gkumar 1:b8c71afbe6e5 233 }
gkumar 1:b8c71afbe6e5 234 //rf22.waitPacketSent();
gkumar 1:b8c71afbe6e5 235 while((readreg(RF22_REG_03_INTERRUPT_STATUS1) & 0x04) != 0x04);//pc.printf(" chck pkt sent!\n");
gkumar 1:b8c71afbe6e5 236 printf("\nBeacon function exiting\n\r");
gkumar 1:b8c71afbe6e5 237
gkumar 1:b8c71afbe6e5 238 }