An in-development library to provide effective access to all features of the FXOS8700CQ on the FRDM-K64F mbed-enabled development board. As of 28 May 2014 1325EDT, the code should be generally usable and modifiable.

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Show/hide line numbers FXOS8700CQ.cpp Source File

FXOS8700CQ.cpp

00001 #include "FXOS8700CQ.h"
00002 
00003 uint8_t status_reg; // Status register contents
00004 uint8_t raw[FXOS8700CQ_READ_LEN]; // Buffer for reading out stored data
00005 
00006 // Construct class and its contents
00007 FXOS8700CQ::FXOS8700CQ(PinName sda, PinName scl, int addr) : dev_i2c(sda, scl), dev_addr(addr)
00008 {
00009     // Initialization of the FXOS8700CQ
00010     dev_i2c.frequency(I2C_400K); // Use maximum I2C frequency
00011     uint8_t data[6] = {0, 0, 0, 0, 0, 0}; // to write over I2C: device register, up to 5 bytes data
00012 
00013     // TODO: verify WHOAMI?
00014 
00015     // Place peripheral in standby for configuration, resetting CTRL_REG1
00016     data[0] = FXOS8700CQ_CTRL_REG1;
00017     data[1] = 0x00; // this will unset CTRL_REG1:active
00018     write_regs(data, 2);
00019 
00020     // Now that the device is in standby, configure registers at will
00021 
00022     // Setup for write-though for CTRL_REG series
00023     // Keep data[0] as FXOS8700CQ_CTRL_REG1
00024     data[1] =
00025         FXOS8700CQ_CTRL_REG1_ASLP_RATE2(1) | // 0b01 gives sleep rate of 12.5Hz
00026         FXOS8700CQ_CTRL_REG1_DR3(1); // 0x001 gives ODR of 400Hz/200Hz hybrid
00027 
00028     // FXOS8700CQ_CTRL_REG2;
00029     data[2] =
00030         FXOS8700CQ_CTRL_REG2_SMODS2(3) | // 0b11 gives low power sleep oversampling mode
00031         FXOS8700CQ_CTRL_REG2_MODS2(1); // 0b01 gives low noise, low power oversampling mode
00032 
00033     // No configuration changes from default 0x00 in CTRL_REG3
00034     // Interrupts will be active low, their outputs in push-pull mode
00035     data[3] = 0x00;
00036 
00037     // FXOS8700CQ_CTRL_REG4;
00038     data[4] =
00039         FXOS8700CQ_CTRL_REG4_INT_EN_DRDY; // Enable the Data-Ready interrupt
00040 
00041     // No configuration changes from default 0x00 in CTRL_REG5
00042     // Data-Ready interrupt will appear on INT2
00043     data[5] = 0x00;
00044 
00045     // Write to the 5 CTRL_REG registers
00046     write_regs(data, 6);
00047 
00048     // FXOS8700CQ_XYZ_DATA_CFG
00049     data[0] = FXOS8700CQ_XYZ_DATA_CFG;
00050     data[1] =
00051         FXOS8700CQ_XYZ_DATA_CFG_FS2(1); // 0x01 gives 4g full range, 0.488mg/LSB
00052     write_regs(data, 2);
00053 
00054     // Setup for write-through for M_CTRL_REG series
00055     data[0] = FXOS8700CQ_M_CTRL_REG1;
00056     data[1] =
00057         FXOS8700CQ_M_CTRL_REG1_M_ACAL | // set automatic calibration
00058         FXOS8700CQ_M_CTRL_REG1_MO_OS3(7) | // use maximum magnetic oversampling
00059         FXOS8700CQ_M_CTRL_REG1_M_HMS2(3); // enable hybrid sampling (both sensors)
00060 
00061     // FXOS8700CQ_M_CTRL_REG2
00062     data[2] =
00063         FXOS8700CQ_M_CTRL_REG2_HYB_AUTOINC_MODE;
00064 
00065     // FXOS8700CQ_M_CTRL_REG3
00066     data[3] =
00067         FXOS8700CQ_M_CTRL_REG3_M_ASLP_OS3(7); // maximum sleep magnetic oversampling
00068 
00069     // Write to the 3 M_CTRL_REG registers
00070     write_regs(data, 4);
00071 
00072     // Peripheral is configured, but disabled
00073     enabled = false;
00074 }
00075 
00076 // Destruct class
00077 FXOS8700CQ::~FXOS8700CQ(void) {}
00078 
00079 
00080 void FXOS8700CQ::enable(void)
00081 {
00082     uint8_t data[2];
00083     read_regs( FXOS8700CQ_CTRL_REG1, &data[1], 1);
00084     data[1] |= FXOS8700CQ_CTRL_REG1_ACTIVE;
00085     data[0] = FXOS8700CQ_CTRL_REG1;
00086     write_regs(data, 2); // write back
00087 
00088     enabled = true;
00089 }
00090 
00091 void FXOS8700CQ::disable(void)
00092 {
00093     uint8_t data[2];
00094     read_regs( FXOS8700CQ_CTRL_REG1, &data[1], 1);
00095     data[0] = FXOS8700CQ_CTRL_REG1;
00096     data[1] &= ~FXOS8700CQ_CTRL_REG1_ACTIVE;
00097     write_regs(data, 2); // write back
00098 
00099     enabled = false;
00100 }
00101 
00102 
00103 uint8_t FXOS8700CQ::status (void)
00104 {
00105     read_regs(FXOS8700CQ_STATUS, &status_reg, 1);
00106     return status_reg;
00107 }
00108 
00109 uint8_t FXOS8700CQ::get_whoami (void)
00110 {
00111     uint8_t databyte = 0x00;
00112     read_regs(FXOS8700CQ_WHOAMI, &databyte, 1);
00113     return databyte;
00114 }
00115 
00116 uint8_t FXOS8700CQ::get_data(SRAWDATA *accel_data, SRAWDATA *magn_data)
00117 {
00118     if(!enabled) {
00119         return 1;
00120     }
00121 
00122     read_regs(FXOS8700CQ_M_OUT_X_MSB, raw, FXOS8700CQ_READ_LEN);
00123 
00124     // Pull out 16-bit, 2's complement magnetometer data
00125     magn_data->x = (raw[0] << 8) | raw[1];
00126     magn_data->y = (raw[2] << 8) | raw[3];
00127     magn_data->z = (raw[4] << 8) | raw[5];
00128 
00129     // Pull out 14-bit, 2's complement, right-justified accelerometer data
00130     accel_data->x = (raw[6] << 8) | raw[7];
00131     accel_data->y = (raw[8] << 8) | raw[9];
00132     accel_data->z = (raw[10] << 8) | raw[11];
00133 
00134     // Have to apply corrections to make the int16_t correct
00135     if(accel_data->x > UINT14_MAX/2) {
00136         accel_data->x -= UINT14_MAX;
00137     }
00138     if(accel_data->y > UINT14_MAX/2) {
00139         accel_data->y -= UINT14_MAX;
00140     }
00141     if(accel_data->z > UINT14_MAX/2) {
00142         accel_data->z -= UINT14_MAX;
00143     }
00144 
00145     return 0;
00146 }
00147 
00148 uint8_t FXOS8700CQ::get_accel_scale(void)
00149 {
00150     uint8_t data = 0x00;
00151     read_regs(FXOS8700CQ_XYZ_DATA_CFG, &data, 1);
00152     data &= FXOS8700CQ_XYZ_DATA_CFG_FS2(3); // mask with 0b11
00153 
00154     // Choose output value based on masked data
00155     switch(data) {
00156         case FXOS8700CQ_XYZ_DATA_CFG_FS2(0):
00157             return 2;
00158         case FXOS8700CQ_XYZ_DATA_CFG_FS2(1):
00159             return 4;
00160         case FXOS8700CQ_XYZ_DATA_CFG_FS2(2):
00161             return 8;
00162         default:
00163             return 0;
00164     }
00165 }
00166 
00167 // Private methods
00168 
00169 // Excepting the call to dev_i2c.frequency() in the constructor,
00170 // the use of the mbed I2C class is restricted to these methods
00171 void FXOS8700CQ::read_regs(int reg_addr, uint8_t* data, int len)
00172 {
00173     char t[1] = {reg_addr};
00174     dev_i2c.write(dev_addr, t, 1, true);
00175     dev_i2c.read(dev_addr, (char *)data, len);
00176 }
00177 
00178 void FXOS8700CQ::write_regs(uint8_t* data, int len)
00179 {
00180     dev_i2c.write(dev_addr, (char*)data, len);
00181 }