Mike Moore / Mbed 2 deprecated Embedded_RTOS_Project

Embedded RTOS class project. This project allows a Python/Tk program running on a PC host to monitor/control a test-CPU programmed into an altera development board.

Dependencies:   C12832_lcd USBDevice mbed-rtos mbed mmSPI-2 watchdog

Fork of USB_device_project by Mike Moore

mmRTL/mux8x16.txt@15:b8df590ce219, 2013-09-17 (annotated)

Committer:
gatedClock
Date:
Tue Sep 17 19:25:25 2013 +0000
Revision:
15:b8df590ce219
Parent:
7:d1aca9ccbab8 
update for embedded RTOS project.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
gatedClock 3:659ffc90b59e 1 /*----------------------------------copyright---------------------------------*/
gatedClock 7:d1aca9ccbab8 2 // licensed for personal and academic use.
gatedClock 7:d1aca9ccbab8 3 // commercial use must be approved by the account-holder of
gatedClock 7:d1aca9ccbab8 4 // gated.clock@gmail.com
gatedClock 3:659ffc90b59e 5 /*-----------------------------------module-----------------------------------*/
gatedClock 7:d1aca9ccbab8 6 module mux8x16
gatedClock 3:659ffc90b59e 7 (
gatedClock 7:d1aca9ccbab8 8 iDin15, // data-input 15.
gatedClock 7:d1aca9ccbab8 9 iDin14, // data-input 14.
gatedClock 7:d1aca9ccbab8 10 iDin13, // data-input 13.
gatedClock 7:d1aca9ccbab8 11 iDin12, // data-input 12.
gatedClock 7:d1aca9ccbab8 12 iDin11, // data-input 11.
gatedClock 7:d1aca9ccbab8 13 iDin10, // data-input 10.
gatedClock 7:d1aca9ccbab8 14 iDin9, // data-input 9.
gatedClock 7:d1aca9ccbab8 15 iDin8, // data-input 8.
gatedClock 7:d1aca9ccbab8 16 iDin7, // data-input 7.
gatedClock 7:d1aca9ccbab8 17 iDin6, // data-input 6.
gatedClock 7:d1aca9ccbab8 18 iDin5, // data-input 5.
gatedClock 7:d1aca9ccbab8 19 iDin4, // data-input 4.
gatedClock 7:d1aca9ccbab8 20 iDin3, // data-input 3.
gatedClock 7:d1aca9ccbab8 21 iDin2, // data-input 2.
gatedClock 7:d1aca9ccbab8 22 iDin1, // data-input 1.
gatedClock 7:d1aca9ccbab8 23 iDin0, // data-input 0.
gatedClock 7:d1aca9ccbab8 24 iSel, // multiplexor select.
gatedClock 7:d1aca9ccbab8 25 oDout // data-out.
gatedClock 3:659ffc90b59e 26 );
gatedClock 3:659ffc90b59e 27 /*--------------------------------description-----------------------------------
gatedClock 7:d1aca9ccbab8 28 a 8-bit-wide, 16-selection multiplexor.
gatedClock 3:659ffc90b59e 29 -------------------------------------notes--------------------------------------
gatedClock 3:659ffc90b59e 30 ------------------------------------defines-----------------------------------*/
gatedClock 3:659ffc90b59e 31 /*-----------------------------------ports------------------------------------*/
gatedClock 7:d1aca9ccbab8 32 input [ 7:0] iDin15; // data-input 15.
gatedClock 7:d1aca9ccbab8 33 input [ 7:0] iDin14; // data-input 14.
gatedClock 7:d1aca9ccbab8 34 input [ 7:0] iDin13; // data-input 13.
gatedClock 7:d1aca9ccbab8 35 input [ 7:0] iDin12; // data-input 12.
gatedClock 7:d1aca9ccbab8 36 input [ 7:0] iDin11; // data-input 11.
gatedClock 7:d1aca9ccbab8 37 input [ 7:0] iDin10; // data-input 10.
gatedClock 7:d1aca9ccbab8 38 input [ 7:0] iDin9; // data-input 9.
gatedClock 7:d1aca9ccbab8 39 input [ 7:0] iDin8; // data-input 8.
gatedClock 7:d1aca9ccbab8 40 input [ 7:0] iDin7; // data-input 7.
gatedClock 7:d1aca9ccbab8 41 input [ 7:0] iDin6; // data-input 6.
gatedClock 7:d1aca9ccbab8 42 input [ 7:0] iDin5; // data-input 5.
gatedClock 7:d1aca9ccbab8 43 input [ 7:0] iDin4; // data-input 4.
gatedClock 7:d1aca9ccbab8 44 input [ 7:0] iDin3; // data-input 3.
gatedClock 7:d1aca9ccbab8 45 input [ 7:0] iDin2; // data-input 2.
gatedClock 7:d1aca9ccbab8 46 input [ 7:0] iDin1; // data-input 1.
gatedClock 7:d1aca9ccbab8 47 input [ 7:0] iDin0; // data-input 0.
gatedClock 7:d1aca9ccbab8 48 input [ 3:0] iSel; // multiplexor select.
gatedClock 7:d1aca9ccbab8 49 output [ 7:0] oDout; // data-out.
gatedClock 3:659ffc90b59e 50 /*-----------------------------------wires------------------------------------*/
gatedClock 7:d1aca9ccbab8 51 wire [ 7:0] iDin15; // data-input 15.
gatedClock 7:d1aca9ccbab8 52 wire [ 7:0] iDin14; // data-input 14.
gatedClock 7:d1aca9ccbab8 53 wire [ 7:0] iDin13; // data-input 13.
gatedClock 7:d1aca9ccbab8 54 wire [ 7:0] iDin12; // data-input 12.
gatedClock 7:d1aca9ccbab8 55 wire [ 7:0] iDin11; // data-input 11.
gatedClock 7:d1aca9ccbab8 56 wire [ 7:0] iDin10; // data-input 10.
gatedClock 7:d1aca9ccbab8 57 wire [ 7:0] iDin9; // data-input 9.
gatedClock 7:d1aca9ccbab8 58 wire [ 7:0] iDin8; // data-input 8.
gatedClock 7:d1aca9ccbab8 59 wire [ 7:0] iDin7; // data-input 7.
gatedClock 7:d1aca9ccbab8 60 wire [ 7:0] iDin6; // data-input 6.
gatedClock 7:d1aca9ccbab8 61 wire [ 7:0] iDin5; // data-input 5.
gatedClock 7:d1aca9ccbab8 62 wire [ 7:0] iDin4; // data-input 4.
gatedClock 7:d1aca9ccbab8 63 wire [ 7:0] iDin3; // data-input 3.
gatedClock 7:d1aca9ccbab8 64 wire [ 7:0] iDin2; // data-input 2.
gatedClock 7:d1aca9ccbab8 65 wire [ 7:0] iDin1; // data-input 1.
gatedClock 7:d1aca9ccbab8 66 wire [ 7:0] iDin0; // data-input 0.
gatedClock 7:d1aca9ccbab8 67 wire [ 3:0] iSel; // multiplexor select.
gatedClock 7:d1aca9ccbab8 68 wire [ 7:0] oDout; // data-out.
gatedClock 3:659ffc90b59e 69 /*---------------------------------registers----------------------------------*/
gatedClock 7:d1aca9ccbab8 70 reg [ 7:0] rDout; // output register.
gatedClock 3:659ffc90b59e 71 /*---------------------------------variables----------------------------------*/
gatedClock 3:659ffc90b59e 72 /*---------------------------------parameters---------------------------------*/
gatedClock 3:659ffc90b59e 73 /*-----------------------------------clocks-----------------------------------*/
gatedClock 3:659ffc90b59e 74 /*---------------------------------instances----------------------------------*/
gatedClock 3:659ffc90b59e 75 /*-----------------------------------logic------------------------------------*/
gatedClock 3:659ffc90b59e 76
gatedClock 7:d1aca9ccbab8 77 always @ (iDin15 or iDin14 or iDin13 or iDin12 or
gatedClock 3:659ffc90b59e 78 iDin11 or iDin10 or iDin9 or iDin8 or
gatedClock 7:d1aca9ccbab8 79 iDin7 or iDin6 or iDin5 or iDin4 or
gatedClock 7:d1aca9ccbab8 80 iDin3 or iDin2 or iDin1 or iDin0 or iSel)
gatedClock 7:d1aca9ccbab8 81 case (iSel)
gatedClock 7:d1aca9ccbab8 82 15 : rDout = iDin15;
gatedClock 7:d1aca9ccbab8 83 14 : rDout = iDin14;
gatedClock 7:d1aca9ccbab8 84 13 : rDout = iDin13;
gatedClock 7:d1aca9ccbab8 85 12 : rDout = iDin12;
gatedClock 7:d1aca9ccbab8 86 11 : rDout = iDin11;
gatedClock 7:d1aca9ccbab8 87 10 : rDout = iDin10;
gatedClock 7:d1aca9ccbab8 88 9 : rDout = iDin9;
gatedClock 7:d1aca9ccbab8 89 8 : rDout = iDin8;
gatedClock 7:d1aca9ccbab8 90 7 : rDout = iDin7;
gatedClock 7:d1aca9ccbab8 91 6 : rDout = iDin6;
gatedClock 7:d1aca9ccbab8 92 5 : rDout = iDin5;
gatedClock 7:d1aca9ccbab8 93 4 : rDout = iDin4;
gatedClock 7:d1aca9ccbab8 94 3 : rDout = iDin3;
gatedClock 7:d1aca9ccbab8 95 2 : rDout = iDin2;
gatedClock 7:d1aca9ccbab8 96 1 : rDout = iDin1;
gatedClock 7:d1aca9ccbab8 97 0 : rDout = iDin0;
gatedClock 7:d1aca9ccbab8 98 endcase
gatedClock 3:659ffc90b59e 99
gatedClock 7:d1aca9ccbab8 100 assign oDout = rDout; // propagate output.
gatedClock 3:659ffc90b59e 101 /*-------------------------------*/endmodule/*--------------------------------*/
gatedClock 3:659ffc90b59e 102
gatedClock 3:659ffc90b59e 103
gatedClock 3:659ffc90b59e 104
gatedClock 3:659ffc90b59e 105
gatedClock 3:659ffc90b59e 106
gatedClock 3:659ffc90b59e 107
gatedClock 3:659ffc90b59e 108
gatedClock 3:659ffc90b59e 109
gatedClock 3:659ffc90b59e 110
gatedClock 3:659ffc90b59e 111
gatedClock 3:659ffc90b59e 112
gatedClock 3:659ffc90b59e 113
gatedClock 3:659ffc90b59e 114
gatedClock 3:659ffc90b59e 115
gatedClock 3:659ffc90b59e 116
gatedClock 3:659ffc90b59e 117
gatedClock 7:d1aca9ccbab8 118
gatedClock 7:d1aca9ccbab8 119
gatedClock 7:d1aca9ccbab8 120