Gary Servin
Personal fork
Device/MODSERIAL_KL05Z.h@40:6ffa97119f4f, 2015-09-20 (annotated)
- Committer:
- garyservin
- Date:
- Sun Sep 20 02:56:47 2015 +0000
- Revision:
- 40:6ffa97119f4f
- Parent:
- 34:e84b8ad1d98b
Added support for STM Nucleo F401RE platform
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| chaegle | 34:e84b8ad1d98b | 1 | #if defined(TARGET_KL05Z) |
| chaegle | 34:e84b8ad1d98b | 2 | |
| chaegle | 34:e84b8ad1d98b | 3 | #define MODSERIAL_IRQ_REG ((UARTLP_Type*)_base)->C2 |
| chaegle | 34:e84b8ad1d98b | 4 | #define DISABLE_TX_IRQ MODSERIAL_IRQ_REG &= ~(1UL << UARTLP_C2_TIE_SHIFT) |
| chaegle | 34:e84b8ad1d98b | 5 | #define DISABLE_RX_IRQ MODSERIAL_IRQ_REG &= ~(1UL << UARTLP_C2_RIE_SHIFT) |
| chaegle | 34:e84b8ad1d98b | 6 | #define ENABLE_TX_IRQ MODSERIAL_IRQ_REG |= (1UL << UARTLP_C2_TIE_SHIFT) |
| chaegle | 34:e84b8ad1d98b | 7 | #define ENABLE_RX_IRQ MODSERIAL_IRQ_REG |= (1UL << UARTLP_C2_RIE_SHIFT) |
| chaegle | 34:e84b8ad1d98b | 8 | |
| chaegle | 34:e84b8ad1d98b | 9 | #define MODSERIAL_READ_REG ((UARTLP_Type*)_base)->D |
| chaegle | 34:e84b8ad1d98b | 10 | #define MODSERIAL_WRITE_REG ((UARTLP_Type*)_base)->D |
| chaegle | 34:e84b8ad1d98b | 11 | #define MODSERIAL_READABLE ((((UARTLP_Type*)_base)->S1 & (1UL<<5)) != 0) |
| chaegle | 34:e84b8ad1d98b | 12 | #define MODSERIAL_WRITABLE ((((UARTLP_Type*)_base)->S1 & (1UL<<7)) != 0) |
| chaegle | 34:e84b8ad1d98b | 13 | |
| chaegle | 34:e84b8ad1d98b | 14 | #define RESET_TX_FIFO while(0 == 1) |
| chaegle | 34:e84b8ad1d98b | 15 | #define RESET_RX_FIFO while(MODSERIAL_READABLE) char dummy = MODSERIAL_READ_REG |
| chaegle | 34:e84b8ad1d98b | 16 | |
| chaegle | 34:e84b8ad1d98b | 17 | #define RX_IRQ_ENABLED ((MODSERIAL_IRQ_REG & (1UL << UARTLP_C2_RIE_SHIFT)) != 0 ) |
| chaegle | 34:e84b8ad1d98b | 18 | #define TX_IRQ_ENABLED ((MODSERIAL_IRQ_REG & (1UL << UARTLP_C2_TIE_SHIFT)) != 0 ) |
| chaegle | 34:e84b8ad1d98b | 19 | |
| chaegle | 34:e84b8ad1d98b | 20 | #endif |