Jose Escalona / SDFileSystem

publish sd

Fork of SDFileSystem by Katsushi Ogawa

SDFileSystem.cpp@2:cd38a0de6491, 2013-02-05 (annotated)

Committer:
escalona
Date:
Tue Feb 05 14:29:06 2013 +0000
Revision:
2:cd38a0de6491
Parent:
0:d496b40b6943 
primero

Who changed what in which revision?

UserRevisionLine numberNew contents of line
KatsushiOgawa 0:d496b40b6943 1 /* mbed SDFileSystem Library, for providing file access to SD cards
KatsushiOgawa 0:d496b40b6943 2 * Copyright (c) 2008-2010, sford
KatsushiOgawa 0:d496b40b6943 3 *
KatsushiOgawa 0:d496b40b6943 4 * Permission is hereby granted, free of charge, to any person obtaining a copy
KatsushiOgawa 0:d496b40b6943 5 * of this software and associated documentation files (the "Software"), to deal
KatsushiOgawa 0:d496b40b6943 6 * in the Software without restriction, including without limitation the rights
KatsushiOgawa 0:d496b40b6943 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
KatsushiOgawa 0:d496b40b6943 8 * copies of the Software, and to permit persons to whom the Software is
KatsushiOgawa 0:d496b40b6943 9 * furnished to do so, subject to the following conditions:
KatsushiOgawa 0:d496b40b6943 10 *
KatsushiOgawa 0:d496b40b6943 11 * The above copyright notice and this permission notice shall be included in
KatsushiOgawa 0:d496b40b6943 12 * all copies or substantial portions of the Software.
KatsushiOgawa 0:d496b40b6943 13 *
KatsushiOgawa 0:d496b40b6943 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
KatsushiOgawa 0:d496b40b6943 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
KatsushiOgawa 0:d496b40b6943 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
KatsushiOgawa 0:d496b40b6943 17 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
KatsushiOgawa 0:d496b40b6943 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
KatsushiOgawa 0:d496b40b6943 19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
KatsushiOgawa 0:d496b40b6943 20 * THE SOFTWARE.
KatsushiOgawa 0:d496b40b6943 21 */
KatsushiOgawa 0:d496b40b6943 22
KatsushiOgawa 0:d496b40b6943 23 /* Introduction
KatsushiOgawa 0:d496b40b6943 24 * ------------
KatsushiOgawa 0:d496b40b6943 25 * SD and MMC cards support a number of interfaces, but common to them all
KatsushiOgawa 0:d496b40b6943 26 * is one based on SPI. This is the one I'm implmenting because it means
KatsushiOgawa 0:d496b40b6943 27 * it is much more portable even though not so performant, and we already
KatsushiOgawa 0:d496b40b6943 28 * have the mbed SPI Interface!
KatsushiOgawa 0:d496b40b6943 29 *
KatsushiOgawa 0:d496b40b6943 30 * The main reference I'm using is Chapter 7, "SPI Mode" of:
KatsushiOgawa 0:d496b40b6943 31 * http://www.sdcard.org/developers/tech/sdcard/pls/Simplified_Physical_Layer_Spec.pdf
KatsushiOgawa 0:d496b40b6943 32 *
KatsushiOgawa 0:d496b40b6943 33 * SPI Startup
KatsushiOgawa 0:d496b40b6943 34 * -----------
KatsushiOgawa 0:d496b40b6943 35 * The SD card powers up in SD mode. The SPI interface mode is selected by
KatsushiOgawa 0:d496b40b6943 36 * asserting CS low and sending the reset command (CMD0). The card will
KatsushiOgawa 0:d496b40b6943 37 * respond with a (R1) response.
KatsushiOgawa 0:d496b40b6943 38 *
KatsushiOgawa 0:d496b40b6943 39 * CMD8 is optionally sent to determine the voltage range supported, and
KatsushiOgawa 0:d496b40b6943 40 * indirectly determine whether it is a version 1.x SD/non-SD card or
KatsushiOgawa 0:d496b40b6943 41 * version 2.x. I'll just ignore this for now.
KatsushiOgawa 0:d496b40b6943 42 *
KatsushiOgawa 0:d496b40b6943 43 * ACMD41 is repeatedly issued to initialise the card, until "in idle"
KatsushiOgawa 0:d496b40b6943 44 * (bit 0) of the R1 response goes to '0', indicating it is initialised.
KatsushiOgawa 0:d496b40b6943 45 *
KatsushiOgawa 0:d496b40b6943 46 * You should also indicate whether the host supports High Capicity cards,
KatsushiOgawa 0:d496b40b6943 47 * and check whether the card is high capacity - i'll also ignore this
KatsushiOgawa 0:d496b40b6943 48 *
KatsushiOgawa 0:d496b40b6943 49 * SPI Protocol
KatsushiOgawa 0:d496b40b6943 50 * ------------
KatsushiOgawa 0:d496b40b6943 51 * The SD SPI protocol is based on transactions made up of 8-bit words, with
KatsushiOgawa 0:d496b40b6943 52 * the host starting every bus transaction by asserting the CS signal low. The
KatsushiOgawa 0:d496b40b6943 53 * card always responds to commands, data blocks and errors.
KatsushiOgawa 0:d496b40b6943 54 *
KatsushiOgawa 0:d496b40b6943 55 * The protocol supports a CRC, but by default it is off (except for the
KatsushiOgawa 0:d496b40b6943 56 * first reset CMD0, where the CRC can just be pre-calculated, and CMD8)
KatsushiOgawa 0:d496b40b6943 57 * I'll leave the CRC off I think!
KatsushiOgawa 0:d496b40b6943 58 *
KatsushiOgawa 0:d496b40b6943 59 * Standard capacity cards have variable data block sizes, whereas High
KatsushiOgawa 0:d496b40b6943 60 * Capacity cards fix the size of data block to 512 bytes. I'll therefore
KatsushiOgawa 0:d496b40b6943 61 * just always use the Standard Capacity cards with a block size of 512 bytes.
KatsushiOgawa 0:d496b40b6943 62 * This is set with CMD16.
KatsushiOgawa 0:d496b40b6943 63 *
KatsushiOgawa 0:d496b40b6943 64 * You can read and write single blocks (CMD17, CMD25) or multiple blocks
KatsushiOgawa 0:d496b40b6943 65 * (CMD18, CMD25). For simplicity, I'll just use single block accesses. When
KatsushiOgawa 0:d496b40b6943 66 * the card gets a read command, it responds with a response token, and then
KatsushiOgawa 0:d496b40b6943 67 * a data token or an error.
KatsushiOgawa 0:d496b40b6943 68 *
KatsushiOgawa 0:d496b40b6943 69 * SPI Command Format
KatsushiOgawa 0:d496b40b6943 70 * ------------------
KatsushiOgawa 0:d496b40b6943 71 * Commands are 6-bytes long, containing the command, 32-bit argument, and CRC.
KatsushiOgawa 0:d496b40b6943 72 *
KatsushiOgawa 0:d496b40b6943 73 * +---------------+------------+------------+-----------+----------+--------------+
KatsushiOgawa 0:d496b40b6943 74 * | 01 | cmd[5:0] | arg[31:24] | arg[23:16] | arg[15:8] | arg[7:0] | crc[6:0] | 1 |
KatsushiOgawa 0:d496b40b6943 75 * +---------------+------------+------------+-----------+----------+--------------+
KatsushiOgawa 0:d496b40b6943 76 *
KatsushiOgawa 0:d496b40b6943 77 * As I'm not using CRC, I can fix that byte to what is needed for CMD0 (0x95)
KatsushiOgawa 0:d496b40b6943 78 *
KatsushiOgawa 0:d496b40b6943 79 * All Application Specific commands shall be preceded with APP_CMD (CMD55).
KatsushiOgawa 0:d496b40b6943 80 *
KatsushiOgawa 0:d496b40b6943 81 * SPI Response Format
KatsushiOgawa 0:d496b40b6943 82 * -------------------
KatsushiOgawa 0:d496b40b6943 83 * The main response format (R1) is a status byte (normally zero). Key flags:
KatsushiOgawa 0:d496b40b6943 84 * idle - 1 if the card is in an idle state/initialising
KatsushiOgawa 0:d496b40b6943 85 * cmd - 1 if an illegal command code was detected
KatsushiOgawa 0:d496b40b6943 86 *
KatsushiOgawa 0:d496b40b6943 87 * +-------------------------------------------------+
KatsushiOgawa 0:d496b40b6943 88 * R1 | 0 | arg | addr | seq | crc | cmd | erase | idle |
KatsushiOgawa 0:d496b40b6943 89 * +-------------------------------------------------+
KatsushiOgawa 0:d496b40b6943 90 *
KatsushiOgawa 0:d496b40b6943 91 * R1b is the same, except it is followed by a busy signal (zeros) until
KatsushiOgawa 0:d496b40b6943 92 * the first non-zero byte when it is ready again.
KatsushiOgawa 0:d496b40b6943 93 *
KatsushiOgawa 0:d496b40b6943 94 * Data Response Token
KatsushiOgawa 0:d496b40b6943 95 * -------------------
KatsushiOgawa 0:d496b40b6943 96 * Every data block written to the card is acknowledged by a byte
KatsushiOgawa 0:d496b40b6943 97 * response token
KatsushiOgawa 0:d496b40b6943 98 *
KatsushiOgawa 0:d496b40b6943 99 * +----------------------+
KatsushiOgawa 0:d496b40b6943 100 * | xxx | 0 | status | 1 |
KatsushiOgawa 0:d496b40b6943 101 * +----------------------+
KatsushiOgawa 0:d496b40b6943 102 * 010 - OK!
KatsushiOgawa 0:d496b40b6943 103 * 101 - CRC Error
KatsushiOgawa 0:d496b40b6943 104 * 110 - Write Error
KatsushiOgawa 0:d496b40b6943 105 *
KatsushiOgawa 0:d496b40b6943 106 * Single Block Read and Write
KatsushiOgawa 0:d496b40b6943 107 * ---------------------------
KatsushiOgawa 0:d496b40b6943 108 *
KatsushiOgawa 0:d496b40b6943 109 * Block transfers have a byte header, followed by the data, followed
KatsushiOgawa 0:d496b40b6943 110 * by a 16-bit CRC. In our case, the data will always be 512 bytes.
KatsushiOgawa 0:d496b40b6943 111 *
KatsushiOgawa 0:d496b40b6943 112 * +------+---------+---------+- - - -+---------+-----------+----------+
KatsushiOgawa 0:d496b40b6943 113 * | 0xFE | data[0] | data[1] | | data[n] | crc[15:8] | crc[7:0] |
KatsushiOgawa 0:d496b40b6943 114 * +------+---------+---------+- - - -+---------+-----------+----------+
KatsushiOgawa 0:d496b40b6943 115 */
KatsushiOgawa 0:d496b40b6943 116
KatsushiOgawa 0:d496b40b6943 117 #include "SDFileSystem.h"
KatsushiOgawa 0:d496b40b6943 118
KatsushiOgawa 0:d496b40b6943 119 #define SD_COMMAND_TIMEOUT 5000
KatsushiOgawa 0:d496b40b6943 120
KatsushiOgawa 0:d496b40b6943 121 SDFileSystem::SDFileSystem(PinName mosi, PinName miso, PinName sclk, PinName cs, const char* name) :
KatsushiOgawa 0:d496b40b6943 122 FATFileSystem(name), _spi(mosi, miso, sclk), _cs(cs) {
KatsushiOgawa 0:d496b40b6943 123 _cs = 1;
KatsushiOgawa 0:d496b40b6943 124 }
KatsushiOgawa 0:d496b40b6943 125
KatsushiOgawa 0:d496b40b6943 126 #define R1_IDLE_STATE (1 << 0)
KatsushiOgawa 0:d496b40b6943 127 #define R1_ERASE_RESET (1 << 1)
KatsushiOgawa 0:d496b40b6943 128 #define R1_ILLEGAL_COMMAND (1 << 2)
KatsushiOgawa 0:d496b40b6943 129 #define R1_COM_CRC_ERROR (1 << 3)
KatsushiOgawa 0:d496b40b6943 130 #define R1_ERASE_SEQUENCE_ERROR (1 << 4)
KatsushiOgawa 0:d496b40b6943 131 #define R1_ADDRESS_ERROR (1 << 5)
KatsushiOgawa 0:d496b40b6943 132 #define R1_PARAMETER_ERROR (1 << 6)
KatsushiOgawa 0:d496b40b6943 133
KatsushiOgawa 0:d496b40b6943 134 // Types
KatsushiOgawa 0:d496b40b6943 135 // - v1.x Standard Capacity
KatsushiOgawa 0:d496b40b6943 136 // - v2.x Standard Capacity
KatsushiOgawa 0:d496b40b6943 137 // - v2.x High Capacity
KatsushiOgawa 0:d496b40b6943 138 // - Not recognised as an SD Card
KatsushiOgawa 0:d496b40b6943 139
KatsushiOgawa 0:d496b40b6943 140 #define SDCARD_FAIL 0
KatsushiOgawa 0:d496b40b6943 141 #define SDCARD_V1 1
KatsushiOgawa 0:d496b40b6943 142 #define SDCARD_V2 2
KatsushiOgawa 0:d496b40b6943 143 #define SDCARD_V2HC 3
KatsushiOgawa 0:d496b40b6943 144
KatsushiOgawa 0:d496b40b6943 145 int SDFileSystem::initialise_card() {
KatsushiOgawa 0:d496b40b6943 146 // Set to 100kHz for initialisation, and clock card with cs = 1
KatsushiOgawa 0:d496b40b6943 147 _spi.frequency(100000);
KatsushiOgawa 0:d496b40b6943 148 _cs = 1;
KatsushiOgawa 0:d496b40b6943 149 for(int i=0; i<16; i++) {
KatsushiOgawa 0:d496b40b6943 150 _spi.write(0xFF);
KatsushiOgawa 0:d496b40b6943 151 }
KatsushiOgawa 0:d496b40b6943 152
KatsushiOgawa 0:d496b40b6943 153 // send CMD0, should return with all zeros except IDLE STATE set (bit 0)
KatsushiOgawa 0:d496b40b6943 154 if(_cmd(0, 0) != R1_IDLE_STATE) {
KatsushiOgawa 0:d496b40b6943 155 fprintf(stderr, "No disk, or could not put SD card in to SPI idle state\n");
KatsushiOgawa 0:d496b40b6943 156 return SDCARD_FAIL;
KatsushiOgawa 0:d496b40b6943 157 }
KatsushiOgawa 0:d496b40b6943 158
KatsushiOgawa 0:d496b40b6943 159 // send CMD8 to determine whther it is ver 2.x
KatsushiOgawa 0:d496b40b6943 160 int r = _cmd8();
KatsushiOgawa 0:d496b40b6943 161 if(r == R1_IDLE_STATE) {
KatsushiOgawa 0:d496b40b6943 162 return initialise_card_v2();
KatsushiOgawa 0:d496b40b6943 163 } else if(r == (R1_IDLE_STATE | R1_ILLEGAL_COMMAND)) {
KatsushiOgawa 0:d496b40b6943 164 return initialise_card_v1();
KatsushiOgawa 0:d496b40b6943 165 } else {
KatsushiOgawa 0:d496b40b6943 166 fprintf(stderr, "Not in idle state after sending CMD8 (not an SD card?)\n");
KatsushiOgawa 0:d496b40b6943 167 return SDCARD_FAIL;
KatsushiOgawa 0:d496b40b6943 168 }
KatsushiOgawa 0:d496b40b6943 169 }
KatsushiOgawa 0:d496b40b6943 170
KatsushiOgawa 0:d496b40b6943 171 int SDFileSystem::initialise_card_v1() {
KatsushiOgawa 0:d496b40b6943 172 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
KatsushiOgawa 0:d496b40b6943 173 _cmd(55, 0);
KatsushiOgawa 0:d496b40b6943 174 if(_cmd(41, 0) == 0) {
KatsushiOgawa 0:d496b40b6943 175 return SDCARD_V1;
KatsushiOgawa 0:d496b40b6943 176 }
KatsushiOgawa 0:d496b40b6943 177 }
KatsushiOgawa 0:d496b40b6943 178
KatsushiOgawa 0:d496b40b6943 179 fprintf(stderr, "Timeout waiting for v1.x card\n");
KatsushiOgawa 0:d496b40b6943 180 return SDCARD_FAIL;
KatsushiOgawa 0:d496b40b6943 181 }
KatsushiOgawa 0:d496b40b6943 182
KatsushiOgawa 0:d496b40b6943 183 int SDFileSystem::initialise_card_v2() {
KatsushiOgawa 0:d496b40b6943 184
KatsushiOgawa 0:d496b40b6943 185 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
KatsushiOgawa 0:d496b40b6943 186 _cmd(55, 0);
KatsushiOgawa 0:d496b40b6943 187 if(_cmd(41, 0) == 0) {
KatsushiOgawa 0:d496b40b6943 188 _cmd58();
KatsushiOgawa 0:d496b40b6943 189 return SDCARD_V2;
KatsushiOgawa 0:d496b40b6943 190 }
KatsushiOgawa 0:d496b40b6943 191 }
KatsushiOgawa 0:d496b40b6943 192
KatsushiOgawa 0:d496b40b6943 193 fprintf(stderr, "Timeout waiting for v2.x card\n");
KatsushiOgawa 0:d496b40b6943 194 return SDCARD_FAIL;
KatsushiOgawa 0:d496b40b6943 195 }
KatsushiOgawa 0:d496b40b6943 196
KatsushiOgawa 0:d496b40b6943 197 int SDFileSystem::disk_initialize() {
KatsushiOgawa 0:d496b40b6943 198
KatsushiOgawa 0:d496b40b6943 199 int i = initialise_card();
KatsushiOgawa 0:d496b40b6943 200 // printf("init card = %d\n", i);
KatsushiOgawa 0:d496b40b6943 201 // printf("OK\n");
KatsushiOgawa 0:d496b40b6943 202
KatsushiOgawa 0:d496b40b6943 203 _sectors = _sd_sectors();
KatsushiOgawa 0:d496b40b6943 204
KatsushiOgawa 0:d496b40b6943 205 // Set block length to 512 (CMD16)
KatsushiOgawa 0:d496b40b6943 206 if(_cmd(16, 512) != 0) {
KatsushiOgawa 0:d496b40b6943 207 fprintf(stderr, "Set 512-byte block timed out\n");
KatsushiOgawa 0:d496b40b6943 208 return 1;
KatsushiOgawa 0:d496b40b6943 209 }
KatsushiOgawa 0:d496b40b6943 210
KatsushiOgawa 0:d496b40b6943 211 _spi.frequency(1000000); // Set to 1MHz for data transfer
KatsushiOgawa 0:d496b40b6943 212 return 0;
KatsushiOgawa 0:d496b40b6943 213 }
KatsushiOgawa 0:d496b40b6943 214
KatsushiOgawa 0:d496b40b6943 215 int SDFileSystem::disk_write(const char *buffer, int block_number) {
KatsushiOgawa 0:d496b40b6943 216 // set write address for single block (CMD24)
KatsushiOgawa 0:d496b40b6943 217 if(_cmd(24, block_number * 512) != 0) {
KatsushiOgawa 0:d496b40b6943 218 return 1;
KatsushiOgawa 0:d496b40b6943 219 }
KatsushiOgawa 0:d496b40b6943 220
KatsushiOgawa 0:d496b40b6943 221 // send the data block
KatsushiOgawa 0:d496b40b6943 222 _write(buffer, 512);
KatsushiOgawa 0:d496b40b6943 223 return 0;
KatsushiOgawa 0:d496b40b6943 224 }
KatsushiOgawa 0:d496b40b6943 225
KatsushiOgawa 0:d496b40b6943 226 int SDFileSystem::disk_read(char *buffer, int block_number) {
KatsushiOgawa 0:d496b40b6943 227 // set read address for single block (CMD17)
KatsushiOgawa 0:d496b40b6943 228 if(_cmd(17, block_number * 512) != 0) {
KatsushiOgawa 0:d496b40b6943 229 return 1;
KatsushiOgawa 0:d496b40b6943 230 }
KatsushiOgawa 0:d496b40b6943 231
KatsushiOgawa 0:d496b40b6943 232 // receive the data
KatsushiOgawa 0:d496b40b6943 233 _read(buffer, 512);
KatsushiOgawa 0:d496b40b6943 234 return 0;
KatsushiOgawa 0:d496b40b6943 235 }
KatsushiOgawa 0:d496b40b6943 236
KatsushiOgawa 0:d496b40b6943 237 int SDFileSystem::disk_status() { return 0; }
KatsushiOgawa 0:d496b40b6943 238 int SDFileSystem::disk_sync() { return 0; }
KatsushiOgawa 0:d496b40b6943 239 int SDFileSystem::disk_sectors() { return _sectors; }
KatsushiOgawa 0:d496b40b6943 240
KatsushiOgawa 0:d496b40b6943 241 // PRIVATE FUNCTIONS
KatsushiOgawa 0:d496b40b6943 242
KatsushiOgawa 0:d496b40b6943 243 int SDFileSystem::_cmd(int cmd, int arg) {
KatsushiOgawa 0:d496b40b6943 244 _cs = 0;
KatsushiOgawa 0:d496b40b6943 245
KatsushiOgawa 0:d496b40b6943 246 // send a command
KatsushiOgawa 0:d496b40b6943 247 _spi.write(0x40 | cmd);
KatsushiOgawa 0:d496b40b6943 248 _spi.write(arg >> 24);
KatsushiOgawa 0:d496b40b6943 249 _spi.write(arg >> 16);
KatsushiOgawa 0:d496b40b6943 250 _spi.write(arg >> 8);
KatsushiOgawa 0:d496b40b6943 251 _spi.write(arg >> 0);
KatsushiOgawa 0:d496b40b6943 252 _spi.write(0x95);
KatsushiOgawa 0:d496b40b6943 253
KatsushiOgawa 0:d496b40b6943 254 // wait for the repsonse (response[7] == 0)
KatsushiOgawa 0:d496b40b6943 255 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
KatsushiOgawa 0:d496b40b6943 256 int response = _spi.write(0xFF);
KatsushiOgawa 0:d496b40b6943 257 if(!(response & 0x80)) {
KatsushiOgawa 0:d496b40b6943 258 _cs = 1;
KatsushiOgawa 0:d496b40b6943 259 _spi.write(0xFF);
KatsushiOgawa 0:d496b40b6943 260 return response;
KatsushiOgawa 0:d496b40b6943 261 }
KatsushiOgawa 0:d496b40b6943 262 }
KatsushiOgawa 0:d496b40b6943 263 _cs = 1;
KatsushiOgawa 0:d496b40b6943 264 _spi.write(0xFF);
KatsushiOgawa 0:d496b40b6943 265 return -1; // timeout
KatsushiOgawa 0:d496b40b6943 266 }
KatsushiOgawa 0:d496b40b6943 267 int SDFileSystem::_cmdx(int cmd, int arg) {
KatsushiOgawa 0:d496b40b6943 268 _cs = 0;
KatsushiOgawa 0:d496b40b6943 269
KatsushiOgawa 0:d496b40b6943 270 // send a command
KatsushiOgawa 0:d496b40b6943 271 _spi.write(0x40 | cmd);
KatsushiOgawa 0:d496b40b6943 272 _spi.write(arg >> 24);
KatsushiOgawa 0:d496b40b6943 273 _spi.write(arg >> 16);
KatsushiOgawa 0:d496b40b6943 274 _spi.write(arg >> 8);
KatsushiOgawa 0:d496b40b6943 275 _spi.write(arg >> 0);
KatsushiOgawa 0:d496b40b6943 276 _spi.write(0x95);
KatsushiOgawa 0:d496b40b6943 277
KatsushiOgawa 0:d496b40b6943 278 // wait for the repsonse (response[7] == 0)
KatsushiOgawa 0:d496b40b6943 279 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
KatsushiOgawa 0:d496b40b6943 280 int response = _spi.write(0xFF);
KatsushiOgawa 0:d496b40b6943 281 if(!(response & 0x80)) {
KatsushiOgawa 0:d496b40b6943 282 return response;
KatsushiOgawa 0:d496b40b6943 283 }
KatsushiOgawa 0:d496b40b6943 284 }
KatsushiOgawa 0:d496b40b6943 285 _cs = 1;
KatsushiOgawa 0:d496b40b6943 286 _spi.write(0xFF);
KatsushiOgawa 0:d496b40b6943 287 return -1; // timeout
KatsushiOgawa 0:d496b40b6943 288 }
KatsushiOgawa 0:d496b40b6943 289
KatsushiOgawa 0:d496b40b6943 290
KatsushiOgawa 0:d496b40b6943 291 int SDFileSystem::_cmd58() {
KatsushiOgawa 0:d496b40b6943 292 _cs = 0;
KatsushiOgawa 0:d496b40b6943 293 int arg = 0;
KatsushiOgawa 0:d496b40b6943 294
KatsushiOgawa 0:d496b40b6943 295 // send a command
KatsushiOgawa 0:d496b40b6943 296 _spi.write(0x40 | 58);
KatsushiOgawa 0:d496b40b6943 297 _spi.write(arg >> 24);
KatsushiOgawa 0:d496b40b6943 298 _spi.write(arg >> 16);
KatsushiOgawa 0:d496b40b6943 299 _spi.write(arg >> 8);
KatsushiOgawa 0:d496b40b6943 300 _spi.write(arg >> 0);
KatsushiOgawa 0:d496b40b6943 301 _spi.write(0x95);
KatsushiOgawa 0:d496b40b6943 302
KatsushiOgawa 0:d496b40b6943 303 // wait for the repsonse (response[7] == 0)
KatsushiOgawa 0:d496b40b6943 304 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
KatsushiOgawa 0:d496b40b6943 305 int response = _spi.write(0xFF);
KatsushiOgawa 0:d496b40b6943 306 if(!(response & 0x80)) {
KatsushiOgawa 0:d496b40b6943 307 int ocr = _spi.write(0xFF) << 24;
KatsushiOgawa 0:d496b40b6943 308 ocr |= _spi.write(0xFF) << 16;
KatsushiOgawa 0:d496b40b6943 309 ocr |= _spi.write(0xFF) << 8;
KatsushiOgawa 0:d496b40b6943 310 ocr |= _spi.write(0xFF) << 0;
KatsushiOgawa 0:d496b40b6943 311 // printf("OCR = 0x%08X\n", ocr);
KatsushiOgawa 0:d496b40b6943 312 _cs = 1;
KatsushiOgawa 0:d496b40b6943 313 _spi.write(0xFF);
KatsushiOgawa 0:d496b40b6943 314 return response;
KatsushiOgawa 0:d496b40b6943 315 }
KatsushiOgawa 0:d496b40b6943 316 }
KatsushiOgawa 0:d496b40b6943 317 _cs = 1;
KatsushiOgawa 0:d496b40b6943 318 _spi.write(0xFF);
KatsushiOgawa 0:d496b40b6943 319 return -1; // timeout
KatsushiOgawa 0:d496b40b6943 320 }
KatsushiOgawa 0:d496b40b6943 321
KatsushiOgawa 0:d496b40b6943 322 int SDFileSystem::_cmd8() {
KatsushiOgawa 0:d496b40b6943 323 _cs = 0;
KatsushiOgawa 0:d496b40b6943 324
KatsushiOgawa 0:d496b40b6943 325 // send a command
KatsushiOgawa 0:d496b40b6943 326 _spi.write(0x40 | 8); // CMD8
KatsushiOgawa 0:d496b40b6943 327 _spi.write(0x00); // reserved
KatsushiOgawa 0:d496b40b6943 328 _spi.write(0x00); // reserved
KatsushiOgawa 0:d496b40b6943 329 _spi.write(0x01); // 3.3v
KatsushiOgawa 0:d496b40b6943 330 _spi.write(0xAA); // check pattern
KatsushiOgawa 0:d496b40b6943 331 _spi.write(0x87); // crc
KatsushiOgawa 0:d496b40b6943 332
KatsushiOgawa 0:d496b40b6943 333 // wait for the repsonse (response[7] == 0)
KatsushiOgawa 0:d496b40b6943 334 for(int i=0; i<SD_COMMAND_TIMEOUT * 1000; i++) {
KatsushiOgawa 0:d496b40b6943 335 char response[5];
KatsushiOgawa 0:d496b40b6943 336 response[0] = _spi.write(0xFF);
KatsushiOgawa 0:d496b40b6943 337 if(!(response[0] & 0x80)) {
KatsushiOgawa 0:d496b40b6943 338 for(int j=1; j<5; j++) {
KatsushiOgawa 0:d496b40b6943 339 response[i] = _spi.write(0xFF);
KatsushiOgawa 0:d496b40b6943 340 }
KatsushiOgawa 0:d496b40b6943 341 _cs = 1;
KatsushiOgawa 0:d496b40b6943 342 _spi.write(0xFF);
KatsushiOgawa 0:d496b40b6943 343 return response[0];
KatsushiOgawa 0:d496b40b6943 344 }
KatsushiOgawa 0:d496b40b6943 345 }
KatsushiOgawa 0:d496b40b6943 346 _cs = 1;
KatsushiOgawa 0:d496b40b6943 347 _spi.write(0xFF);
KatsushiOgawa 0:d496b40b6943 348 return -1; // timeout
KatsushiOgawa 0:d496b40b6943 349 }
KatsushiOgawa 0:d496b40b6943 350
KatsushiOgawa 0:d496b40b6943 351 int SDFileSystem::_read(char *buffer, int length) {
KatsushiOgawa 0:d496b40b6943 352 _cs = 0;
KatsushiOgawa 0:d496b40b6943 353
KatsushiOgawa 0:d496b40b6943 354 // read until start byte (0xFF)
KatsushiOgawa 0:d496b40b6943 355 while(_spi.write(0xFF) != 0xFE);
KatsushiOgawa 0:d496b40b6943 356
KatsushiOgawa 0:d496b40b6943 357 // read data
KatsushiOgawa 0:d496b40b6943 358 for(int i=0; i<length; i++) {
KatsushiOgawa 0:d496b40b6943 359 buffer[i] = _spi.write(0xFF);
KatsushiOgawa 0:d496b40b6943 360 }
KatsushiOgawa 0:d496b40b6943 361 _spi.write(0xFF); // checksum
KatsushiOgawa 0:d496b40b6943 362 _spi.write(0xFF);
KatsushiOgawa 0:d496b40b6943 363
KatsushiOgawa 0:d496b40b6943 364 _cs = 1;
KatsushiOgawa 0:d496b40b6943 365 _spi.write(0xFF);
KatsushiOgawa 0:d496b40b6943 366 return 0;
KatsushiOgawa 0:d496b40b6943 367 }
KatsushiOgawa 0:d496b40b6943 368
KatsushiOgawa 0:d496b40b6943 369 int SDFileSystem::_write(const char *buffer, int length) {
KatsushiOgawa 0:d496b40b6943 370 _cs = 0;
KatsushiOgawa 0:d496b40b6943 371
KatsushiOgawa 0:d496b40b6943 372 // indicate start of block
KatsushiOgawa 0:d496b40b6943 373 _spi.write(0xFE);
KatsushiOgawa 0:d496b40b6943 374
KatsushiOgawa 0:d496b40b6943 375 // write the data
KatsushiOgawa 0:d496b40b6943 376 for(int i=0; i<length; i++) {
KatsushiOgawa 0:d496b40b6943 377 _spi.write(buffer[i]);
KatsushiOgawa 0:d496b40b6943 378 }
KatsushiOgawa 0:d496b40b6943 379
KatsushiOgawa 0:d496b40b6943 380 // write the checksum
KatsushiOgawa 0:d496b40b6943 381 _spi.write(0xFF);
KatsushiOgawa 0:d496b40b6943 382 _spi.write(0xFF);
KatsushiOgawa 0:d496b40b6943 383
KatsushiOgawa 0:d496b40b6943 384 // check the repsonse token
KatsushiOgawa 0:d496b40b6943 385 if((_spi.write(0xFF) & 0x1F) != 0x05) {
KatsushiOgawa 0:d496b40b6943 386 _cs = 1;
KatsushiOgawa 0:d496b40b6943 387 _spi.write(0xFF);
KatsushiOgawa 0:d496b40b6943 388 return 1;
KatsushiOgawa 0:d496b40b6943 389 }
KatsushiOgawa 0:d496b40b6943 390
KatsushiOgawa 0:d496b40b6943 391 // wait for write to finish
KatsushiOgawa 0:d496b40b6943 392 while(_spi.write(0xFF) == 0);
KatsushiOgawa 0:d496b40b6943 393
KatsushiOgawa 0:d496b40b6943 394 _cs = 1;
KatsushiOgawa 0:d496b40b6943 395 _spi.write(0xFF);
KatsushiOgawa 0:d496b40b6943 396 return 0;
KatsushiOgawa 0:d496b40b6943 397 }
KatsushiOgawa 0:d496b40b6943 398
KatsushiOgawa 0:d496b40b6943 399 static int ext_bits(char *data, int msb, int lsb) {
KatsushiOgawa 0:d496b40b6943 400 int bits = 0;
KatsushiOgawa 0:d496b40b6943 401 int size = 1 + msb - lsb;
KatsushiOgawa 0:d496b40b6943 402 for(int i=0; i<size; i++) {
KatsushiOgawa 0:d496b40b6943 403 int position = lsb + i;
KatsushiOgawa 0:d496b40b6943 404 int byte = 15 - (position >> 3);
KatsushiOgawa 0:d496b40b6943 405 int bit = position & 0x7;
KatsushiOgawa 0:d496b40b6943 406 int value = (data[byte] >> bit) & 1;
KatsushiOgawa 0:d496b40b6943 407 bits |= value << i;
KatsushiOgawa 0:d496b40b6943 408 }
KatsushiOgawa 0:d496b40b6943 409 return bits;
KatsushiOgawa 0:d496b40b6943 410 }
KatsushiOgawa 0:d496b40b6943 411
KatsushiOgawa 0:d496b40b6943 412 int SDFileSystem::_sd_sectors() {
KatsushiOgawa 0:d496b40b6943 413
KatsushiOgawa 0:d496b40b6943 414 // CMD9, Response R2 (R1 byte + 16-byte block read)
KatsushiOgawa 0:d496b40b6943 415 if(_cmdx(9, 0) != 0) {
KatsushiOgawa 0:d496b40b6943 416 fprintf(stderr, "Didn't get a response from the disk\n");
KatsushiOgawa 0:d496b40b6943 417 return 0;
KatsushiOgawa 0:d496b40b6943 418 }
KatsushiOgawa 0:d496b40b6943 419
KatsushiOgawa 0:d496b40b6943 420 char csd[16];
KatsushiOgawa 0:d496b40b6943 421 if(_read(csd, 16) != 0) {
KatsushiOgawa 0:d496b40b6943 422 fprintf(stderr, "Couldn't read csd response from disk\n");
KatsushiOgawa 0:d496b40b6943 423 return 0;
KatsushiOgawa 0:d496b40b6943 424 }
KatsushiOgawa 0:d496b40b6943 425
KatsushiOgawa 0:d496b40b6943 426 // csd_structure : csd[127:126]
KatsushiOgawa 0:d496b40b6943 427 // c_size : csd[73:62]
KatsushiOgawa 0:d496b40b6943 428 // c_size_mult : csd[49:47]
KatsushiOgawa 0:d496b40b6943 429 // read_bl_len : csd[83:80] - the *maximum* read block length
KatsushiOgawa 0:d496b40b6943 430
KatsushiOgawa 0:d496b40b6943 431 int csd_structure = ext_bits(csd, 127, 126);
KatsushiOgawa 0:d496b40b6943 432 int c_size = ext_bits(csd, 73, 62);
KatsushiOgawa 0:d496b40b6943 433 int c_size_mult = ext_bits(csd, 49, 47);
KatsushiOgawa 0:d496b40b6943 434 int read_bl_len = ext_bits(csd, 83, 80);
KatsushiOgawa 0:d496b40b6943 435
KatsushiOgawa 0:d496b40b6943 436 // printf("CSD_STRUCT = %d\n", csd_structure);
KatsushiOgawa 0:d496b40b6943 437
KatsushiOgawa 0:d496b40b6943 438 if(csd_structure != 0) {
KatsushiOgawa 0:d496b40b6943 439 fprintf(stderr, "This disk tastes funny! I only know about type 0 CSD structures\n");
KatsushiOgawa 0:d496b40b6943 440 return 0;
KatsushiOgawa 0:d496b40b6943 441 }
KatsushiOgawa 0:d496b40b6943 442
KatsushiOgawa 0:d496b40b6943 443 // memory capacity = BLOCKNR * BLOCK_LEN
KatsushiOgawa 0:d496b40b6943 444 // where
KatsushiOgawa 0:d496b40b6943 445 // BLOCKNR = (C_SIZE+1) * MULT
KatsushiOgawa 0:d496b40b6943 446 // MULT = 2^(C_SIZE_MULT+2) (C_SIZE_MULT < 8)
KatsushiOgawa 0:d496b40b6943 447 // BLOCK_LEN = 2^READ_BL_LEN, (READ_BL_LEN < 12)
KatsushiOgawa 0:d496b40b6943 448
KatsushiOgawa 0:d496b40b6943 449 int block_len = 1 << read_bl_len;
KatsushiOgawa 0:d496b40b6943 450 int mult = 1 << (c_size_mult + 2);
KatsushiOgawa 0:d496b40b6943 451 int blocknr = (c_size + 1) * mult;
KatsushiOgawa 0:d496b40b6943 452 int capacity = blocknr * block_len;
KatsushiOgawa 0:d496b40b6943 453
KatsushiOgawa 0:d496b40b6943 454 int blocks = capacity / 512;
KatsushiOgawa 0:d496b40b6943 455
KatsushiOgawa 0:d496b40b6943 456 return blocks;
KatsushiOgawa 0:d496b40b6943 457 }